(kicad_pcb
	(version 20241229)
	(generator "pcbnew")
	(generator_version "9.0")
	(general
		(thickness 1.6)
		(legacy_teardrops no)
	)
	(paper "A4")
	(title_block
		(title "${acronym} - ${title}")
		(date "${date}")
		(rev "${revision}")
		(company "${company}")
		(comment 1 "${creator}")
		(comment 2 "${license}")
	)
	(layers
		(0 "F.Cu" signal)
		(2 "B.Cu" signal)
		(9 "F.Adhes" user "F.Adhesive")
		(11 "B.Adhes" user "B.Adhesive")
		(13 "F.Paste" user)
		(15 "B.Paste" user)
		(5 "F.SilkS" user "F.Silkscreen")
		(7 "B.SilkS" user "B.Silkscreen")
		(1 "F.Mask" user)
		(3 "B.Mask" user)
		(17 "Dwgs.User" user "User.Drawings")
		(19 "Cmts.User" user "User.Comments")
		(21 "Eco1.User" user "User.Eco1")
		(23 "Eco2.User" user "User.Eco2")
		(25 "Edge.Cuts" user)
		(27 "Margin" user)
		(31 "F.CrtYd" user "F.Courtyard")
		(29 "B.CrtYd" user "B.Courtyard")
		(35 "F.Fab" user)
		(33 "B.Fab" user)
		(39 "User.1" user)
		(41 "User.2" user)
		(43 "User.3" user)
		(45 "User.4" user)
		(47 "User.5" user)
		(49 "User.6" user)
		(51 "User.7" user)
		(53 "User.8" user)
		(55 "User.9" user)
	)
	(setup
		(stackup
			(layer "F.SilkS"
				(type "Top Silk Screen")
			)
			(layer "F.Paste"
				(type "Top Solder Paste")
			)
			(layer "F.Mask"
				(type "Top Solder Mask")
				(thickness 0.01)
			)
			(layer "F.Cu"
				(type "copper")
				(thickness 0.035)
			)
			(layer "dielectric 1"
				(type "core")
				(thickness 1.51)
				(material "FR4")
				(epsilon_r 4.5)
				(loss_tangent 0.02)
			)
			(layer "B.Cu"
				(type "copper")
				(thickness 0.035)
			)
			(layer "B.Mask"
				(type "Bottom Solder Mask")
				(thickness 0.01)
			)
			(layer "B.Paste"
				(type "Bottom Solder Paste")
			)
			(layer "B.SilkS"
				(type "Bottom Silk Screen")
			)
			(copper_finish "None")
			(dielectric_constraints no)
		)
		(pad_to_mask_clearance 0)
		(allow_soldermask_bridges_in_footprints no)
		(tenting front back)
		(aux_axis_origin 127 88.754996)
		(grid_origin 127 88.754996)
		(pcbplotparams
			(layerselection 0x00000000_00000000_55555555_5755f5ff)
			(plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000)
			(disableapertmacros no)
			(usegerberextensions yes)
			(usegerberattributes yes)
			(usegerberadvancedattributes yes)
			(creategerberjobfile yes)
			(dashed_line_dash_ratio 12.000000)
			(dashed_line_gap_ratio 3.000000)
			(svgprecision 6)
			(plotframeref no)
			(mode 1)
			(useauxorigin no)
			(hpglpennumber 1)
			(hpglpenspeed 20)
			(hpglpendiameter 15.000000)
			(pdf_front_fp_property_popups yes)
			(pdf_back_fp_property_popups yes)
			(pdf_metadata yes)
			(pdf_single_document no)
			(dxfpolygonmode yes)
			(dxfimperialunits yes)
			(dxfusepcbnewfont yes)
			(psnegative no)
			(psa4output no)
			(plot_black_and_white yes)
			(sketchpadsonfab no)
			(plotpadnumbers no)
			(hidednponfab no)
			(sketchdnponfab yes)
			(crossoutdnponfab yes)
			(subtractmaskfromsilk no)
			(outputformat 1)
			(mirror no)
			(drillshape 0)
			(scaleselection 1)
			(outputdirectory "gerber")
		)
	)
	(property "acronym" "DD")
	(property "company" "HTL-Rankweil")
	(property "creator" "GAR")
	(property "date" "1337-13-37")
	(property "license" "CC BY-NC-SA 4.0")
	(property "link" "github.com/htl-rankweil")
	(property "revision" "1.0")
	(property "title" "DEMO")
	(net 0 "")
	(net 1 "Net-(Q1-C)")
	(net 2 "GND")
	(net 3 "Net-(Q2-B)")
	(net 4 "Net-(Q2-C)")
	(net 5 "Net-(Q1-B)")
	(net 6 "Net-(D1-K)")
	(net 7 "Net-(D2-K)")
	(net 8 "+9V")
	(footprint "MountingHole:MountingHole_3.2mm_M3_DIN965_Pad"
		(layer "F.Cu")
		(uuid "1365cea0-5208-4d9a-83ad-0243bf7604df")
		(at 130.556 110.598996)
		(descr "Mounting Hole 3.2mm, M3, generated by kicad-footprint-generator mountinghole.py")
		(tags "mountinghole M3 DIN965")
		(property "Reference" "H2"
			(at 0 -3.8 0)
			(layer "F.SilkS")
			(hide yes)
			(uuid "3b24785a-f106-40eb-b1e4-72d0187089bb")
			(effects
				(font
					(size 1 1)
					(thickness 0.15)
				)
			)
		)
		(property "Value" "MountingHole_Pad"
			(at 0 3.8 0)
			(layer "F.Fab")
			(hide yes)
			(uuid "5fef44f3-9f68-4956-87a9-c71a44721f48")
			(effects
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		(property "Datasheet" "~"
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			(layer "F.Fab")
			(hide yes)
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			(effects
				(font
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		)
		(property ki_fp_filters "MountingHole*Pad*")
		(path "/7fea20e5-686b-4f76-a6c5-4cd067d86795")
		(sheetname "/")
		(sheetfile "demo.kicad_sch")
		(attr exclude_from_pos_files exclude_from_bom)
		(fp_circle
			(center 0 0)
			(end 2.8 0)
			(stroke
				(width 0.15)
				(type solid)
			)
			(fill no)
			(layer "Cmts.User")
			(uuid "eb8ed0cd-5c44-41f2-8799-0b9677ef5dc5")
		)
		(fp_circle
			(center 0 0)
			(end 3.05 0)
			(stroke
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			(fill no)
			(layer "F.CrtYd")
			(uuid "d16148ee-df89-475f-9a95-58681c3b095f")
		)
		(fp_text user "${REFERENCE}"
			(at 0 0 0)
			(layer "F.Fab")
			(uuid "7d51c0ab-90c5-4a2b-9850-e7a97f252865")
			(effects
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		)
		(pad "1" thru_hole circle
			(at 0 0)
			(size 5.6 5.6)
			(drill 3.2)
			(layers "*.Cu" "*.Mask")
			(remove_unused_layers no)
			(net 2 "GND")
			(pinfunction "1")
			(pintype "input")
			(zone_connect 2)
			(uuid "bfd00982-496c-4b56-9216-1e1568986acd")
		)
		(embedded_fonts no)
	)
	(footprint "Capacitor_THT:CP_Radial_D4.0mm_P2.00mm"
		(layer "F.Cu")
		(uuid "187e29ce-d277-4536-9d66-b9c38df0770a")
		(at 152.4 103.062595 90)
		(descr "CP, Radial series, Radial, pin pitch=2.00mm, diameter=4mm, height=7mm, Electrolytic Capacitor")
		(tags "CP Radial series Radial pin pitch 2.00mm diameter 4mm height 7mm Electrolytic Capacitor")
		(property "Reference" "C2"
			(at 4.401599 0 90)
			(layer "F.SilkS")
			(uuid "76e574cc-65a3-4154-a1c4-3510947e153a")
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		(property ki_fp_filters "CP_*")
		(path "/5bbc3a2a-1ea4-4515-ab59-ec76a226bebb")
		(sheetname "/")
		(sheetfile "demo.kicad_sch")
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