Since we have an orthogonal instruction set, the increment/decrement
instruction also works for the PC, but keep in mind that the old contents
of PC are saved into LR.
Example: if C=1, call the subroutines FOO and BAR.
SKIP C, PC++, PC++; FOO; BAR;
Of course, this also works for jumping backwards:
SKIP I4, PC--, nop;
The example above waits, until the I4 input line is 1.
Another example: call the subroutine BAR, until C=1.
FOO; BAR; SKIP C, PC--, PC--;
Nevertheless, the practical use for PC++ and PC-- seems to be limited.
Now to explain the CONT instruction, which basically is a counterpart
to "continue", as known from C programming.
Example: shift R2 left "n" times, "n" is defined in R3:
LA=PC, nop, nop; //LA points to the next instruction R2+=R2, R3--, CONT !Z; //shift R2 right until R3 is zero.
In the example above, the CPU fetches the first 32 Bit instruction word,
then increments PC to point to the next 32 Bit instruction word.
So LA is loaded with the address of the next instruction word...
which shifts R2 left, decrements R3, and writes LA into PC if the result
from decrementing R3 wasn't zero.
Which means, that the second instruction word is fetched from the CPU again
and again, until R3 finally reached zero.
Now for the main reason, why we wanted to have a CONT instruction:
block move.
R2=[PC++], R3=[PC++], R4=[PC++];
.word FROM;
.word TO;
.word COUNT;
LA=PC, nop, nop;
R6=[R2], [R3]=R6, R2++;
R3++, R4--, CONT !Z;
First, R2, R3, R4 are loaded with source address, destination address,
and the number of longwords to be moved.
Second, LR is initialised to point at the head of the block move loop.
Third, we have the block move loop, consisting of two 32 Bit instruction
words, which is terminated when R4 was decremented down to zero.
Maybe you're finding some more neat tricks about how to use the CONT
instruction when experimenting a little bit...
[HOME] [UP]/ [BACK] [1] [2] [3] [4] [5] [6] [7] [8] [NEXT]
(c) Dieter Mueller 2007, 2008