TimeQuest Timing Analyzer report for count2627 Tue Sep 26 10:43:33 2023 Quartus Prime Version 17.1.0 Build 590 10/25/2017 SJ Lite Edition --------------------- ; Table of Contents ; --------------------- 1. Legal Notice 2. TimeQuest Timing Analyzer Summary 3. Parallel Compilation 4. Clocks 5. Slow 1200mV 85C Model Fmax Summary 6. Timing Closure Recommendations 7. Slow 1200mV 85C Model Setup Summary 8. Slow 1200mV 85C Model Hold Summary 9. Slow 1200mV 85C Model Recovery Summary 10. Slow 1200mV 85C Model Removal Summary 11. Slow 1200mV 85C Model Minimum Pulse Width Summary 12. Slow 1200mV 85C Model Setup: 'CLK' 13. Slow 1200mV 85C Model Hold: 'CLK' 14. Slow 1200mV 85C Model Recovery: 'CLK' 15. Slow 1200mV 85C Model Removal: 'CLK' 16. Slow 1200mV 85C Model Metastability Summary 17. Slow 1200mV 0C Model Fmax Summary 18. Slow 1200mV 0C Model Setup Summary 19. Slow 1200mV 0C Model Hold Summary 20. Slow 1200mV 0C Model Recovery Summary 21. Slow 1200mV 0C Model Removal Summary 22. Slow 1200mV 0C Model Minimum Pulse Width Summary 23. Slow 1200mV 0C Model Setup: 'CLK' 24. Slow 1200mV 0C Model Hold: 'CLK' 25. Slow 1200mV 0C Model Recovery: 'CLK' 26. Slow 1200mV 0C Model Removal: 'CLK' 27. Slow 1200mV 0C Model Metastability Summary 28. Fast 1200mV 0C Model Setup Summary 29. Fast 1200mV 0C Model Hold Summary 30. Fast 1200mV 0C Model Recovery Summary 31. Fast 1200mV 0C Model Removal Summary 32. Fast 1200mV 0C Model Minimum Pulse Width Summary 33. Fast 1200mV 0C Model Setup: 'CLK' 34. Fast 1200mV 0C Model Hold: 'CLK' 35. Fast 1200mV 0C Model Recovery: 'CLK' 36. Fast 1200mV 0C Model Removal: 'CLK' 37. Fast 1200mV 0C Model Metastability Summary 38. Multicorner Timing Analysis Summary 39. Board Trace Model Assignments 40. Input Transition Times 41. Signal Integrity Metrics (Slow 1200mv 0c Model) 42. Signal Integrity Metrics (Slow 1200mv 85c Model) 43. Signal Integrity Metrics (Fast 1200mv 0c Model) 44. Setup Transfers 45. Hold Transfers 46. Recovery Transfers 47. Removal Transfers 48. Report TCCS 49. Report RSKM 50. Unconstrained Paths Summary 51. Clock Status Summary 52. Unconstrained Input Ports 53. Unconstrained Output Ports 54. Unconstrained Input Ports 55. Unconstrained Output Ports 56. TimeQuest Timing Analyzer Messages ---------------- ; Legal Notice ; ---------------- Copyright (C) 2017 Intel Corporation. All rights reserved. Your use of Intel Corporation's design tools, logic functions and other software and tools, and its AMPP partner logic functions, and any output files from any of the foregoing (including device programming or simulation files), and any associated documentation or information are expressly subject to the terms and conditions of the Intel Program License Subscription Agreement, the Intel Quartus Prime License Agreement, the Intel FPGA IP License Agreement, or other applicable license agreement, including, without limitation, that your use is for the sole purpose of programming logic devices manufactured by Intel and sold by Intel or its authorized distributors. Please refer to the applicable agreement for further details. +-----------------------------------------------------------------------------+ ; TimeQuest Timing Analyzer Summary ; +-----------------------+-----------------------------------------------------+ ; Quartus Prime Version ; Version 17.1.0 Build 590 10/25/2017 SJ Lite Edition ; ; Timing Analyzer ; TimeQuest ; ; Revision Name ; count2627 ; ; Device Family ; Cyclone IV E ; ; Device Name ; EP4CE6E22C6 ; ; Timing Models ; Final ; ; Delay Model ; Combined ; ; Rise/Fall Delays ; Enabled ; +-----------------------+-----------------------------------------------------+ +------------------------------------------+ ; Parallel Compilation ; +----------------------------+-------------+ ; Processors ; Number ; +----------------------------+-------------+ ; Number detected on machine ; 12 ; ; Maximum allowed ; 6 ; ; ; ; ; Average used ; 1.01 ; ; Maximum used ; 6 ; ; ; ; ; Usage by Processor ; % Time Used ; ; Processor 1 ; 100.0% ; ; Processors 2-6 ; 0.3% ; +----------------------------+-------------+ +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Clocks ; +------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-----------+ ; Clock Name ; Type ; Period ; Frequency ; Rise ; Fall ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master ; Source ; Targets ; +------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-----------+ ; ALOAD ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { ALOAD } ; ; CLK ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { CLK } ; +------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-----------+ +-----------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Fmax Summary ; +------------+-----------------+------------+---------------------------------------------------------------+ ; Fmax ; Restricted Fmax ; Clock Name ; Note ; +------------+-----------------+------------+---------------------------------------------------------------+ ; 349.04 MHz ; 250.0 MHz ; CLK ; limit due to minimum period restriction (max I/O toggle rate) ; +------------+-----------------+------------+---------------------------------------------------------------+ This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis. ---------------------------------- ; Timing Closure Recommendations ; ---------------------------------- HTML report is unavailable in plain text report export. +-------------------------------------+ ; Slow 1200mV 85C Model Setup Summary ; +-------+--------+--------------------+ ; Clock ; Slack ; End Point TNS ; +-------+--------+--------------------+ ; CLK ; -2.173 ; -15.666 ; +-------+--------+--------------------+ +------------------------------------+ ; Slow 1200mV 85C Model Hold Summary ; +-------+-------+--------------------+ ; Clock ; Slack ; End Point TNS ; +-------+-------+--------------------+ ; CLK ; 0.716 ; 0.000 ; +-------+-------+--------------------+ +----------------------------------------+ ; Slow 1200mV 85C Model Recovery Summary ; +-------+--------+-----------------------+ ; Clock ; Slack ; End Point TNS ; +-------+--------+-----------------------+ ; CLK ; -1.363 ; -10.135 ; +-------+--------+-----------------------+ +---------------------------------------+ ; Slow 1200mV 85C Model Removal Summary ; +-------+-------+-----------------------+ ; Clock ; Slack ; End Point TNS ; +-------+-------+-----------------------+ ; CLK ; 1.159 ; 0.000 ; +-------+-------+-----------------------+ +---------------------------------------------------+ ; Slow 1200mV 85C Model Minimum Pulse Width Summary ; +-------+--------+----------------------------------+ ; Clock ; Slack ; End Point TNS ; +-------+--------+----------------------------------+ ; CLK ; -3.000 ; -11.000 ; ; ALOAD ; -3.000 ; -3.000 ; +-------+--------+----------------------------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Setup: 'CLK' ; +--------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; -2.173 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 0.500 ; -0.223 ; 2.425 ; ; -2.151 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; -0.224 ; 2.402 ; ; -2.149 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 0.500 ; -0.223 ; 2.401 ; ; -2.132 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.224 ; 2.383 ; ; -2.127 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; -0.224 ; 2.378 ; ; -2.108 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.224 ; 2.359 ; ; -2.010 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.224 ; 2.261 ; ; -1.986 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.224 ; 2.237 ; ; -1.975 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 0.500 ; -0.183 ; 2.267 ; ; -1.953 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; -0.184 ; 2.244 ; ; -1.939 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.184 ; 2.230 ; ; -1.933 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.184 ; 2.224 ; ; -1.930 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; -0.219 ; 2.186 ; ; -1.911 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.219 ; 2.167 ; ; -1.905 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; 0.500 ; -0.223 ; 2.157 ; ; -1.896 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.500 ; -0.224 ; 2.147 ; ; -1.890 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; 0.500 ; -0.224 ; 2.141 ; ; -1.872 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.500 ; -0.224 ; 2.123 ; ; -1.865 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 1.000 ; -0.063 ; 2.797 ; ; -1.843 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.774 ; ; -1.842 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; 0.500 ; -0.184 ; 2.133 ; ; -1.824 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.755 ; ; -1.824 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.500 ; -0.184 ; 2.115 ; ; -1.797 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; -0.183 ; 2.089 ; ; -1.796 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~9 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.219 ; 2.052 ; ; -1.789 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.219 ; 2.045 ; ; -1.783 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.183 ; 2.075 ; ; -1.777 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.183 ; 2.069 ; ; -1.757 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 1.000 ; -0.063 ; 2.689 ; ; -1.745 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~10 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.224 ; 1.996 ; ; -1.739 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~10 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.224 ; 1.990 ; ; -1.735 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.666 ; ; -1.716 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.647 ; ; -1.702 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.633 ; ; -1.692 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.623 ; ; -1.670 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 1.000 ; -0.065 ; 2.600 ; ; -1.668 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.500 ; -0.183 ; 1.960 ; ; -1.655 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.065 ; 2.585 ; ; -1.651 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.065 ; 2.581 ; ; -1.621 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; CLK ; CLK ; 1.000 ; -0.063 ; 2.553 ; ; -1.606 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.537 ; ; -1.594 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.525 ; ; -1.588 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.519 ; ; -1.558 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; CLK ; CLK ; 1.000 ; -0.065 ; 2.488 ; ; -1.540 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 1.000 ; -0.065 ; 2.470 ; ; -1.526 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 1.000 ; -0.065 ; 2.456 ; ; -1.509 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; ALOAD ; CLK ; 0.500 ; -0.224 ; 1.760 ; ; -1.507 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.065 ; 2.437 ; ; -1.503 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.065 ; 2.433 ; ; -1.489 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; 0.500 ; -0.224 ; 1.740 ; ; -1.485 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.416 ; ; -1.480 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.411 ; ; -1.466 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.397 ; ; -1.456 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 0.500 ; -0.182 ; 1.749 ; ; -1.395 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~10 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; -0.224 ; 1.646 ; ; -1.388 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 1.000 ; -0.065 ; 2.318 ; ; -1.353 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; 0.500 ; -0.183 ; 1.645 ; ; -1.347 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.278 ; ; -1.344 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.275 ; ; -1.276 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~9 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.219 ; 1.532 ; ; -1.276 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.500 ; -0.219 ; 1.532 ; ; -1.263 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.194 ; ; -1.251 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.182 ; ; -1.215 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.146 ; ; -1.202 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.133 ; ; -1.108 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.039 ; ; -1.103 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; CLK ; CLK ; 1.000 ; -0.064 ; 2.034 ; ; -0.985 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.064 ; 1.916 ; ; -0.978 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7]~8 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.222 ; 1.231 ; ; -0.940 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 1.000 ; -0.064 ; 1.871 ; ; -0.831 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 1.000 ; -0.064 ; 1.762 ; ; -0.827 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.064 ; 1.758 ; +--------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Hold: 'CLK' ; +-------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; 0.716 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; -0.500 ; -0.049 ; 0.364 ; ; 0.899 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; -0.500 ; -0.050 ; 0.546 ; ; 0.932 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~10 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; -0.090 ; 0.539 ; ; 1.032 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7]~8 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.087 ; 0.642 ; ; 1.099 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; ALOAD ; CLK ; -0.500 ; -0.089 ; 0.707 ; ; 1.117 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~9 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.085 ; 0.729 ; ; 1.118 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; -0.500 ; -0.084 ; 0.731 ; ; 1.126 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; -0.500 ; -0.089 ; 0.734 ; ; 1.258 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.064 ; 1.479 ; ; 1.261 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 0.000 ; 0.064 ; 1.482 ; ; 1.363 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 0.000 ; 0.064 ; 1.584 ; ; 1.484 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.064 ; 1.705 ; ; 1.531 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.064 ; 1.752 ; ; 1.532 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.064 ; 1.753 ; ; 1.535 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; CLK ; CLK ; 0.000 ; 0.064 ; 1.756 ; ; 1.549 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.064 ; 1.770 ; ; 1.563 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; CLK ; CLK ; 0.000 ; 0.064 ; 1.784 ; ; 1.620 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.064 ; 1.841 ; ; 1.625 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; CLK ; CLK ; 0.000 ; 0.064 ; 1.846 ; ; 1.630 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 0.000 ; 0.064 ; 1.851 ; ; 1.637 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 0.000 ; 0.064 ; 1.858 ; ; 1.646 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.064 ; 1.867 ; ; 1.661 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 0.000 ; 0.063 ; 1.881 ; ; 1.772 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.063 ; 1.992 ; ; 1.784 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 0.000 ; 0.063 ; 2.004 ; ; 1.786 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 0.000 ; 0.064 ; 2.007 ; ; 1.788 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; CLK ; CLK ; 0.000 ; 0.063 ; 2.008 ; ; 1.793 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.063 ; 2.013 ; ; 1.799 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 0.000 ; 0.063 ; 2.019 ; ; 1.806 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; CLK ; CLK ; 0.000 ; 0.065 ; 2.028 ; ; 1.841 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; CLK ; CLK ; 0.000 ; 0.064 ; 2.062 ; ; 1.852 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 0.000 ; 0.064 ; 2.073 ; ; 1.897 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.064 ; 2.118 ; ; 1.904 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; -0.500 ; -0.050 ; 1.551 ; ; 1.910 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.063 ; 2.130 ; ; 1.923 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 0.000 ; 0.064 ; 2.144 ; ; 1.929 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 0.000 ; 0.063 ; 2.149 ; ; 1.932 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.064 ; 2.153 ; ; 1.938 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.063 ; 2.158 ; ; 1.947 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 0.000 ; 0.065 ; 2.169 ; ; 1.953 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 0.000 ; 0.064 ; 2.174 ; ; 1.963 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.064 ; 2.184 ; ; 1.983 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~9 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.085 ; 1.595 ; ; 1.991 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~10 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.090 ; 1.598 ; ; 1.994 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 0.000 ; 0.064 ; 2.215 ; ; 2.003 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.064 ; 2.224 ; ; 2.008 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~10 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.090 ; 1.615 ; ; 2.015 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.050 ; 1.662 ; ; 2.018 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 0.000 ; 0.065 ; 2.240 ; ; 2.026 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; -0.050 ; 1.673 ; ; 2.033 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; -0.500 ; -0.051 ; 1.679 ; ; 2.035 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.050 ; 1.682 ; ; 2.044 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; -0.500 ; -0.051 ; 1.690 ; ; 2.070 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.084 ; 1.683 ; ; 2.086 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; -0.084 ; 1.699 ; ; 2.095 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.084 ; 1.708 ; ; 2.097 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; -0.500 ; -0.088 ; 1.706 ; ; 2.133 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; -0.500 ; -0.089 ; 1.741 ; ; 2.141 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; -0.500 ; -0.089 ; 1.749 ; ; 2.144 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; -0.500 ; -0.089 ; 1.752 ; ; 2.155 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.051 ; 1.801 ; ; 2.173 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; -0.051 ; 1.819 ; ; 2.182 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.051 ; 1.828 ; ; 2.197 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; -0.500 ; -0.050 ; 1.844 ; ; 2.252 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.089 ; 1.860 ; ; 2.255 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.089 ; 1.863 ; ; 2.279 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; -0.089 ; 1.887 ; ; 2.285 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; -0.089 ; 1.893 ; ; 2.288 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.089 ; 1.896 ; ; 2.294 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.089 ; 1.902 ; ; 2.303 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; -0.500 ; -0.088 ; 1.912 ; ; 2.309 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; -0.500 ; -0.088 ; 1.918 ; +-------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Recovery: 'CLK' ; +--------+-----------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; -1.363 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; ALOAD ; CLK ; 0.500 ; 1.996 ; 3.834 ; ; -1.254 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; 0.500 ; 1.996 ; 3.725 ; ; -1.254 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.500 ; 1.996 ; 3.725 ; ; -1.254 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; 1.996 ; 3.725 ; ; -1.254 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; 1.996 ; 3.725 ; ; -1.254 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; 1.996 ; 3.725 ; ; -1.251 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; 0.500 ; 1.997 ; 3.723 ; ; -1.251 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 0.500 ; 1.997 ; 3.723 ; ; -0.687 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; ALOAD ; CLK ; 1.000 ; 1.996 ; 3.658 ; ; -0.598 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; 1.000 ; 1.996 ; 3.569 ; ; -0.598 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 1.000 ; 1.996 ; 3.569 ; ; -0.598 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 1.000 ; 1.996 ; 3.569 ; ; -0.598 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 1.000 ; 1.996 ; 3.569 ; ; -0.598 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 1.000 ; 1.996 ; 3.569 ; ; -0.583 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; 1.000 ; 1.997 ; 3.555 ; ; -0.583 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 1.000 ; 1.997 ; 3.555 ; +--------+-----------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Removal: 'CLK' ; +-------+-----------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; 1.159 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; 0.000 ; 2.073 ; 3.429 ; ; 1.159 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 0.000 ; 2.073 ; 3.429 ; ; 1.174 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; 0.000 ; 2.072 ; 3.443 ; ; 1.174 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.000 ; 2.072 ; 3.443 ; ; 1.174 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.000 ; 2.072 ; 3.443 ; ; 1.174 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.000 ; 2.072 ; 3.443 ; ; 1.174 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.000 ; 2.072 ; 3.443 ; ; 1.260 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; ALOAD ; CLK ; 0.000 ; 2.072 ; 3.529 ; ; 1.823 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; -0.500 ; 2.073 ; 3.593 ; ; 1.823 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; -0.500 ; 2.073 ; 3.593 ; ; 1.826 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; -0.500 ; 2.072 ; 3.595 ; ; 1.826 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; -0.500 ; 2.072 ; 3.595 ; ; 1.826 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; 2.072 ; 3.595 ; ; 1.826 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; 2.072 ; 3.595 ; ; 1.826 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; 2.072 ; 3.595 ; ; 1.930 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; ALOAD ; CLK ; -0.500 ; 2.072 ; 3.699 ; +-------+-----------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ----------------------------------------------- ; Slow 1200mV 85C Model Metastability Summary ; ----------------------------------------------- No synchronizer chains to report. +-----------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Fmax Summary ; +------------+-----------------+------------+---------------------------------------------------------------+ ; Fmax ; Restricted Fmax ; Clock Name ; Note ; +------------+-----------------+------------+---------------------------------------------------------------+ ; 394.48 MHz ; 250.0 MHz ; CLK ; limit due to minimum period restriction (max I/O toggle rate) ; +------------+-----------------+------------+---------------------------------------------------------------+ This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis. +------------------------------------+ ; Slow 1200mV 0C Model Setup Summary ; +-------+--------+-------------------+ ; Clock ; Slack ; End Point TNS ; +-------+--------+-------------------+ ; CLK ; -1.848 ; -13.304 ; +-------+--------+-------------------+ +-----------------------------------+ ; Slow 1200mV 0C Model Hold Summary ; +-------+-------+-------------------+ ; Clock ; Slack ; End Point TNS ; +-------+-------+-------------------+ ; CLK ; 0.666 ; 0.000 ; +-------+-------+-------------------+ +---------------------------------------+ ; Slow 1200mV 0C Model Recovery Summary ; +-------+--------+----------------------+ ; Clock ; Slack ; End Point TNS ; +-------+--------+----------------------+ ; CLK ; -1.217 ; -9.058 ; +-------+--------+----------------------+ +--------------------------------------+ ; Slow 1200mV 0C Model Removal Summary ; +-------+-------+----------------------+ ; Clock ; Slack ; End Point TNS ; +-------+-------+----------------------+ ; CLK ; 1.096 ; 0.000 ; +-------+-------+----------------------+ +--------------------------------------------------+ ; Slow 1200mV 0C Model Minimum Pulse Width Summary ; +-------+--------+---------------------------------+ ; Clock ; Slack ; End Point TNS ; +-------+--------+---------------------------------+ ; CLK ; -3.000 ; -11.000 ; ; ALOAD ; -3.000 ; -3.000 ; +-------+--------+---------------------------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Setup: 'CLK' ; +--------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; -1.848 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 0.500 ; -0.177 ; 2.146 ; ; -1.828 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; -0.177 ; 2.126 ; ; -1.819 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 0.500 ; -0.177 ; 2.117 ; ; -1.813 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.177 ; 2.111 ; ; -1.799 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; -0.177 ; 2.097 ; ; -1.784 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.177 ; 2.082 ; ; -1.702 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.177 ; 2.000 ; ; -1.690 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 0.500 ; -0.143 ; 2.022 ; ; -1.673 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.177 ; 1.971 ; ; -1.672 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; -0.143 ; 2.004 ; ; -1.665 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.143 ; 1.997 ; ; -1.654 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.143 ; 1.986 ; ; -1.640 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; -0.173 ; 1.942 ; ; -1.626 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; 0.500 ; -0.177 ; 1.924 ; ; -1.625 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.173 ; 1.927 ; ; -1.604 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.500 ; -0.177 ; 1.902 ; ; -1.590 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; 0.500 ; -0.177 ; 1.888 ; ; -1.579 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; 0.500 ; -0.143 ; 1.911 ; ; -1.575 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.500 ; -0.177 ; 1.873 ; ; -1.567 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.500 ; -0.143 ; 1.899 ; ; -1.535 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 1.000 ; -0.056 ; 2.474 ; ; -1.534 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; -0.142 ; 1.867 ; ; -1.527 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.142 ; 1.860 ; ; -1.524 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~9 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.174 ; 1.825 ; ; -1.516 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.142 ; 1.849 ; ; -1.515 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 1.000 ; -0.056 ; 2.454 ; ; -1.514 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.173 ; 1.816 ; ; -1.500 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.056 ; 2.439 ; ; -1.480 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~10 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.178 ; 1.777 ; ; -1.469 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~10 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.178 ; 1.766 ; ; -1.440 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.378 ; ; -1.429 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.500 ; -0.142 ; 1.762 ; ; -1.420 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.358 ; ; -1.405 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.343 ; ; -1.402 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.340 ; ; -1.389 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.056 ; 2.328 ; ; -1.384 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.322 ; ; -1.377 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.315 ; ; -1.366 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.304 ; ; -1.342 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; CLK ; CLK ; 1.000 ; -0.056 ; 2.281 ; ; -1.306 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; CLK ; CLK ; 1.000 ; -0.056 ; 2.245 ; ; -1.294 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.232 ; ; -1.293 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; ALOAD ; CLK ; 0.500 ; -0.178 ; 1.590 ; ; -1.291 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 1.000 ; -0.056 ; 2.230 ; ; -1.291 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.229 ; ; -1.279 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.217 ; ; -1.266 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; 0.500 ; -0.177 ; 1.564 ; ; -1.253 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.191 ; ; -1.246 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.184 ; ; -1.237 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.175 ; ; -1.220 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 0.500 ; -0.142 ; 1.553 ; ; -1.210 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.148 ; ; -1.196 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.134 ; ; -1.195 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.133 ; ; -1.175 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~10 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; -0.178 ; 1.472 ; ; -1.157 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; 0.500 ; -0.143 ; 1.489 ; ; -1.148 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.086 ; ; -1.092 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.030 ; ; -1.084 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.057 ; 2.022 ; ; -1.070 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.500 ; -0.173 ; 1.372 ; ; -1.067 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~9 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.174 ; 1.368 ; ; -1.021 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.057 ; 1.959 ; ; -1.011 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.057 ; 1.949 ; ; -0.975 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; CLK ; CLK ; 1.000 ; -0.057 ; 1.913 ; ; -0.975 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 1.000 ; -0.057 ; 1.913 ; ; -0.894 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; CLK ; CLK ; 1.000 ; -0.057 ; 1.832 ; ; -0.886 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; CLK ; CLK ; 1.000 ; -0.057 ; 1.824 ; ; -0.821 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7]~8 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.176 ; 1.120 ; ; -0.768 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.057 ; 1.706 ; ; -0.734 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 1.000 ; -0.057 ; 1.672 ; ; -0.640 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 1.000 ; -0.057 ; 1.578 ; ; -0.635 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.057 ; 1.573 ; +--------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Hold: 'CLK' ; +-------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; 0.666 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; -0.500 ; -0.026 ; 0.324 ; ; 0.834 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; -0.500 ; -0.027 ; 0.491 ; ; 0.862 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~10 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; -0.060 ; 0.486 ; ; 0.961 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7]~8 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.058 ; 0.587 ; ; 1.019 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; ALOAD ; CLK ; -0.500 ; -0.061 ; 0.642 ; ; 1.031 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; -0.500 ; -0.056 ; 0.659 ; ; 1.032 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~9 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.057 ; 0.659 ; ; 1.039 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; -0.500 ; -0.060 ; 0.663 ; ; 1.132 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.333 ; ; 1.135 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.336 ; ; 1.224 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.425 ; ; 1.332 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.533 ; ; 1.365 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.566 ; ; 1.377 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.578 ; ; 1.389 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.590 ; ; 1.397 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.598 ; ; 1.398 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.599 ; ; 1.443 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.644 ; ; 1.470 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.671 ; ; 1.470 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.671 ; ; 1.474 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.675 ; ; 1.475 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.676 ; ; 1.481 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.682 ; ; 1.576 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.777 ; ; 1.596 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.797 ; ; 1.596 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.797 ; ; 1.603 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.804 ; ; 1.608 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.809 ; ; 1.613 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.814 ; ; 1.632 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; CLK ; CLK ; 0.000 ; 0.058 ; 1.834 ; ; 1.639 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 0.000 ; 0.058 ; 1.841 ; ; 1.641 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; CLK ; CLK ; 0.000 ; 0.058 ; 1.843 ; ; 1.691 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.892 ; ; 1.698 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.899 ; ; 1.729 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; -0.500 ; -0.026 ; 1.387 ; ; 1.734 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.058 ; 1.936 ; ; 1.735 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.936 ; ; 1.738 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.939 ; ; 1.740 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.941 ; ; 1.743 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.944 ; ; 1.771 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.972 ; ; 1.774 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 0.000 ; 0.057 ; 1.975 ; ; 1.788 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 0.000 ; 0.058 ; 1.990 ; ; 1.793 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.058 ; 1.995 ; ; 1.809 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~10 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.060 ; 1.433 ; ; 1.818 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~9 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.057 ; 1.445 ; ; 1.824 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 0.000 ; 0.058 ; 2.026 ; ; 1.824 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.026 ; 1.482 ; ; 1.837 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~10 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.060 ; 1.461 ; ; 1.846 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; -0.500 ; -0.027 ; 1.503 ; ; 1.853 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; -0.500 ; -0.027 ; 1.510 ; ; 1.854 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; -0.026 ; 1.512 ; ; 1.859 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.026 ; 1.517 ; ; 1.877 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.056 ; 1.505 ; ; 1.908 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; -0.056 ; 1.536 ; ; 1.913 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.056 ; 1.541 ; ; 1.923 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; -0.500 ; -0.060 ; 1.547 ; ; 1.930 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; -0.500 ; -0.060 ; 1.554 ; ; 1.930 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; -0.500 ; -0.060 ; 1.554 ; ; 1.930 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; -0.500 ; -0.060 ; 1.554 ; ; 1.948 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.027 ; 1.605 ; ; 1.983 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; -0.027 ; 1.640 ; ; 1.988 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.027 ; 1.645 ; ; 2.019 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; -0.500 ; -0.027 ; 1.676 ; ; 2.025 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.060 ; 1.649 ; ; 2.025 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.060 ; 1.649 ; ; 2.074 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; -0.060 ; 1.698 ; ; 2.077 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; -0.060 ; 1.701 ; ; 2.079 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.060 ; 1.703 ; ; 2.082 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.060 ; 1.706 ; ; 2.110 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; -0.500 ; -0.060 ; 1.734 ; ; 2.113 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; -0.500 ; -0.060 ; 1.737 ; +-------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Recovery: 'CLK' ; +--------+-----------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; -1.217 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; ALOAD ; CLK ; 0.500 ; 1.814 ; 3.506 ; ; -1.121 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; 0.500 ; 1.815 ; 3.411 ; ; -1.121 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.500 ; 1.815 ; 3.411 ; ; -1.121 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; 1.815 ; 3.411 ; ; -1.121 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; 1.815 ; 3.411 ; ; -1.121 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; 1.815 ; 3.411 ; ; -1.118 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; 0.500 ; 1.815 ; 3.408 ; ; -1.118 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 0.500 ; 1.815 ; 3.408 ; ; -0.571 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; ALOAD ; CLK ; 1.000 ; 1.814 ; 3.360 ; ; -0.491 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; 1.000 ; 1.815 ; 3.281 ; ; -0.491 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 1.000 ; 1.815 ; 3.281 ; ; -0.491 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 1.000 ; 1.815 ; 3.281 ; ; -0.491 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 1.000 ; 1.815 ; 3.281 ; ; -0.491 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 1.000 ; 1.815 ; 3.281 ; ; -0.488 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; 1.000 ; 1.815 ; 3.278 ; ; -0.488 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 1.000 ; 1.815 ; 3.278 ; +--------+-----------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Removal: 'CLK' ; +-------+-----------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; 1.096 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; 0.000 ; 1.882 ; 3.162 ; ; 1.096 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 0.000 ; 1.882 ; 3.162 ; ; 1.100 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; 0.000 ; 1.882 ; 3.166 ; ; 1.100 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.000 ; 1.882 ; 3.166 ; ; 1.100 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.000 ; 1.882 ; 3.166 ; ; 1.100 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.000 ; 1.882 ; 3.166 ; ; 1.100 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.000 ; 1.882 ; 3.166 ; ; 1.176 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; ALOAD ; CLK ; 0.000 ; 1.881 ; 3.241 ; ; 1.723 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; -0.500 ; 1.882 ; 3.289 ; ; 1.723 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; -0.500 ; 1.882 ; 3.289 ; ; 1.726 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; -0.500 ; 1.882 ; 3.292 ; ; 1.726 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; -0.500 ; 1.882 ; 3.292 ; ; 1.726 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; 1.882 ; 3.292 ; ; 1.726 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; 1.882 ; 3.292 ; ; 1.726 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; 1.882 ; 3.292 ; ; 1.818 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; ALOAD ; CLK ; -0.500 ; 1.881 ; 3.383 ; +-------+-----------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ---------------------------------------------- ; Slow 1200mV 0C Model Metastability Summary ; ---------------------------------------------- No synchronizer chains to report. +------------------------------------+ ; Fast 1200mV 0C Model Setup Summary ; +-------+--------+-------------------+ ; Clock ; Slack ; End Point TNS ; +-------+--------+-------------------+ ; CLK ; -1.307 ; -9.506 ; +-------+--------+-------------------+ +-----------------------------------+ ; Fast 1200mV 0C Model Hold Summary ; +-------+-------+-------------------+ ; Clock ; Slack ; End Point TNS ; +-------+-------+-------------------+ ; CLK ; 0.668 ; 0.000 ; +-------+-------+-------------------+ +---------------------------------------+ ; Fast 1200mV 0C Model Recovery Summary ; +-------+--------+----------------------+ ; Clock ; Slack ; End Point TNS ; +-------+--------+----------------------+ ; CLK ; -0.824 ; -6.161 ; +-------+--------+----------------------+ +--------------------------------------+ ; Fast 1200mV 0C Model Removal Summary ; +-------+-------+----------------------+ ; Clock ; Slack ; End Point TNS ; +-------+-------+----------------------+ ; CLK ; 0.599 ; 0.000 ; +-------+-------+----------------------+ +--------------------------------------------------+ ; Fast 1200mV 0C Model Minimum Pulse Width Summary ; +-------+--------+---------------------------------+ ; Clock ; Slack ; End Point TNS ; +-------+--------+---------------------------------+ ; CLK ; -3.000 ; -11.512 ; ; ALOAD ; -3.000 ; -3.000 ; +-------+--------+---------------------------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Setup: 'CLK' ; +--------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; -1.307 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 0.500 ; -0.426 ; 1.348 ; ; -1.304 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 0.500 ; -0.426 ; 1.345 ; ; -1.292 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; -0.426 ; 1.333 ; ; -1.289 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; -0.426 ; 1.330 ; ; -1.286 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.426 ; 1.327 ; ; -1.283 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.426 ; 1.324 ; ; -1.222 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.426 ; 1.263 ; ; -1.219 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.426 ; 1.260 ; ; -1.179 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 0.500 ; -0.402 ; 1.244 ; ; -1.173 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; -0.422 ; 1.218 ; ; -1.167 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.422 ; 1.212 ; ; -1.164 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; 0.500 ; -0.426 ; 1.205 ; ; -1.164 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; -0.402 ; 1.229 ; ; -1.158 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.402 ; 1.223 ; ; -1.156 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; 0.500 ; -0.426 ; 1.197 ; ; -1.156 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.500 ; -0.426 ; 1.197 ; ; -1.153 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.500 ; -0.426 ; 1.194 ; ; -1.152 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.402 ; 1.217 ; ; -1.103 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.422 ; 1.148 ; ; -1.098 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~9 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.423 ; 1.142 ; ; -1.089 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; 0.500 ; -0.402 ; 1.154 ; ; -1.086 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.500 ; -0.402 ; 1.151 ; ; -1.075 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; -0.401 ; 1.141 ; ; -1.069 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.401 ; 1.135 ; ; -1.063 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.401 ; 1.129 ; ; -1.060 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~10 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.426 ; 1.101 ; ; -1.056 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~10 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.426 ; 1.097 ; ; -0.997 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.500 ; -0.401 ; 1.063 ; ; -0.923 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; ALOAD ; CLK ; 0.500 ; -0.426 ; 0.964 ; ; -0.922 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; 0.500 ; -0.426 ; 0.963 ; ; -0.912 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 0.500 ; -0.401 ; 0.978 ; ; -0.881 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~10 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; -0.426 ; 0.922 ; ; -0.861 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; 0.500 ; -0.402 ; 0.926 ; ; -0.814 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.500 ; -0.422 ; 0.859 ; ; -0.812 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~9 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; -0.423 ; 0.856 ; ; -0.642 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7]~8 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; -0.424 ; 0.685 ; ; -0.605 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.555 ; ; -0.590 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.540 ; ; -0.584 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.534 ; ; -0.548 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.498 ; ; -0.533 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.483 ; ; -0.527 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.477 ; ; -0.520 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.470 ; ; -0.501 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.451 ; ; -0.486 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.436 ; ; -0.480 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.430 ; ; -0.465 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.415 ; ; -0.463 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.413 ; ; -0.457 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.407 ; ; -0.454 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.404 ; ; -0.451 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.401 ; ; -0.402 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.352 ; ; -0.397 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.347 ; ; -0.396 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.346 ; ; -0.388 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.338 ; ; -0.385 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.335 ; ; -0.380 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.330 ; ; -0.374 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.324 ; ; -0.367 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.317 ; ; -0.310 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.260 ; ; -0.301 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.251 ; ; -0.301 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.251 ; ; -0.252 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.202 ; ; -0.239 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.189 ; ; -0.228 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.178 ; ; -0.223 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.173 ; ; -0.183 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.133 ; ; -0.163 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.113 ; ; -0.119 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.069 ; ; -0.076 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 1.000 ; -0.037 ; 1.026 ; ; -0.021 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 1.000 ; -0.037 ; 0.971 ; ; -0.015 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 1.000 ; -0.037 ; 0.965 ; +--------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Hold: 'CLK' ; +-------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; 0.668 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.037 ; 0.789 ; ; 0.674 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 0.000 ; 0.037 ; 0.795 ; ; 0.728 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 0.000 ; 0.037 ; 0.849 ; ; 0.777 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.037 ; 0.898 ; ; 0.806 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; CLK ; CLK ; 0.000 ; 0.037 ; 0.927 ; ; 0.817 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.037 ; 0.938 ; ; 0.822 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; CLK ; CLK ; 0.000 ; 0.037 ; 0.943 ; ; 0.828 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.037 ; 0.949 ; ; 0.831 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.037 ; 0.952 ; ; 0.863 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 0.000 ; 0.037 ; 0.984 ; ; 0.863 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; CLK ; CLK ; 0.000 ; 0.037 ; 0.984 ; ; 0.879 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.000 ; ; 0.884 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.005 ; ; 0.887 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.008 ; ; 0.890 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; -0.500 ; -0.322 ; 0.192 ; ; 0.896 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.017 ; ; 0.955 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.076 ; ; 0.956 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.077 ; ; 0.960 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.081 ; ; 0.962 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.083 ; ; 0.963 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.084 ; ; 0.968 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.089 ; ; 0.978 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.099 ; ; 0.993 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; -0.500 ; -0.323 ; 0.294 ; ; 1.003 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~10 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; -0.347 ; 0.280 ; ; 1.007 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.128 ; ; 1.017 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.138 ; ; 1.021 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.142 ; ; 1.024 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.145 ; ; 1.026 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.147 ; ; 1.029 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.150 ; ; 1.037 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.158 ; ; 1.040 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.161 ; ; 1.042 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.163 ; ; 1.045 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.166 ; ; 1.059 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7]~8 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.345 ; 0.338 ; ; 1.076 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.197 ; ; 1.079 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.200 ; ; 1.081 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.202 ; ; 1.084 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; CLK ; CLK ; 0.000 ; 0.037 ; 1.205 ; ; 1.096 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; ALOAD ; CLK ; -0.500 ; -0.346 ; 0.374 ; ; 1.103 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; -0.500 ; -0.342 ; 0.385 ; ; 1.104 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~9 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.343 ; 0.385 ; ; 1.108 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; -0.500 ; -0.346 ; 0.386 ; ; 1.534 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; -0.500 ; -0.322 ; 0.836 ; ; 1.564 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~9 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.343 ; 0.845 ; ; 1.581 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~10 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.347 ; 0.858 ; ; 1.584 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~10 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.347 ; 0.861 ; ; 1.593 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; -0.322 ; 0.895 ; ; 1.598 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.322 ; 0.900 ; ; 1.601 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~12 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.322 ; 0.903 ; ; 1.609 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; -0.500 ; -0.323 ; 0.910 ; ; 1.619 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; -0.500 ; -0.323 ; 0.920 ; ; 1.623 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; -0.500 ; -0.346 ; 0.901 ; ; 1.623 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; -0.342 ; 0.905 ; ; 1.628 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.342 ; 0.910 ; ; 1.631 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~11 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.342 ; 0.913 ; ; 1.674 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; -0.500 ; -0.346 ; 0.952 ; ; 1.675 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; -0.500 ; -0.346 ; 0.953 ; ; 1.678 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; -0.323 ; 0.979 ; ; 1.681 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; -0.500 ; -0.323 ; 0.982 ; ; 1.683 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.323 ; 0.984 ; ; 1.684 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; -0.500 ; -0.346 ; 0.962 ; ; 1.686 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~14 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.323 ; 0.987 ; ; 1.734 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; -0.346 ; 1.012 ; ; 1.737 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; -0.500 ; -0.346 ; 1.015 ; ; 1.739 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.346 ; 1.017 ; ; 1.742 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~13 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.346 ; 1.020 ; ; 1.743 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; -0.346 ; 1.021 ; ; 1.746 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; -0.500 ; -0.346 ; 1.024 ; ; 1.748 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; -0.346 ; 1.026 ; ; 1.751 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~15 ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; -0.346 ; 1.029 ; +-------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Recovery: 'CLK' ; +--------+-----------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; -0.824 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; ALOAD ; CLK ; 0.500 ; 1.147 ; 2.438 ; ; -0.763 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; 0.500 ; 1.147 ; 2.377 ; ; -0.763 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.500 ; 1.147 ; 2.377 ; ; -0.763 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.500 ; 1.147 ; 2.377 ; ; -0.763 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.500 ; 1.147 ; 2.377 ; ; -0.763 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.500 ; 1.147 ; 2.377 ; ; -0.761 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; 0.500 ; 1.147 ; 2.375 ; ; -0.761 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 0.500 ; 1.147 ; 2.375 ; ; 0.074 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; ALOAD ; CLK ; 1.000 ; 1.147 ; 2.040 ; ; 0.120 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; 1.000 ; 1.147 ; 1.994 ; ; 0.120 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 1.000 ; 1.147 ; 1.994 ; ; 0.120 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 1.000 ; 1.147 ; 1.994 ; ; 0.120 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 1.000 ; 1.147 ; 1.994 ; ; 0.120 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 1.000 ; 1.147 ; 1.994 ; ; 0.128 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; 1.000 ; 1.147 ; 1.986 ; ; 0.128 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 1.000 ; 1.147 ; 1.986 ; +--------+-----------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Removal: 'CLK' ; +-------+-----------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; 0.599 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; 0.000 ; 1.192 ; 1.915 ; ; 0.599 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; 0.000 ; 1.192 ; 1.915 ; ; 0.607 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; 0.000 ; 1.192 ; 1.923 ; ; 0.607 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; 0.000 ; 1.192 ; 1.923 ; ; 0.607 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; 0.000 ; 1.192 ; 1.923 ; ; 0.607 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; 0.000 ; 1.192 ; 1.923 ; ; 0.607 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; 0.000 ; 1.192 ; 1.923 ; ; 0.651 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; ALOAD ; CLK ; 0.000 ; 1.192 ; 1.967 ; ; 1.483 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; ALOAD ; CLK ; -0.500 ; 1.192 ; 2.299 ; ; 1.483 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; ALOAD ; CLK ; -0.500 ; 1.192 ; 2.299 ; ; 1.485 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; ALOAD ; CLK ; -0.500 ; 1.192 ; 2.301 ; ; 1.485 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; ALOAD ; CLK ; -0.500 ; 1.192 ; 2.301 ; ; 1.485 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; ALOAD ; CLK ; -0.500 ; 1.192 ; 2.301 ; ; 1.485 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; ALOAD ; CLK ; -0.500 ; 1.192 ; 2.301 ; ; 1.485 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; ALOAD ; CLK ; -0.500 ; 1.192 ; 2.301 ; ; 1.543 ; ALOAD ; count:inst|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; ALOAD ; CLK ; -0.500 ; 1.192 ; 2.359 ; +-------+-----------+-----------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ---------------------------------------------- ; Fast 1200mV 0C Model Metastability Summary ; ---------------------------------------------- No synchronizer chains to report. +-------------------------------------------------------------------------------+ ; Multicorner Timing Analysis Summary ; +------------------+---------+-------+----------+---------+---------------------+ ; Clock ; Setup ; Hold ; Recovery ; Removal ; Minimum Pulse Width ; +------------------+---------+-------+----------+---------+---------------------+ ; Worst-case Slack ; -2.173 ; 0.666 ; -1.363 ; 0.599 ; -3.000 ; ; ALOAD ; N/A ; N/A ; N/A ; N/A ; -3.000 ; ; CLK ; -2.173 ; 0.666 ; -1.363 ; 0.599 ; -3.000 ; ; Design-wide TNS ; -15.666 ; 0.0 ; -10.135 ; 0.0 ; -14.512 ; ; ALOAD ; N/A ; N/A ; N/A ; N/A ; -3.000 ; ; CLK ; -15.666 ; 0.000 ; -10.135 ; 0.000 ; -11.512 ; +------------------+---------+-------+----------+---------+---------------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Board Trace Model Assignments ; +---------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+ ; Pin ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ; EBD File Name ; EBD Signal Name ; EBD Far-end ; +---------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+ ; q[7] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; q[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; q[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; q[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; q[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; q[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; q[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; q[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; ~ALTERA_DCLK~ ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; ~ALTERA_nCEO~ ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; +---------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+ +----------------------------------------------------------------------------+ ; Input Transition Times ; +-------------------------+--------------+-----------------+-----------------+ ; Pin ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ; +-------------------------+--------------+-----------------+-----------------+ ; data[7] ; 2.5 V ; 2000 ps ; 2000 ps ; ; ALOAD ; 2.5 V ; 2000 ps ; 2000 ps ; ; ACLR ; 2.5 V ; 2000 ps ; 2000 ps ; ; data[6] ; 2.5 V ; 2000 ps ; 2000 ps ; ; data[5] ; 2.5 V ; 2000 ps ; 2000 ps ; ; data[4] ; 2.5 V ; 2000 ps ; 2000 ps ; ; data[3] ; 2.5 V ; 2000 ps ; 2000 ps ; ; data[2] ; 2.5 V ; 2000 ps ; 2000 ps ; ; data[1] ; 2.5 V ; 2000 ps ; 2000 ps ; ; data[0] ; 2.5 V ; 2000 ps ; 2000 ps ; ; CLK ; 2.5 V ; 2000 ps ; 2000 ps ; ; ~ALTERA_ASDO_DATA1~ ; 2.5 V ; 2000 ps ; 2000 ps ; ; ~ALTERA_FLASH_nCE_nCSO~ ; 2.5 V ; 2000 ps ; 2000 ps ; ; ~ALTERA_DATA0~ ; 2.5 V ; 2000 ps ; 2000 ps ; +-------------------------+--------------+-----------------+-----------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Signal Integrity Metrics (Slow 1200mv 0c Model) ; +---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ ; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ; +---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ ; q[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.33 V ; -0.00616 V ; 0.191 V ; 0.099 V ; 2.83e-09 s ; 2.56e-09 s ; No ; Yes ; 2.32 V ; 5.95e-09 V ; 2.33 V ; -0.00616 V ; 0.191 V ; 0.099 V ; 2.83e-09 s ; 2.56e-09 s ; No ; Yes ; ; q[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; q[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; q[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; q[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; ; q[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; ; q[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.39 V ; -0.0265 V ; 0.2 V ; 0.033 V ; 2.94e-10 s ; 3.12e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.39 V ; -0.0265 V ; 0.2 V ; 0.033 V ; 2.94e-10 s ; 3.12e-10 s ; Yes ; Yes ; ; q[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.39 V ; -0.0265 V ; 0.2 V ; 0.033 V ; 2.94e-10 s ; 3.12e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.39 V ; -0.0265 V ; 0.2 V ; 0.033 V ; 2.94e-10 s ; 3.12e-10 s ; Yes ; Yes ; ; ~ALTERA_DCLK~ ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.45e-09 V ; 2.38 V ; -0.0609 V ; 0.148 V ; 0.095 V ; 2.82e-10 s ; 2.59e-10 s ; Yes ; Yes ; 2.32 V ; 3.45e-09 V ; 2.38 V ; -0.0609 V ; 0.148 V ; 0.095 V ; 2.82e-10 s ; 2.59e-10 s ; Yes ; Yes ; ; ~ALTERA_nCEO~ ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.61e-09 V ; 2.38 V ; -0.00274 V ; 0.141 V ; 0.006 V ; 4.7e-10 s ; 6.02e-10 s ; Yes ; Yes ; 2.32 V ; 5.61e-09 V ; 2.38 V ; -0.00274 V ; 0.141 V ; 0.006 V ; 4.7e-10 s ; 6.02e-10 s ; Yes ; Yes ; +---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Signal Integrity Metrics (Slow 1200mv 85c Model) ; +---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ ; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ; +---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ ; q[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.33 V ; -0.00344 V ; 0.134 V ; 0.075 V ; 3.33e-09 s ; 3.16e-09 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.33 V ; -0.00344 V ; 0.134 V ; 0.075 V ; 3.33e-09 s ; 3.16e-09 s ; Yes ; Yes ; ; q[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; q[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; q[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; q[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; ; q[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; ; q[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.36 V ; -0.00476 V ; 0.096 V ; 0.013 V ; 4.39e-10 s ; 4.15e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.36 V ; -0.00476 V ; 0.096 V ; 0.013 V ; 4.39e-10 s ; 4.15e-10 s ; Yes ; Yes ; ; q[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.36 V ; -0.00476 V ; 0.096 V ; 0.013 V ; 4.39e-10 s ; 4.15e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.36 V ; -0.00476 V ; 0.096 V ; 0.013 V ; 4.39e-10 s ; 4.15e-10 s ; Yes ; Yes ; ; ~ALTERA_DCLK~ ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.74e-07 V ; 2.36 V ; -0.0201 V ; 0.072 V ; 0.033 V ; 4.04e-10 s ; 3.29e-10 s ; Yes ; Yes ; 2.32 V ; 5.74e-07 V ; 2.36 V ; -0.0201 V ; 0.072 V ; 0.033 V ; 4.04e-10 s ; 3.29e-10 s ; Yes ; Yes ; ; ~ALTERA_nCEO~ ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.45e-07 V ; 2.35 V ; -0.00643 V ; 0.081 V ; 0.031 V ; 5.31e-10 s ; 7.59e-10 s ; Yes ; Yes ; 2.32 V ; 9.45e-07 V ; 2.35 V ; -0.00643 V ; 0.081 V ; 0.031 V ; 5.31e-10 s ; 7.59e-10 s ; Yes ; Yes ; +---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Signal Integrity Metrics (Fast 1200mv 0c Model) ; +---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ ; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ; +---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ ; q[7] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.64 V ; -0.0113 V ; 0.208 V ; 0.179 V ; 2.38e-09 s ; 2.23e-09 s ; No ; Yes ; 2.62 V ; 4.05e-08 V ; 2.64 V ; -0.0113 V ; 0.208 V ; 0.179 V ; 2.38e-09 s ; 2.23e-09 s ; No ; Yes ; ; q[6] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; q[5] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; q[4] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; q[3] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; ; q[2] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; ; q[1] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.73 V ; -0.0384 V ; 0.169 V ; 0.089 V ; 2.7e-10 s ; 2.62e-10 s ; Yes ; Yes ; 2.62 V ; 2.74e-08 V ; 2.73 V ; -0.0384 V ; 0.169 V ; 0.089 V ; 2.7e-10 s ; 2.62e-10 s ; Yes ; Yes ; ; q[0] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.73 V ; -0.0384 V ; 0.169 V ; 0.089 V ; 2.7e-10 s ; 2.62e-10 s ; Yes ; Yes ; 2.62 V ; 2.74e-08 V ; 2.73 V ; -0.0384 V ; 0.169 V ; 0.089 V ; 2.7e-10 s ; 2.62e-10 s ; Yes ; Yes ; ; ~ALTERA_DCLK~ ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.22e-08 V ; 2.74 V ; -0.06 V ; 0.158 V ; 0.08 V ; 2.68e-10 s ; 2.19e-10 s ; Yes ; Yes ; 2.62 V ; 2.22e-08 V ; 2.74 V ; -0.06 V ; 0.158 V ; 0.08 V ; 2.68e-10 s ; 2.19e-10 s ; Yes ; Yes ; ; ~ALTERA_nCEO~ ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.54e-08 V ; 2.7 V ; -0.00943 V ; 0.276 V ; 0.035 V ; 3.19e-10 s ; 4.99e-10 s ; No ; Yes ; 2.62 V ; 3.54e-08 V ; 2.7 V ; -0.00943 V ; 0.276 V ; 0.035 V ; 3.19e-10 s ; 4.99e-10 s ; No ; Yes ; +---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ +-------------------------------------------------------------------+ ; Setup Transfers ; +------------+----------+----------+----------+----------+----------+ ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ; +------------+----------+----------+----------+----------+----------+ ; ALOAD ; CLK ; 0 ; 44 ; 0 ; 0 ; ; CLK ; CLK ; 36 ; 0 ; 0 ; 0 ; +------------+----------+----------+----------+----------+----------+ Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported. +-------------------------------------------------------------------+ ; Hold Transfers ; +------------+----------+----------+----------+----------+----------+ ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ; +------------+----------+----------+----------+----------+----------+ ; ALOAD ; CLK ; 0 ; 44 ; 0 ; 0 ; ; CLK ; CLK ; 36 ; 0 ; 0 ; 0 ; +------------+----------+----------+----------+----------+----------+ Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported. +-------------------------------------------------------------------+ ; Recovery Transfers ; +------------+----------+----------+----------+----------+----------+ ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ; +------------+----------+----------+----------+----------+----------+ ; ALOAD ; CLK ; 8 ; 8 ; 0 ; 0 ; +------------+----------+----------+----------+----------+----------+ Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported. +-------------------------------------------------------------------+ ; Removal Transfers ; +------------+----------+----------+----------+----------+----------+ ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ; +------------+----------+----------+----------+----------+----------+ ; ALOAD ; CLK ; 8 ; 8 ; 0 ; 0 ; +------------+----------+----------+----------+----------+----------+ Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported. --------------- ; Report TCCS ; --------------- No dedicated SERDES Transmitter circuitry present in device or used in design --------------- ; Report RSKM ; --------------- No non-DPA dedicated SERDES Receiver circuitry present in device or used in design +------------------------------------------------+ ; Unconstrained Paths Summary ; +---------------------------------+-------+------+ ; Property ; Setup ; Hold ; +---------------------------------+-------+------+ ; Illegal Clocks ; 0 ; 0 ; ; Unconstrained Clocks ; 0 ; 0 ; ; Unconstrained Input Ports ; 10 ; 10 ; ; Unconstrained Input Port Paths ; 48 ; 48 ; ; Unconstrained Output Ports ; 8 ; 8 ; ; Unconstrained Output Port Paths ; 40 ; 40 ; +---------------------------------+-------+------+ +-------------------------------------+ ; Clock Status Summary ; +--------+-------+------+-------------+ ; Target ; Clock ; Type ; Status ; +--------+-------+------+-------------+ ; ALOAD ; ALOAD ; Base ; Constrained ; ; CLK ; CLK ; Base ; Constrained ; +--------+-------+------+-------------+ +---------------------------------------------------------------------------------------------------+ ; Unconstrained Input Ports ; +------------+--------------------------------------------------------------------------------------+ ; Input Port ; Comment ; +------------+--------------------------------------------------------------------------------------+ ; ACLR ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; ALOAD ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; data[0] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; data[1] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; data[2] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; data[3] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; data[4] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; data[5] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; data[6] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; data[7] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; +------------+--------------------------------------------------------------------------------------+ +-----------------------------------------------------------------------------------------------------+ ; Unconstrained Output Ports ; +-------------+---------------------------------------------------------------------------------------+ ; Output Port ; Comment ; +-------------+---------------------------------------------------------------------------------------+ ; q[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; q[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; q[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; q[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; q[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; q[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; q[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; q[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +-------------+---------------------------------------------------------------------------------------+ +---------------------------------------------------------------------------------------------------+ ; Unconstrained Input Ports ; +------------+--------------------------------------------------------------------------------------+ ; Input Port ; Comment ; +------------+--------------------------------------------------------------------------------------+ ; ACLR ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; ALOAD ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; data[0] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; data[1] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; data[2] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; data[3] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; data[4] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; data[5] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; data[6] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; data[7] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; +------------+--------------------------------------------------------------------------------------+ +-----------------------------------------------------------------------------------------------------+ ; Unconstrained Output Ports ; +-------------+---------------------------------------------------------------------------------------+ ; Output Port ; Comment ; +-------------+---------------------------------------------------------------------------------------+ ; q[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; q[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; q[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; q[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; q[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; q[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; q[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; q[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +-------------+---------------------------------------------------------------------------------------+ +------------------------------------+ ; TimeQuest Timing Analyzer Messages ; +------------------------------------+ Info: ******************************************************************* Info: Running Quartus Prime TimeQuest Timing Analyzer Info: Version 17.1.0 Build 590 10/25/2017 SJ Lite Edition Info: Processing started: Tue Sep 26 10:43:32 2023 Info: Command: quartus_sta count2627 -c count2627 Info: qsta_default_script.tcl version: #3 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance. Info (20030): Parallel compilation is enabled and will use 6 of the 6 processors detected Info (21076): High junction temperature operating condition is not set. Assuming a default value of '85'. Info (21076): Low junction temperature operating condition is not set. Assuming a default value of '0'. Warning (335093): TimeQuest Timing Analyzer is analyzing 8 combinational loops as latches. For more details, run the Check Timing command in the TimeQuest Timing Analyzer or view the "User-Specified and Inferred Latches" table in the Analysis & Synthesis report. Critical Warning (332012): Synopsys Design Constraints File file not found: 'count2627.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design. Info (332142): No user constrained base clocks found in the design. Calling "derive_clocks -period 1.0" Info (332105): Deriving Clocks Info (332105): create_clock -period 1.000 -name CLK CLK Info (332105): create_clock -period 1.000 -name ALOAD ALOAD Info (332143): No user constrained clock uncertainty found in the design. Calling "derive_clock_uncertainty" Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON Info: Analyzing Slow 1200mV 85C Model Critical Warning (332148): Timing requirements not met Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer. Info (332146): Worst-case setup slack is -2.173 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -2.173 -15.666 CLK Info (332146): Worst-case hold slack is 0.716 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): 0.716 0.000 CLK Info (332146): Worst-case recovery slack is -1.363 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -1.363 -10.135 CLK Info (332146): Worst-case removal slack is 1.159 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): 1.159 0.000 CLK Info (332146): Worst-case minimum pulse width slack is -3.000 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -3.000 -11.000 CLK Info (332119): -3.000 -3.000 ALOAD Info: Analyzing Slow 1200mV 0C Model Info (334003): Started post-fitting delay annotation Info (334004): Delay annotation completed successfully Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. Critical Warning (332148): Timing requirements not met Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer. Info (332146): Worst-case setup slack is -1.848 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -1.848 -13.304 CLK Info (332146): Worst-case hold slack is 0.666 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): 0.666 0.000 CLK Info (332146): Worst-case recovery slack is -1.217 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -1.217 -9.058 CLK Info (332146): Worst-case removal slack is 1.096 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): 1.096 0.000 CLK Info (332146): Worst-case minimum pulse width slack is -3.000 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -3.000 -11.000 CLK Info (332119): -3.000 -3.000 ALOAD Info: Analyzing Fast 1200mV 0C Model Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. Critical Warning (332148): Timing requirements not met Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer. Info (332146): Worst-case setup slack is -1.307 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -1.307 -9.506 CLK Info (332146): Worst-case hold slack is 0.668 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): 0.668 0.000 CLK Info (332146): Worst-case recovery slack is -0.824 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -0.824 -6.161 CLK Info (332146): Worst-case removal slack is 0.599 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): 0.599 0.000 CLK Info (332146): Worst-case minimum pulse width slack is -3.000 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -3.000 -11.512 CLK Info (332119): -3.000 -3.000 ALOAD Info (332102): Design is not fully constrained for setup requirements Info (332102): Design is not fully constrained for hold requirements Info: Quartus Prime TimeQuest Timing Analyzer was successful. 0 errors, 6 warnings Info: Peak virtual memory: 4788 megabytes Info: Processing ended: Tue Sep 26 10:43:33 2023 Info: Elapsed time: 00:00:01 Info: Total CPU time (on all processors): 00:00:01