/* WARNING: Do NOT edit the input and output ports in this file in a text editor if you plan to continue editing the block that represents it in the Block Editor! File corruption is VERY likely to occur. */ /* Copyright (C) 2017 Intel Corporation. All rights reserved. Your use of Intel Corporation's design tools, logic functions and other software and tools, and its AMPP partner logic functions, and any output files from any of the foregoing (including device programming or simulation files), and any associated documentation or information are expressly subject to the terms and conditions of the Intel Program License Subscription Agreement, the Intel Quartus Prime License Agreement, the Intel FPGA IP License Agreement, or other applicable license agreement, including, without limitation, that your use is for the sole purpose of programming logic devices manufactured by Intel and sold by Intel or its authorized distributors. Please refer to the applicable agreement for further details. */ HEADER { VERSION = 1; TIME_UNIT = ns; DATA_OFFSET = 0.0; DATA_DURATION = 640.0; SIMULATION_TIME = 0.0; GRID_PHASE = 0.0; GRID_PERIOD = 10.0; GRID_DUTY_CYCLE = 50; } SIGNAL("CLK1") { VALUE_TYPE = NINE_LEVEL_BIT; SIGNAL_TYPE = SINGLE_BIT; WIDTH = 1; LSB_INDEX = -1; DIRECTION = INPUT; PARENT = ""; } SIGNAL("RST1") { VALUE_TYPE = NINE_LEVEL_BIT; SIGNAL_TYPE = SINGLE_BIT; WIDTH = 1; LSB_INDEX = -1; DIRECTION = INPUT; PARENT = ""; } SIGNAL("s0") { VALUE_TYPE = NINE_LEVEL_BIT; SIGNAL_TYPE = SINGLE_BIT; WIDTH = 1; LSB_INDEX = -1; DIRECTION = INPUT; PARENT = ""; } SIGNAL("T1") { VALUE_TYPE = NINE_LEVEL_BIT; SIGNAL_TYPE = SINGLE_BIT; WIDTH = 1; LSB_INDEX = -1; DIRECTION = OUTPUT; PARENT = ""; } SIGNAL("T2") { VALUE_TYPE = NINE_LEVEL_BIT; SIGNAL_TYPE = SINGLE_BIT; WIDTH = 1; LSB_INDEX = -1; DIRECTION = OUTPUT; PARENT = ""; } SIGNAL("T3") { VALUE_TYPE = NINE_LEVEL_BIT; SIGNAL_TYPE = SINGLE_BIT; WIDTH = 1; LSB_INDEX = -1; DIRECTION = OUTPUT; PARENT = ""; } SIGNAL("T4") { VALUE_TYPE = NINE_LEVEL_BIT; SIGNAL_TYPE = SINGLE_BIT; WIDTH = 1; LSB_INDEX = -1; DIRECTION = OUTPUT; PARENT = ""; } TRANSITION_LIST("CLK1") { NODE { REPEAT = 1; NODE { REPEAT = 1; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 10.0; } } } TRANSITION_LIST("RST1") { NODE { REPEAT = 1; NODE { REPEAT = 1; LEVEL 0 FOR 20.0; LEVEL 1 FOR 50.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 80.0; LEVEL 0 FOR 10.0; LEVEL 1 FOR 160.0; LEVEL 0 FOR 20.0; LEVEL 1 FOR 160.0; LEVEL 0 FOR 50.0; LEVEL 1 FOR 50.0; LEVEL 0 FOR 20.0; LEVEL 1 FOR 10.0; } } } TRANSITION_LIST("s0") { NODE { REPEAT = 1; NODE { REPEAT = 1; LEVEL 1 FOR 320.0; LEVEL 0 FOR 320.0; } } } TRANSITION_LIST("T1") { NODE { REPEAT = 1; NODE { REPEAT = 1; LEVEL 0 FOR 30.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 40.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 60.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 60.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 80.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 200.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 40.0; LEVEL 1 FOR 10.0; } } } TRANSITION_LIST("T2") { NODE { REPEAT = 1; NODE { REPEAT = 1; LEVEL 0 FOR 50.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 40.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 60.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 60.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 80.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 200.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 30.0; } } } TRANSITION_LIST("T3") { NODE { REPEAT = 1; NODE { REPEAT = 1; LEVEL 0 FOR 130.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 60.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 60.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 80.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 230.0; } } } TRANSITION_LIST("T4") { NODE { REPEAT = 1; NODE { REPEAT = 1; LEVEL 0 FOR 150.0; LEVEL 1 FOR 10.0; LEVEL 0 FOR 70.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 60.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 80.0; LEVEL 1 FOR 20.0; LEVEL 0 FOR 210.0; } } } DISPLAY_LINE { CHANNEL = "RST1"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; TREE_INDEX = 0; TREE_LEVEL = 0; } DISPLAY_LINE { CHANNEL = "CLK1"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; TREE_INDEX = 1; TREE_LEVEL = 0; } DISPLAY_LINE { CHANNEL = "s0"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; TREE_INDEX = 2; TREE_LEVEL = 0; } DISPLAY_LINE { CHANNEL = "T1"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; TREE_INDEX = 3; TREE_LEVEL = 0; } DISPLAY_LINE { CHANNEL = "T2"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; TREE_INDEX = 4; TREE_LEVEL = 0; } DISPLAY_LINE { CHANNEL = "T3"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; TREE_INDEX = 5; TREE_LEVEL = 0; } DISPLAY_LINE { CHANNEL = "T4"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; TREE_INDEX = 6; TREE_LEVEL = 0; } TIME_BAR { TIME = 0; MASTER = TRUE; } ;