{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1637591649423 ""} { "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 64-Bit " "Running Quartus II 64-Bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.0 Build 156 04/24/2013 SJ Full Version " "Version 13.0.0 Build 156 04/24/2013 SJ Full Version" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1637591649423 ""} { "Info" "IQEXE_START_BANNER_TIME" "Mon Nov 22 22:34:09 2021 " "Processing started: Mon Nov 22 22:34:09 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1637591649423 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1637591649423 ""} { "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off eda11 -c eda11 " "Command: quartus_map --read_settings_files=on --write_settings_files=off eda11 -c eda11" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1637591649423 ""} { "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS_MORE_LOGICAL" "6 6 12 " "Parallel Compilation has detected 12 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 6 of the 6 physical processors detected instead." { } { } 0 11104 "Parallel Compilation has detected %3!i! hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use %1!i! of the %2!i! physical processors detected instead." 0 0 "Quartus II" 0 -1 1637591649677 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "eda11.v 9 9 " "Found 9 design units, including 9 entities, in source file eda11.v" { { "Info" "ISGN_ENTITY_NAME" "1 add32 " "Found entity 1: add32" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591649708 ""} { "Info" "ISGN_ENTITY_NAME" "2 sub32 " "Found entity 2: sub32" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 7 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591649708 ""} { "Info" "ISGN_ENTITY_NAME" "3 mul16 " "Found entity 3: mul16" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 26 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591649708 ""} { "Info" "ISGN_ENTITY_NAME" "4 operateselector " "Found entity 4: operateselector" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 32 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591649708 ""} { "Info" "ISGN_ENTITY_NAME" "5 wordtranslator " "Found entity 5: wordtranslator" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 47 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591649708 ""} { "Info" "ISGN_ENTITY_NAME" "6 clock " "Found entity 6: clock" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 74 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591649708 ""} { "Info" "ISGN_ENTITY_NAME" "7 gettempword " "Found entity 7: gettempword" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 85 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591649708 ""} { "Info" "ISGN_ENTITY_NAME" "8 segselector " "Found entity 8: segselector" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 101 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591649708 ""} { "Info" "ISGN_ENTITY_NAME" "9 eda11 " "Found entity 9: eda11" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 116 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591649708 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1637591649708 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "sign eda11.v(131) " "Verilog HDL Implicit Net warning at eda11.v(131): created implicit net for \"sign\"" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 131 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1637591649708 ""} { "Info" "ISGN_START_ELABORATION_TOP" "eda11 " "Elaborating entity \"eda11\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Quartus II" 0 -1 1637591649749 ""} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "add32 add32:my_add32 " "Elaborating entity \"add32\" for hierarchy \"add32:my_add32\"" { } { { "eda11.v" "my_add32" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 130 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591649758 ""} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "sub32 sub32:my_sub32 " "Elaborating entity \"sub32\" for hierarchy \"sub32:my_sub32\"" { } { { "eda11.v" "my_sub32" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 131 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591649764 ""} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "mul16 mul16:my_mul16 " "Elaborating entity \"mul16\" for hierarchy \"mul16:my_mul16\"" { } { { "eda11.v" "my_mul16" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 132 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591649771 ""} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "operateselector operateselector:my_operateselector " "Elaborating entity \"operateselector\" for hierarchy \"operateselector:my_operateselector\"" { } { { "eda11.v" "my_operateselector" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 133 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591649777 ""} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "gettempword gettempword:my_gettempword " "Elaborating entity \"gettempword\" for hierarchy \"gettempword:my_gettempword\"" { } { { "eda11.v" "my_gettempword" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 134 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591649783 ""} { "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "a eda11.v(93) " "Verilog HDL Always Construct warning at eda11.v(93): variable \"a\" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 93 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "Quartus II" 0 -1 1637591649784 "|eda11|gettempword:my_gettempword"} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 eda11.v(94) " "Verilog HDL assignment warning at eda11.v(94): truncated value with size 32 to match size of target (4)" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 94 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1637591649784 "|eda11|gettempword:my_gettempword"} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 eda11.v(95) " "Verilog HDL assignment warning at eda11.v(95): truncated value with size 32 to match size of target (4)" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 95 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1637591649784 "|eda11|gettempword:my_gettempword"} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 eda11.v(96) " "Verilog HDL assignment warning at eda11.v(96): truncated value with size 32 to match size of target (4)" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 96 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1637591649784 "|eda11|gettempword:my_gettempword"} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "wordtranslator wordtranslator:my_wordtranslator " "Elaborating entity \"wordtranslator\" for hierarchy \"wordtranslator:my_wordtranslator\"" { } { { "eda11.v" "my_wordtranslator" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 135 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591649789 ""} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "segselector segselector:my_segselector " "Elaborating entity \"segselector\" for hierarchy \"segselector:my_segselector\"" { } { { "eda11.v" "my_segselector" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 138 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591649794 ""} { "Info" "ILPMS_INFERENCING_SUMMARY" "6 " "Inferred 6 megafunctions from design logic" { { "Info" "ILPMS_LPM_MULT_INFERRED" "mul16:my_mul16\|Mult0 lpm_mult " "Inferred multiplier megafunction (\"lpm_mult\") from the following logic: \"mul16:my_mul16\|Mult0\"" { } { { "eda11.v" "Mult0" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 29 -1 0 } } } 0 278003 "Inferred multiplier megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Quartus II" 0 -1 1637591649938 ""} { "Info" "ILPMS_LPM_DIVIDE_INFERRED" "gettempword:my_gettempword\|Div1 lpm_divide " "Inferred divider/modulo megafunction (\"lpm_divide\") from the following logic: \"gettempword:my_gettempword\|Div1\"" { } { { "eda11.v" "Div1" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 95 -1 0 } } } 0 278004 "Inferred divider/modulo megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Quartus II" 0 -1 1637591649938 ""} { "Info" "ILPMS_LPM_DIVIDE_INFERRED" "gettempword:my_gettempword\|Mod1 lpm_divide " "Inferred divider/modulo megafunction (\"lpm_divide\") from the following logic: \"gettempword:my_gettempword\|Mod1\"" { } { { "eda11.v" "Mod1" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 95 -1 0 } } } 0 278004 "Inferred divider/modulo megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Quartus II" 0 -1 1637591649938 ""} { "Info" "ILPMS_LPM_DIVIDE_INFERRED" "gettempword:my_gettempword\|Div0 lpm_divide " "Inferred divider/modulo megafunction (\"lpm_divide\") from the following logic: \"gettempword:my_gettempword\|Div0\"" { } { { "eda11.v" "Div0" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 94 -1 0 } } } 0 278004 "Inferred divider/modulo megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Quartus II" 0 -1 1637591649938 ""} { "Info" "ILPMS_LPM_DIVIDE_INFERRED" "gettempword:my_gettempword\|Mod0 lpm_divide " "Inferred divider/modulo megafunction (\"lpm_divide\") from the following logic: \"gettempword:my_gettempword\|Mod0\"" { } { { "eda11.v" "Mod0" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 94 -1 0 } } } 0 278004 "Inferred divider/modulo megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Quartus II" 0 -1 1637591649938 ""} { "Info" "ILPMS_LPM_DIVIDE_INFERRED" "gettempword:my_gettempword\|Mod2 lpm_divide " "Inferred divider/modulo megafunction (\"lpm_divide\") from the following logic: \"gettempword:my_gettempword\|Mod2\"" { } { { "eda11.v" "Mod2" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 96 -1 0 } } } 0 278004 "Inferred divider/modulo megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Quartus II" 0 -1 1637591649938 ""} } { } 0 278001 "Inferred %1!llu! megafunctions from design logic" 0 0 "Quartus II" 0 -1 1637591649938 ""} { "Info" "ISGN_ELABORATION_HEADER" "mul16:my_mul16\|lpm_mult:Mult0 " "Elaborated megafunction instantiation \"mul16:my_mul16\|lpm_mult:Mult0\"" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 29 -1 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1637591649970 ""} { "Info" "ISGN_MEGAFN_PARAM_TOP" "mul16:my_mul16\|lpm_mult:Mult0 " "Instantiated megafunction \"mul16:my_mul16\|lpm_mult:Mult0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHA 4 " "Parameter \"LPM_WIDTHA\" = \"4\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591649970 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHB 4 " "Parameter \"LPM_WIDTHB\" = \"4\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591649970 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHP 8 " "Parameter \"LPM_WIDTHP\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591649970 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHR 8 " "Parameter \"LPM_WIDTHR\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591649970 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHS 1 " "Parameter \"LPM_WIDTHS\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591649970 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591649970 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_A_IS_CONSTANT NO " "Parameter \"INPUT_A_IS_CONSTANT\" = \"NO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591649970 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_B_IS_CONSTANT NO " "Parameter \"INPUT_B_IS_CONSTANT\" = \"NO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591649970 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "MAXIMIZE_SPEED 5 " "Parameter \"MAXIMIZE_SPEED\" = \"5\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591649970 ""} } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 29 -1 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1637591649970 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mult_a7t.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/mult_a7t.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mult_a7t " "Found entity 1: mult_a7t" { } { { "db/mult_a7t.tdf" "" { Text "C:/Users/Xsu1023/Desktop/eda11/db/mult_a7t.tdf" 28 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591650014 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1637591650014 ""} { "Info" "ISGN_ELABORATION_HEADER" "gettempword:my_gettempword\|lpm_divide:Div1 " "Elaborated megafunction instantiation \"gettempword:my_gettempword\|lpm_divide:Div1\"" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 95 -1 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1637591650035 ""} { "Info" "ISGN_MEGAFN_PARAM_TOP" "gettempword:my_gettempword\|lpm_divide:Div1 " "Instantiated megafunction \"gettempword:my_gettempword\|lpm_divide:Div1\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHN 8 " "Parameter \"LPM_WIDTHN\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591650036 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHD 4 " "Parameter \"LPM_WIDTHD\" = \"4\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591650036 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_NREPRESENTATION UNSIGNED " "Parameter \"LPM_NREPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591650036 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DREPRESENTATION UNSIGNED " "Parameter \"LPM_DREPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591650036 ""} } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 95 -1 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1637591650036 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/lpm_divide_agm.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/lpm_divide_agm.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_divide_agm " "Found entity 1: lpm_divide_agm" { } { { "db/lpm_divide_agm.tdf" "" { Text "C:/Users/Xsu1023/Desktop/eda11/db/lpm_divide_agm.tdf" 24 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591650077 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1637591650077 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/sign_div_unsign_bkh.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/sign_div_unsign_bkh.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 sign_div_unsign_bkh " "Found entity 1: sign_div_unsign_bkh" { } { { "db/sign_div_unsign_bkh.tdf" "" { Text "C:/Users/Xsu1023/Desktop/eda11/db/sign_div_unsign_bkh.tdf" 24 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591650089 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1637591650089 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/alt_u_div_13f.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/alt_u_div_13f.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_u_div_13f " "Found entity 1: alt_u_div_13f" { } { { "db/alt_u_div_13f.tdf" "" { Text "C:/Users/Xsu1023/Desktop/eda11/db/alt_u_div_13f.tdf" 26 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591650103 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1637591650103 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/add_sub_unc.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/add_sub_unc.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 add_sub_unc " "Found entity 1: add_sub_unc" { } { { "db/add_sub_unc.tdf" "" { Text "C:/Users/Xsu1023/Desktop/eda11/db/add_sub_unc.tdf" 22 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591650157 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1637591650157 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/add_sub_vnc.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/add_sub_vnc.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 add_sub_vnc " "Found entity 1: add_sub_vnc" { } { { "db/add_sub_vnc.tdf" "" { Text "C:/Users/Xsu1023/Desktop/eda11/db/add_sub_vnc.tdf" 22 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591650210 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1637591650210 ""} { "Info" "ISGN_ELABORATION_HEADER" "gettempword:my_gettempword\|lpm_divide:Mod1 " "Elaborated megafunction instantiation \"gettempword:my_gettempword\|lpm_divide:Mod1\"" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 95 -1 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1637591650218 ""} { "Info" "ISGN_MEGAFN_PARAM_TOP" "gettempword:my_gettempword\|lpm_divide:Mod1 " "Instantiated megafunction \"gettempword:my_gettempword\|lpm_divide:Mod1\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHN 8 " "Parameter \"LPM_WIDTHN\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591650218 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHD 4 " "Parameter \"LPM_WIDTHD\" = \"4\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591650218 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_NREPRESENTATION UNSIGNED " "Parameter \"LPM_NREPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591650218 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DREPRESENTATION UNSIGNED " "Parameter \"LPM_DREPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591650218 ""} } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 95 -1 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1637591650218 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/lpm_divide_d8m.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/lpm_divide_d8m.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_divide_d8m " "Found entity 1: lpm_divide_d8m" { } { { "db/lpm_divide_d8m.tdf" "" { Text "C:/Users/Xsu1023/Desktop/eda11/db/lpm_divide_d8m.tdf" 24 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591650264 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1637591650264 ""} { "Info" "ISGN_ELABORATION_HEADER" "gettempword:my_gettempword\|lpm_divide:Div0 " "Elaborated megafunction instantiation \"gettempword:my_gettempword\|lpm_divide:Div0\"" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 94 -1 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1637591650275 ""} { "Info" "ISGN_MEGAFN_PARAM_TOP" "gettempword:my_gettempword\|lpm_divide:Div0 " "Instantiated megafunction \"gettempword:my_gettempword\|lpm_divide:Div0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHN 8 " "Parameter \"LPM_WIDTHN\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591650275 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHD 7 " "Parameter \"LPM_WIDTHD\" = \"7\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591650275 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_NREPRESENTATION UNSIGNED " "Parameter \"LPM_NREPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591650275 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DREPRESENTATION UNSIGNED " "Parameter \"LPM_DREPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1637591650275 ""} } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 94 -1 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1637591650275 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/lpm_divide_dgm.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/lpm_divide_dgm.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_divide_dgm " "Found entity 1: lpm_divide_dgm" { } { { "db/lpm_divide_dgm.tdf" "" { Text "C:/Users/Xsu1023/Desktop/eda11/db/lpm_divide_dgm.tdf" 24 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591650323 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1637591650323 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/sign_div_unsign_ekh.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/sign_div_unsign_ekh.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 sign_div_unsign_ekh " "Found entity 1: sign_div_unsign_ekh" { } { { "db/sign_div_unsign_ekh.tdf" "" { Text "C:/Users/Xsu1023/Desktop/eda11/db/sign_div_unsign_ekh.tdf" 24 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591650334 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1637591650334 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/alt_u_div_73f.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/alt_u_div_73f.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_u_div_73f " "Found entity 1: alt_u_div_73f" { } { { "db/alt_u_div_73f.tdf" "" { Text "C:/Users/Xsu1023/Desktop/eda11/db/alt_u_div_73f.tdf" 26 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1637591650348 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1637591650348 ""} { "Warning" "WCDB_SGATE_CDB_SGATE_SWEPT_HDR" "" "Synthesized away the following node(s):" { { "Warning" "WCDB_SGATE_CDB_SGATE_SWEPT_SUB_HDR" "LCELL buffer " "Synthesized away the following LCELL buffer node(s):" { { "Warning" "WCDB_SGATE_CDB_SGATE_SWEPT_NODE" "mul16:my_mul16\|lpm_mult:Mult0\|mult_a7t:auto_generated\|le5a\[4\] " "Synthesized away node \"mul16:my_mul16\|lpm_mult:Mult0\|mult_a7t:auto_generated\|le5a\[4\]\"" { } { { "db/mult_a7t.tdf" "" { Text "C:/Users/Xsu1023/Desktop/eda11/db/mult_a7t.tdf" 42 6 0 } } { "lpm_mult.tdf" "" { Text "c:/altera/13.0/quartus/libraries/megafunctions/lpm_mult.tdf" 375 4 0 } } { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 29 -1 0 } } { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 132 0 0 } } } 0 14320 "Synthesized away node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1637591650401 "|eda11|mul16:my_mul16|lpm_mult:Mult0|mult_a7t:auto_generated|le5a[4]"} } { } 0 14285 "Synthesized away the following %1!s! node(s):" 0 0 "Quartus II" 0 -1 1637591650401 ""} } { } 0 14284 "Synthesized away the following node(s):" 0 0 "Quartus II" 0 -1 1637591650401 ""} { "Warning" "WSGN_CONNECTIVITY_WARNINGS" "4 " "4 hierarchies have connectivity warnings - see the Connectivity Checks report folder" { } { } 0 12241 "%1!d! hierarchies have connectivity warnings - see the Connectivity Checks report folder" 0 0 "Quartus II" 0 -1 1637591650514 ""} { "Info" "IMLS_MLS_IGNORED_SUMMARY" "48 " "Ignored 48 buffer(s)" { { "Info" "IMLS_MLS_IGNORED_CARRY_SUM" "4 " "Ignored 4 CARRY_SUM buffer(s)" { } { } 0 13016 "Ignored %1!d! CARRY_SUM buffer(s)" 0 0 "Quartus II" 0 -1 1637591650520 ""} { "Info" "IMLS_MLS_IGNORED_SOFT" "44 " "Ignored 44 SOFT buffer(s)" { } { } 0 13019 "Ignored %1!d! SOFT buffer(s)" 0 0 "Quartus II" 0 -1 1637591650520 ""} } { } 0 13014 "Ignored %1!d! buffer(s)" 0 0 "Quartus II" 0 -1 1637591650520 ""} { "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" { } { } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Quartus II" 0 -1 1637591650654 ""} { "Info" "ISCL_SCL_WANNA_REM_USR_WIRE" "" "Found the following redundant logic cells in design" { { "Info" "ISCL_SCL_CELL_NAME" "gettempword:my_gettempword\|lpm_divide:Mod1\|lpm_divide_d8m:auto_generated\|sign_div_unsign_bkh:divider\|alt_u_div_13f:divider\|add_sub_7_result_int\[0\]~0 " "Logic cell \"gettempword:my_gettempword\|lpm_divide:Mod1\|lpm_divide_d8m:auto_generated\|sign_div_unsign_bkh:divider\|alt_u_div_13f:divider\|add_sub_7_result_int\[0\]~0\"" { } { { "db/alt_u_div_13f.tdf" "add_sub_7_result_int\[0\]~0" { Text "C:/Users/Xsu1023/Desktop/eda11/db/alt_u_div_13f.tdf" 61 22 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 -1 1637591650781 ""} { "Info" "ISCL_SCL_CELL_NAME" "gettempword:my_gettempword\|lpm_divide:Mod1\|lpm_divide_d8m:auto_generated\|sign_div_unsign_bkh:divider\|alt_u_div_13f:divider\|add_sub_6_result_int\[0\]~10 " "Logic cell \"gettempword:my_gettempword\|lpm_divide:Mod1\|lpm_divide_d8m:auto_generated\|sign_div_unsign_bkh:divider\|alt_u_div_13f:divider\|add_sub_6_result_int\[0\]~10\"" { } { { "db/alt_u_div_13f.tdf" "add_sub_6_result_int\[0\]~10" { Text "C:/Users/Xsu1023/Desktop/eda11/db/alt_u_div_13f.tdf" 56 22 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 -1 1637591650781 ""} } { } 0 17016 "Found the following redundant logic cells in design" 0 0 "Quartus II" 0 -1 1637591650781 ""} { "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Quartus II" 0 -1 1637591650891 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Quartus II" 0 -1 1637591650891 ""} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "1 " "Design contains 1 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "clk " "No output dependent on input pin \"clk\"" { } { { "eda11.v" "" { Text "C:/Users/Xsu1023/Desktop/eda11/eda11.v" 120 0 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1637591650922 "|eda11|clk"} } { } 0 21074 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "Quartus II" 0 -1 1637591650922 ""} { "Info" "ICUT_CUT_TM_SUMMARY" "277 " "Implemented 277 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "13 " "Implemented 13 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Quartus II" 0 -1 1637591650922 ""} { "Info" "ICUT_CUT_TM_OPINS" "12 " "Implemented 12 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Quartus II" 0 -1 1637591650922 ""} { "Info" "ICUT_CUT_TM_LCELLS" "252 " "Implemented 252 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Quartus II" 0 -1 1637591650922 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Quartus II" 0 -1 1637591650922 ""} { "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 11 s Quartus II 64-Bit " "Quartus II 64-Bit Analysis & Synthesis was successful. 0 errors, 11 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4632 " "Peak virtual memory: 4632 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1637591650936 ""} { "Info" "IQEXE_END_BANNER_TIME" "Mon Nov 22 22:34:10 2021 " "Processing ended: Mon Nov 22 22:34:10 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1637591650936 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1637591650936 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Total CPU time (on all processors): 00:00:02" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1637591650936 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1637591650936 ""}