Keil STM32F3xx_DFP STMicroelectronics STM32F3 Series Device Support https://www.keil.com/pack/ https://github.com/Open-CMSIS-Pack/STM32F3xx_DFP.git LICENSE Active development ... Updated Pack to STM32Cube_FW_F3 Firmware Package version V1.11.3: - Corrected USB Device HAL Driver (stm32f3xx_hal_pcd.c). Package Description (pdsc): - Updated component ::Device:Startup (Standalone). - STM32303E-EVAL: Added board components drivers. Updated Documentation files. Board Examples: - Migrated CubeMX projects to V6.4.0. - Overridden default HAL_InitTick function. STM32Cube_FW_F3 Firmware V1.11.2: - Corrected USB Device HAL Driver (stm32f3xx_hal_pcd.c). CMSIS-Driver: - I2C: Corrected pin configuration. Corrected device in board description attribute 'mountedDevice'. Updated Pack to STM32Cube_FW_F3 Firmware Package version V1.11.2: - Updated HAL to version V1.5.5. - External interrupts and events (EXTI) HAL - Universal serial bus full-speed device interface (USB) LL - Added global define USE_HAL_DRIVER and USE_FULL_LL_DRIVER to the component ::Device:STM32Cube Framework:STM32CubeMX. - Added global define USE_HAL_DRIVER and USE_FULL_LL_DRIVER to the component ::Device:STM32Cube HAL:COMMON. STM32CubeMX integration: - MX_Device_h.ftl: -- Updated parsing of USART virtual mode. -- Updated generation of macros: Added handling for '(' and ')' symbols. - FrameworkCubeMX_gpdsc.ftl: -- Added support for Timebase Source TIMx. Board Examples: - Terminating app_main thread with osThreadExit() to avoid endless loop. - Updated RTX configuration (CMSIS 5.8.0). - Updated template based files (MDK-Middleware 7.13.0). - Configured MDK projects to use Arm Compiler 6. - Changed Assembler option to armclang (Auto Select). - Updated all USB Host/Device examples with user templates from MDK-Middleware v7.11.1. - FileSystem, USB: Changed variant selection to "MDK-Plus". - Updated Graphics examples to use Segger emWin version 5.50. CMSIS Driver: - CAN: -- Corrected SetBitrate function to leave Silent and Loopback mode as they were. -- Corrected SetMode function to clear Silent and Loopback mode when NORMAL mode is activated. -- Corrected MessageSend function to only access required data for sending. -- Corrected abort message send functionality. - I2C: -- Corrected pin configuration: MX_I2Cx_SMBA_GPIO_PuPdOD replaced with MX_I2Cx_yyy_GPIO_PuPdOD. -- Corrected usage function name - USB Device: -- Corrected transmitted count for non-control IN endpoints. -- Updated USBD_EndpointConfigure function to check that maximum packet size requested fits into configured FIFO (compile time configured). -- Removed include of stm32f3xx_hal_pcd.h header. This DFP works either with STM32CubeMX (STM32CubeMX V4.23.0 and STM32Cube_FW_F3 V1.9.0 or higher) or Standalone (no support for STM32CubeMX). STM32CubeMX is mandatory for use of CMSIS-Driver and MDK-Middleware. This packs contains a subset of the files from STM32Cube_FW_F3 version 1.9.0 (Drivers, STCube documentation and fonts). Updated documentation for STM32Cube Framework usage. - New projects require the component 'Device:STM32Cube Framework:STM32CubeMX' for configuration of pins and clocks via STM32CubeMX. Device support: - Removed devices not being supported by STM32CubeMX 4.23.0 (STM32F301C6Yx, STM32F301K6Tx). - Added DBGMCU INI files for use with debug adapter that lack support for debug descriptions. Board support: - Added Board Support Interfaces for STM32303S-EVAL board and example projects. Example projects: - Added emWin example for STM32303E-EVAL. - Added example projects for STM32303S-EVAL. - Updated all examples separating output folder for each target: "Debug" output folder "Debug" target, "Release" output folder for "Release" target. This DFP requires STM32CubeMX V4.23.0 and STM32Cube_FW_F3 V1.9.0 or higher to be installed. This packs contains a subset of the files from STM32Cube_FW_F3 version 1.9.0 (Drivers, STCube documentation and fonts). Updated documentation for STM32Cube Framework usage. - New projects require the component 'Device:STM32Cube Framework:STM32CubeMX' for configuration of pins and clocks. Updated Device names: - Device names now match STM32CubeMX database specifying the device package. - Updated device documentation. CMSIS Driver: - Added CAN driver. - Added I2C driver. - Added SPI driver. - Added UART/USART driver. - Added USB Device driver. Board support: - Added Board Support Interfaces for STM32303C-EVAL, STM32373C-Eval, STM32F3-Discovery and STM32F334-Discovery Boards. Example projects: - Added CMSIS-RTOS2 Blinky, CAN, FileSystem, USB Device MassStorage, USB Device HID Added BSP drivers for generic CubeMX targets: LED, Buttons. Added STM32F334-Discovery basic board support and blinky RTX5 example. Reworked STM32F3xx_OPT.s. Updated SVD file STM32F334x.svd adding missing registers for ADC2. Added devices: STM32F302xE, STM32F302xD, STM32F303xE, STM32F303xD. Added device STM32F398VE. Added device feature description. Updated device support files. Updated reference manuals, datasheets, errata sheets. Reworked 'Conditions', 'Component Startup'. Fixed device define for STM32F301 devices from "STM32F301x8" to "STM32F302x8" Updated STM32373C-EVAL GLCD board support files. Updated STM32373C-EVAL board description. Device Support for STM32F301, STM32F302, STM32F303, STM32F3x4, STM32F3x8 and STM32F373 Device Subfamilies - based on STM32F30x_DSP_StdPeriph_Lib_V1.2.0 and STM32F37x_DSP_StdPeriph_Lib_V1.0.0 Added: Board description, Board support for - STMicroelectronics STM32F3-Discovery, STM32373C-EVAL and STM32303C-EVAL Updated: Device descriptions updated with features First Release version of STM32F3 Device Family Pack. ST Device Support Device Family Package STMicroelectronics STM32F3 STM32F3xx High-performance STM32F3 MCUs with Arm Cortex-M4 core, MPU, DSP, FPU, 90 DMIPS at 72 MHz. Sequence("CheckID"); // Replication of Standard Functionality Write32(0xE000EDF0, 0xA05F0001); // Enable Core Debug via DHCSR Write32(0xE0042004, DbgMCU_CR); // DBGMCU_CR: Configure MCU Debug Write32(0xE0042008, DbgMCU_APB1_Fz); // DBGMCU_APB1_FZ: Configure APB1 Peripheral Freeze Behavior Write32(0xE004200C, DbgMCU_APB2_Fz); // DBGMCU_APB2_FZ: Configure APB2 Peripheral Freeze Behavior __var traceSWO = (__traceout & 0x1) != 0; // SWO (asynchronous) Trace Selected? __var traceTPIU = (__traceout & 0x2) != 0; // TPIU (synchronous) Trace Selected? Sequence("EnableTraceSWO"); // Call SWO Trace Setup Sequence("EnableTraceTPIU"); // Call TPIU Trace Setup // Nothing required for SWO Trace __var traceSWO = (__traceout & 0x1) != 0; // SWO enabled? __var traceTPIU = (__traceout & 0x2) != 0; // Synchronous trace port enabled? Sequence("DisableTraceSWO"); Sequence("DisableTraceTPIU"); __var pidr1 = 0; __var pidr2 = 0; __var jep106id = 0; __var ROMTableBase = 0; __ap = 0; // AHB-AP ROMTableBase = ReadAP(0xF8) & ~0x3; pidr1 = Read32(ROMTableBase + 0x0FE4); pidr2 = Read32(ROMTableBase + 0x0FE8); jep106id = ((pidr2 & 0x7) << 4 ) | ((pidr1 >> 4) & 0xF); Query(0, "Not a genuine ST Device! Abort connection", 1); Message(2, "Not a genuine ST Device! Abort connection."); __var dbgmcu_val = 0; // DBGMCU_CR Value __var dbgmcu_trace_val = 0; // DBGMCU_CR Value dbgmcu_val = Read32(0xE0042004) & (~0xE0); // Read DBGMCU_CR and clear trace setup dbgmcu_trace_val = (1 << 5); // Trace I/O Enable + Trace Mode Asynchronous Sequence("ConfigureTraceSWOPin"); Write32(0xE0042004, dbgmcu_val | dbgmcu_trace_val); // Write DBGMCU_CR: Trace Settings __var dbgmcu_val = 0; // DBGMCU_CR Value dbgmcu_val = Read32(0xE0042004) & (~0xE0); // Read DBGMCU_CR and clear trace setup Write32(0xE0042004, dbgmcu_val); // Write DBGMCU_CR: Trace Settings __var width = (__traceout & 0x003F0000) >> 16; __var dbgmcu_val = 0; // DBGMCU_CR Value __var dbgmcu_trace_val = 0; // DBGMCU_CR Value dbgmcu_val = Read32(0xE0042004) & (~0xE0); // Read DBGMCU_CR and clear trace setup Sequence("ConfigureTraceTPIUPins"); dbgmcu_trace_val = (3 << 5); dbgmcu_trace_val = (5 << 5); dbgmcu_trace_val = (7 << 5); Write32(0xE0042004, dbgmcu_val | dbgmcu_trace_val); // Write DBGMCU_CR: Trace Settings __var dbgmcu_val = 0; // DBGMCU_CR Value dbgmcu_val = Read32(0xE0042004) & (~0xE0); // Read DBGMCU_CR and clear trace setup Write32(0xE0042004, dbgmcu_val); // Write DBGMCU_CR: Trace Settings __var pin = 0; __var port = 0; __var portAdr = 0; __var pos = 0; __var SWO_Pin = 0x00010003; // PB3 pin = ((SWO_Pin ) & 0x0000FFFF); port = ((SWO_Pin >> 16) & 0x0000FFFF); portAdr = 0x48000000 + (((SWO_Pin >> 16) & 0x0000FFFF) * 0x400); port = port + 17; // adjust shift for register access pos = pin * 2; Write32(0x40021014, ((Read32(0x40021014 ) ) | (1 << port)) ); // RCC_AHBENR: IO port clock enable Write32(portAdr + 0x00, ((Read32(portAdr + 0x00) & ~( 3 << pos)) | (2 << pos )) ); // GPIOx_MODER: Set Mode (Alternate Function) Write32(portAdr + 0x08, ((Read32(portAdr + 0x08) ) | (3 << pos )) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) Write32(portAdr + 0x0C, ((Read32(portAdr + 0x0C) & ~( 3 << pos)) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down pos = ((pin ) & 7) * 4; Write32(portAdr + 0x20, ((Read32(portAdr + 0x20) & ~(15 << pos)) ) ); // GPIOx_AFRL: Alternate Function to AF0 pos = ((pin - 8) & 7) * 4; Write32(portAdr + 0x24, ((Read32(portAdr + 0x24) & ~(15 << pos)) ) ); // GPIOx_AFRH: Alternate Function to AF0 __var pin = 8; __var port = 0; __var portAdr = 0; __var pos = 0; __var width = (__traceout & 0x003F0000) >> 16; pin = (TraceClk_Pin ) & 0x0000FFFF; port = (TraceClk_Pin >> 16) & 0x0000FFFF; portAdr = 0x48000000 + (((TraceClk_Pin >> 16) & 0x0000FFFF) * 0x400); port = port + 17; // adjust shift for register access pos = pin * 2; Write32(0x40021014, ((Read32(0x40021014 ) ) | (1 << port)) ); // RCC_AHBENR: IO port clock enable Write32(portAdr + 0x00, ((Read32(portAdr + 0x00) & ~( 3 << pos)) | (2 << pos )) ); // GPIOx_MODER: Set Mode (Alternate Function) Write32(portAdr + 0x08, ((Read32(portAdr + 0x08) ) | (3 << pos )) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) Write32(portAdr + 0x0C, ((Read32(portAdr + 0x0C) & ~( 3 << pos)) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down pos = ((pin ) & 7) * 4; Write32(portAdr + 0x20, ((Read32(portAdr + 0x20) & ~(15 << pos)) ) ); // GPIOx_AFRL: Alternate Function to AF0 pos = ((pin - 8) & 7) * 4; Write32(portAdr + 0x24, ((Read32(portAdr + 0x24) & ~(15 << pos)) ) ); // GPIOx_AFRH: Alternate Function to AF0 pin = (TraceD0_Pin ) & 0x0000FFFF; port = (TraceD0_Pin >> 16) & 0x0000FFFF; portAdr = 0x48000000 + (((TraceD0_Pin >> 16) & 0x0000FFFF) * 0x400); port = port + 17; // adjust shift for register access pos = pin * 2; Write32(0x40021014, ((Read32(0x40021014 ) ) | (1 << port)) ); // RCC_AHBENR: IO port clock enable Write32(portAdr + 0x00, ((Read32(portAdr + 0x00) & ~( 3 << pos)) | (2 << pos )) ); // GPIOx_MODER: Set Mode (Alternate Function) Write32(portAdr + 0x08, ((Read32(portAdr + 0x08) ) | (3 << pos )) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) Write32(portAdr + 0x0C, ((Read32(portAdr + 0x0C) & ~( 3 << pos)) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down pos = ((pin ) & 7) * 4; Write32(portAdr + 0x20, ((Read32(portAdr + 0x20) & ~(15 << pos)) ) ); // GPIOx_AFRL: Alternate Function to AF0 pos = ((pin - 8) & 7) * 4; Write32(portAdr + 0x24, ((Read32(portAdr + 0x24) & ~(15 << pos)) ) ); // GPIOx_AFRH: Alternate Function to AF0 pin = (TraceD1_Pin ) & 0x0000FFFF; port = (TraceD1_Pin >> 16) & 0x0000FFFF; portAdr = 0x48000000 + (((TraceD1_Pin >> 16) & 0x0000FFFF) * 0x400); port = port + 17; // adjust shift for register access pos = pin * 2; Write32(0x40021014, ((Read32(0x40021014 ) ) | (1 << port)) ); // RCC_AHBENR: IO port clock enable Write32(portAdr + 0x00, ((Read32(portAdr + 0x00) & ~( 3 << pos)) | (2 << pos )) ); // GPIOx_MODER: Set Mode (Alternate Function) Write32(portAdr + 0x08, ((Read32(portAdr + 0x08) ) | (3 << pos )) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) Write32(portAdr + 0x0C, ((Read32(portAdr + 0x0C) & ~( 3 << pos)) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down pos = ((pin ) & 7) * 4; Write32(portAdr + 0x20, ((Read32(portAdr + 0x20) & ~(15 << pos)) ) ); // GPIOx_AFRL: Alternate Function to AF0 pos = ((pin - 8) & 7) * 4; Write32(portAdr + 0x24, ((Read32(portAdr + 0x24) & ~(15 << pos)) ) ); // GPIOx_AFRH: Alternate Function to AF0 pin = (TraceD2_Pin ) & 0x0000FFFF; port = (TraceD2_Pin >> 16) & 0x0000FFFF; portAdr = 0x48000000 + (((TraceD2_Pin >> 16) & 0x0000FFFF) * 0x400); port = port + 17; // adjust shift for register access pos = pin * 2; Write32(0x40021014, ((Read32(0x40021014 ) ) | (1 << port)) ); // RCC_AHBENR: IO port clock enable Write32(portAdr + 0x00, ((Read32(portAdr + 0x00) & ~( 3 << pos)) | (2 << pos )) ); // GPIOx_MODER: Set Mode (Alternate Function) Write32(portAdr + 0x08, ((Read32(portAdr + 0x08) ) | (3 << pos )) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) Write32(portAdr + 0x0C, ((Read32(portAdr + 0x0C) & ~( 3 << pos)) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down pos = ((pin ) & 7) * 4; Write32(portAdr + 0x20, ((Read32(portAdr + 0x20) & ~(15 << pos)) ) ); // GPIOx_AFRL: Alternate Function to AF0 pos = ((pin - 8) & 7) * 4; Write32(portAdr + 0x24, ((Read32(portAdr + 0x24) & ~(15 << pos)) ) ); // GPIOx_AFRH: Alternate Function to AF0 pin = (TraceD3_Pin ) & 0x0000FFFF; port = (TraceD3_Pin >> 16) & 0x0000FFFF; portAdr = 0x48000000 + (((TraceD3_Pin >> 16) & 0x0000FFFF) * 0x400); port = port + 17; // adjust shift for register access pos = pin * 2; Write32(0x40021014, ((Read32(0x40021014 ) ) | (1 << port)) ); // RCC_AHBENR: IO port clock enable Write32(portAdr + 0x00, ((Read32(portAdr + 0x00) & ~( 3 << pos)) | (2 << pos )) ); // GPIOx_MODER: Set Mode (Alternate Function) Write32(portAdr + 0x08, ((Read32(portAdr + 0x08) ) | (3 << pos )) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) Write32(portAdr + 0x0C, ((Read32(portAdr + 0x0C) & ~( 3 << pos)) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down pos = ((pin ) & 7) * 4; Write32(portAdr + 0x20, ((Read32(portAdr + 0x20) & ~(15 << pos)) ) ); // GPIOx_AFRL: Alternate Function to AF0 pos = ((pin - 8) & 7) * 4; Write32(portAdr + 0x24, ((Read32(portAdr + 0x24) & ~(15 << pos)) ) ); // GPIOx_AFRH: Alternate Function to AF0 __var connectionFlash = ( __connection & 0xF ) == 2 ; __var FLASH_BASE = 0x40022000 ; __var FLASH_CR = FLASH_BASE + 0x10 ; __var OBL_LAUNCH_BIT = ( 1 << 13 ) ; __var FLASH_CR_Value = 0 ; __var DoDebugPortStop = 1 ; __var DP_CTRL_STAT = 0x4 ; __var DP_SELECT = 0x8 ; DoDebugPortStop = 0 ; FLASH_CR_Value = Read32( FLASH_CR ) ; __errorcontrol = 1 ; // write OBL_LAUNCH bit (causes a reset) Write32( FLASH_CR, FLASH_CR_Value | ( OBL_LAUNCH_BIT ) ) ; __errorcontrol = 0 ; // Switch to DP Register Bank 0 WriteDP(DP_SELECT, 0x00000000); // Power Down Debug port WriteDP(DP_CTRL_STAT, 0x00000000); __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x40601811; // DGBMCU_APB1_FZ: Configure APB1 peripheral freeze behavior __var DbgMCU_APB2_Fz = 0x0000001D; // DGBMCU_APB2_FZ: Configure APB2 peripheral freeze behavior __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x42601817; // DGBMCU_APB1_FZ: Configure APB1 peripheral freeze behavior __var DbgMCU_APB2_Fz = 0x0000001D; // DGBMCU_APB2_FZ: Configure APB2 peripheral freeze behavior __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x42601837; // DGBMCU_APB1_FZ: Configure APB1 peripheral freeze behavior __var DbgMCU_APB2_Fz = 0x0000003F; // DGBMCU_APB2_FZ: Configure APB2 peripheral freeze behavior __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x02601BFF; // DGBMCU_APB1_FZ: Configure APB1 peripheral freeze behavior __var DbgMCU_APB2_Fz = 0x0000003C; // DGBMCU_APB2_FZ: Configure APB2 peripheral freeze behavior __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x02201833; // DGBMCU_APB1_FZ: Configure APB1 peripheral freeze behavior __var DbgMCU_APB2_Fz = 0x0000011D; // DGBMCU_APB2_FZ: Configure APB2 peripheral freeze behavior __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x40601811; // DGBMCU_APB1_FZ: Configure APB1 peripheral freeze behavior __var DbgMCU_APB2_Fz = 0x0000001D; // DGBMCU_APB2_FZ: Configure APB2 peripheral freeze behavior __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x40601811; // DGBMCU_APB1_FZ: Configure APB1 peripheral freeze behavior __var DbgMCU_APB2_Fz = 0x0000001D; // DGBMCU_APB2_FZ: Configure APB2 peripheral freeze behavior __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x42601837; // DGBMCU_APB1_FZ: Configure APB1 peripheral freeze behavior __var DbgMCU_APB2_Fz = 0x0000003F; // DGBMCU_APB2_FZ: Configure APB2 peripheral freeze behavior __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x42601837; // DGBMCU_APB1_FZ: Configure APB1 peripheral freeze behavior __var DbgMCU_APB2_Fz = 0x0000003F; // DGBMCU_APB2_FZ: Configure APB2 peripheral freeze behavior __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x42601837; // DGBMCU_APB1_FZ: Configure APB1 peripheral freeze behavior __var DbgMCU_APB2_Fz = 0x0000003F; // DGBMCU_APB2_FZ: Configure APB2 peripheral freeze behavior __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x42601837; // DGBMCU_APB1_FZ: Configure APB1 peripheral freeze behavior __var DbgMCU_APB2_Fz = 0x0000003F; // DGBMCU_APB2_FZ: Configure APB2 peripheral freeze behavior __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x02601BFF; // DGBMCU_APB1_FZ: Configure APB1 peripheral freeze behavior __var DbgMCU_APB2_Fz = 0x0000003C; // DGBMCU_APB2_FZ: Configure APB2 peripheral freeze behavior __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x02601BFF; // DGBMCU_APB1_FZ: Configure APB1 peripheral freeze behavior __var DbgMCU_APB2_Fz = 0x0000003C; // DGBMCU_APB2_FZ: Configure APB2 peripheral freeze behavior __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x02601BFF; // DGBMCU_APB1_FZ: Configure APB1 peripheral freeze behavior __var DbgMCU_APB2_Fz = 0x0000003C; // DGBMCU_APB2_FZ: Configure APB2 peripheral freeze behavior __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x42601837; // DGBMCU_APB1_FZ: Configure APB1 peripheral freeze behavior __var DbgMCU_APB2_Fz = 0x0000003F; // DGBMCU_APB2_FZ: Configure APB2 peripheral freeze behavior __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled STMicroelectronics STM32F3 Series devices STMicroelectronics STM32F3 Device and CMSIS-CORE Configuration via STM32CubeMX #define RTE_DEVICE_CUBE_MX #define CMSIS_device_header "stm32f3xx.h"