Keil STM32H7RSxx_DFP STMicroelectronics STM32H7RSxx Series Device Support https://www.keil.com/pack/ https://github.com/Open-CMSIS-Pack/STM32H7RSxx_DFP.git LICENSES Active development... ST Device Support Device Family Package STMicroelectronics STM32H7RS STM32H7RSxx High-performance STM32H7 MCUs with Arm Cortex-M7 core, MPU, L1 cache, DSP, DP-FPU, 1284 DMIPS at 600 MHz. // Default values for variables in debug sequences are configured with a *.dbgconf file in the user project __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBGMCU configuration register // [21] DBGCKEN, [20] TRACECLKEN // [ 2] DBGSTBY, [ 1] DBGSTOP, [ 0] DBGSLEEP __var DbgMCU_AHB5_Fzr = 0x0000FFFF; // DBGMCU_AHB5FZR: DBGMCU AHB5 peripheral freeze register __var DbgMCU_AHB1_Fzr = 0x0000FFFF; // DBGMCU_AHB1FZR: DBGMCU AHB1 peripheral freeze register __var DbgMCU_APB1_Fzr = 0x00E00BFF; // DBGMCU_APB1FZR: DBGMCU APB1 peripheral freeze register __var DbgMCU_APB2_Fzr = 0x000F0001; // DBGMCU_APB2FZR: DBGMCU APB2 peripheral freeze register __var DbgMCU_APB4_Fzr = 0x00041E00; // DBGMCU_APB4FZR: DBGMCU APB4 peripheral freeze register __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var value = 0; Sequence("CheckID"); __ap = 0; // Switch to System Debug Access Port value = Read32(0xE00E1004); // Read DBGMCU_CR value |= 0x00200000; // set preset values (enable all debug clocks by default) // DBGMCU_CR: [21] DBGCKEN value |= 0x00100000; // DBGMCU_CR[20] TRACECLKEN Write32(0xE00E1004, value); // Update DBGMCU_CR Write32(0xE00E1004 , DbgMCU_CR | value); // DBGMCU_CR: Configure MCU Debug Write32(0xE00E101C , DbgMCU_AHB5_Fzr ); // DBGMCU_AHB5FZR: Configure DBGMCU AHB5 peripheral freeze behavior Write32(0xE00E1024 , DbgMCU_AHB1_Fzr ); // DBGMCU_AHB1FZR: Configure DBGMCU AHB1 peripheral freeze behavior Write32(0xE00E103C , DbgMCU_APB1_Fzr ); // DBGMCU_APB1FZR: Configure DBGMCU APB1 peripheral freeze behavior Write32(0xE00E104C , DbgMCU_APB2_Fzr ); // DBGMCU_APB2FZR: Configure DBGMCU APB2 peripheral freeze behavior Write32(0xE00E1054 , DbgMCU_APB4_Fzr ); // DBGMCU_APB4FZR: Configure DBGMCU APB4 peripheral freeze behavior __var traceSWO = (__traceout & 0x1) != 0; // SWO (asynchronous) Trace Selected? __var traceTPIU = (__traceout & 0x2) != 0; // TPIU (synchronous) Trace Selected? Sequence("EnableTraceSWO"); // Call SWO Trace Setup Sequence("EnableTraceTPIU"); // Call TPIU Trace Setup // Nothing required for SWO Trace __var traceSWO = (__traceout & 0x1) != 0; // SWO enabled? __var traceTPIU = (__traceout & 0x2) != 0; // Synchronous trace port enabled? Sequence("DisableTraceSWO"); Sequence("DisableTraceTPIU"); __var pidr1 = 0; __var pidr2 = 0; __var jep106id = 0; __var ROMTableBase = 0; __ap = 0; // System debug access port (APB-AP) ROMTableBase = ReadAP(0xF8) & ~0x3; pidr1 = Read32(ROMTableBase + 0x0FE4); pidr2 = Read32(ROMTableBase + 0x0FE8); jep106id = ((pidr2 & 0x7) << 4 ) | ((pidr1 >> 4) & 0xF); Query(0, "Not a genuine ST Device! Abort connection", 1); Message(2, "Not a genuine ST Device! Abort connection."); __var value = 0; Sequence("ConfigureTraceSWOPin"); __ap = 0; // Switch to System Debug Access Port // Enable Trace Clock // not necessary because already done in "DebugDeviceUnlock". // // Configure SWO Funnel (SWTF) at 0xE00E4000 // value = Read32(0xE00E4000); // Read Trace Funnel CONTROL Register // value &= 0x00000F00; // Preserve Hold Time Settings, // value |= 0x00000001; // Enable ITM slave ports // Write32(0xE00E4000, value); // Update Trace Funnel CONTROL Register __var value = 0; __ap = 0; // Switch to System Debug Access Port // Disable Trace Clock value = Read32(0xE00E1004); // Read DBGMCU_CR value &= ~0x00100000; // DBGMCU_CR[20] : set TraceClkEn Write32(0xE00E1004, value); // Update DBGMCU_CR // // Configure SWO Funnel (SWTF) at 0xE00E4000 // value = Read32(0xE00E4000); // Read Trace Funnel CONTROL Register // value &= 0x00000F00; // Preserve Hold Time Settings, disable active slave ports // Write32(0xE00E4000, value); // Update Trace Funnel CONTROL Register __var value = 0; Sequence("ConfigureTraceTPIUPins"); __ap = 0; // Switch to System Debug Access Port // Enable Trace Clock // not necessary because already done in "DebugDeviceUnlock". // // Configure CoreSight Trace Funnel (CSTF) at 0xE00F3000 // value = Read32(0xE00F3000); // Read Trace Funnel CONTROL Register // value &= 0x00000F00; // Preserve Hold Time Settings // value |= 0x00000003; // Enable ITM and ETM slave ports // Write32(0xE00F3000, value); // Update Trace Funnel CONTROL Register __var value = 0; __ap = 0; // Switch to System Debug Access Port // Disable Trace Clock value = Read32(0xE00E1004); // Read DBGMCU_CR value &= ~0x00100000; // DBGMCU_CR[20] : set TraceClkEn Write32(0xE00E1004, value); // Update DBGMCU_CR // // Configure CoreSight Trace Funnel (CSTF) at 0xE00F3000 // value = Read32(0xE00F3000); // Read Trace Funnel CONTROL Register // value &= 0x00000FFC; // Preserve Hold Time Settings and other possibly set slave ports // Write32(0xE00F3000, value); // Update Trace Funnel CONTROL Register __var pin = 0; __var port = 0; __var portAdr = 0; __var pos = 0; __var SWO_Pin = 0x00010003; // PB3 pin = ((SWO_Pin ) & 0x0000FFFF); port = ((SWO_Pin >> 16) & 0x0000FFFF); portAdr = 0x58020000 + (((SWO_Pin >> 16) & 0x0000FFFF) * 0x400); pos = pin * 2; Write32(0x58024540, ((Read32(0x58024540 ) ) | (1 << port)) ); // RCC_AHB4ENR: IO port clock enable Write32(portAdr + 0x00, ((Read32(portAdr + 0x00) & ~( 3 << pos)) | (2 << pos )) ); // GPIOx_MODER: Set Mode (Alternate Function) Write32(portAdr + 0x08, ((Read32(portAdr + 0x08) ) | (3 << pos )) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) Write32(portAdr + 0x0C, ((Read32(portAdr + 0x0C) & ~( 3 << pos)) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down pos = ((pin ) & 7) * 4; Write32(portAdr + 0x20, ((Read32(portAdr + 0x20) & ~(15 << pos)) ) ); // GPIOx_AFRL: Alternate Function to AF0 pos = ((pin - 8) & 7) * 4; Write32(portAdr + 0x24, ((Read32(portAdr + 0x24) & ~(15 << pos)) ) ); // GPIOx_AFRH: Alternate Function to AF0 __var pin = 8; __var port = 0; __var portAdr = 0; __var pos = 0; __var width = (__traceout & 0x003F0000) >> 16; pin = (TraceClk_Pin ) & 0x0000FFFF; port = (TraceClk_Pin >> 16) & 0x0000FFFF; portAdr = 0x58020000 + (((TraceClk_Pin >> 16) & 0x0000FFFF) * 0x400); pos = pin * 2; Write32(0x58024540, ((Read32(0x58024540 ) ) | (1 << port)) ); // RCC_AHB4ENR: IO port clock enable Write32(portAdr + 0x00, ((Read32(portAdr + 0x00) & ~( 3 << pos)) | (2 << pos )) ); // GPIOx_MODER: Set Mode (Alternate Function) Write32(portAdr + 0x08, ((Read32(portAdr + 0x08) ) | (3 << pos )) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) Write32(portAdr + 0x0C, ((Read32(portAdr + 0x0C) & ~( 3 << pos)) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down pos = ((pin ) & 7) * 4; Write32(portAdr + 0x20, ((Read32(portAdr + 0x20) & ~(15 << pos)) ) ); // GPIOx_AFRL: Alternate Function to AF0 pos = ((pin - 8) & 7) * 4; Write32(portAdr + 0x24, ((Read32(portAdr + 0x24) & ~(15 << pos)) ) ); // GPIOx_AFRH: Alternate Function to AF0 pin = (TraceD0_Pin ) & 0x0000FFFF; port = (TraceD0_Pin >> 16) & 0x0000FFFF; portAdr = 0x58020000 + (((TraceD0_Pin >> 16) & 0x0000FFFF) * 0x400); pos = pin * 2; Write32(0x58024540, ((Read32(0x58024540 ) ) | (1 << port)) ); // RCC_AHB4ENR: IO port clock enable Write32(portAdr + 0x00, ((Read32(portAdr + 0x00) & ~( 3 << pos)) | (2 << pos )) ); // GPIOx_MODER: Set Mode (Alternate Function) Write32(portAdr + 0x08, ((Read32(portAdr + 0x08) ) | (3 << pos )) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) Write32(portAdr + 0x0C, ((Read32(portAdr + 0x0C) & ~( 3 << pos)) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down pos = ((pin ) & 7) * 4; Write32(portAdr + 0x20, ((Read32(portAdr + 0x20) & ~(15 << pos)) ) ); // GPIOx_AFRL: Alternate Function to AF0 pos = ((pin - 8) & 7) * 4; Write32(portAdr + 0x24, ((Read32(portAdr + 0x24) & ~(15 << pos)) ) ); // GPIOx_AFRH: Alternate Function to AF0 pin = (TraceD1_Pin ) & 0x0000FFFF; port = (TraceD1_Pin >> 16) & 0x0000FFFF; portAdr = 0x58020000 + (((TraceD1_Pin >> 16) & 0x0000FFFF) * 0x400); pos = pin * 2; Write32(0x58024540, ((Read32(0x58024540 ) ) | (1 << port)) ); // RCC_AHB4ENR: IO port clock enable Write32(portAdr + 0x00, ((Read32(portAdr + 0x00) & ~( 3 << pos)) | (2 << pos )) ); // GPIOx_MODER: Set Mode (Alternate Function) Write32(portAdr + 0x08, ((Read32(portAdr + 0x08) ) | (3 << pos )) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) Write32(portAdr + 0x0C, ((Read32(portAdr + 0x0C) & ~( 3 << pos)) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down pos = ((pin ) & 7) * 4; Write32(portAdr + 0x20, ((Read32(portAdr + 0x20) & ~(15 << pos)) ) ); // GPIOx_AFRL: Alternate Function to AF0 pos = ((pin - 8) & 7) * 4; Write32(portAdr + 0x24, ((Read32(portAdr + 0x24) & ~(15 << pos)) ) ); // GPIOx_AFRH: Alternate Function to AF0 pin = (TraceD2_Pin ) & 0x0000FFFF; port = (TraceD2_Pin >> 16) & 0x0000FFFF; portAdr = 0x58020000 + (((TraceD2_Pin >> 16) & 0x0000FFFF) * 0x400); pos = pin * 2; Write32(0x58024540, ((Read32(0x58024540 ) ) | (1 << port)) ); // RCC_AHB4ENR: IO port clock enable Write32(portAdr + 0x00, ((Read32(portAdr + 0x00) & ~( 3 << pos)) | (2 << pos )) ); // GPIOx_MODER: Set Mode (Alternate Function) Write32(portAdr + 0x08, ((Read32(portAdr + 0x08) ) | (3 << pos )) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) Write32(portAdr + 0x0C, ((Read32(portAdr + 0x0C) & ~( 3 << pos)) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down pos = ((pin ) & 7) * 4; Write32(portAdr + 0x20, ((Read32(portAdr + 0x20) & ~(15 << pos)) ) ); // GPIOx_AFRL: Alternate Function to AF0 pos = ((pin - 8) & 7) * 4; Write32(portAdr + 0x24, ((Read32(portAdr + 0x24) & ~(15 << pos)) ) ); // GPIOx_AFRH: Alternate Function to AF0 pin = (TraceD3_Pin ) & 0x0000FFFF; port = (TraceD3_Pin >> 16) & 0x0000FFFF; portAdr = 0x58020000 + (((TraceD3_Pin >> 16) & 0x0000FFFF) * 0x400); pos = pin * 2; Write32(0x58024540, ((Read32(0x58024540 ) ) | (1 << port)) ); // RCC_C1_AHB4ENR:IO port clock enable Write32(portAdr + 0x00, ((Read32(portAdr + 0x00) & ~( 3 << pos)) | (2 << pos )) ); // GPIOx_MODER: Set Mode (Alternate Function) Write32(portAdr + 0x08, ((Read32(portAdr + 0x08) ) | (3 << pos )) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) Write32(portAdr + 0x0C, ((Read32(portAdr + 0x0C) & ~( 3 << pos)) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down pos = ((pin ) & 7) * 4; Write32(portAdr + 0x20, ((Read32(portAdr + 0x20) & ~(15 << pos)) ) ); // GPIOx_AFRL: Alternate Function to AF0 pos = ((pin - 8) & 7) * 4; Write32(portAdr + 0x24, ((Read32(portAdr + 0x24) & ~(15 << pos)) ) ); // GPIOx_AFRH: Alternate Function to AF0 STMicroelectronics STM32H7RS Devices STMicroelectronics STM32H7RS Device and CMSIS-CORE Configuration via STM32CubeMX #define RTE_DEVICE_CUBE_MX #define CMSIS_device_header "stm32h7rsxx.h"