Keil STM32L1xx_DFP STMicroelectronics STM32L1 Series Device Support https://www.keil.com/pack/ https://github.com/Open-CMSIS-Pack/STM32L1xx_DFP.git LICENSE Active development ... Updated Pack to STM32Cube_FW_L1 Firmware Package version V1.10.3. Updated Documentation files. Board Examples: - Migrated CubeMX projects to V6.4.0. - Overridden default HAL_InitTick function. Device support: - Corrected handling for device STM32L162QCHx. Board descriptions: - mounted device tag must specify a valid device name. - added debugProbe tag to board description. Board Examples: - Changed Assembler option to armclang(Auto Select). - Updated config files to CMSIS 5.8.0. Synchronized versions of generated component ::Device:STM32Cube Framework:STM32CubeMX (in gpdsc) and its bootstrap (in pdsc). Added global define USE_HAL_DRIVER and USE_FULL_LL_DRIVER to the component ::Device:STM32Cube Framework:STM32CubeMX. Added global define USE_HAL_DRIVER and USE_FULL_LL_DRIVER to the component ::Device:STM32Cube HAL:COMMON. This DFP works either with STM32CubeMX (STM32CubeMX V6.0.0 and STM32Cube_FW_L1 V1.10.0 or higher) or Standalone (no support for STM32CubeMX). This pack contains only a subset of the files from STM32Cube_FW_L1 version 1.10.0 (ST Drivers, STM32Cube documentation and fonts). Device support: - Added device variants to match STM32CubeMX notation. - Added DebugDescription. - Added debug configuration files: DBGMCU INI and DBGCONF. - Added capability to launch the Option Byte Loading after a Flash Download. - Updated SVD files. - Updated documentation. CMSIS-Driver: - Added VIO module for boards STM32L-Discovery, STM32L100C-Discovery. Board support: - Reworked examples. - Updated LED_STM32L-Discovery.c: LED_On and LED_Off return -1 if parameter num is out of range. Updated STM32L1xx device support files. Added STM32L162xE device support. Added STM32L100xxA device support. Added STM32L151xxX device support. Added STM32L152xxX device support. Added STM32L162xxX device support. Added STM32L162xxA device support. Updated documentation. Reworked component startup. Reworked examples. Fixed SVD files access attribute for DIER registers to read-write. Added 'boards' section. Reworked 'conditions', 'Startup' sections. - added option byte target to STM32L-Discovery Blinky example - added new devices: STM32L151QE STM32L151RE STM32L151VE STM32L151ZE STM32L152QE STM32L152RE STM32L152VE STM32L152ZE - added new devices - updated Flash Programming Algorithms First Release version of STM32L1 Device Family Pack. ST Device Support Device Family Package STMicroelectronics STM32L1 STM32L1xx High-performance STM32L1 MCUs with Arm Cortex-M3 core, memory protection unit (MPU), 33.3 DMIPS at 32 MHz. Sequence("CheckID"); // Replication of Standard Functionality Write32(0xE000EDF0, 0xA05F0001); // Enable Core Debug via DHCSR Write32(0xE0042004, DbgMCU_CR); // DBGMCU_CR: Configure MCU Debug Write32(0xE0042008, DbgMCU_APB1_Fz); // DBGMCU_APB1_FZ: Configure APB1 Peripheral Freeze Behavior Write32(0xE004200C, DbgMCU_APB2_Fz); // DBGMCU_APB2_FZ: Configure APB2 Peripheral Freeze Behavior __var traceSWO = (__traceout & 0x1) != 0; // SWO (asynchronous) Trace Selected? __var traceTPIU = (__traceout & 0x2) != 0; // TPIU (synchronous) Trace Selected? Sequence("EnableTraceSWO"); // Call SWO Trace Setup Sequence("EnableTraceTPIU"); // Call TPIU Trace Setup // Nothing required for SWO Trace __var traceSWO = (__traceout & 0x1) != 0; // SWO enabled? __var traceTPIU = (__traceout & 0x2) != 0; // Synchronous trace port enabled? Sequence("DisableTraceSWO"); Sequence("DisableTraceTPIU"); __var pidr1 = 0; __var pidr2 = 0; __var jep106id = 0; __var ROMTableBase = 0; __ap = 0; // AHB-AP ROMTableBase = ReadAP(0xF8) & ~0x3; pidr1 = Read32(ROMTableBase + 0x0FE4); pidr2 = Read32(ROMTableBase + 0x0FE8); jep106id = ((pidr2 & 0x7) << 4 ) | ((pidr1 >> 4) & 0xF); Query(0, "Not a genuine ST Device! Abort connection", 1); Message(2, "Not a genuine ST Device! Abort connection."); __var dbgmcu_val = 0; // DBGMCU_CR Value __var dbgmcu_trace_val = 0; // DBGMCU_CR Value dbgmcu_val = Read32(0xE0042004) & (~0xE0); // Read DBGMCU_CR and clear trace setup dbgmcu_trace_val = (1 << 5); // Trace I/O Enable + Trace Mode Asynchronous Sequence("ConfigureTraceSWOPin"); Write32(0xE0042004, dbgmcu_val | dbgmcu_trace_val); // Write DBGMCU_CR: Trace Settings __var dbgmcu_val = 0; // DBGMCU_CR Value dbgmcu_val = Read32(0xE0042004) & (~0xE0); // Read DBGMCU_CR and clear trace setup Write32(0xE0042004, dbgmcu_val); // Write DBGMCU_CR: Trace Settings __var width = (__traceout & 0x003F0000) >> 16; __var dbgmcu_val = 0; // DBGMCU_CR Value __var dbgmcu_trace_val = 0; // DBGMCU_CR Value dbgmcu_val = Read32(0xE0042004) & (~0xE0); // Read DBGMCU_CR and clear trace setup Sequence("ConfigureTraceTPIUPins"); dbgmcu_trace_val = (3 << 5); dbgmcu_trace_val = (5 << 5); dbgmcu_trace_val = (7 << 5); Write32(0xE0042004, dbgmcu_val | dbgmcu_trace_val); // Write DBGMCU_CR: Trace Settings __var dbgmcu_val = 0; // DBGMCU_CR Value dbgmcu_val = Read32(0xE0042004) & (~0xE0); // Read DBGMCU_CR and clear trace setup Write32(0xE0042004, dbgmcu_val); // Write DBGMCU_CR: Trace Settings __var pin = 0; __var port = 0; __var portAdr = 0; __var pos = 0; __var SWO_Pin = 0x00010003; // PB3 pin = ((SWO_Pin ) & 0x0000FFFF); port = ((SWO_Pin >> 16) & 0x0000FFFF); portAdr = 0x40020000 + (((SWO_Pin >> 16) & 0x0000FFFF) * 0x400); pos = pin * 2; Write32(0x4002381C, ((Read32(0x4002381C ) ) | (1 << port)) ); // RCC_AHBENR: IO port clock enable Write32(portAdr + 0x00, ((Read32(portAdr + 0x00) & ~( 3 << pos)) | (2 << pos )) ); // GPIOx_MODER: Set Mode (Alternate Function) Write32(portAdr + 0x08, ((Read32(portAdr + 0x08) ) | (3 << pos )) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) Write32(portAdr + 0x0C, ((Read32(portAdr + 0x0C) & ~( 3 << pos)) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down pos = ((pin ) & 7) * 4; Write32(portAdr + 0x20, ((Read32(portAdr + 0x20) & ~(15 << pos)) ) ); // GPIOx_AFRL: Alternate Function to AF0 pos = ((pin - 8) & 7) * 4; Write32(portAdr + 0x24, ((Read32(portAdr + 0x24) & ~(15 << pos)) ) ); // GPIOx_AFRH: Alternate Function to AF0 __var pin = 8; __var port = 0; __var portAdr = 0; __var pos = 0; __var width = (__traceout & 0x003F0000) >> 16; pin = (TraceClk_Pin ) & 0x0000FFFF; port = (TraceClk_Pin >> 16) & 0x0000FFFF; portAdr = 0x40020000 + (((TraceClk_Pin >> 16) & 0x0000FFFF) * 0x400); pos = pin * 2; Write32(0x4002381C, ((Read32(0x4002381C ) ) | (1 << port)) ); // RCC_AHBENR: IO port clock enable Write32(portAdr + 0x00, ((Read32(portAdr + 0x00) & ~( 3 << pos)) | (2 << pos )) ); // GPIOx_MODER: Set Mode (Alternate Function) Write32(portAdr + 0x08, ((Read32(portAdr + 0x08) ) | (3 << pos )) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) Write32(portAdr + 0x0C, ((Read32(portAdr + 0x0C) & ~( 3 << pos)) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down pos = ((pin ) & 7) * 4; Write32(portAdr + 0x20, ((Read32(portAdr + 0x20) & ~(15 << pos)) ) ); // GPIOx_AFRL: Alternate Function to AF0 pos = ((pin - 8) & 7) * 4; Write32(portAdr + 0x24, ((Read32(portAdr + 0x24) & ~(15 << pos)) ) ); // GPIOx_AFRH: Alternate Function to AF0 pin = (TraceD0_Pin ) & 0x0000FFFF; port = (TraceD0_Pin >> 16) & 0x0000FFFF; portAdr = 0x40020000 + (((TraceD0_Pin >> 16) & 0x0000FFFF) * 0x400); pos = pin * 2; Write32(0x4002381C, ((Read32(0x4002381C ) ) | (1 << port)) ); // RCC_AHBENR: IO port clock enable Write32(portAdr + 0x00, ((Read32(portAdr + 0x00) & ~( 3 << pos)) | (2 << pos )) ); // GPIOx_MODER: Set Mode (Alternate Function) Write32(portAdr + 0x08, ((Read32(portAdr + 0x08) ) | (3 << pos )) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) Write32(portAdr + 0x0C, ((Read32(portAdr + 0x0C) & ~( 3 << pos)) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down pos = ((pin ) & 7) * 4; Write32(portAdr + 0x20, ((Read32(portAdr + 0x20) & ~(15 << pos)) ) ); // GPIOx_AFRL: Alternate Function to AF0 pos = ((pin - 8) & 7) * 4; Write32(portAdr + 0x24, ((Read32(portAdr + 0x24) & ~(15 << pos)) ) ); // GPIOx_AFRH: Alternate Function to AF0 pin = (TraceD1_Pin ) & 0x0000FFFF; port = (TraceD1_Pin >> 16) & 0x0000FFFF; portAdr = 0x40020000 + (((TraceD1_Pin >> 16) & 0x0000FFFF) * 0x400); pos = pin * 2; Write32(0x4002381C, ((Read32(0x4002381C ) ) | (1 << port)) ); // RCC_AHBENR: IO port clock enable Write32(portAdr + 0x00, ((Read32(portAdr + 0x00) & ~( 3 << pos)) | (2 << pos )) ); // GPIOx_MODER: Set Mode (Alternate Function) Write32(portAdr + 0x08, ((Read32(portAdr + 0x08) ) | (3 << pos )) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) Write32(portAdr + 0x0C, ((Read32(portAdr + 0x0C) & ~( 3 << pos)) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down pos = ((pin ) & 7) * 4; Write32(portAdr + 0x20, ((Read32(portAdr + 0x20) & ~(15 << pos)) ) ); // GPIOx_AFRL: Alternate Function to AF0 pos = ((pin - 8) & 7) * 4; Write32(portAdr + 0x24, ((Read32(portAdr + 0x24) & ~(15 << pos)) ) ); // GPIOx_AFRH: Alternate Function to AF0 pin = (TraceD2_Pin ) & 0x0000FFFF; port = (TraceD2_Pin >> 16) & 0x0000FFFF; portAdr = 0x40020000 + (((TraceD2_Pin >> 16) & 0x0000FFFF) * 0x400); pos = pin * 2; Write32(0x4002381C, ((Read32(0x4002381C ) ) | (1 << port)) ); // RCC_AHBENR: IO port clock enable Write32(portAdr + 0x00, ((Read32(portAdr + 0x00) & ~( 3 << pos)) | (2 << pos )) ); // GPIOx_MODER: Set Mode (Alternate Function) Write32(portAdr + 0x08, ((Read32(portAdr + 0x08) ) | (3 << pos )) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) Write32(portAdr + 0x0C, ((Read32(portAdr + 0x0C) & ~( 3 << pos)) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down pos = ((pin ) & 7) * 4; Write32(portAdr + 0x20, ((Read32(portAdr + 0x20) & ~(15 << pos)) ) ); // GPIOx_AFRL: Alternate Function to AF0 pos = ((pin - 8) & 7) * 4; Write32(portAdr + 0x24, ((Read32(portAdr + 0x24) & ~(15 << pos)) ) ); // GPIOx_AFRH: Alternate Function to AF0 pin = (TraceD3_Pin ) & 0x0000FFFF; port = (TraceD3_Pin >> 16) & 0x0000FFFF; portAdr = 0x40020000 + (((TraceD3_Pin >> 16) & 0x0000FFFF) * 0x400); pos = pin * 2; Write32(0x4002381C, ((Read32(0x4002381C ) ) | (1 << port)) ); // RCC_AHBENR: IO port clock enable Write32(portAdr + 0x00, ((Read32(portAdr + 0x00) & ~( 3 << pos)) | (2 << pos )) ); // GPIOx_MODER: Set Mode (Alternate Function) Write32(portAdr + 0x08, ((Read32(portAdr + 0x08) ) | (3 << pos )) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) Write32(portAdr + 0x0C, ((Read32(portAdr + 0x0C) & ~( 3 << pos)) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down pos = ((pin ) & 7) * 4; Write32(portAdr + 0x20, ((Read32(portAdr + 0x20) & ~(15 << pos)) ) ); // GPIOx_AFRL: Alternate Function to AF0 pos = ((pin - 8) & 7) * 4; Write32(portAdr + 0x24, ((Read32(portAdr + 0x24) & ~(15 << pos)) ) ); // GPIOx_AFRH: Alternate Function to AF0 __var connectionFlash = ( __connection & 0xF ) == 2 ; __var FLASH_BASE = 0x40023C00 ; __var FLASH_CR = FLASH_BASE + 0x04 ; __var OBL_LAUNCH_BIT = ( 1 << 18 ) ; __var LOCK_BIT = ( 1 << 0 ) ; __var OPTLOCK_BIT = ( 1 << 2 ) ; __var FLASH_KEYR = FLASH_BASE + 0x0C ; __var FLASH_KEY1 = 0x89ABCDEF ; __var FLASH_KEY2 = 0x02030405 ; __var FLASH_OPTKEYR = FLASH_BASE + 0x14 ; __var FLASH_OPTKEY1 = 0xFBEAD9C8 ; __var FLASH_OPTKEY2 = 0x24252627 ; __var FLASH_CR_Value = 0 ; __var DoDebugPortStop = 1 ; __var DP_CTRL_STAT = 0x4 ; __var DP_SELECT = 0x8 ; // unlock the FLASH_CR Write32( FLASH_KEYR, FLASH_KEY1 ) ; Write32( FLASH_KEYR, FLASH_KEY2 ) ; // unlock the option byte block Write32( FLASH_OPTKEYR, FLASH_OPTKEY1 ) ; Write32( FLASH_OPTKEYR, FLASH_OPTKEY2 ) ; FLASH_CR_Value = Read32( FLASH_CR ) ; DoDebugPortStop = 0 ; __errorcontrol = 1 ; // write OBL_LAUNCH bit (causes a reset) Write32( FLASH_CR, FLASH_CR_Value | ( OBL_LAUNCH_BIT ) ) ; __errorcontrol = 0 ; // Switch to DP Register Bank 0 WriteDP(DP_SELECT, 0x00000000); // Power Down Debug port WriteDP(DP_CTRL_STAT, 0x00000000); __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x00000000; // DGBMCU_APB1_FZ1: All Peripherals Operate as in Normal Mode __var DbgMCU_APB2_Fz = 0x00000000; // DGBMCU_APB2_FZ: All Peripherals Operate as in Normal Mode __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x00000000; // DGBMCU_APB1_FZ1: All Peripherals Operate as in Normal Mode __var DbgMCU_APB2_Fz = 0x00000000; // DGBMCU_APB2_FZ: All Peripherals Operate as in Normal Mode __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x00000000; // DGBMCU_APB1_FZ1: All Peripherals Operate as in Normal Mode __var DbgMCU_APB2_Fz = 0x00000000; // DGBMCU_APB2_FZ: All Peripherals Operate as in Normal Mode __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY __var DbgMCU_APB1_Fz = 0x00000000; // DGBMCU_APB1_FZ1: All Peripherals Operate as in Normal Mode __var DbgMCU_APB2_Fz = 0x00000000; // DGBMCU_APB2_FZ: All Peripherals Operate as in Normal Mode __var TraceClk_Pin = 0x00040002; // PE2 __var TraceD0_Pin = 0x00040003; // PE3 __var TraceD1_Pin = 0x00040004; // PE4 __var TraceD2_Pin = 0x00040005; // PE5 __var TraceD3_Pin = 0x00040006; // PE6 __var DoOptionByteLoading = 0; // Disabled STMicroelectronics STM32L1 Series devices STMicroelectronics STM32L1 Device and CMSIS-CORE Configuration via STM32CubeMX #define RTE_DEVICE_CUBE_MX #define CMSIS_device_header "stm32l1xx.h"