LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

entity lighten is
	port(
		key: in std_logic_vector(3 downto 0);
		display: out std_logic_vector(6 downto 0);
		display_4: out std_logic_vector(3 downto 0);
	
	);
end lighten