{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 132 02/25/2009 SJ Full Version " "Info: Version 9.0 Build 132 02/25/2009 SJ Full Version" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Fri May 11 14:16:06 2018 " "Info: Processing started: Fri May 11 14:16:06 2018" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off count -c count " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off count -c count" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "count.vhd 6 3 " "Info: Found 6 design units, including 3 entities, in source file count.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ff-arc " "Info: Found design unit 1: ff-arc" { } { { "count.vhd" "" { Text "C:/Users/Trinkle/Desktop/count/count.vhd" 13 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 -1} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 digit_7-arc " "Info: Found design unit 2: digit_7-arc" { } { { "count.vhd" "" { Text "C:/Users/Trinkle/Desktop/count/count.vhd" 57 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 -1} { "Info" "ISGN_DESIGN_UNIT_NAME" "3 count-arc " "Info: Found design unit 3: count-arc" { } { { "count.vhd" "" { Text "C:/Users/Trinkle/Desktop/count/count.vhd" 96 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 -1} { "Info" "ISGN_ENTITY_NAME" "1 ff " "Info: Found entity 1: ff" { } { { "count.vhd" "" { Text "C:/Users/Trinkle/Desktop/count/count.vhd" 6 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} { "Info" "ISGN_ENTITY_NAME" "2 digit_7 " "Info: Found entity 2: digit_7" { } { { "count.vhd" "" { Text "C:/Users/Trinkle/Desktop/count/count.vhd" 51 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} { "Info" "ISGN_ENTITY_NAME" "3 count " "Info: Found entity 3: count" { } { { "count.vhd" "" { Text "C:/Users/Trinkle/Desktop/count/count.vhd" 88 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1} { "Info" "ISGN_START_ELABORATION_TOP" "count " "Info: Elaborating entity \"count\" for the top level hierarchy" { } { } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0 -1} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "ff ff:tmp0 " "Info: Elaborating entity \"ff\" for hierarchy \"ff:tmp0\"" { } { { "count.vhd" "tmp0" { Text "C:/Users/Trinkle/Desktop/count/count.vhd" 110 0 0 } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1} { "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "pause count.vhd(22) " "Warning (10492): VHDL Process Statement warning at count.vhd(22): signal \"pause\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" { } { { "count.vhd" "" { Text "C:/Users/Trinkle/Desktop/count/count.vhd" 22 0 0 } } } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0 -1} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "digit_7 digit_7:tmp1 " "Info: Elaborating entity \"digit_7\" for hierarchy \"digit_7:tmp1\"" { } { { "count.vhd" "tmp1" { Text "C:/Users/Trinkle/Desktop/count/count.vhd" 111 0 0 } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_SUMMARY" "100 " "Info: Implemented 100 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "4 " "Info: Implemented 4 input pins" { } { } 0 0 "Implemented %1!d! input pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_OPINS" "22 " "Info: Implemented 22 output pins" { } { } 0 0 "Implemented %1!d! output pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_LCELLS" "74 " "Info: Implemented 74 logic cells" { } { } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0 -1} } { } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0 -1} { "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 1 Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "293 " "Info: Peak virtual memory: 293 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Fri May 11 14:16:08 2018 " "Info: Processing ended: Fri May 11 14:16:08 2018" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}