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		(legacy_teardrops no)
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	(paper "A4")
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			(layer "dielectric 1"
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				(thickness 0.01)
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			)
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			(copper_finish "None")
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		)
		(pad_to_mask_clearance 0)
		(allow_soldermask_bridges_in_footprints no)
		(tenting front back)
		(pcbplotparams
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			(outputdirectory "../Production/")
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	(net 4 "Net-(D3-A)")
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	(net 8 "Net-(D6-A)")
	(net 9 "Net-(D7-A)")
	(net 10 "Net-(D8-A)")
	(net 11 "Net-(D9-A)")
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	(net 14 "Net-(D11-A)")
	(net 15 "Net-(D12-A)")
	(net 16 "+3V3")
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	(net 19 "SCL")
	(net 20 "COL0")
	(net 21 "COL1")
	(net 22 "COL2")
	(net 23 "COL3")
	(net 24 "ENB")
	(net 25 "ENA")
	(net 26 "+5V")
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