# HDL_Automation
Verilog and SystemVerilog automation with Sublime Text 4

* Auto format file

![auto_format_file](https://user-images.githubusercontent.com/71039587/128532016-b6221a38-8453-4ba8-baac-10a81ce8e7f5.gif)

* Auto format selections

![auto_format_selections](https://user-images.githubusercontent.com/71039587/128612725-e45b1844-2735-4e5d-90ca-f95e3f6ef31a.gif)


# The repository owners are:
- Dawid Szulc dawidszulc094@gmail.com

# Instalation:
- Press ```CTRL``` + ```SHIFT``` + ```p```
- Select ```Package Control: Install Package```
- Select ```HDL_Automation```

# Requirements:
- Sublime Text 4
- [Verible](https://github.com/chipsalliance/verible) added to PATH
- Windows Subsystem for Linux (WSL) when Windows user

# Modify settings:
- Press ```Preferences```
- Press ```Package Settings```
- Press ```HDL_Automation```
- Press ```Settings```
- Add or modify settings (left column - template with description, right column - user settings)

Succesfully tested under Windows Subsystem for Linux with verible-v0.0-1318 and Sublime Text 4 Build 4113