v {xschem version=3.1.0 file_version=1.2
}
G {}
K {}
V {}
S {}
E {}
T {Bit Calculations with CRS} 470 -1940 0 0 0.8 0.8 {}
T {The Dff's for the split caps use RESET while the other caps use SET. 
Thus when a reset is performed the capacitance is cut in half} 1060 -1930 0 0 0.4 0.4 {}
N 500 -1850 500 -1800 {
lab=sw_n_sp1}
N 710 -1850 710 -1800 {
lab=sw_n_sp2}
N 920 -1620 920 -1540 {
lab=#net1}
N 920 -1540 920 -1180 {
lab=#net1}
N 520 -1190 900 -1190 {
lab=#net2}
N 940 -870 940 -850 {
lab=#net3}
N 910 -850 940 -850 {
lab=#net3}
N 960 -450 960 -430 {
lab=raw_bit1}
N 1000 -450 1000 -430 {
lab=Vcmp}
N 1110 -1620 1110 -1540 {
lab=#net4}
N 1110 -1850 1110 -1800 {
lab=sw_n2}
N 1110 -1540 1110 -1180 {
lab=#net4}
N 1150 -450 1150 -430 {
lab=raw_bit1}
N 1190 -450 1190 -430 {
lab=Vcmp}
N 730 -1200 1090 -1200 {
lab=#net5}
N 1360 -1840 1360 -1790 {
lab=sw_n_sp3}
N 1570 -1610 1570 -1590 {
lab=cycle4}
N 1570 -1840 1570 -1790 {
lab=sw_n_sp4}
N 1980 -1610 1980 -1540 {
lab=#net6}
N 1980 -1840 1980 -1790 {
lab=sw_n3}
N 1980 -1540 1980 -1170 {
lab=#net6}
N 2020 -600 2020 -580 {
lab=cycle5}
N 2020 -440 2020 -420 {
lab=raw_bit4}
N 2060 -440 2060 -420 {
lab=Vcmp}
N 2170 -1610 2170 -1540 {
lab=#net7}
N 2170 -1840 2170 -1790 {
lab=sw_n4}
N 2170 -1540 2170 -1170 {
lab=#net7}
N 2210 -600 2210 -580 {
lab=cycle6}
N 2180 -580 2210 -580 {
lab=cycle6}
N 2210 -440 2210 -420 {
lab=raw_bit4}
N 2250 -440 2250 -420 {
lab=Vcmp}
N 1780 -1610 1780 -1590 {
lab=cycle4}
N 1780 -1840 1780 -1790 {
lab=sw_n_sp5}
N 2360 -1610 2360 -1540 {
lab=#net8}
N 2360 -1840 2360 -1790 {
lab=sw_n5}
N 2360 -1540 2360 -1170 {
lab=#net8}
N 2400 -600 2400 -580 {
lab=cycle7}
N 2370 -580 2400 -580 {
lab=cycle7}
N 2400 -440 2400 -420 {
lab=raw_bit4}
N 2440 -440 2440 -420 {
lab=Vcmp}
N 1590 -1190 2150 -1190 {
lab=#net9}
N 1800 -1200 2340 -1200 {
lab=#net10}
N 2570 -1840 2570 -1790 {
lab=sw_n_sp6}
N 2780 -1840 2780 -1790 {
lab=sw_n_sp7}
N 3190 -1840 3190 -1790 {
lab=sw_n6}
N 3380 -1840 3380 -1790 {
lab=sw_n7}
N 2990 -1840 2990 -1790 {
lab=sw_n_sp8}
N 3570 -1840 3570 -1790 {
lab=sw_n8}
N 3780 -1840 3780 -1790 {
lab=sw_n_sp9}
N 620 -1620 620 -1570 {
lab=#net11}
N 520 -1620 520 -1490 {
lab=Vcmp}
N 520 -1490 620 -1490 {
lab=Vcmp}
N 580 -1490 580 -1460 {
lab=Vcmp}
N 600 -1850 600 -1800 {
lab=sw_p_sp1}
N 710 -1600 810 -1600 {
lab=cycle1}
N 810 -1620 810 -1600 {
lab=cycle1}
N 830 -1620 830 -1570 {
lab=#net12}
N 730 -1620 730 -1490 {
lab=Vcmp}
N 730 -1490 830 -1490 {
lab=Vcmp}
N 790 -1490 790 -1460 {
lab=Vcmp}
N 810 -1850 810 -1800 {
lab=sw_p_sp2}
N 920 -1850 930 -1850 {
lab=sw_n1}
N 920 -1850 920 -1800 {
lab=sw_n1}
N 1010 -1850 1020 -1850 {
lab=sw_p1}
N 1010 -1850 1010 -1800 {
lab=sw_p1}
N 920 -1540 1010 -1540 {
lab=#net1}
N 1010 -1620 1010 -1540 {
lab=#net1}
N 940 -1620 940 -1480 {
lab=Vcmp}
N 940 -1480 1030 -1480 {
lab=Vcmp}
N 980 -1480 980 -1450 {
lab=Vcmp}
N 1030 -1620 1030 -1560 {
lab=#net13}
N 1110 -1540 1210 -1540 {
lab=#net4}
N 1210 -1620 1210 -1540 {
lab=#net4}
N 1230 -1620 1230 -1560 {
lab=#net14}
N 1130 -1620 1130 -1480 {
lab=Vcmp}
N 1130 -1480 1230 -1480 {
lab=Vcmp}
N 1180 -1480 1180 -1450 {
lab=Vcmp}
N 1110 -1850 1120 -1850 {
lab=sw_n2}
N 1210 -1850 1220 -1850 {
lab=sw_p2}
N 1210 -1850 1210 -1800 {
lab=sw_p2}
N 1460 -1840 1460 -1790 {
lab=sw_p_sp3}
N 1360 -1590 1460 -1590 {
lab=cycle4}
N 1460 -1610 1460 -1590 {
lab=cycle4}
N 1480 -1610 1480 -1560 {
lab=#net15}
N 1380 -1610 1380 -1480 {
lab=Vcmp}
N 1380 -1480 1480 -1480 {
lab=Vcmp}
N 1440 -1480 1440 -1450 {
lab=Vcmp}
N 1570 -1590 1670 -1590 {
lab=cycle4}
N 1670 -1610 1670 -1590 {
lab=cycle4}
N 1690 -1610 1690 -1560 {
lab=#net16}
N 1590 -1610 1590 -1480 {
lab=Vcmp}
N 1590 -1480 1690 -1480 {
lab=Vcmp}
N 1650 -1480 1650 -1450 {
lab=Vcmp}
N 1670 -1840 1670 -1790 {
lab=sw_p_sp4}
N 1870 -1840 1870 -1790 {
lab=sw_p_sp5}
N 1780 -1590 1870 -1590 {
lab=cycle4}
N 1870 -1610 1870 -1590 {
lab=cycle4}
N 1890 -1610 1890 -1560 {
lab=#net17}
N 1800 -1610 1800 -1480 {
lab=Vcmp}
N 1800 -1480 1890 -1480 {
lab=Vcmp}
N 1860 -1480 1860 -1450 {
lab=Vcmp}
N 1980 -1540 2070 -1540 {
lab=#net6}
N 2070 -1610 2070 -1540 {
lab=#net6}
N 2090 -1610 2090 -1560 {
lab=#net18}
N 2000 -1610 2000 -1480 {
lab=Vcmp}
N 2000 -1480 2090 -1480 {
lab=Vcmp}
N 2050 -1480 2050 -1450 {
lab=Vcmp}
N 1980 -1840 1990 -1840 {
lab=sw_n3}
N 2070 -1840 2080 -1840 {
lab=sw_p3}
N 2070 -1840 2070 -1790 {
lab=sw_p3}
N 2170 -1840 2180 -1840 {
lab=sw_n4}
N 2260 -1840 2270 -1840 {
lab=sw_p4}
N 2260 -1840 2260 -1790 {
lab=sw_p4}
N 2280 -1610 2280 -1560 {
lab=#net19}
N 2170 -1540 2260 -1540 {
lab=#net7}
N 2260 -1610 2260 -1540 {
lab=#net7}
N 2190 -1610 2190 -1480 {
lab=Vcmp}
N 2190 -1480 2280 -1480 {
lab=Vcmp}
N 2240 -1480 2240 -1450 {
lab=Vcmp}
N 2360 -1840 2370 -1840 {
lab=sw_n5}
N 2360 -1540 2460 -1540 {
lab=#net8}
N 2460 -1610 2460 -1540 {
lab=#net8}
N 2480 -1610 2480 -1550 {
lab=#net20}
N 2380 -1610 2380 -1470 {
lab=Vcmp}
N 2380 -1470 2480 -1470 {
lab=Vcmp}
N 2420 -1470 2420 -1440 {
lab=Vcmp}
N 2460 -1840 2470 -1840 {
lab=sw_p5}
N 2460 -1840 2460 -1790 {
lab=sw_p5}
N 2670 -1840 2670 -1790 {
lab=sw_p_sp6}
N 2880 -1840 2880 -1790 {
lab=sw_p_sp7}
N 3190 -1840 3200 -1840 {
lab=sw_n6}
N 3280 -1840 3290 -1840 {
lab=sw_p6}
N 3280 -1840 3280 -1790 {
lab=sw_p6}
N 3380 -1840 3390 -1840 {
lab=sw_n7}
N 3470 -1840 3480 -1840 {
lab=sw_p7}
N 3470 -1840 3470 -1790 {
lab=sw_p7}
N 3570 -1840 3580 -1840 {
lab=sw_n8}
N 3660 -1840 3670 -1840 {
lab=sw_p8}
N 3880 -1840 3880 -1790 {
lab=sw_p_sp9}
N 3800 -1610 3800 -1470 {
lab=Vcmp}
N 3900 -1610 3900 -1550 {
lab=#net21}
N 3800 -1470 3900 -1470 {
lab=Vcmp}
N 3850 -1470 3850 -1450 {
lab=Vcmp}
N 3780 -1590 3880 -1590 {
lab=cycle12}
N 3880 -1610 3880 -1590 {
lab=cycle12}
N 920 -1180 920 -1170 {
lab=#net1}
N 900 -1190 900 -1170 {
lab=#net2}
N 1090 -1200 1090 -1170 {
lab=#net5}
N 1110 -1180 1110 -1170 {
lab=#net4}
N 940 -1210 940 -1170 {
lab=VSS}
N 960 -1210 960 -1170 {
lab=VDD}
N 1130 -1210 1130 -1170 {
lab=VSS}
N 1150 -1210 1150 -1170 {
lab=VDD}
N 1960 -1180 1960 -1160 {
lab=#net22}
N 1980 -1170 1980 -1160 {
lab=#net6}
N 2150 -1190 2150 -1160 {
lab=#net9}
N 2170 -1170 2170 -1160 {
lab=#net7}
N 2340 -1200 2340 -1160 {
lab=#net10}
N 2360 -1170 2360 -1160 {
lab=#net8}
N 2000 -1210 2000 -1160 {
lab=VSS}
N 2020 -1210 2020 -1160 {
lab=VDD}
N 2190 -1210 2190 -1160 {
lab=VSS}
N 2210 -1210 2210 -1160 {
lab=VDD}
N 2380 -1210 2380 -1160 {
lab=VSS}
N 2400 -1210 2400 -1160 {
lab=VDD}
N 1360 -1610 1360 -1590 {
lab=cycle4}
N 3780 -1610 3780 -1590 {
lab=cycle12}
N 540 -1620 540 -1460 {
lab=#net23}
N 540 -1460 540 -1450 {
lab=#net23}
N 600 -1620 600 -1600 {
lab=cycle1}
N 500 -1600 600 -1600 {
lab=cycle1}
N 500 -1620 500 -1600 {
lab=cycle1}
N 540 -1590 640 -1590 {
lab=#net23}
N 640 -1620 640 -1590 {
lab=#net23}
N 520 -1330 520 -1300 {
lab=#net24}
N 520 -1220 520 -1190 {
lab=#net2}
N 750 -1620 750 -1450 {
lab=#net25}
N 850 -1620 850 -1590 {
lab=#net25}
N 730 -1330 730 -1300 {
lab=#net26}
N 730 -1220 730 -1200 {
lab=#net5}
N 1070 -110 1070 -80 {
lab=cycle1}
N 1040 -80 1070 -80 {
lab=cycle1}
N 1090 -110 1090 -60 {
lab=Vcmp}
N 1040 -60 1090 -60 {
lab=Vcmp}
N 1040 -40 1110 -40 {
lab=RESET}
N 1110 -110 1110 -40 {
lab=RESET}
N 1050 -310 1070 -310 {
lab=raw_bit1}
N 1070 -310 1070 -290 {
lab=raw_bit1}
N 1220 -110 1220 -80 {
lab=cycle2}
N 1190 -80 1220 -80 {
lab=cycle2}
N 1240 -110 1240 -60 {
lab=Vcmp}
N 1190 -60 1240 -60 {
lab=Vcmp}
N 1190 -40 1260 -40 {
lab=RESET}
N 1260 -110 1260 -40 {
lab=RESET}
N 1200 -310 1220 -310 {
lab=raw_bit2}
N 1220 -310 1220 -290 {
lab=raw_bit2}
N 1370 -110 1370 -80 {
lab=cycle3}
N 1340 -80 1370 -80 {
lab=cycle3}
N 1390 -110 1390 -60 {
lab=Vcmp}
N 1340 -60 1390 -60 {
lab=Vcmp}
N 1340 -40 1410 -40 {
lab=RESET}
N 1410 -110 1410 -40 {
lab=RESET}
N 1350 -310 1370 -310 {
lab=raw_bit3}
N 1370 -310 1370 -290 {
lab=raw_bit3}
N 1520 -110 1520 -80 {
lab=cycle4}
N 1490 -80 1520 -80 {
lab=cycle4}
N 1540 -110 1540 -60 {
lab=Vcmp}
N 1490 -60 1540 -60 {
lab=Vcmp}
N 1490 -40 1560 -40 {
lab=RESET}
N 1560 -110 1560 -40 {
lab=RESET}
N 1500 -310 1520 -310 {
lab=raw_bit4}
N 1520 -310 1520 -290 {
lab=raw_bit4}
N 1670 -110 1670 -80 {
lab=cycle5}
N 1640 -80 1670 -80 {
lab=cycle5}
N 1690 -110 1690 -60 {
lab=Vcmp}
N 1640 -60 1690 -60 {
lab=Vcmp}
N 1640 -40 1710 -40 {
lab=RESET}
N 1710 -110 1710 -40 {
lab=RESET}
N 1650 -310 1670 -310 {
lab=raw_bit5}
N 1670 -310 1670 -290 {
lab=raw_bit5}
N 1820 -110 1820 -80 {
lab=cycle6}
N 1790 -80 1820 -80 {
lab=cycle6}
N 1840 -110 1840 -60 {
lab=Vcmp}
N 1790 -60 1840 -60 {
lab=Vcmp}
N 1790 -40 1860 -40 {
lab=RESET}
N 1860 -110 1860 -40 {
lab=RESET}
N 1800 -310 1820 -310 {
lab=raw_bit6}
N 1820 -310 1820 -290 {
lab=raw_bit6}
N 1970 -110 1970 -80 {
lab=cycle7}
N 1940 -80 1970 -80 {
lab=cycle7}
N 1990 -110 1990 -60 {
lab=Vcmp}
N 1940 -60 1990 -60 {
lab=Vcmp}
N 1940 -40 2010 -40 {
lab=RESET}
N 2010 -110 2010 -40 {
lab=RESET}
N 1950 -310 1970 -310 {
lab=raw_bit7}
N 1970 -310 1970 -290 {
lab=raw_bit7}
N 2120 -110 2120 -80 {
lab=cycle8}
N 2090 -80 2120 -80 {
lab=cycle8}
N 2140 -110 2140 -60 {
lab=Vcmp}
N 2090 -60 2140 -60 {
lab=Vcmp}
N 2090 -40 2160 -40 {
lab=RESET}
N 2160 -110 2160 -40 {
lab=RESET}
N 2100 -310 2120 -310 {
lab=raw_bit8}
N 2120 -310 2120 -290 {
lab=raw_bit8}
N 2270 -110 2270 -80 {
lab=cycle9}
N 2240 -80 2270 -80 {
lab=cycle9}
N 2290 -110 2290 -60 {
lab=Vcmp}
N 2240 -60 2290 -60 {
lab=Vcmp}
N 2240 -40 2310 -40 {
lab=RESET}
N 2310 -110 2310 -40 {
lab=RESET}
N 2250 -310 2270 -310 {
lab=raw_bit9}
N 2270 -310 2270 -290 {
lab=raw_bit9}
N 2420 -110 2420 -80 {
lab=cycle10}
N 2390 -80 2420 -80 {
lab=cycle10}
N 2440 -110 2440 -60 {
lab=Vcmp}
N 2390 -60 2440 -60 {
lab=Vcmp}
N 2390 -40 2460 -40 {
lab=RESET}
N 2460 -110 2460 -40 {
lab=RESET}
N 2400 -310 2420 -310 {
lab=raw_bit10}
N 2420 -310 2420 -290 {
lab=raw_bit10}
N 2570 -110 2570 -80 {
lab=cycle11}
N 2540 -80 2570 -80 {
lab=cycle11}
N 2590 -110 2590 -60 {
lab=Vcmp}
N 2540 -60 2590 -60 {
lab=Vcmp}
N 2540 -40 2610 -40 {
lab=RESET}
N 2610 -110 2610 -40 {
lab=RESET}
N 2550 -310 2570 -310 {
lab=raw_bit11}
N 2570 -310 2570 -290 {
lab=raw_bit11}
N 2720 -110 2720 -80 {
lab=cycle12}
N 2690 -80 2720 -80 {
lab=cycle12}
N 2740 -110 2740 -60 {
lab=Vcmp}
N 2690 -60 2740 -60 {
lab=Vcmp}
N 2690 -40 2760 -40 {
lab=RESET}
N 2760 -110 2760 -40 {
lab=RESET}
N 2700 -310 2720 -310 {
lab=raw_bit12}
N 2720 -310 2720 -290 {
lab=raw_bit12}
N 2870 -110 2870 -80 {
lab=cycle13}
N 2840 -80 2870 -80 {
lab=cycle13}
N 2890 -110 2890 -60 {
lab=Vcmp}
N 2840 -60 2890 -60 {
lab=Vcmp}
N 2840 -40 2910 -40 {
lab=RESET}
N 2910 -110 2910 -40 {
lab=RESET}
N 2850 -310 2870 -310 {
lab=raw_bit13}
N 2870 -310 2870 -290 {
lab=raw_bit13}
N 1400 -1610 1400 -1450 {
lab=#net27}
N 1400 -1580 1500 -1580 {
lab=#net27}
N 1500 -1610 1500 -1580 {
lab=#net27}
N 1710 -1610 1710 -1580 {
lab=#net28}
N 1610 -1610 1610 -1440 {
lab=#net28}
N 1610 -1580 1710 -1580 {
lab=#net28}
N 1820 -1610 1820 -1440 {
lab=#net29}
N 1820 -1580 1910 -1580 {
lab=#net29}
N 1910 -1610 1910 -1580 {
lab=#net29}
N 1380 -1180 1960 -1180 {
lab=#net22}
N 1380 -1330 1380 -1300 {
lab=#net30}
N 1380 -1220 1380 -1180 {
lab=#net22}
N 1590 -1320 1590 -1290 {
lab=#net31}
N 1590 -1210 1590 -1190 {
lab=#net9}
N 1800 -1320 1800 -1290 {
lab=#net32}
N 1800 -1210 1800 -1200 {
lab=#net10}
N 2780 -1610 2780 -1590 {
lab=cycle8}
N 3190 -1610 3190 -1540 {
lab=#net33}
N 3190 -1540 3190 -1170 {
lab=#net33}
N 3230 -600 3230 -580 {
lab=cycle9}
N 3200 -580 3230 -580 {
lab=cycle9}
N 3230 -440 3230 -420 {
lab=raw_bit8}
N 3270 -440 3270 -420 {
lab=Vcmp}
N 3380 -1610 3380 -1540 {
lab=#net34}
N 3380 -1540 3380 -1170 {
lab=#net34}
N 3420 -600 3420 -580 {
lab=cycle10}
N 3390 -580 3420 -580 {
lab=cycle10}
N 3420 -450 3420 -430 {
lab=raw_bit8}
N 3460 -450 3460 -430 {
lab=Vcmp}
N 2990 -1610 2990 -1590 {
lab=cycle8}
N 3570 -1610 3570 -1540 {
lab=#net35}
N 3570 -1540 3570 -1170 {
lab=#net35}
N 3610 -600 3610 -580 {
lab=cycle11}
N 3580 -580 3610 -580 {
lab=cycle11}
N 3610 -440 3610 -420 {
lab=raw_bit8}
N 3650 -440 3650 -420 {
lab=Vcmp}
N 2800 -1190 3360 -1190 {
lab=#net36}
N 3010 -1200 3550 -1200 {
lab=#net37}
N 2570 -1590 2670 -1590 {
lab=cycle8}
N 2670 -1610 2670 -1590 {
lab=cycle8}
N 2690 -1610 2690 -1560 {
lab=#net38}
N 2590 -1610 2590 -1480 {
lab=Vcmp}
N 2590 -1480 2690 -1480 {
lab=Vcmp}
N 2650 -1480 2650 -1450 {
lab=Vcmp}
N 2780 -1590 2880 -1590 {
lab=cycle8}
N 2880 -1610 2880 -1590 {
lab=cycle8}
N 2900 -1610 2900 -1560 {
lab=#net39}
N 2800 -1610 2800 -1480 {
lab=Vcmp}
N 2800 -1480 2900 -1480 {
lab=Vcmp}
N 2860 -1480 2860 -1450 {
lab=Vcmp}
N 2990 -1590 3090 -1590 {
lab=cycle8}
N 3090 -1610 3090 -1590 {
lab=cycle8}
N 3110 -1610 3110 -1560 {
lab=#net40}
N 3010 -1610 3010 -1480 {
lab=Vcmp}
N 3010 -1480 3110 -1480 {
lab=Vcmp}
N 3080 -1480 3080 -1450 {
lab=Vcmp}
N 3190 -1540 3280 -1540 {
lab=#net33}
N 3280 -1610 3280 -1540 {
lab=#net33}
N 3300 -1610 3300 -1560 {
lab=#net41}
N 3210 -1610 3210 -1480 {
lab=Vcmp}
N 3210 -1480 3300 -1480 {
lab=Vcmp}
N 3260 -1480 3260 -1450 {
lab=Vcmp}
N 3490 -1610 3490 -1560 {
lab=#net42}
N 3380 -1540 3470 -1540 {
lab=#net34}
N 3470 -1610 3470 -1540 {
lab=#net34}
N 3400 -1610 3400 -1480 {
lab=Vcmp}
N 3400 -1480 3490 -1480 {
lab=Vcmp}
N 3450 -1480 3450 -1450 {
lab=Vcmp}
N 3570 -1540 3660 -1540 {
lab=#net35}
N 3660 -1610 3660 -1540 {
lab=#net35}
N 3680 -1610 3680 -1550 {
lab=#net43}
N 3590 -1610 3590 -1470 {
lab=Vcmp}
N 3590 -1470 3680 -1470 {
lab=Vcmp}
N 3630 -1470 3630 -1440 {
lab=Vcmp}
N 3170 -1180 3170 -1160 {
lab=#net44}
N 3190 -1170 3190 -1160 {
lab=#net33}
N 3360 -1190 3360 -1160 {
lab=#net36}
N 3380 -1170 3380 -1160 {
lab=#net34}
N 3550 -1200 3550 -1160 {
lab=#net37}
N 3570 -1170 3570 -1160 {
lab=#net35}
N 3210 -1210 3210 -1160 {
lab=VSS}
N 3230 -1210 3230 -1160 {
lab=VDD}
N 3400 -1210 3400 -1160 {
lab=VSS}
N 3420 -1210 3420 -1160 {
lab=VDD}
N 3590 -1210 3590 -1160 {
lab=VSS}
N 3610 -1210 3610 -1160 {
lab=VDD}
N 2570 -1610 2570 -1590 {
lab=cycle8}
N 2610 -1610 2610 -1450 {
lab=#net45}
N 2610 -1580 2710 -1580 {
lab=#net45}
N 2710 -1610 2710 -1580 {
lab=#net45}
N 2920 -1610 2920 -1580 {
lab=#net46}
N 2820 -1610 2820 -1440 {
lab=#net46}
N 2820 -1580 2920 -1580 {
lab=#net46}
N 3030 -1610 3030 -1440 {
lab=#net47}
N 3030 -1580 3130 -1580 {
lab=#net47}
N 3130 -1610 3130 -1580 {
lab=#net47}
N 2590 -1180 3170 -1180 {
lab=#net44}
N 2590 -1330 2590 -1300 {
lab=#net48}
N 2590 -1220 2590 -1180 {
lab=#net44}
N 2800 -1320 2800 -1290 {
lab=#net49}
N 2800 -1210 2800 -1190 {
lab=#net36}
N 3010 -1320 3010 -1290 {
lab=#net50}
N 3010 -1210 3010 -1200 {
lab=#net37}
N 3660 -1840 3660 -1790 {
lab=sw_p8}
N 3090 -1840 3090 -1790 {
lab=sw_p_sp8}
N 960 -870 960 -830 {
lab=#net51}
N 2040 -600 2040 -560 {
lab=#net52}
N 2230 -600 2230 -560 {
lab=#net53}
N 2420 -600 2420 -560 {
lab=#net54}
N 3250 -600 3250 -560 {
lab=#net55}
N 3440 -600 3440 -560 {
lab=#net56}
N 3630 -600 3630 -560 {
lab=#net57}
N 1990 -580 2020 -580 {
lab=cycle5}
N 750 -1590 850 -1590 {
lab=#net25}
N 960 -830 960 -790 {
lab=#net51}
N 980 -610 980 -570 {
lab=#net58}
N 940 -590 950 -590 {
lab=cycle2}
N 950 -590 960 -590 {
lab=cycle2}
N 960 -610 960 -590 {
lab=cycle2}
N 900 -850 900 -840 {
lab=#net3}
N 900 -850 910 -850 {
lab=#net3}
N 900 -760 900 -740 {
lab=#net59}
N 880 -640 900 -640 {
lab=cycle2}
N 900 -660 900 -640 {
lab=cycle2}
N 1130 -870 1130 -850 {
lab=#net60}
N 1100 -850 1130 -850 {
lab=#net60}
N 1150 -870 1150 -830 {
lab=#net61}
N 1150 -830 1150 -790 {
lab=#net61}
N 1170 -610 1170 -570 {
lab=#net62}
N 1130 -590 1140 -590 {
lab=cycle3}
N 1140 -590 1150 -590 {
lab=cycle3}
N 1150 -610 1150 -590 {
lab=cycle3}
N 1090 -850 1090 -840 {
lab=#net60}
N 1090 -850 1100 -850 {
lab=#net60}
N 1090 -760 1090 -740 {
lab=#net63}
N 1090 -660 1090 -640 {
lab=cycle3}
N 1080 -640 1090 -640 {
lab=cycle3}
N 1000 -610 1000 -600 {
lab=RESET}
N 1000 -600 1020 -600 {
lab=RESET}
N 1190 -610 1190 -600 {
lab=RESET}
N 1190 -600 1210 -600 {
lab=RESET}
N 2000 -860 2000 -840 {
lab=#net64}
N 1970 -840 2000 -840 {
lab=#net64}
N 2020 -860 2020 -820 {
lab=#net65}
N 2020 -820 2020 -780 {
lab=#net65}
N 1960 -840 1960 -830 {
lab=#net64}
N 1960 -840 1970 -840 {
lab=#net64}
N 1960 -750 1960 -730 {
lab=#net66}
N 1940 -630 1960 -630 {
lab=cycle5}
N 1960 -650 1960 -630 {
lab=cycle5}
N 2190 -860 2190 -840 {
lab=#net67}
N 2160 -840 2190 -840 {
lab=#net67}
N 2210 -860 2210 -820 {
lab=#net68}
N 2210 -820 2210 -780 {
lab=#net68}
N 2150 -840 2150 -830 {
lab=#net67}
N 2150 -840 2160 -840 {
lab=#net67}
N 2150 -750 2150 -730 {
lab=#net69}
N 2150 -650 2150 -630 {
lab=cycle6}
N 2140 -630 2150 -630 {
lab=cycle6}
N 2060 -590 2080 -590 {
lab=RESET}
N 2250 -600 2250 -590 {
lab=RESET}
N 2250 -590 2270 -590 {
lab=RESET}
N 2380 -860 2380 -840 {
lab=#net70}
N 2350 -840 2380 -840 {
lab=#net70}
N 2400 -860 2400 -820 {
lab=#net71}
N 2400 -820 2400 -780 {
lab=#net71}
N 2340 -840 2340 -830 {
lab=#net70}
N 2340 -840 2350 -840 {
lab=#net70}
N 2340 -750 2340 -730 {
lab=#net72}
N 2340 -650 2340 -630 {
lab=cycle7}
N 2330 -630 2340 -630 {
lab=cycle7}
N 2440 -600 2440 -590 {
lab=RESET}
N 2440 -590 2460 -590 {
lab=RESET}
N 2060 -600 2060 -590 {
lab=RESET}
N 3210 -860 3210 -840 {
lab=#net73}
N 3180 -840 3210 -840 {
lab=#net73}
N 3230 -860 3230 -820 {
lab=#net74}
N 3230 -820 3230 -780 {
lab=#net74}
N 3170 -840 3170 -830 {
lab=#net73}
N 3170 -840 3180 -840 {
lab=#net73}
N 3170 -750 3170 -730 {
lab=#net75}
N 3150 -630 3170 -630 {
lab=cycle9}
N 3170 -650 3170 -630 {
lab=cycle9}
N 3400 -860 3400 -840 {
lab=#net76}
N 3370 -840 3400 -840 {
lab=#net76}
N 3420 -860 3420 -820 {
lab=#net77}
N 3420 -820 3420 -780 {
lab=#net77}
N 3360 -840 3360 -830 {
lab=#net76}
N 3360 -840 3370 -840 {
lab=#net76}
N 3360 -750 3360 -730 {
lab=#net78}
N 3360 -650 3360 -630 {
lab=cycle10}
N 3350 -630 3360 -630 {
lab=cycle10}
N 3270 -590 3290 -590 {
lab=RESET}
N 3460 -600 3460 -590 {
lab=RESET}
N 3460 -590 3480 -590 {
lab=RESET}
N 3590 -860 3590 -840 {
lab=#net79}
N 3560 -840 3590 -840 {
lab=#net79}
N 3610 -860 3610 -820 {
lab=#net80}
N 3610 -820 3610 -780 {
lab=#net80}
N 3550 -840 3550 -830 {
lab=#net79}
N 3550 -840 3560 -840 {
lab=#net79}
N 3550 -750 3550 -730 {
lab=#net81}
N 3550 -650 3550 -630 {
lab=cycle11}
N 3540 -630 3550 -630 {
lab=cycle11}
N 3650 -600 3650 -590 {
lab=RESET}
N 3650 -590 3670 -590 {
lab=RESET}
N 3270 -600 3270 -590 {
lab=RESET}
N 710 -1620 710 -1600 {
lab=cycle1}
C {devices/title.sym} 160 30 0 0 {name=l1 author="Dr. Aubrey Beal, Dr. Phillip Bailey, Micah Tseng"
}
C {devices/lab_pin.sym} 580 -1460 2 0 {name=l43 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 560 -1330 3 0 {name=l44 sig_type=std_logic lab=RESET

}
C {devices/lab_pin.sym} 600 -1850 2 0 {name=l46 sig_type=std_logic lab=sw_p_sp1
}
C {devices/lab_pin.sym} 500 -1850 2 0 {name=l47 sig_type=std_logic lab=sw_n_sp1
}
C {devices/lab_pin.sym} 790 -1460 2 0 {name=l49 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 980 -1450 2 0 {name=l55 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 960 -1620 3 0 {name=l56 sig_type=std_logic lab=RESET

}
C {devices/lab_pin.sym} 1020 -1850 2 0 {name=l58 sig_type=std_logic lab=sw_p1
}
C {devices/lab_pin.sym} 930 -1850 2 0 {name=l59 sig_type=std_logic lab=sw_n1
}
C {sky130_stdcells/xor2_1.sym} 980 -510 3 0 {name=x29 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 1180 -1450 2 0 {name=l63 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 1150 -1620 3 0 {name=l64 sig_type=std_logic lab=RESET

}
C {devices/lab_pin.sym} 1220 -1850 2 0 {name=l66 sig_type=std_logic lab=sw_p2
}
C {devices/lab_pin.sym} 1120 -1850 2 0 {name=l67 sig_type=std_logic lab=sw_n2
}
C {sky130_stdcells/xor2_1.sym} 1170 -510 3 0 {name=x31 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ }
C {devices/lab_pin.sym} 1440 -1450 2 0 {name=l71 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 1420 -1330 3 0 {name=l72 sig_type=std_logic lab=RESET

}
C {devices/lab_pin.sym} 1460 -1840 2 0 {name=l74 sig_type=std_logic lab=sw_p_sp3
}
C {devices/lab_pin.sym} 1360 -1840 2 0 {name=l75 sig_type=std_logic lab=sw_n_sp3
}
C {devices/lab_pin.sym} 1650 -1450 2 0 {name=l77 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 1670 -1840 2 0 {name=l80 sig_type=std_logic lab=sw_p_sp4
}
C {devices/lab_pin.sym} 1570 -1840 2 0 {name=l81 sig_type=std_logic lab=sw_n_sp4
}
C {devices/lab_pin.sym} 2050 -1450 2 0 {name=l83 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 2020 -1610 3 0 {name=l84 sig_type=std_logic lab=RESET

}
C {devices/lab_pin.sym} 2080 -1840 2 0 {name=l86 sig_type=std_logic lab=sw_p3
}
C {devices/lab_pin.sym} 1990 -1840 2 0 {name=l87 sig_type=std_logic lab=sw_n3
}
C {sky130_stdcells/xor2_1.sym} 2040 -500 3 0 {name=x37 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ }
C {devices/lab_pin.sym} 2240 -1450 2 0 {name=l91 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 2210 -1610 3 0 {name=l92 sig_type=std_logic lab=RESET

}
C {devices/lab_pin.sym} 2270 -1840 2 0 {name=l94 sig_type=std_logic lab=sw_p4
}
C {devices/lab_pin.sym} 2180 -1840 2 0 {name=l95 sig_type=std_logic lab=sw_n4
}
C {sky130_stdcells/xor2_1.sym} 2230 -500 3 0 {name=x40 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ }
C {devices/lab_pin.sym} 1860 -1450 2 0 {name=l99 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 1870 -1840 2 0 {name=l102 sig_type=std_logic lab=sw_p_sp5
}
C {devices/lab_pin.sym} 1780 -1840 2 0 {name=l103 sig_type=std_logic lab=sw_n_sp5
}
C {devices/lab_pin.sym} 2420 -1440 2 0 {name=l105 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 2400 -1610 3 0 {name=l106 sig_type=std_logic lab=RESET

}
C {devices/lab_pin.sym} 2470 -1840 2 0 {name=l108 sig_type=std_logic lab=sw_p5
}
C {devices/lab_pin.sym} 2370 -1840 2 0 {name=l109 sig_type=std_logic lab=sw_n5
}
C {sky130_stdcells/xor2_1.sym} 2420 -500 3 0 {name=x45 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ }
C {devices/lab_pin.sym} 2670 -1840 2 0 {name=l116 sig_type=std_logic lab=sw_p_sp6
}
C {devices/lab_pin.sym} 2570 -1840 2 0 {name=l117 sig_type=std_logic lab=sw_n_sp6
}
C {devices/lab_pin.sym} 2880 -1840 2 0 {name=l122 sig_type=std_logic lab=sw_p_sp7
}
C {devices/lab_pin.sym} 2780 -1840 2 0 {name=l123 sig_type=std_logic lab=sw_n_sp7
}
C {devices/lab_pin.sym} 3290 -1840 2 0 {name=l128 sig_type=std_logic lab=sw_p6
}
C {devices/lab_pin.sym} 3200 -1840 2 0 {name=l129 sig_type=std_logic lab=sw_n6
}
C {devices/lab_pin.sym} 3480 -1840 2 0 {name=l136 sig_type=std_logic lab=sw_p7
}
C {devices/lab_pin.sym} 3390 -1840 2 0 {name=l137 sig_type=std_logic lab=sw_n7
}
C {devices/lab_pin.sym} 3090 -1840 2 0 {name=l144 sig_type=std_logic lab=sw_p_sp8
}
C {devices/lab_pin.sym} 2990 -1840 2 0 {name=l145 sig_type=std_logic lab=sw_n_sp8
}
C {devices/lab_pin.sym} 3670 -1840 2 0 {name=l150 sig_type=std_logic lab=sw_p8
}
C {devices/lab_pin.sym} 3580 -1840 2 0 {name=l151 sig_type=std_logic lab=sw_n8
}
C {devices/lab_pin.sym} 3850 -1450 2 0 {name=l155 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 3820 -1610 3 0 {name=l156 sig_type=std_logic lab=RESET

}
C {devices/lab_pin.sym} 3880 -1840 2 0 {name=l158 sig_type=std_logic lab=sw_p_sp9
}
C {devices/lab_pin.sym} 3780 -1840 2 0 {name=l159 sig_type=std_logic lab=sw_n_sp9
}
C {sky130_stdcells/dfrtp_1.sym} 620 -1710 3 0 {name=x100 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/inv_1.sym} 620 -1530 3 0 {name=x99 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 770 -1330 3 0 {name=l60 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/dfrtp_1.sym} 520 -1710 3 0 {name=x102 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_1.sym} 730 -1710 3 0 {name=x25 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/inv_1.sym} 830 -1530 3 0 {name=x103 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_1.sym} 830 -1710 3 0 {name=x104 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfstp_1.sym} 940 -1710 3 0 {name=x21 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfstp_1.sym} 1030 -1710 3 0 {name=x22 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 1050 -1620 3 0 {name=l76 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/inv_1.sym} 1030 -1520 3 0 {name=x105 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfstp_1.sym} 1130 -1710 3 0 {name=x28 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfstp_1.sym} 1230 -1710 3 0 {name=x106 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 1250 -1620 3 0 {name=l82 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/inv_1.sym} 1230 -1520 3 0 {name=x107 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/inv_1.sym} 1480 -1520 3 0 {name=x109 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/inv_1.sym} 1690 -1520 3 0 {name=x111 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_1.sym} 1380 -1700 3 0 {name=x27 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_1.sym} 1480 -1700 3 0 {name=x35 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_1.sym} 1590 -1700 3 0 {name=x41 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_1.sym} 1690 -1700 3 0 {name=x108 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_1.sym} 1800 -1700 3 0 {name=x110 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_1.sym} 1890 -1700 3 0 {name=x112 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/inv_1.sym} 1890 -1520 3 0 {name=x113 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfstp_1.sym} 2090 -1700 3 0 {name=x114 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfstp_1.sym} 2000 -1700 3 0 {name=x32 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 2110 -1610 3 0 {name=l110 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/inv_1.sym} 2090 -1520 3 0 {name=x115 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfstp_1.sym} 2190 -1700 3 0 {name=x38 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfstp_1.sym} 2280 -1700 3 0 {name=x116 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 2300 -1610 3 0 {name=l118 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/inv_1.sym} 2280 -1520 3 0 {name=x117 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfstp_1.sym} 2380 -1700 3 0 {name=x43 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfstp_1.sym} 2480 -1700 3 0 {name=x118 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 2500 -1610 3 0 {name=l124 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/inv_1.sym} 2480 -1510 3 0 {name=x119 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_1.sym} 3900 -1700 3 0 {name=x132 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 3920 -1610 3 0 {name=l221 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/inv_1.sym} 3900 -1510 3 0 {name=x133 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_1.sym} 3800 -1700 3 0 {name=x61 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 940 -1210 1 0 {name=l222 sig_type=std_logic lab=VSS
}
C {devices/lab_pin.sym} 960 -1210 1 0 {name=l239 sig_type=std_logic lab=VDD
}
C {devices/lab_pin.sym} 1130 -1210 1 0 {name=l240 sig_type=std_logic lab=VSS
}
C {devices/lab_pin.sym} 1150 -1210 1 0 {name=l241 sig_type=std_logic lab=VDD
}
C {devices/lab_pin.sym} 2000 -1210 1 0 {name=l242 sig_type=std_logic lab=VSS
}
C {devices/lab_pin.sym} 2020 -1210 1 0 {name=l243 sig_type=std_logic lab=VDD
}
C {devices/lab_pin.sym} 2190 -1210 1 0 {name=l244 sig_type=std_logic lab=VSS
}
C {devices/lab_pin.sym} 2210 -1210 1 0 {name=l245 sig_type=std_logic lab=VDD
}
C {devices/lab_pin.sym} 2380 -1210 1 0 {name=l246 sig_type=std_logic lab=VSS
}
C {devices/lab_pin.sym} 2400 -1210 1 0 {name=l247 sig_type=std_logic lab=VDD
}
C {src/demux2/demux2.sym} 930 -1020 1 1 {name=x24}
C {src/demux2/demux2.sym} 1120 -1020 1 1 {name=x30}
C {src/demux2/demux2.sym} 1990 -1010 1 1 {name=x34}
C {src/demux2/demux2.sym} 2180 -1010 1 1 {name=x39}
C {src/demux2/demux2.sym} 2370 -1010 1 1 {name=x44}
C {devices/lab_pin.sym} 710 -1850 2 0 {name=l53 sig_type=std_logic lab=sw_n_sp2
}
C {devices/lab_pin.sym} 810 -1850 2 0 {name=l52 sig_type=std_logic lab=sw_p_sp2
}
C {devices/lab_pin.sym} 960 -430 3 0 {name=l255 sig_type=std_logic lab=raw_bit1
}
C {devices/lab_pin.sym} 1150 -430 3 0 {name=l61 sig_type=std_logic lab=raw_bit1
}
C {devices/lab_pin.sym} 2020 -420 3 0 {name=l69 sig_type=std_logic lab=raw_bit4
}
C {devices/lab_pin.sym} 500 -1600 3 0 {name=l45 sig_type=std_logic lab=cycle1
}
C {devices/lab_pin.sym} 880 -640 0 0 {name=l65 sig_type=std_logic lab=cycle2
}
C {devices/lab_pin.sym} 1360 -1590 3 0 {name=l79 sig_type=std_logic lab=cycle4
}
C {devices/lab_pin.sym} 1570 -1590 3 0 {name=l85 sig_type=std_logic lab=cycle4
}
C {devices/lab_pin.sym} 1780 -1590 3 0 {name=l93 sig_type=std_logic lab=cycle4
}
C {devices/lab_pin.sym} 1990 -580 0 0 {name=l101 sig_type=std_logic lab=cycle5
}
C {devices/lab_pin.sym} 2180 -580 0 0 {name=l107 sig_type=std_logic lab=cycle6
}
C {devices/lab_pin.sym} 2370 -580 0 0 {name=l115 sig_type=std_logic lab=cycle7
}
C {devices/lab_pin.sym} 3780 -1590 3 0 {name=l269 sig_type=std_logic lab=cycle12
}
C {devices/lab_pin.sym} 1000 -430 3 0 {name=l8 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 1190 -430 3 0 {name=l57 sig_type=std_logic lab=Vcmp
}
C {devices/ipin.sym} 160 -1430 0 0 {name=p1 lab=cycle13
}
C {devices/iopin.sym} 100 -60 0 0 {name=p3 lab=VSS
}
C {devices/iopin.sym} 100 -90 0 0 {name=p4 lab=VDD
}
C {devices/opin.sym} 200 -940 0 0 {name=p6 lab=sw_p_sp8
}
C {devices/opin.sym} 200 -1150 0 0 {name=p7 lab=sw_p8
}
C {devices/ipin.sym} 90 -90 0 0 {name=p8 lab=Vcmp
}
C {devices/ipin.sym} 90 -60 0 0 {name=p9 lab=RESET
}
C {sky130_stdcells/inv_1.sym} 520 -1260 3 0 {name=x1 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/inv_1.sym} 730 -1260 3 0 {name=x2 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_4.sym} 1090 -200 3 0 {name=x3 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 1040 -80 0 0 {name=l2 sig_type=std_logic lab=cycle1
}
C {devices/lab_pin.sym} 1040 -60 0 0 {name=l4 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 1040 -40 0 0 {name=l5 sig_type=std_logic lab=RESET
}
C {devices/lab_pin.sym} 1050 -310 0 0 {name=l6 sig_type=std_logic lab=raw_bit1
}
C {devices/lab_pin.sym} 1190 -80 0 0 {name=l7 sig_type=std_logic lab=cycle2
}
C {devices/lab_pin.sym} 1190 -60 0 0 {name=l9 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 1190 -40 0 0 {name=l10 sig_type=std_logic lab=RESET
}
C {devices/lab_pin.sym} 1200 -310 0 0 {name=l11 sig_type=std_logic lab=raw_bit2
}
C {devices/lab_pin.sym} 1340 -80 0 0 {name=l12 sig_type=std_logic lab=cycle3
}
C {devices/lab_pin.sym} 1340 -60 0 0 {name=l13 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 1340 -40 0 0 {name=l14 sig_type=std_logic lab=RESET
}
C {devices/lab_pin.sym} 1350 -310 0 0 {name=l15 sig_type=std_logic lab=raw_bit3
}
C {devices/lab_pin.sym} 1490 -80 0 0 {name=l16 sig_type=std_logic lab=cycle4
}
C {devices/lab_pin.sym} 1490 -60 0 0 {name=l17 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 1490 -40 0 0 {name=l18 sig_type=std_logic lab=RESET
}
C {devices/lab_pin.sym} 1500 -310 0 0 {name=l19 sig_type=std_logic lab=raw_bit4
}
C {devices/lab_pin.sym} 1640 -80 0 0 {name=l20 sig_type=std_logic lab=cycle5
}
C {devices/lab_pin.sym} 1640 -60 0 0 {name=l21 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 1640 -40 0 0 {name=l22 sig_type=std_logic lab=RESET
}
C {devices/lab_pin.sym} 1650 -310 0 0 {name=l23 sig_type=std_logic lab=raw_bit5
}
C {devices/lab_pin.sym} 1790 -80 0 0 {name=l24 sig_type=std_logic lab=cycle6
}
C {devices/lab_pin.sym} 1790 -60 0 0 {name=l25 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 1790 -40 0 0 {name=l26 sig_type=std_logic lab=RESET
}
C {devices/lab_pin.sym} 1800 -310 0 0 {name=l27 sig_type=std_logic lab=raw_bit6
}
C {devices/lab_pin.sym} 1940 -80 0 0 {name=l28 sig_type=std_logic lab=cycle7
}
C {devices/lab_pin.sym} 1940 -60 0 0 {name=l29 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 1940 -40 0 0 {name=l30 sig_type=std_logic lab=RESET
}
C {devices/lab_pin.sym} 1950 -310 0 0 {name=l31 sig_type=std_logic lab=raw_bit7
}
C {devices/lab_pin.sym} 2090 -80 0 0 {name=l32 sig_type=std_logic lab=cycle8
}
C {devices/lab_pin.sym} 2090 -60 0 0 {name=l33 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 2090 -40 0 0 {name=l34 sig_type=std_logic lab=RESET
}
C {devices/lab_pin.sym} 2100 -310 0 0 {name=l35 sig_type=std_logic lab=raw_bit8
}
C {devices/lab_pin.sym} 2240 -80 0 0 {name=l36 sig_type=std_logic lab=cycle9
}
C {devices/lab_pin.sym} 2240 -60 0 0 {name=l37 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 2240 -40 0 0 {name=l38 sig_type=std_logic lab=RESET
}
C {devices/lab_pin.sym} 2250 -310 0 0 {name=l39 sig_type=std_logic lab=raw_bit9
}
C {devices/lab_pin.sym} 2390 -80 0 0 {name=l40 sig_type=std_logic lab=cycle10
}
C {devices/lab_pin.sym} 2390 -60 0 0 {name=l41 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 2390 -40 0 0 {name=l42 sig_type=std_logic lab=RESET
}
C {devices/lab_pin.sym} 2400 -310 0 0 {name=l48 sig_type=std_logic lab=raw_bit10
}
C {devices/lab_pin.sym} 2540 -80 0 0 {name=l50 sig_type=std_logic lab=cycle11
}
C {devices/lab_pin.sym} 2540 -60 0 0 {name=l54 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 2540 -40 0 0 {name=l68 sig_type=std_logic lab=RESET
}
C {devices/lab_pin.sym} 2550 -310 0 0 {name=l131 sig_type=std_logic lab=raw_bit11
}
C {devices/lab_pin.sym} 2690 -80 0 0 {name=l139 sig_type=std_logic lab=cycle12
}
C {devices/lab_pin.sym} 2690 -60 0 0 {name=l140 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 2690 -40 0 0 {name=l153 sig_type=std_logic lab=RESET
}
C {devices/lab_pin.sym} 2700 -310 0 0 {name=l154 sig_type=std_logic lab=raw_bit12
}
C {devices/lab_pin.sym} 2840 -80 0 0 {name=l163 sig_type=std_logic lab=cycle13
}
C {devices/lab_pin.sym} 2840 -60 0 0 {name=l164 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 2840 -40 0 0 {name=l165 sig_type=std_logic lab=RESET
}
C {devices/lab_pin.sym} 2850 -310 0 0 {name=l167 sig_type=std_logic lab=raw_bit13
}
C {sky130_stdcells/dfrtp_4.sym} 1240 -200 3 0 {name=x4 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_4.sym} 1390 -200 3 0 {name=x5 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_4.sym} 1540 -200 3 0 {name=x6 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_4.sym} 1690 -200 3 0 {name=x7 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_4.sym} 1840 -200 3 0 {name=x8 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_4.sym} 1990 -200 3 0 {name=x9 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_4.sym} 2140 -200 3 0 {name=x10 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_4.sym} 2290 -200 3 0 {name=x11 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_4.sym} 2440 -200 3 0 {name=x12 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_4.sym} 2590 -200 3 0 {name=x13 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_4.sym} 2740 -200 3 0 {name=x14 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_4.sym} 2890 -200 3 0 {name=x15 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/opin.sym} 200 -1430 0 0 {name=p11 lab=raw_bit13
}
C {devices/lab_pin.sym} 1630 -1320 3 0 {name=l88 sig_type=std_logic lab=RESET

}
C {devices/lab_pin.sym} 1840 -1320 3 0 {name=l96 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/inv_1.sym} 1380 -1260 3 0 {name=x18 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/inv_1.sym} 1590 -1250 3 0 {name=x19 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/inv_1.sym} 1800 -1250 3 0 {name=x20 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 2060 -420 3 0 {name=l62 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 2210 -420 3 0 {name=l70 sig_type=std_logic lab=raw_bit4
}
C {devices/lab_pin.sym} 2250 -420 3 0 {name=l78 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 2400 -420 3 0 {name=l89 sig_type=std_logic lab=raw_bit4
}
C {devices/lab_pin.sym} 2440 -420 3 0 {name=l90 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 2650 -1450 2 0 {name=l100 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 2630 -1330 3 0 {name=l104 sig_type=std_logic lab=RESET

}
C {devices/lab_pin.sym} 2860 -1450 2 0 {name=l168 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 3260 -1450 2 0 {name=l169 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 3230 -1610 3 0 {name=l170 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/xor2_1.sym} 3250 -500 3 0 {name=x42 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ }
C {devices/lab_pin.sym} 3450 -1450 2 0 {name=l171 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 3420 -1610 3 0 {name=l172 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/xor2_1.sym} 3440 -510 3 0 {name=x62 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ }
C {devices/lab_pin.sym} 3080 -1450 2 0 {name=l173 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 3630 -1440 2 0 {name=l174 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 3610 -1610 3 0 {name=l175 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/xor2_1.sym} 3630 -500 3 0 {name=x64 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ }
C {sky130_stdcells/inv_1.sym} 2690 -1520 3 0 {name=x65 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/inv_1.sym} 2900 -1520 3 0 {name=x66 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_1.sym} 2590 -1700 3 0 {name=x67 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_1.sym} 2690 -1700 3 0 {name=x68 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_1.sym} 2800 -1700 3 0 {name=x69 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_1.sym} 2900 -1700 3 0 {name=x70 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_1.sym} 3010 -1700 3 0 {name=x71 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_1.sym} 3110 -1700 3 0 {name=x72 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/inv_1.sym} 3110 -1520 3 0 {name=x73 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfstp_1.sym} 3300 -1700 3 0 {name=x74 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfstp_1.sym} 3210 -1700 3 0 {name=x75 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 3320 -1610 3 0 {name=l176 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/inv_1.sym} 3300 -1520 3 0 {name=x76 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfstp_1.sym} 3400 -1700 3 0 {name=x77 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfstp_1.sym} 3490 -1700 3 0 {name=x78 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 3510 -1610 3 0 {name=l177 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/inv_1.sym} 3490 -1520 3 0 {name=x79 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfstp_1.sym} 3590 -1700 3 0 {name=x80 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfstp_1.sym} 3680 -1700 3 0 {name=x81 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 3700 -1610 3 0 {name=l178 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/inv_1.sym} 3680 -1510 3 0 {name=x82 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 3210 -1210 1 0 {name=l179 sig_type=std_logic lab=VSS
}
C {devices/lab_pin.sym} 3230 -1210 1 0 {name=l180 sig_type=std_logic lab=VDD
}
C {devices/lab_pin.sym} 3400 -1210 1 0 {name=l181 sig_type=std_logic lab=VSS
}
C {devices/lab_pin.sym} 3420 -1210 1 0 {name=l182 sig_type=std_logic lab=VDD
}
C {devices/lab_pin.sym} 3590 -1210 1 0 {name=l183 sig_type=std_logic lab=VSS
}
C {devices/lab_pin.sym} 3610 -1210 1 0 {name=l184 sig_type=std_logic lab=VDD
}
C {src/demux2/demux2.sym} 3200 -1010 1 1 {name=x83}
C {src/demux2/demux2.sym} 3390 -1010 1 1 {name=x84}
C {src/demux2/demux2.sym} 3580 -1010 1 1 {name=x85}
C {devices/lab_pin.sym} 3230 -420 3 0 {name=l185 sig_type=std_logic lab=raw_bit8
}
C {devices/lab_pin.sym} 2570 -1590 3 0 {name=l186 sig_type=std_logic lab=cycle8
}
C {devices/lab_pin.sym} 2780 -1590 3 0 {name=l187 sig_type=std_logic lab=cycle8
}
C {devices/lab_pin.sym} 2990 -1590 3 0 {name=l188 sig_type=std_logic lab=cycle8
}
C {devices/lab_pin.sym} 3200 -580 0 0 {name=l189 sig_type=std_logic lab=cycle9
}
C {devices/lab_pin.sym} 3390 -580 0 0 {name=l190 sig_type=std_logic lab=cycle10
}
C {devices/lab_pin.sym} 3580 -580 0 0 {name=l191 sig_type=std_logic lab=cycle11
}
C {devices/lab_pin.sym} 2840 -1320 3 0 {name=l192 sig_type=std_logic lab=RESET

}
C {devices/lab_pin.sym} 3050 -1320 3 0 {name=l193 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/inv_1.sym} 2590 -1260 3 0 {name=x88 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/inv_1.sym} 2800 -1250 3 0 {name=x89 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/inv_1.sym} 3010 -1250 3 0 {name=x90 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 3270 -420 3 0 {name=l194 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 3420 -430 3 0 {name=l195 sig_type=std_logic lab=raw_bit8
}
C {devices/lab_pin.sym} 3460 -430 3 0 {name=l196 sig_type=std_logic lab=Vcmp
}
C {devices/lab_pin.sym} 3610 -420 3 0 {name=l197 sig_type=std_logic lab=raw_bit8
}
C {devices/lab_pin.sym} 3650 -420 3 0 {name=l198 sig_type=std_logic lab=Vcmp
}
C {sky130_stdcells/and2_0.sym} 540 -1390 3 0 {name=x46 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/and2_0.sym} 750 -1390 3 0 {name=x23 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/and2_0.sym} 1400 -1390 3 0 {name=x26 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/and2_0.sym} 1610 -1380 3 0 {name=x16 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/and2_0.sym} 1820 -1380 3 0 {name=x17 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/and2_0.sym} 2610 -1390 3 0 {name=x33 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/and2_0.sym} 2820 -1380 3 0 {name=x36 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/and2_0.sym} 3030 -1380 3 0 {name=x47 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/dfrtp_1.sym} 980 -700 3 0 {name=x48 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 940 -590 0 0 {name=l3 sig_type=std_logic lab=cycle2
}
C {devices/lab_pin.sym} 1020 -600 2 0 {name=l97 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/clkdlybuf4s50_1.sym} 900 -800 3 0 {name=x49 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/clkdlybuf4s50_1.sym} 900 -700 3 0 {name=x50 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 1080 -640 0 0 {name=l98 sig_type=std_logic lab=cycle3
}
C {sky130_stdcells/dfrtp_1.sym} 1170 -700 3 0 {name=x51 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 1130 -590 0 0 {name=l111 sig_type=std_logic lab=cycle3
}
C {devices/lab_pin.sym} 1210 -600 2 0 {name=l112 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/clkdlybuf4s50_1.sym} 1090 -800 3 0 {name=x52 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/clkdlybuf4s50_1.sym} 1090 -700 3 0 {name=x53 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 1940 -630 0 0 {name=l73 sig_type=std_logic lab=cycle5
}
C {sky130_stdcells/dfrtp_1.sym} 2040 -690 3 0 {name=x54 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 2080 -590 2 0 {name=l114 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/clkdlybuf4s50_1.sym} 1960 -790 3 0 {name=x55 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/clkdlybuf4s50_1.sym} 1960 -690 3 0 {name=x56 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 2140 -630 0 0 {name=l119 sig_type=std_logic lab=cycle6
}
C {sky130_stdcells/dfrtp_1.sym} 2230 -690 3 0 {name=x57 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 2270 -590 2 0 {name=l121 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/clkdlybuf4s50_1.sym} 2150 -790 3 0 {name=x58 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/clkdlybuf4s50_1.sym} 2150 -690 3 0 {name=x59 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 2330 -630 0 0 {name=l125 sig_type=std_logic lab=cycle7
}
C {sky130_stdcells/dfrtp_1.sym} 2420 -690 3 0 {name=x60 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 2460 -590 2 0 {name=l127 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/clkdlybuf4s50_1.sym} 2340 -790 3 0 {name=x63 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/clkdlybuf4s50_1.sym} 2340 -690 3 0 {name=x86 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 3150 -630 0 0 {name=l113 sig_type=std_logic lab=cycle9
}
C {sky130_stdcells/dfrtp_1.sym} 3250 -690 3 0 {name=x87 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 3290 -590 2 0 {name=l120 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/clkdlybuf4s50_1.sym} 3170 -790 3 0 {name=x91 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/clkdlybuf4s50_1.sym} 3170 -690 3 0 {name=x92 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 3350 -630 0 0 {name=l126 sig_type=std_logic lab=cycle10
}
C {sky130_stdcells/dfrtp_1.sym} 3440 -690 3 0 {name=x93 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 3480 -590 2 0 {name=l130 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/clkdlybuf4s50_1.sym} 3360 -790 3 0 {name=x94 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/clkdlybuf4s50_1.sym} 3360 -690 3 0 {name=x95 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 3540 -630 0 0 {name=l132 sig_type=std_logic lab=cycle11
}
C {sky130_stdcells/dfrtp_1.sym} 3630 -690 3 0 {name=x96 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 3670 -590 2 0 {name=l133 sig_type=std_logic lab=RESET

}
C {sky130_stdcells/clkdlybuf4s50_1.sym} 3550 -790 3 0 {name=x97 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {sky130_stdcells/clkdlybuf4s50_1.sym} 3550 -690 3 0 {name=x98 VGND=VSS VNB=VSS VPB=VDD VPWR=VDD prefix=sky130_fd_sc_hd__ 
}
C {devices/lab_pin.sym} 710 -1600 3 0 {name=l134 sig_type=std_logic lab=cycle1
}
C {devices/ipin.sym} 160 -1410 0 0 {name=p1 lab=cycle12
}
C {devices/ipin.sym} 160 -1390 0 0 {name=p1 lab=cycle11
}
C {devices/ipin.sym} 160 -1370 0 0 {name=p1 lab=cycle10
}
C {devices/ipin.sym} 160 -1350 0 0 {name=p1 lab=cycle9
}
C {devices/ipin.sym} 160 -1330 0 0 {name=p1 lab=cycle8
}
C {devices/ipin.sym} 160 -1310 0 0 {name=p1 lab=cycle7
}
C {devices/ipin.sym} 160 -1290 0 0 {name=p1 lab=cycle6
}
C {devices/ipin.sym} 160 -1270 0 0 {name=p1 lab=cycle5
}
C {devices/ipin.sym} 160 -1250 0 0 {name=p1 lab=cycle4
}
C {devices/ipin.sym} 160 -1230 0 0 {name=p1 lab=cycle3
}
C {devices/ipin.sym} 160 -1210 0 0 {name=p1 lab=cycle2
}
C {devices/ipin.sym} 160 -1190 0 0 {name=p1 lab=cycle1
}
C {devices/opin.sym} 200 -1410 0 0 {name=p11 lab=raw_bit12
}
C {devices/opin.sym} 200 -1390 0 0 {name=p11 lab=raw_bit11
}
C {devices/opin.sym} 200 -1370 0 0 {name=p11 lab=raw_bit10
}
C {devices/opin.sym} 200 -1350 0 0 {name=p11 lab=raw_bit9
}
C {devices/opin.sym} 200 -1330 0 0 {name=p11 lab=raw_bit8
}
C {devices/opin.sym} 200 -1310 0 0 {name=p11 lab=raw_bit7
}
C {devices/opin.sym} 200 -1290 0 0 {name=p11 lab=raw_bit6
}
C {devices/opin.sym} 200 -1270 0 0 {name=p11 lab=raw_bit5
}
C {devices/opin.sym} 200 -1250 0 0 {name=p11 lab=raw_bit4
}
C {devices/opin.sym} 200 -1230 0 0 {name=p11 lab=raw_bit3
}
C {devices/opin.sym} 200 -1210 0 0 {name=p11 lab=raw_bit2
}
C {devices/opin.sym} 200 -1190 0 0 {name=p11 lab=raw_bit1
}
C {devices/opin.sym} 200 -1130 0 0 {name=p7 lab=sw_p7
}
C {devices/opin.sym} 200 -1110 0 0 {name=p7 lab=sw_p6
}
C {devices/opin.sym} 200 -1090 0 0 {name=p7 lab=sw_p5
}
C {devices/opin.sym} 200 -1070 0 0 {name=p7 lab=sw_p4
}
C {devices/opin.sym} 200 -1050 0 0 {name=p7 lab=sw_p3
}
C {devices/opin.sym} 200 -1030 0 0 {name=p7 lab=sw_p2
}
C {devices/opin.sym} 200 -1010 0 0 {name=p7 lab=sw_p1
}
C {devices/opin.sym} 200 -920 0 0 {name=p6 lab=sw_p_sp7
}
C {devices/opin.sym} 200 -900 0 0 {name=p6 lab=sw_p_sp6
}
C {devices/opin.sym} 200 -880 0 0 {name=p6 lab=sw_p_sp5
}
C {devices/opin.sym} 200 -860 0 0 {name=p6 lab=sw_p_sp4
}
C {devices/opin.sym} 200 -840 0 0 {name=p6 lab=sw_p_sp3
}
C {devices/opin.sym} 200 -820 0 0 {name=p6 lab=sw_p_sp2
}
C {devices/opin.sym} 200 -800 0 0 {name=p6 lab=sw_p_sp1
}
C {devices/opin.sym} 200 -960 0 0 {name=p6 lab=sw_p_sp9
}
C {devices/opin.sym} 200 -550 0 0 {name=p6 lab=sw_n_sp8
}
C {devices/opin.sym} 200 -760 0 0 {name=p7 lab=sw_n8
}
C {devices/opin.sym} 200 -740 0 0 {name=p1 lab=sw_n7
}
C {devices/opin.sym} 200 -720 0 0 {name=p2 lab=sw_n6
}
C {devices/opin.sym} 200 -700 0 0 {name=p3 lab=sw_n5
}
C {devices/opin.sym} 200 -680 0 0 {name=p4 lab=sw_n4
}
C {devices/opin.sym} 200 -660 0 0 {name=p5 lab=sw_n3
}
C {devices/opin.sym} 200 -640 0 0 {name=p8 lab=sw_n2
}
C {devices/opin.sym} 200 -620 0 0 {name=p9 lab=sw_n1
}
C {devices/opin.sym} 200 -530 0 0 {name=p10 lab=sw_n_sp7
}
C {devices/opin.sym} 200 -510 0 0 {name=p11 lab=sw_n_sp6
}
C {devices/opin.sym} 200 -490 0 0 {name=p12 lab=sw_n_sp5
}
C {devices/opin.sym} 200 -470 0 0 {name=p13 lab=sw_n_sp4
}
C {devices/opin.sym} 200 -450 0 0 {name=p14 lab=sw_n_sp3
}
C {devices/opin.sym} 200 -430 0 0 {name=p15 lab=sw_n_sp2
}
C {devices/opin.sym} 200 -410 0 0 {name=p16 lab=sw_n_sp1
}
C {devices/opin.sym} 200 -570 0 0 {name=p17 lab=sw_n_sp9
}