.py
```
Examples with a separate native host, explicit artifact builds, or multi-stage workflow have a `Makefile`. Follow the example's README for its supported targets, such as `make run` or `make run_py`.
## Learn more about NPU programming with IRON
1. Continue to the [IRON AIE Application Programming Guide](programming_guide)
1. Additional MLIR-AIE documentation is available on the [website](https://xilinx.github.io/mlir-aie/)
1. AIE API header library documentation for single-core AIE programming in C++ is available [here](https://xilinx.github.io/aie_api/topics.html)
1. If you are a university researcher or student and interested in trying these tools on our Ryzen™ AI AUP Cloud systems, please contact the [AMD University Program](mailto:aup@amd.com)
1. Have a question or want to talk with the team and other users? Join the [ROCm Discord](https://discord.gg/UbXzGdXsR5) and look for the **ROCm-NPU** channel
## Optional: Install AIETools
> You may skip the Vitis™ installation step if you intend to only target AMD XDNA™/AIE-ML (AIE2) and AMD XDNA™ 2 (AIE2P) using our open-source single-core compiler [Peano](https://github.com/Xilinx/llvm-aie). Compiling with `xchesscc` is not supported without installing AMD Vitis™ AIE Essentials.
1. Install Vitis™ AIE Essentials from [Ryzen AI Software 1.3 Early Access](https://account.amd.com/en/member/ryzenai-sw-ea.html#tabs-a5e122f973-item-4757898120-tab). We will assume you use the installation directory, `/tools/ryzen_ai-1.3.0/vitis_aie_essentials`.
> This is an early access lounge, you must register and be granted access at this time.
1. Download VAIML Installer for Linux based compilation: `ryzen_ai-1.3.0ea1.tgz`
1. Extract the required tools:
```bash
tar -xzvf ryzen_ai-1.3.0ea1.tgz
cd ryzen_ai-1.3.0
mkdir vitis_aie_essentials
mv vitis_aie_essentials*.whl vitis_aie_essentials
cd vitis_aie_essentials
unzip vitis_aie_essentials*.whl
```
1. Set up an AI Engine license.
1. Get a local license for AI Engine tools from [https://www.xilinx.com/getlicense](https://www.xilinx.com/getlicense).
1. Copy your license file (Xilinx.lic) to your preferred location, e.g. `/opt/Xilinx.lic`:
1. Setup your environment using the following script for Vitis™ for AIETools:
```bash
#!/bin/bash
#################################################################################
# Setup Vitis AIE Essentials
#################################################################################
export AIETOOLS_ROOT=/tools/ryzen_ai-1.3.0/vitis_aie_essentials
export PATH=$PATH:${AIETOOLS_ROOT}/bin
export LM_LICENSE_FILE=/opt/Xilinx.lic
```
## Alternative: Build XDNA™ Driver and XRT from source
If the [upstream packages](#install-from-upstream-packages-ubuntu-2404-with-linux-617) do not support your kernel or distribution, you can build the driver and XRT from source:
1. Execute the scripted build process:
> This script will install package dependencies, build the xdna-driver and xrt packages, and install them. *These steps require `sudo` access.*
```bash
bash ./utils/build_drivers.sh
```
1. Reboot as directed after the script exits.
```bash
sudo reboot
```
1. Check that the NPU is working if the device appears with xrt-smi:
```bash
source /opt/xilinx/xrt/setup.sh
xrt-smi examine
```
## Troubleshooting
### Update BIOS
Be sure you have the latest BIOS for your laptop or mini PC, this will ensure the NPU (sometimes referred to as IPU) is enabled in the system. You may need to manually enable the NPU:
`Advanced → CPU Configuration → IPU`
> **NOTE:** Some manufacturers only provide Windows executables to update the BIOS, please do this before installing Ubuntu.
# Detailed Getting Started Guides and Documentation
[IRON AIE Application Programming Guide](programming_guide)
[Device Descriptions](docs/Devices.md)
[AMD XDNA NPU Architecture Cheatsheet](skills/aie-code-creator/references/architecture.md) — device/tile layout, memory hierarchy, vector register widths, MMUL shapes and divisibility constraints, routing/placement limits, and per-tile performance ballparks
[AIE C++ Kernel Intrinsics Cheatsheet](skills/aie-code-creator/references/kernel_intrinsics.md) — AIE API boilerplate, loop-pipelining annotations, vector load/store, MMUL usage, and common intrinsic quick-reference tables
[Building mlir-aie tools from source](docs/Building.md)
[MLIR Dialect and Compiler Documentation](https://xilinx.github.io/mlir-aie/)
Interested in contributing MLIR-AIE? [Information for developers](CONTRIBUTING.md)
-----
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