# SPDX-License-Identifier: GPL-2.0-or-later
# Maxim Integrated MAX78000 OpenOCD target configuration file
# www.maximintegrated.com

adapter speed 500

# Set the reset pin configuration
reset_config srst_only
adapter srst delay 2
adapter srst pulse_width 2

# Set flash parameters
set FLASH_BASE 0x10000000
set FLASH_SIZE 0x80000
set FLC_BASE 0x40029000
set FLASH_SECTOR 0x2000
set FLASH_CLK 100
set FLASH_OPTIONS 0x01

# Use Serial Wire Debug
transport select swd

source [find target/max32xxx_common.cfg]

global rom_bp_enabled
set rom_bp_enabled "no"

# Override default init_reset{mode} to catch parameter "mode"
proc init_reset {mode} {
	global sp_reset_mode
	set sp_reset_mode $mode
}

$_CHIPNAME.cpu configure -event reset-deassert-post {
	global sp_reset_mode
	global _CHIPNAME

	if { ([string compare $sp_reset_mode "init"] == 0) } {
		set state "reset"
		while { [string compare $state "reset"] == 0 } {
			set state [$_CHIPNAME.cpu curstate]
			$_CHIPNAME.cpu arp_poll
		}
		$_CHIPNAME.cpu arp_halt
	}
}

$_CHIPNAME.cpu configure -event reset-assert-pre {
	global sp_reset_mode
	global rom_bp_enabled

	if { (([string compare $sp_reset_mode "halt"] == 0) || ([string compare $sp_reset_mode "init"] == 0)) } {
		catch {halt}
		if { ([string compare $rom_bp_enabled "yes"] == 0) } {
			rbp 0x00002124
		}
		bp 0x00002124 2 hw
		set rom_bp_enabled "yes"
	}
}

$_CHIPNAME.cpu configure -event halted {
	global sp_reset_mode
	global rom_bp_enabled

	if { ([string compare $rom_bp_enabled "yes"] == 0) } {
		rbp 0x00002124
		set rom_bp_enabled "no"
	}
	set sp_reset_mode none
}