(kicad_pcb (version 4) (host pcbnew "(2016-02-11 BZR 6517)-product") (general (links 3091) (no_connects 283) (area 29.924999 29.924999 197.225001 130.075001) (thickness 1.6) (drawings 38) (tracks 22908) (zones 0) (modules 802) (nets 635) ) (page A4) (layers (0 F.Cu signal) (1 In1.Cu_gnd mixed) (2 In2.Cu_sig signal) (3 In3.Cu_pwr jumper) (4 In4.Cu_pwr mixed) (5 In5.Cu_sig signal) (6 In6.Cu_gnd mixed) (31 B.Cu signal) (32 B.Adhes user) (33 F.Adhes user) (34 B.Paste user) (35 F.Paste user) (36 B.SilkS user) (37 F.SilkS user) (38 B.Mask user) (39 F.Mask user) (40 Dwgs.User user) (41 Cmts.User user) (42 Eco1.User user) (43 Eco2.User user) (44 Edge.Cuts user) (45 Margin user) (46 B.CrtYd user) (47 F.CrtYd user) (48 B.Fab user) (49 F.Fab user) ) (setup (last_trace_width 0.127) (user_trace_width 0.1) (user_trace_width 0.127) (user_trace_width 0.25) (user_trace_width 0.5) (trace_clearance 0.1) (zone_clearance 0.125) (zone_45_only no) (trace_min 0.1) (segment_width 0.2) (edge_width 0.15) (via_size 0.45) (via_drill 0.25) (via_min_size 0.45) (via_min_drill 0.25) (user_via 0.45 0.25) (uvia_size 0.3) (uvia_drill 0.1) (uvias_allowed no) (uvia_min_size 0.2) (uvia_min_drill 0.1) (pcb_text_width 0.3) (pcb_text_size 0.75 0.75) (mod_edge_width 0.15) (mod_text_size 0.75 0.75) (mod_text_width 0.125) (pad_size 1.524 1.524) (pad_drill 0.762) (pad_to_mask_clearance 0.05) (aux_axis_origin 29.9 29.9) (visible_elements FFFEEF7F) (pcbplotparams (layerselection 0x00030_ffffffff) (usegerberextensions false) (excludeedgelayer true) (linewidth 0.100000) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) ) (net 0 "") (net 1 "/XAUI PHY/1V0_A") (net 2 "/Backplane Connector/GND") (net 3 "/XAUI PHY/1V0_T") (net 4 "/FPGA support/1V0") (net 5 "/XAUI PHY/1V5_A") (net 6 "/FPGA support/1V5") (net 7 "/Backplane Connector/1V8") (net 8 "/XAUI PHY/UNUSED_5_N") (net 9 "Net-(C53-Pad2)") (net 10 "/XAUI PHY/UNUSED_5_P") (net 11 "/XAUI PHY/UNUSED_4_N") (net 12 "Net-(C55-Pad2)") (net 13 "/XAUI PHY/UNUSED_4_P") (net 14 "/XAUI PHY/UNUSED_3_N") (net 15 "Net-(C57-Pad2)") (net 16 "/XAUI PHY/UNUSED_3_P") (net 17 "/XAUI PHY/UNUSED_2_N") (net 18 "Net-(C59-Pad2)") (net 19 "/XAUI PHY/UNUSED_2_P") (net 20 "/XAUI PHY/UNUSED_1_N") (net 21 "Net-(C61-Pad2)") (net 22 "/XAUI PHY/UNUSED_1_P") (net 23 "/XAUI PHY/UNUSED_0_N") (net 24 "Net-(C63-Pad2)") (net 25 "/XAUI PHY/UNUSED_0_P") (net 26 "/Backplane Connector/ETH4_TX_P") (net 27 "/Backplane Connector/ETH4_TX_N") (net 28 "/Backplane Connector/ETH5_TX_P") (net 29 "/Backplane Connector/ETH5_TX_N") (net 30 "/Backplane Connector/ETH6_TX_P") (net 31 "/Backplane Connector/ETH6_TX_N") (net 32 "/Backplane Connector/ETH7_TX_P") (net 33 "/Backplane Connector/ETH7_TX_N") (net 34 "/Backplane Connector/ETH3_TX_P") (net 35 "/Backplane Connector/ETH3_TX_N") (net 36 "/Backplane Connector/ETH2_TX_P") (net 37 "/Backplane Connector/ETH2_TX_N") (net 38 "/Backplane Connector/ETH1_TX_P") (net 39 "/Backplane Connector/ETH1_TX_N") (net 40 "/Backplane Connector/ETH0_TX_P") (net 41 "/Backplane Connector/ETH0_TX_N") (net 42 "/Backplane Connector/ETH8_TX_P") (net 43 "/Backplane Connector/ETH8_TX_N") (net 44 "Net-(C98-Pad1)") (net 45 "Net-(C100-Pad1)") (net 46 "Net-(C102-Pad1)") (net 47 "Net-(C104-Pad1)") (net 48 "/Front panel SFP+s/ETH9_VDD_RX") (net 49 "Net-(C106-Pad2)") (net 50 "/Front panel SFP+s/ETH9_VDD_TX") (net 51 "Net-(C107-Pad2)") (net 52 "/Front panel SFP+s/ETH10_VDD_RX") (net 53 "Net-(C108-Pad2)") (net 54 "/Front panel SFP+s/ETH10_VDD_TX") (net 55 "Net-(C109-Pad2)") (net 56 "/Front panel SFP+s/ETH11_VDD_RX") (net 57 "Net-(C110-Pad2)") (net 58 "/Front panel SFP+s/ETH11_VDD_TX") (net 59 "Net-(C111-Pad2)") (net 60 "/Front panel SFP+s/ETH12_VDD_RX") (net 61 "Net-(C112-Pad2)") (net 62 "/Front panel SFP+s/ETH12_VDD_TX") (net 63 "Net-(C113-Pad2)") (net 64 "/Clocks / buffers/Q0_125_P") (net 65 "/Clocks / buffers/CLK_125MHZ_0_P") (net 66 "/Clocks / buffers/Q0_125_N") (net 67 "/Clocks / buffers/CLK_125MHZ_0_N") (net 68 "/Clocks / buffers/Q1_125_P") (net 69 "/Clocks / buffers/CLK_125MHZ_1_P") (net 70 "/Clocks / buffers/Q1_125_N") (net 71 "/Clocks / buffers/CLK_125MHZ_1_N") (net 72 "/Clocks / buffers/Q2_125_P") (net 73 "/Clocks / buffers/CLK_125MHZ_2_P") (net 74 "/Clocks / buffers/Q2_125_N") (net 75 "/Clocks / buffers/CLK_125MHZ_2_N") (net 76 "/Clocks / buffers/CLK_156MHZ_0_P") (net 77 "/Clocks / buffers/CLK_156MHZ_0_N") (net 78 "/Clocks / buffers/CLK_156MHZ_1_P") (net 79 "/Clocks / buffers/CLK_156MHZ_1_N") (net 80 "/LEDs and test points/RAM_VTT") (net 81 "/LEDs and test points/RAM_VREF") (net 82 "/Current Shunt Monitors/3V3") (net 83 "/Clocks / buffers/2V5") (net 84 "/LEDs and test points/12V0") (net 85 "/Power Supply/1V0_RAW") (net 86 "/Power Supply/0V75_REF") (net 87 "/Power Supply/RAM_VTT_RAW") (net 88 "Net-(C345-Pad1)") (net 89 "/Clocks / buffers/1V8_SB") (net 90 "/LEDs and test points/2V5_SB") (net 91 "Net-(C352-Pad2)") (net 92 "/Power Supply/3V3_RAW") (net 93 "Net-(C357-Pad1)") (net 94 "/Power Supply/1V5_RAW") (net 95 "Net-(C362-Pad1)") (net 96 "/Power Supply/1V2_RAW") (net 97 "Net-(C367-Pad1)") (net 98 "/Power Supply/2V5_RAW") (net 99 "/FPGA support/1V25_REF") (net 100 "/Power Supply/12V0_COMPARE") (net 101 "Net-(C378-Pad1)") (net 102 "/Power Supply/1V8_RAW") (net 103 "/Zynq CPU/A1V8") (net 104 "/Backplane Connector/GTP_VTT") (net 105 "/FPGA support/GTP_VDD") (net 106 "/FPGA support/1V2") (net 107 "/FPGA support/A1V8_ARTIX") (net 108 "/Zynq CPU/ZYNQ_VPLL") (net 109 "/Clocks / buffers/CLK_125MHZ_AC_P") (net 110 "/Clocks / buffers/CLK_125MHZ_P") (net 111 "/Clocks / buffers/CLK_125MHZ_AC_N") (net 112 "/Clocks / buffers/CLK_125MHZ_N") (net 113 "/Clocks / buffers/CLK_156MHZ_AC_P") (net 114 "/Clocks / buffers/CLK_156MHZ_P") (net 115 "/Clocks / buffers/CLK_156MHZ_AC_N") (net 116 "/Clocks / buffers/CLK_156MHZ_N") (net 117 "/XAUI PHY/XAUI_TXD1_C_P") (net 118 "/XAUI PHY/XAUI_TXD1_P") (net 119 "/XAUI PHY/XAUI_TXD1_C_N") (net 120 "/XAUI PHY/XAUI_TXD1_N") (net 121 "/XAUI PHY/XAUI_TXD3_C_P") (net 122 "/XAUI PHY/XAUI_TXD3_P") (net 123 "/XAUI PHY/XAUI_TXD3_C_N") (net 124 "/XAUI PHY/XAUI_TXD3_N") (net 125 "/XAUI PHY/XAUI_RXD1_C_P") (net 126 "/XAUI PHY/XAUI_RXD1_P") (net 127 "/XAUI PHY/XAUI_RXD1_C_N") (net 128 "/XAUI PHY/XAUI_RXD1_N") (net 129 "/XAUI PHY/XAUI_RXD3_C_P") (net 130 "/XAUI PHY/XAUI_RXD3_P") (net 131 "/XAUI PHY/XAUI_RXD3_C_N") (net 132 "/XAUI PHY/XAUI_RXD3_N") (net 133 "/XAUI PHY/XAUI_TXD0_C_P") (net 134 "/XAUI PHY/XAUI_TXD0_P") (net 135 "/XAUI PHY/XAUI_TXD0_C_N") (net 136 "/XAUI PHY/XAUI_TXD0_N") (net 137 "/XAUI PHY/XAUI_TXD2_C_P") (net 138 "/XAUI PHY/XAUI_TXD2_P") (net 139 "/XAUI PHY/XAUI_TXD2_C_N") (net 140 "/XAUI PHY/XAUI_TXD2_N") (net 141 "/XAUI PHY/XAUI_RXD0_C_P") (net 142 "/XAUI PHY/XAUI_RXD0_P") (net 143 "/XAUI PHY/XAUI_RXD0_C_N") (net 144 "/XAUI PHY/XAUI_RXD0_N") (net 145 "/XAUI PHY/XAUI_RXD2_C_P") (net 146 "/XAUI PHY/XAUI_RXD2_P") (net 147 "/XAUI PHY/XAUI_RXD2_C_N") (net 148 "/XAUI PHY/XAUI_RXD2_N") (net 149 "Net-(D1-Pad1)") (net 150 "Net-(D2-Pad1)") (net 151 "Net-(D3-Pad1)") (net 152 "Net-(D4-Pad1)") (net 153 "Net-(D5-Pad1)") (net 154 "Net-(D6-Pad1)") (net 155 "Net-(D7-Pad1)") (net 156 "Net-(D8-Pad1)") (net 157 "Net-(D9-Pad1)") (net 158 "Net-(D9-Pad2)") (net 159 "Net-(D10-Pad1)") (net 160 "Net-(D10-Pad2)") (net 161 "Net-(D11-Pad1)") (net 162 "Net-(D11-Pad2)") (net 163 "Net-(D12-Pad1)") (net 164 "Net-(D12-Pad2)") (net 165 "Net-(D13-Pad1)") (net 166 "Net-(D13-Pad2)") (net 167 "Net-(D14-Pad1)") (net 168 "Net-(D14-Pad2)") (net 169 "Net-(D15-Pad1)") (net 170 "Net-(D15-Pad2)") (net 171 "Net-(D16-Pad1)") (net 172 "Net-(D16-Pad2)") (net 173 "Net-(D17-Pad1)") (net 174 "Net-(D17-Pad2)") (net 175 "Net-(D18-Pad1)") (net 176 "Net-(D18-Pad2)") (net 177 "Net-(D19-Pad2)") (net 178 "/Backplane Connector/12V0") (net 179 "Net-(F1-Pad2)") (net 180 "/Power Supply/CPLD_JTAG_TMS") (net 181 "/Power Supply/CPLD_JTAG_TCK") (net 182 "/Power Supply/CPLD_JTAG_TDO") (net 183 "/Power Supply/CPLD_JTAG_TDI") (net 184 "/Zynq CPU/ZYNQ_JTAG_TMS") (net 185 "/Zynq CPU/ZYNQ_JTAG_TCK") (net 186 "/Zynq CPU/ZYNQ_JTAG_TDO") (net 187 "/Zynq CPU/ZYNQ_JTAG_TDI") (net 188 "/Backplane Connector/JTAG_TMS") (net 189 "/Backplane Connector/JTAG_TCK") (net 190 "/Backplane Connector/JTAG_TDO") (net 191 "/Backplane Connector/JTAG_TDI") (net 192 "/Backplane Connector/BACKPLANE_I2C_SCL") (net 193 "/Backplane Connector/BACKPLANE_I2C_SDA") (net 194 "/Backplane Connector/ETH0_RX_P") (net 195 "/Backplane Connector/ETH0_RX_N") (net 196 "/Backplane Connector/ETH1_RX_P") (net 197 "/Backplane Connector/ETH1_RX_N") (net 198 "/Backplane Connector/ETH2_RX_P") (net 199 "/Backplane Connector/ETH2_RX_N") (net 200 "/Backplane Connector/ETH3_RX_P") (net 201 "/Backplane Connector/ETH3_RX_N") (net 202 "/Backplane Connector/ETH4_RX_P") (net 203 "/Backplane Connector/ETH4_RX_N") (net 204 "/Backplane Connector/ETH5_RX_P") (net 205 "/Backplane Connector/ETH5_RX_N") (net 206 "/Backplane Connector/ETH6_RX_P") (net 207 "/Backplane Connector/ETH6_RX_N") (net 208 "/Backplane Connector/ETH7_RX_P") (net 209 "/Backplane Connector/ETH7_RX_N") (net 210 "/Backplane Connector/ETH8_RX_P") (net 211 "/Backplane Connector/ETH8_RX_N") (net 212 "/Zynq CPU/ARM_JTAG_TMS") (net 213 "/Zynq CPU/ARM_JTAG_TCK") (net 214 "/Zynq CPU/ARM_JTAG_TDO") (net 215 "/Zynq CPU/ARM_JTAG_TDI") (net 216 "/Zynq CPU/ARM_MIO1") (net 217 "Net-(R211-Pad1)") (net 218 "/Zynq CPU/ZYNQ_JMODE") (net 219 "Net-(R209-Pad1)") (net 220 "Net-(R208-Pad1)") (net 221 "/Zynq CPU/ARM_MIO52") (net 222 "/Zynq CPU/ARM_MIO38") (net 223 "/Zynq CPU/ARM_MIO35") (net 224 "/Zynq CPU/ARM_MIO28") (net 225 "/Zynq CPU/ARM_MIO9") (net 226 "Net-(R206-Pad1)") (net 227 "/Zynq CPU/ARM_MIO12") (net 228 "/Zynq CPU/ARM_MIO14") (net 229 "/Zynq CPU/ARM_MIO11") (net 230 "/Zynq CPU/ZYNQ_PS_SRST_B") (net 231 "/Zynq CPU/ARM_MIO48") (net 232 "/Zynq CPU/ARM_MIO36") (net 233 "/Zynq CPU/ARM_MIO30") (net 234 "/Zynq CPU/ARM_MIO13") (net 235 "/Clocks / buffers/CLK_ZYNQ") (net 236 "Net-(R210-Pad1)") (net 237 "/Zynq CPU/ZYNQ_POR_B") (net 238 "/Zynq CPU/ARM_MIO33") (net 239 "/Zynq CPU/ARM_MIO31") (net 240 "/Zynq CPU/ARM_MIO53") (net 241 "/Zynq CPU/ARM_MIO37") (net 242 "/Zynq CPU/ZYNQ_INIT_B") (net 243 "/Zynq CPU/ARM_MIO10") (net 244 "/Zynq CPU/ARM_MIO0") (net 245 "Net-(R207-Pad1)") (net 246 "/Zynq CPU/ARM_MIO15") (net 247 "/Zynq CPU/ARM_MIO29") (net 248 "/Zynq CPU/ARM_MIO49") (net 249 "/Zynq CPU/ARM_MIO39") (net 250 "/Zynq CPU/ARM_MIO34") (net 251 "/Zynq CPU/ARM_GPIO2") (net 252 "/Zynq CPU/ARM_GPIO3") (net 253 "/Zynq CPU/ARM_GPIO1") (net 254 "/Zynq CPU/ARM_MIO32") (net 255 "Net-(R205-Pad1)") (net 256 "/Zynq CPU/ZYNQ_RX1_P") (net 257 "/Zynq CPU/ZYNQ_RX1_N") (net 258 "/Zynq CPU/ZYNQ_RX5_P") (net 259 "/Zynq CPU/ZYNQ_RX5_N") (net 260 "/Zynq CPU/ZYNQ_TX1_P") (net 261 "/Zynq CPU/ZYNQ_TX1_N") (net 262 "Net-(R201-Pad1)") (net 263 "Net-(R200-Pad1)") (net 264 "/Zynq CPU/ZYNQ_TX6_P") (net 265 "/Zynq CPU/ZYNQ_TX6_N") (net 266 "/Zynq CPU/ZYNQ_TX2_N") (net 267 "/Zynq CPU/ZYNQ_TX2_P") (net 268 "/Zynq CPU/ZYNQ_TX3_P") (net 269 "/Zynq CPU/ZYNQ_TX3_N") (net 270 "/Zynq CPU/ZYNQ_TX4_P") (net 271 "/Zynq CPU/ZYNQ_TX4_N") (net 272 "/Zynq CPU/ZYNQ_RX4_N") (net 273 "/Zynq CPU/ZYNQ_RX6_N") (net 274 "/Zynq CPU/ZYNQ_RX6_P") (net 275 "/Zynq CPU/ZYNQ_RX2_N") (net 276 "Net-(R195-Pad1)") (net 277 "/Zynq CPU/ZYNQ_RX0_N") (net 278 "/Zynq CPU/ZYNQ_RX2_P") (net 279 "/Zynq CPU/ZYNQ_RX7_P") (net 280 "/Zynq CPU/ZYNQ_RX7_N") (net 281 "/Zynq CPU/ZYNQ_RX4_P") (net 282 "/Zynq CPU/ZYNQ_TX0_N") (net 283 "/Zynq CPU/ZYNQ_TX0_P") (net 284 "/Zynq CPU/ZYNQ_TX5_N") (net 285 "/Zynq CPU/ZYNQ_TXCLK_N") (net 286 "/Zynq CPU/ZYNQ_TXCLK_P") (net 287 "Net-(R202-Pad1)") (net 288 "Net-(R199-Pad1)") (net 289 "/Zynq CPU/ARM_GPIO0") (net 290 "/Zynq CPU/ZYNQ_RX0_P") (net 291 "/Zynq CPU/ZYNQ_RX3_N") (net 292 "/Zynq CPU/ZYNQ_RX3_P") (net 293 "/Zynq CPU/ZYNQ_PROG_B") (net 294 "Net-(R9-Pad1)") (net 295 "/Zynq CPU/ZYNQ_RXCLK_P") (net 296 "/Zynq CPU/ZYNQ_RXCLK_N") (net 297 "/Clocks / buffers/CLK_156MHZ_3_P") (net 298 "/Clocks / buffers/CLK_156MHZ_3_N") (net 299 "/Zynq CPU/ZYNQ_TX7_N") (net 300 "/Zynq CPU/ZYNQ_TX7_P") (net 301 "/Zynq CPU/ZYNQ_TX5_P") (net 302 "/Zynq CPU/ZYNQ_DONE") (net 303 "/QDR-II+ SRAM/RAM_WD32") (net 304 "/QDR-II+ SRAM/RAM_WD26") (net 305 "/Clocks / buffers/CLK_125MHZ_3_N") (net 306 "/QDR-II+ SRAM/RAM_WD15") (net 307 "/Clocks / buffers/CLK_125MHZ_3_P") (net 308 "/QDR-II+ SRAM/RAM_WD14") (net 309 "/QDR-II+ SRAM/RAM_WD13") (net 310 "/QDR-II+ SRAM/RAM_WD31") (net 311 "/QDR-II+ SRAM/RAM_WD19") (net 312 "/QDR-II+ SRAM/RAM_WD24") (net 313 "/QDR-II+ SRAM/RAM_WD20") (net 314 "/QDR-II+ SRAM/RAM_WD27") (net 315 "/QDR-II+ SRAM/RAM_WD3") (net 316 "/QDR-II+ SRAM/RAM_WD10") (net 317 "/QDR-II+ SRAM/RAM_WD5") (net 318 "/QDR-II+ SRAM/RAM_DM3") (net 319 "/QDR-II+ SRAM/RAM_WD2") (net 320 "/QDR-II+ SRAM/RAM_WR_N") (net 321 "/QDR-II+ SRAM/RAM_RD20") (net 322 "/QDR-II+ SRAM/RAM_RD16") (net 323 "/QDR-II+ SRAM/RAM_RD17") (net 324 "/QDR-II+ SRAM/RAM_RD25") (net 325 "/QDR-II+ SRAM/RAM_RD21") (net 326 "/QDR-II+ SRAM/RAM_WD12") (net 327 "/QDR-II+ SRAM/RAM_WD11") (net 328 "/QDR-II+ SRAM/RAM_WD23") (net 329 "/QDR-II+ SRAM/RAM_WD22") (net 330 "/QDR-II+ SRAM/RAM_RD11") (net 331 "/QDR-II+ SRAM/RAM_WD29") (net 332 "/QDR-II+ SRAM/RAM_WD30") (net 333 "/QDR-II+ SRAM/RAM_WD18") (net 334 "/QDR-II+ SRAM/RAM_RD26") (net 335 "/QDR-II+ SRAM/RAM_WD34") (net 336 "/QDR-II+ SRAM/RAM_RD30") (net 337 "/QDR-II+ SRAM/RAM_WD33") (net 338 "/QDR-II+ SRAM/RAM_WD25") (net 339 "/QDR-II+ SRAM/RAM_RD29") (net 340 "/QDR-II+ SRAM/RAM_RD33") (net 341 "/QDR-II+ SRAM/RAM_RD34") (net 342 "/QDR-II+ SRAM/RAM_RD28") (net 343 "/QDR-II+ SRAM/RAM_RCLK_N") (net 344 "/QDR-II+ SRAM/RAM_RD19") (net 345 "/QDR-II+ SRAM/RAM_RD18") (net 346 "/QDR-II+ SRAM/RAM_RD15") (net 347 "/QDR-II+ SRAM/RAM_RD12") (net 348 "/QDR-II+ SRAM/RAM_RD8") (net 349 "/QDR-II+ SRAM/RAM_RD4") (net 350 "/QDR-II+ SRAM/RAM_RD13") (net 351 "/QDR-II+ SRAM/RAM_RD14") (net 352 "/QDR-II+ SRAM/RAM_RD2") (net 353 "/QDR-II+ SRAM/RAM_RD7") (net 354 "/QDR-II+ SRAM/RAM_RD10") (net 355 "/QDR-II+ SRAM/RAM_RCLK_P") (net 356 "/QDR-II+ SRAM/RAM_RD9") (net 357 "/QDR-II+ SRAM/RAM_RD5") (net 358 "/QDR-II+ SRAM/RAM_RD31") (net 359 "/QDR-II+ SRAM/RAM_RD32") (net 360 "/QDR-II+ SRAM/RAM_RD23") (net 361 "/QDR-II+ SRAM/RAM_RD22") (net 362 "/QDR-II+ SRAM/RAM_RD24") (net 363 "/QDR-II+ SRAM/RAM_RD27") (net 364 "Net-(R161-Pad1)") (net 365 "Net-(R163-Pad1)") (net 366 "Net-(R162-Pad1)") (net 367 "/QDR-II+ SRAM/RAM_WD1") (net 368 "/QDR-II+ SRAM/RAM_DM2") (net 369 "/QDR-II+ SRAM/RAM_WD0") (net 370 "/QDR-II+ SRAM/RAM_RD6") (net 371 "/QDR-II+ SRAM/RAM_RD3") (net 372 "/QDR-II+ SRAM/RAM_WD9") (net 373 "/QDR-II+ SRAM/RAM_WD8") (net 374 "/QDR-II+ SRAM/RAM_WD7") (net 375 "/QDR-II+ SRAM/RAM_WD35") (net 376 "/QDR-II+ SRAM/RAM_RD_N") (net 377 "/QDR-II+ SRAM/RAM_RD35") (net 378 "/QDR-II+ SRAM/RAM_RD1") (net 379 "/QDR-II+ SRAM/RAM_RD0") (net 380 "/QDR-II+ SRAM/RAM_RVALID") (net 381 "/Power Supply/FPGA_RESET_N") (net 382 "/FPGA Config/FPGA_DONE") (net 383 "/FPGA Config/FPGA_PANIC") (net 384 "Net-(R167-Pad1)") (net 385 "Net-(R166-Pad1)") (net 386 "Net-(R169-Pad1)") (net 387 "Net-(R168-Pad1)") (net 388 "/Power Supply/FPGA_INIT_B") (net 389 "Net-(R180-Pad1)") (net 390 "Net-(R178-Pad1)") (net 391 "Net-(R177-Pad1)") (net 392 "/FPGA Config/RAM_TMS") (net 393 "Net-(R182-Pad1)") (net 394 "Net-(R181-Pad1)") (net 395 "/FPGA Config/RAM_TCK") (net 396 "/QDR-II+ SRAM/RAM_A14") (net 397 "/XAUI PHY/PHY_JTAG_TRST_N") (net 398 "/XAUI PHY/PHY_MDIO_MODE") (net 399 "/QDR-II+ SRAM/RAM_A13") (net 400 "/QDR-II+ SRAM/RAM_A16") (net 401 "/QDR-II+ SRAM/RAM_A12") (net 402 "/QDR-II+ SRAM/RAM_A15") (net 403 "/QDR-II+ SRAM/RAM_A17") (net 404 "/QDR-II+ SRAM/RAM_A2") (net 405 "/QDR-II+ SRAM/RAM_CLK_P") (net 406 "/QDR-II+ SRAM/RAM_CLK_N") (net 407 "/QDR-II+ SRAM/RAM_A1") (net 408 "/QDR-II+ SRAM/RAM_A4") (net 409 "/QDR-II+ SRAM/RAM_A3") (net 410 "/QDR-II+ SRAM/RAM_A11") (net 411 "/XAUI PHY/PHY_PDWRDN_N") (net 412 "/QDR-II+ SRAM/RAM_WD28") (net 413 "/XAUI PHY/PHY_LOS") (net 414 "/XAUI PHY/PHY_LS_OK_OUT") (net 415 "/XAUI PHY/PHY_JTAG_TDI") (net 416 "/QDR-II+ SRAM/RAM_WD21") (net 417 "/QDR-II+ SRAM/RAM_WD17") (net 418 "/XAUI PHY/PHY_PRBS_EN") (net 419 "/XAUI PHY/PHY_MDIO_A3") (net 420 "/XAUI PHY/PHY_MDIO") (net 421 "/XAUI PHY/PHY_MDIO_A4") (net 422 "/XAUI PHY/PHY_MDC") (net 423 "/XAUI PHY/PHY_MDIO_A1") (net 424 "/XAUI PHY/PHY_RESET_N") (net 425 "/XAUI PHY/PHY_MDIO_A0") (net 426 "/QDR-II+ SRAM/RAM_WD16") (net 427 "/QDR-II+ SRAM/RAM_WD4") (net 428 "/XAUI PHY/PHY_GPIO") (net 429 "/XAUI PHY/PHY_JTAG_TMS") (net 430 "/XAUI PHY/PHY_JTAG_TCK") (net 431 "/XAUI PHY/PHY_LS_OK_IN") (net 432 "/XAUI PHY/PHY_PRBS_PASS") (net 433 "/XAUI PHY/PHY_JTAG_TDO") (net 434 "/XAUI PHY/PHY_MDIO_A2") (net 435 "/XAUI PHY/PHY_MODE") (net 436 "/QDR-II+ SRAM/RAM_WD6") (net 437 "Net-(R185-Pad1)") (net 438 "/QDR-II+ SRAM/RAM_DM1") (net 439 "/QDR-II+ SRAM/RAM_DM0") (net 440 "Net-(R171-Pad1)") (net 441 "/FPGA Config/RAM_TDO") (net 442 "/FPGA Config/RAM_TDI") (net 443 "Net-(R179-Pad1)") (net 444 "Net-(R170-Pad1)") (net 445 "/QDR-II+ SRAM/RAM_A6") (net 446 "/QDR-II+ SRAM/RAM_A10") (net 447 "/QDR-II+ SRAM/RAM_A9") (net 448 "/QDR-II+ SRAM/RAM_A0") (net 449 "/QDR-II+ SRAM/RAM_A5") (net 450 "Net-(R172-Pad1)") (net 451 "/QDR-II+ SRAM/RAM_A7") (net 452 "/QDR-II+ SRAM/RAM_A8") (net 453 "/Front panel SFP+s/ETH9_RX_N") (net 454 "/Front panel SFP+s/ETH11_RX_N") (net 455 "/Front panel SFP+s/ETH10_RX_P") (net 456 "/Front panel SFP+s/ETH9_TX_P") (net 457 "/Front panel SFP+s/ETH9_TX_N") (net 458 "/Front panel SFP+s/ETH10_RX_N") (net 459 "/Front panel SFP+s/ETH10_TX_P") (net 460 "/Front panel SFP+s/ETH10_TX_N") (net 461 "/Front panel SFP+s/ETH11_TX_N") (net 462 "/Front panel SFP+s/ETH11_TX_P") (net 463 "Net-(R43-Pad1)") (net 464 "/Front panel SFP+s/ETH9_RX_P") (net 465 "/Front panel SFP+s/ETH11_RX_P") (net 466 "/Front panel SFP+s/ETH12_RX_LOS") (net 467 "/Front panel SFP+s/ETH12_LINK") (net 468 "/Front panel SFP+s/ETH11_ACT") (net 469 "/Front panel SFP+s/ETH9_ACT") (net 470 "/Current Shunt Monitors/PSU_I2C_SCL") (net 471 "/Front panel SFP+s/ETH12_ACT") (net 472 "/Front panel SFP+s/ETH10_LINK") (net 473 "/Front panel SFP+s/ETH10_ACT") (net 474 "/Front panel SFP+s/ETH9_SDA") (net 475 "/Front panel SFP+s/ETH9_LINK") (net 476 "/Front panel SFP+s/ETH9_TX_FAULT") (net 477 "/Front panel SFP+s/ETH9_TX_DISABLE") (net 478 "/Front panel SFP+s/ETH10_PRESENT_N") (net 479 "/Front panel SFP+s/ETH11_SCL") (net 480 "/Front panel SFP+s/ETH11_TX_FAULT") (net 481 "/Front panel SFP+s/ETH10_TX_DISABLE") (net 482 "/Front panel SFP+s/ETH11_RX_LOS") (net 483 "/Front panel SFP+s/ETH12_TX_DISABLE") (net 484 "/Front panel SFP+s/ETH11_TX_DISABLE") (net 485 "/Front panel SFP+s/ETH12_SDA") (net 486 "/Front panel SFP+s/ETH12_PRESENT_N") (net 487 "/Front panel SFP+s/ETH11_PRESENT_N") (net 488 "/Front panel SFP+s/ETH9_PRESENT_N") (net 489 "/Front panel SFP+s/ETH10_RX_LOS") (net 490 "/Front panel SFP+s/ETH12_TX_FAULT") (net 491 "/Front panel SFP+s/ETH12_SCL") (net 492 "/Front panel SFP+s/ETH11_SDA") (net 493 "/Front panel SFP+s/ETH10_TX_FAULT") (net 494 "/Front panel SFP+s/ETH10_SCL") (net 495 "/Front panel SFP+s/ETH9_SCL") (net 496 "/Front panel SFP+s/ETH11_LINK") (net 497 "/Current Shunt Monitors/PSU_I2C_SDA") (net 498 "/Front panel SFP+s/ETH10_SDA") (net 499 "/Front panel SFP+s/ETH9_RX_LOS") (net 500 "Net-(R44-Pad1)") (net 501 "/Clocks / buffers/CLK_156MHZ_2_P") (net 502 "/Clocks / buffers/CLK_156MHZ_2_N") (net 503 "/QDR-II+ SRAM/RAM_RZQ") (net 504 "Net-(R2-Pad1)") (net 505 "/Front panel SFP+s/ETH12_RX_N") (net 506 "/Front panel SFP+s/ETH12_RX_P") (net 507 "/Front panel SFP+s/ETH12_TX_P") (net 508 "Net-(R221-Pad1)") (net 509 "/Front panel SFP+s/ETH12_TX_N") (net 510 "/XAUI PHY/PHY_TEST_EN") (net 511 "Net-(Q1-PadD2)") (net 512 "Net-(Q1-PadD1)") (net 513 "Net-(Q2-PadD2)") (net 514 "Net-(Q2-PadD1)") (net 515 "Net-(Q3-PadD2)") (net 516 "Net-(Q3-PadD1)") (net 517 "Net-(Q4-PadD2)") (net 518 "Net-(Q4-PadD1)") (net 519 "/LEDs and test points/12V0_LED") (net 520 "/LEDs and test points/1V0_LED") (net 521 "/LEDs and test points/1V2_LED") (net 522 "/LEDs and test points/1V5_LED") (net 523 "/LEDs and test points/1V8_LED") (net 524 "/LEDs and test points/2V5_LED") (net 525 "/LEDs and test points/3V3_LED") (net 526 "/LEDs and test points/FAULT_LED") (net 527 "/LEDs and test points/VTT_LED") (net 528 "/FPGA Config/BOOT_SPI_SCK") (net 529 "Net-(R120-Pad1)") (net 530 "/Clocks / buffers/CLK_32KHZ") (net 531 "Net-(R121-Pad2)") (net 532 "/FPGA Config/BOOT_SPI_DQ0") (net 533 "/FPGA Config/BOOT_SPI_DQ1") (net 534 "/FPGA Config/BOOT_SPI_DQ2") (net 535 "/FPGA Config/BOOT_SPI_DQ3") (net 536 "/FPGA Config/BOOT_SPI_CS_N") (net 537 "Net-(R173-Pad2)") (net 538 "Net-(R174-Pad2)") (net 539 "/FPGA Config/DATA_SPI_DQ3") (net 540 "Net-(R175-Pad2)") (net 541 "/FPGA Config/DATA_SPI_DQ0") (net 542 "Net-(R176-Pad2)") (net 543 "/FPGA Config/DATA_SPI_CS_N") (net 544 "/FPGA Config/DATA_SPI_SCK") (net 545 "/FPGA Config/DATA_SPI_DQ1") (net 546 "/FPGA Config/DATA_SPI_DQ2") (net 547 "Net-(R214-Pad2)") (net 548 "Net-(R217-Pad1)") (net 549 "Net-(R218-Pad1)") (net 550 "Net-(R219-Pad1)") (net 551 "Net-(R220-Pad1)") (net 552 "/Power Supply/12V0_SHUNT_LO") (net 553 "/Power Supply/12V0_SHUNT_HI") (net 554 "/Power Supply/3V3_SHUNT_LO") (net 555 "/Power Supply/3V3_SHUNT_HI") (net 556 "/Power Supply/2V5_SHUNT_LO") (net 557 "/Power Supply/2V5_SHUNT_HI") (net 558 "/Power Supply/1V8_SHUNT_LO") (net 559 "/Power Supply/1V8_SHUNT_HI") (net 560 "/Power Supply/1V5_SHUNT_LO") (net 561 "/Power Supply/1V5_SHUNT_HI") (net 562 "/Power Supply/1V2_SHUNT_LO") (net 563 "/Power Supply/1V2_SHUNT_HI") (net 564 "/Power Supply/1V0_SHUNT_HI") (net 565 "/Power Supply/1V0_SHUNT_LO") (net 566 "/Power Supply/VTT_SENSE_LO") (net 567 "/Power Supply/VTT_SENSE_HI") (net 568 "Net-(R118-Pad1)") (net 569 "/Power Supply/1V0_MASTER_SYNCI") (net 570 "/Power Supply/REMOTE_SENSE") (net 571 "/Power Supply/VTT_SENSE") (net 572 "/Power Supply/VTT_PGOOD") (net 573 "/Power Supply/1V0_PGOOD") (net 574 "/Power Supply/3V3_PGOOD") (net 575 "/Power Supply/3V3_SENSE") (net 576 "/Power Supply/1V5_PGOOD") (net 577 "/Power Supply/1V5_SENSE") (net 578 "/Power Supply/1V2_PGOOD") (net 579 "/Power Supply/1V2_SENSE") (net 580 "/Power Supply/2V5_PGOOD") (net 581 "/Power Supply/2V5_SENSE") (net 582 "/Power Supply/1V8_PGOOD") (net 583 "/Power Supply/1V8_SENSE") (net 584 "/Power Supply/VTT_EN") (net 585 "/Power Supply/1V0_EN") (net 586 "/Power Supply/1V2_EN") (net 587 "/Power Supply/1V5_EN") (net 588 "/Power Supply/1V8_EN") (net 589 "/Power Supply/2V5_EN") (net 590 "/Power Supply/3V3_EN") (net 591 "/Power Supply/1V0_TRK") (net 592 "/Power Supply/1V0_MASTER_EAO") (net 593 "/Power Supply/1V0_MASTER_SYNCO") (net 594 "/Power Supply/12V0_PGOOD") (net 595 "/Power Supply/3V3_SW") (net 596 "Net-(R129-Pad1)") (net 597 "/Power Supply/1V5_SW") (net 598 "Net-(R133-Pad1)") (net 599 "/Power Supply/1V2_SW") (net 600 "Net-(R137-Pad1)") (net 601 "/Power Supply/2V5_SW") (net 602 "/Power Supply/1V8_SW") (net 603 "/LEDs and test points/5V0_SB") (net 604 "/Power Supply/1V0_SW") (net 605 "/Power Supply/1V0_SW2") (net 606 "/Backplane Connector/E4TX_P") (net 607 "/Backplane Connector/E4TX_N") (net 608 "/Backplane Connector/E5TX_P") (net 609 "/Backplane Connector/E5TX_N") (net 610 "/Backplane Connector/E6TX_P") (net 611 "/Backplane Connector/E6TX_N") (net 612 "/Backplane Connector/E7TX_P") (net 613 "/Backplane Connector/E7TX_N") (net 614 "/Backplane Connector/E3TX_P") (net 615 "/Backplane Connector/E3TX_N") (net 616 "/Backplane Connector/E2TX_P") (net 617 "/Backplane Connector/E2TX_N") (net 618 "/Backplane Connector/E1TX_P") (net 619 "/Backplane Connector/E1TX_N") (net 620 "/Backplane Connector/E0TX_P") (net 621 "/Backplane Connector/E0TX_N") (net 622 "/Clocks / buffers/Q3_156_P") (net 623 "/Clocks / buffers/Q3_156_N") (net 624 "/Clocks / buffers/Q2_156_P") (net 625 "/Clocks / buffers/Q2_156_N") (net 626 "/Front panel SFP+s/E8T_P") (net 627 "/Front panel SFP+s/E8T_N") (net 628 "/Front panel SFP+s/ARM_TMS") (net 629 "/Front panel SFP+s/ARM_TCK") (net 630 "/Front panel SFP+s/ARM_TDO") (net 631 "/Front panel SFP+s/ARM_TDI") (net 632 "/QDR-II+ SRAM/RAM_A18") (net 633 "/QDR-II+ SRAM/RAM_A19") (net 634 "/QDR-II+ SRAM/RAM_A20") (net_class Default "This is the default net class." (clearance 0.1) (trace_width 0.127) (via_dia 0.45) (via_drill 0.25) (uvia_dia 0.3) (uvia_drill 0.1) (add_net "/Backplane Connector/12V0") (add_net "/Backplane Connector/1V8") (add_net "/Backplane Connector/BACKPLANE_I2C_SCL") (add_net "/Backplane Connector/BACKPLANE_I2C_SDA") (add_net "/Backplane Connector/E0TX_N") (add_net "/Backplane Connector/E0TX_P") (add_net "/Backplane Connector/E1TX_N") (add_net "/Backplane Connector/E1TX_P") (add_net "/Backplane Connector/E2TX_N") (add_net "/Backplane Connector/E2TX_P") (add_net "/Backplane Connector/E3TX_N") (add_net "/Backplane Connector/E3TX_P") (add_net "/Backplane Connector/E4TX_N") (add_net "/Backplane Connector/E4TX_P") (add_net "/Backplane Connector/E5TX_N") (add_net "/Backplane Connector/E5TX_P") (add_net "/Backplane Connector/E6TX_N") (add_net "/Backplane Connector/E6TX_P") (add_net "/Backplane Connector/E7TX_N") (add_net "/Backplane Connector/E7TX_P") (add_net "/Backplane Connector/ETH0_RX_N") (add_net "/Backplane Connector/ETH0_RX_P") (add_net "/Backplane Connector/ETH0_TX_N") (add_net "/Backplane Connector/ETH0_TX_P") (add_net "/Backplane Connector/ETH1_RX_N") (add_net "/Backplane Connector/ETH1_RX_P") (add_net "/Backplane Connector/ETH1_TX_N") (add_net "/Backplane Connector/ETH1_TX_P") (add_net "/Backplane Connector/ETH2_RX_N") (add_net "/Backplane Connector/ETH2_RX_P") (add_net "/Backplane Connector/ETH2_TX_N") (add_net "/Backplane Connector/ETH2_TX_P") (add_net "/Backplane Connector/ETH3_RX_N") (add_net "/Backplane Connector/ETH3_RX_P") (add_net "/Backplane Connector/ETH3_TX_N") (add_net "/Backplane Connector/ETH3_TX_P") (add_net "/Backplane Connector/ETH4_RX_N") (add_net "/Backplane Connector/ETH4_RX_P") (add_net "/Backplane Connector/ETH4_TX_N") (add_net "/Backplane Connector/ETH4_TX_P") (add_net "/Backplane Connector/ETH5_RX_N") (add_net "/Backplane Connector/ETH5_RX_P") (add_net "/Backplane Connector/ETH5_TX_N") (add_net "/Backplane Connector/ETH5_TX_P") (add_net "/Backplane Connector/ETH6_RX_N") (add_net "/Backplane Connector/ETH6_RX_P") (add_net "/Backplane Connector/ETH6_TX_N") (add_net "/Backplane Connector/ETH6_TX_P") (add_net "/Backplane Connector/ETH7_RX_N") (add_net "/Backplane Connector/ETH7_RX_P") (add_net "/Backplane Connector/ETH7_TX_N") (add_net "/Backplane Connector/ETH7_TX_P") (add_net "/Backplane Connector/ETH8_RX_N") (add_net "/Backplane Connector/ETH8_RX_P") (add_net "/Backplane Connector/ETH8_TX_N") (add_net "/Backplane Connector/ETH8_TX_P") (add_net "/Backplane Connector/GND") (add_net "/Backplane Connector/GTP_VTT") (add_net "/Backplane Connector/JTAG_TCK") (add_net "/Backplane Connector/JTAG_TDI") (add_net "/Backplane Connector/JTAG_TDO") (add_net "/Backplane Connector/JTAG_TMS") (add_net "/Clocks / buffers/1V8_SB") (add_net "/Clocks / buffers/2V5") (add_net "/Clocks / buffers/CLK_125MHZ_0_N") (add_net "/Clocks / buffers/CLK_125MHZ_0_P") (add_net "/Clocks / buffers/CLK_125MHZ_1_N") (add_net "/Clocks / buffers/CLK_125MHZ_1_P") (add_net "/Clocks / buffers/CLK_125MHZ_2_N") (add_net "/Clocks / buffers/CLK_125MHZ_2_P") (add_net "/Clocks / buffers/CLK_125MHZ_3_N") (add_net "/Clocks / buffers/CLK_125MHZ_3_P") (add_net "/Clocks / buffers/CLK_125MHZ_AC_N") (add_net "/Clocks / buffers/CLK_125MHZ_AC_P") (add_net "/Clocks / buffers/CLK_125MHZ_N") (add_net "/Clocks / buffers/CLK_125MHZ_P") (add_net "/Clocks / buffers/CLK_156MHZ_0_N") (add_net "/Clocks / buffers/CLK_156MHZ_0_P") (add_net "/Clocks / buffers/CLK_156MHZ_1_N") (add_net "/Clocks / buffers/CLK_156MHZ_1_P") (add_net "/Clocks / buffers/CLK_156MHZ_2_N") (add_net "/Clocks / buffers/CLK_156MHZ_2_P") (add_net "/Clocks / buffers/CLK_156MHZ_3_N") (add_net "/Clocks / buffers/CLK_156MHZ_3_P") (add_net "/Clocks / buffers/CLK_156MHZ_AC_N") (add_net "/Clocks / buffers/CLK_156MHZ_AC_P") (add_net "/Clocks / buffers/CLK_156MHZ_N") (add_net "/Clocks / buffers/CLK_156MHZ_P") (add_net "/Clocks / buffers/CLK_32KHZ") (add_net "/Clocks / buffers/CLK_ZYNQ") (add_net "/Clocks / buffers/Q0_125_N") (add_net "/Clocks / buffers/Q0_125_P") (add_net "/Clocks / buffers/Q1_125_N") (add_net "/Clocks / buffers/Q1_125_P") (add_net "/Clocks / buffers/Q2_125_N") (add_net "/Clocks / buffers/Q2_125_P") (add_net "/Clocks / buffers/Q2_156_N") (add_net "/Clocks / buffers/Q2_156_P") (add_net "/Clocks / buffers/Q3_156_N") (add_net "/Clocks / buffers/Q3_156_P") (add_net "/Current Shunt Monitors/3V3") (add_net "/Current Shunt Monitors/PSU_I2C_SCL") (add_net "/Current Shunt Monitors/PSU_I2C_SDA") (add_net "/FPGA Config/BOOT_SPI_CS_N") (add_net "/FPGA Config/BOOT_SPI_DQ0") (add_net "/FPGA Config/BOOT_SPI_DQ1") (add_net "/FPGA Config/BOOT_SPI_DQ2") (add_net "/FPGA Config/BOOT_SPI_DQ3") (add_net "/FPGA Config/BOOT_SPI_SCK") (add_net "/FPGA Config/DATA_SPI_CS_N") (add_net "/FPGA Config/DATA_SPI_DQ0") (add_net "/FPGA Config/DATA_SPI_DQ1") (add_net "/FPGA Config/DATA_SPI_DQ2") (add_net "/FPGA Config/DATA_SPI_DQ3") (add_net "/FPGA Config/DATA_SPI_SCK") (add_net "/FPGA Config/FPGA_DONE") (add_net "/FPGA Config/FPGA_PANIC") (add_net "/FPGA Config/RAM_TCK") (add_net "/FPGA Config/RAM_TDI") (add_net "/FPGA Config/RAM_TDO") (add_net "/FPGA Config/RAM_TMS") (add_net "/FPGA support/1V0") (add_net "/FPGA support/1V2") (add_net "/FPGA support/1V25_REF") (add_net "/FPGA support/1V5") (add_net "/FPGA support/A1V8_ARTIX") (add_net "/FPGA support/GTP_VDD") (add_net "/Front panel SFP+s/ARM_TCK") (add_net "/Front panel SFP+s/ARM_TDI") (add_net "/Front panel SFP+s/ARM_TDO") (add_net "/Front panel SFP+s/ARM_TMS") (add_net "/Front panel SFP+s/E8T_N") (add_net "/Front panel SFP+s/E8T_P") (add_net "/Front panel SFP+s/ETH10_ACT") (add_net "/Front panel SFP+s/ETH10_LINK") (add_net "/Front panel SFP+s/ETH10_PRESENT_N") (add_net "/Front panel SFP+s/ETH10_RX_LOS") (add_net "/Front panel SFP+s/ETH10_RX_N") (add_net "/Front panel SFP+s/ETH10_RX_P") (add_net "/Front panel SFP+s/ETH10_SCL") (add_net "/Front panel SFP+s/ETH10_SDA") (add_net "/Front panel SFP+s/ETH10_TX_DISABLE") (add_net "/Front panel SFP+s/ETH10_TX_FAULT") (add_net "/Front panel SFP+s/ETH10_TX_N") (add_net "/Front panel SFP+s/ETH10_TX_P") (add_net "/Front panel SFP+s/ETH10_VDD_RX") (add_net "/Front panel SFP+s/ETH10_VDD_TX") (add_net "/Front panel SFP+s/ETH11_ACT") (add_net "/Front panel SFP+s/ETH11_LINK") (add_net "/Front panel SFP+s/ETH11_PRESENT_N") (add_net "/Front panel SFP+s/ETH11_RX_LOS") (add_net "/Front panel SFP+s/ETH11_RX_N") (add_net "/Front panel SFP+s/ETH11_RX_P") (add_net "/Front panel SFP+s/ETH11_SCL") (add_net "/Front panel SFP+s/ETH11_SDA") (add_net "/Front panel SFP+s/ETH11_TX_DISABLE") (add_net "/Front panel SFP+s/ETH11_TX_FAULT") (add_net "/Front panel SFP+s/ETH11_TX_N") (add_net "/Front panel SFP+s/ETH11_TX_P") (add_net "/Front panel SFP+s/ETH11_VDD_RX") (add_net "/Front panel SFP+s/ETH11_VDD_TX") (add_net "/Front panel SFP+s/ETH12_ACT") (add_net "/Front panel SFP+s/ETH12_LINK") (add_net "/Front panel SFP+s/ETH12_PRESENT_N") (add_net "/Front panel SFP+s/ETH12_RX_LOS") (add_net "/Front panel SFP+s/ETH12_RX_N") (add_net "/Front panel SFP+s/ETH12_RX_P") (add_net "/Front panel SFP+s/ETH12_SCL") (add_net "/Front panel SFP+s/ETH12_SDA") (add_net "/Front panel SFP+s/ETH12_TX_DISABLE") (add_net "/Front panel SFP+s/ETH12_TX_FAULT") (add_net "/Front panel SFP+s/ETH12_TX_N") (add_net "/Front panel SFP+s/ETH12_TX_P") (add_net "/Front panel SFP+s/ETH12_VDD_RX") (add_net "/Front panel SFP+s/ETH12_VDD_TX") (add_net "/Front panel SFP+s/ETH9_ACT") (add_net "/Front panel SFP+s/ETH9_LINK") (add_net "/Front panel SFP+s/ETH9_PRESENT_N") (add_net "/Front panel SFP+s/ETH9_RX_LOS") (add_net "/Front panel SFP+s/ETH9_RX_N") (add_net "/Front panel SFP+s/ETH9_RX_P") (add_net "/Front panel SFP+s/ETH9_SCL") (add_net "/Front panel SFP+s/ETH9_SDA") (add_net "/Front panel SFP+s/ETH9_TX_DISABLE") (add_net "/Front panel SFP+s/ETH9_TX_FAULT") (add_net "/Front panel SFP+s/ETH9_TX_N") (add_net "/Front panel SFP+s/ETH9_TX_P") (add_net "/Front panel SFP+s/ETH9_VDD_RX") (add_net "/Front panel SFP+s/ETH9_VDD_TX") (add_net "/LEDs and test points/12V0") (add_net "/LEDs and test points/12V0_LED") (add_net "/LEDs and test points/1V0_LED") (add_net "/LEDs and test points/1V2_LED") (add_net "/LEDs and test points/1V5_LED") (add_net "/LEDs and test points/1V8_LED") (add_net "/LEDs and test points/2V5_LED") (add_net "/LEDs and test points/2V5_SB") (add_net "/LEDs and test points/3V3_LED") (add_net "/LEDs and test points/5V0_SB") (add_net "/LEDs and test points/FAULT_LED") (add_net "/LEDs and test points/RAM_VREF") (add_net "/LEDs and test points/RAM_VTT") (add_net "/LEDs and test points/VTT_LED") (add_net "/Power Supply/0V75_REF") (add_net "/Power Supply/12V0_COMPARE") (add_net "/Power Supply/12V0_PGOOD") (add_net "/Power Supply/12V0_SHUNT_HI") (add_net "/Power Supply/12V0_SHUNT_LO") (add_net "/Power Supply/1V0_EN") (add_net "/Power Supply/1V0_MASTER_EAO") (add_net "/Power Supply/1V0_MASTER_SYNCI") (add_net "/Power Supply/1V0_MASTER_SYNCO") (add_net "/Power Supply/1V0_PGOOD") (add_net "/Power Supply/1V0_RAW") (add_net "/Power Supply/1V0_SHUNT_HI") (add_net "/Power Supply/1V0_SHUNT_LO") (add_net "/Power Supply/1V0_SW") (add_net "/Power Supply/1V0_SW2") (add_net "/Power Supply/1V0_TRK") (add_net "/Power Supply/1V2_EN") (add_net "/Power Supply/1V2_PGOOD") (add_net "/Power Supply/1V2_RAW") (add_net "/Power Supply/1V2_SENSE") (add_net "/Power Supply/1V2_SHUNT_HI") (add_net "/Power Supply/1V2_SHUNT_LO") (add_net "/Power Supply/1V2_SW") (add_net "/Power Supply/1V5_EN") (add_net "/Power Supply/1V5_PGOOD") (add_net "/Power Supply/1V5_RAW") (add_net "/Power Supply/1V5_SENSE") (add_net "/Power Supply/1V5_SHUNT_HI") (add_net "/Power Supply/1V5_SHUNT_LO") (add_net "/Power Supply/1V5_SW") (add_net "/Power Supply/1V8_EN") (add_net "/Power Supply/1V8_PGOOD") (add_net "/Power Supply/1V8_RAW") (add_net "/Power Supply/1V8_SENSE") (add_net "/Power Supply/1V8_SHUNT_HI") (add_net "/Power Supply/1V8_SHUNT_LO") (add_net "/Power Supply/1V8_SW") (add_net "/Power Supply/2V5_EN") (add_net "/Power Supply/2V5_PGOOD") (add_net "/Power Supply/2V5_RAW") (add_net "/Power Supply/2V5_SENSE") (add_net "/Power Supply/2V5_SHUNT_HI") (add_net "/Power Supply/2V5_SHUNT_LO") (add_net "/Power Supply/2V5_SW") (add_net "/Power Supply/3V3_EN") (add_net "/Power Supply/3V3_PGOOD") (add_net "/Power Supply/3V3_RAW") (add_net "/Power Supply/3V3_SENSE") (add_net "/Power Supply/3V3_SHUNT_HI") (add_net "/Power Supply/3V3_SHUNT_LO") (add_net "/Power Supply/3V3_SW") (add_net "/Power Supply/CPLD_JTAG_TCK") (add_net "/Power Supply/CPLD_JTAG_TDI") (add_net "/Power Supply/CPLD_JTAG_TDO") (add_net "/Power Supply/CPLD_JTAG_TMS") (add_net "/Power Supply/FPGA_INIT_B") (add_net "/Power Supply/FPGA_RESET_N") (add_net "/Power Supply/RAM_VTT_RAW") (add_net "/Power Supply/REMOTE_SENSE") (add_net "/Power Supply/VTT_EN") (add_net "/Power Supply/VTT_PGOOD") (add_net "/Power Supply/VTT_SENSE") (add_net "/Power Supply/VTT_SENSE_HI") (add_net "/Power Supply/VTT_SENSE_LO") (add_net "/QDR-II+ SRAM/RAM_A0") (add_net "/QDR-II+ SRAM/RAM_A1") (add_net "/QDR-II+ SRAM/RAM_A10") (add_net "/QDR-II+ SRAM/RAM_A11") (add_net "/QDR-II+ SRAM/RAM_A12") (add_net "/QDR-II+ SRAM/RAM_A13") (add_net "/QDR-II+ SRAM/RAM_A14") (add_net "/QDR-II+ SRAM/RAM_A15") (add_net "/QDR-II+ SRAM/RAM_A16") (add_net "/QDR-II+ SRAM/RAM_A17") (add_net "/QDR-II+ SRAM/RAM_A18") (add_net "/QDR-II+ SRAM/RAM_A19") (add_net "/QDR-II+ SRAM/RAM_A2") (add_net "/QDR-II+ SRAM/RAM_A20") (add_net "/QDR-II+ SRAM/RAM_A3") (add_net "/QDR-II+ SRAM/RAM_A4") (add_net "/QDR-II+ SRAM/RAM_A5") (add_net "/QDR-II+ SRAM/RAM_A6") (add_net "/QDR-II+ SRAM/RAM_A7") (add_net "/QDR-II+ SRAM/RAM_A8") (add_net "/QDR-II+ SRAM/RAM_A9") (add_net "/QDR-II+ SRAM/RAM_CLK_N") (add_net "/QDR-II+ SRAM/RAM_CLK_P") (add_net "/QDR-II+ SRAM/RAM_DM0") (add_net "/QDR-II+ SRAM/RAM_DM1") (add_net "/QDR-II+ SRAM/RAM_DM2") (add_net "/QDR-II+ SRAM/RAM_DM3") (add_net "/QDR-II+ SRAM/RAM_RCLK_N") (add_net "/QDR-II+ SRAM/RAM_RCLK_P") (add_net "/QDR-II+ SRAM/RAM_RD0") (add_net "/QDR-II+ SRAM/RAM_RD1") (add_net "/QDR-II+ SRAM/RAM_RD10") (add_net "/QDR-II+ SRAM/RAM_RD11") (add_net "/QDR-II+ SRAM/RAM_RD12") (add_net "/QDR-II+ SRAM/RAM_RD13") (add_net "/QDR-II+ SRAM/RAM_RD14") (add_net "/QDR-II+ SRAM/RAM_RD15") (add_net "/QDR-II+ SRAM/RAM_RD16") (add_net "/QDR-II+ SRAM/RAM_RD17") (add_net "/QDR-II+ SRAM/RAM_RD18") (add_net "/QDR-II+ SRAM/RAM_RD19") (add_net "/QDR-II+ SRAM/RAM_RD2") (add_net "/QDR-II+ SRAM/RAM_RD20") (add_net "/QDR-II+ SRAM/RAM_RD21") (add_net "/QDR-II+ SRAM/RAM_RD22") (add_net "/QDR-II+ SRAM/RAM_RD23") (add_net "/QDR-II+ SRAM/RAM_RD24") (add_net "/QDR-II+ SRAM/RAM_RD25") (add_net "/QDR-II+ SRAM/RAM_RD26") (add_net "/QDR-II+ SRAM/RAM_RD27") (add_net "/QDR-II+ SRAM/RAM_RD28") (add_net "/QDR-II+ SRAM/RAM_RD29") (add_net "/QDR-II+ SRAM/RAM_RD3") (add_net "/QDR-II+ SRAM/RAM_RD30") (add_net "/QDR-II+ SRAM/RAM_RD31") (add_net "/QDR-II+ SRAM/RAM_RD32") (add_net "/QDR-II+ SRAM/RAM_RD33") (add_net "/QDR-II+ SRAM/RAM_RD34") (add_net "/QDR-II+ SRAM/RAM_RD35") (add_net "/QDR-II+ SRAM/RAM_RD4") (add_net "/QDR-II+ SRAM/RAM_RD5") (add_net "/QDR-II+ SRAM/RAM_RD6") (add_net "/QDR-II+ SRAM/RAM_RD7") (add_net "/QDR-II+ SRAM/RAM_RD8") (add_net "/QDR-II+ SRAM/RAM_RD9") (add_net "/QDR-II+ SRAM/RAM_RD_N") (add_net "/QDR-II+ SRAM/RAM_RVALID") (add_net "/QDR-II+ SRAM/RAM_RZQ") (add_net "/QDR-II+ SRAM/RAM_WD0") (add_net "/QDR-II+ SRAM/RAM_WD1") (add_net "/QDR-II+ SRAM/RAM_WD10") (add_net "/QDR-II+ SRAM/RAM_WD11") (add_net "/QDR-II+ SRAM/RAM_WD12") (add_net "/QDR-II+ SRAM/RAM_WD13") (add_net "/QDR-II+ SRAM/RAM_WD14") (add_net "/QDR-II+ SRAM/RAM_WD15") (add_net "/QDR-II+ SRAM/RAM_WD16") (add_net "/QDR-II+ SRAM/RAM_WD17") (add_net "/QDR-II+ SRAM/RAM_WD18") (add_net "/QDR-II+ SRAM/RAM_WD19") (add_net "/QDR-II+ SRAM/RAM_WD2") (add_net "/QDR-II+ SRAM/RAM_WD20") (add_net "/QDR-II+ SRAM/RAM_WD21") (add_net "/QDR-II+ SRAM/RAM_WD22") (add_net "/QDR-II+ SRAM/RAM_WD23") (add_net "/QDR-II+ SRAM/RAM_WD24") (add_net "/QDR-II+ SRAM/RAM_WD25") (add_net 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(add_net "/XAUI PHY/XAUI_RXD0_P") (add_net "/XAUI PHY/XAUI_RXD1_C_N") (add_net "/XAUI PHY/XAUI_RXD1_C_P") (add_net "/XAUI PHY/XAUI_RXD1_N") (add_net "/XAUI PHY/XAUI_RXD1_P") (add_net "/XAUI PHY/XAUI_RXD2_C_N") (add_net "/XAUI PHY/XAUI_RXD2_C_P") (add_net "/XAUI PHY/XAUI_RXD2_N") (add_net "/XAUI PHY/XAUI_RXD2_P") (add_net "/XAUI PHY/XAUI_RXD3_C_N") (add_net "/XAUI PHY/XAUI_RXD3_C_P") (add_net "/XAUI PHY/XAUI_RXD3_N") (add_net "/XAUI PHY/XAUI_RXD3_P") (add_net "/XAUI PHY/XAUI_TXD0_C_N") (add_net "/XAUI PHY/XAUI_TXD0_C_P") (add_net "/XAUI PHY/XAUI_TXD0_N") (add_net "/XAUI PHY/XAUI_TXD0_P") (add_net "/XAUI PHY/XAUI_TXD1_C_N") (add_net "/XAUI PHY/XAUI_TXD1_C_P") (add_net "/XAUI PHY/XAUI_TXD1_N") (add_net "/XAUI PHY/XAUI_TXD1_P") (add_net "/XAUI PHY/XAUI_TXD2_C_N") (add_net "/XAUI PHY/XAUI_TXD2_C_P") (add_net "/XAUI PHY/XAUI_TXD2_N") (add_net "/XAUI PHY/XAUI_TXD2_P") (add_net "/XAUI PHY/XAUI_TXD3_C_N") (add_net "/XAUI PHY/XAUI_TXD3_C_P") (add_net "/XAUI PHY/XAUI_TXD3_N") (add_net "/XAUI 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"/Zynq CPU/ZYNQ_RXCLK_N") (add_net "/Zynq CPU/ZYNQ_RXCLK_P") (add_net "/Zynq CPU/ZYNQ_TX0_N") (add_net "/Zynq CPU/ZYNQ_TX0_P") (add_net "/Zynq CPU/ZYNQ_TX1_N") (add_net "/Zynq CPU/ZYNQ_TX1_P") (add_net "/Zynq CPU/ZYNQ_TX2_N") (add_net "/Zynq CPU/ZYNQ_TX2_P") (add_net "/Zynq CPU/ZYNQ_TX3_N") (add_net "/Zynq CPU/ZYNQ_TX3_P") (add_net "/Zynq CPU/ZYNQ_TX4_N") (add_net "/Zynq CPU/ZYNQ_TX4_P") (add_net "/Zynq CPU/ZYNQ_TX5_N") (add_net "/Zynq CPU/ZYNQ_TX5_P") (add_net "/Zynq CPU/ZYNQ_TX6_N") (add_net "/Zynq CPU/ZYNQ_TX6_P") (add_net "/Zynq CPU/ZYNQ_TX7_N") (add_net "/Zynq CPU/ZYNQ_TX7_P") (add_net "/Zynq CPU/ZYNQ_TXCLK_N") (add_net "/Zynq CPU/ZYNQ_TXCLK_P") (add_net "/Zynq CPU/ZYNQ_VPLL") (add_net "Net-(C100-Pad1)") (add_net "Net-(C102-Pad1)") (add_net "Net-(C104-Pad1)") (add_net "Net-(C106-Pad2)") (add_net "Net-(C107-Pad2)") (add_net "Net-(C108-Pad2)") (add_net "Net-(C109-Pad2)") (add_net "Net-(C110-Pad2)") (add_net "Net-(C111-Pad2)") (add_net "Net-(C112-Pad2)") (add_net "Net-(C113-Pad2)") (add_net "Net-(C345-Pad1)") (add_net "Net-(C352-Pad2)") (add_net "Net-(C357-Pad1)") (add_net "Net-(C362-Pad1)") (add_net "Net-(C367-Pad1)") (add_net "Net-(C378-Pad1)") (add_net "Net-(C53-Pad2)") (add_net "Net-(C55-Pad2)") (add_net "Net-(C57-Pad2)") (add_net "Net-(C59-Pad2)") (add_net "Net-(C61-Pad2)") (add_net "Net-(C63-Pad2)") (add_net "Net-(C98-Pad1)") (add_net "Net-(D1-Pad1)") (add_net "Net-(D10-Pad1)") (add_net "Net-(D10-Pad2)") (add_net "Net-(D11-Pad1)") (add_net "Net-(D11-Pad2)") (add_net "Net-(D12-Pad1)") (add_net "Net-(D12-Pad2)") (add_net "Net-(D13-Pad1)") (add_net "Net-(D13-Pad2)") (add_net "Net-(D14-Pad1)") (add_net "Net-(D14-Pad2)") (add_net "Net-(D15-Pad1)") (add_net "Net-(D15-Pad2)") (add_net "Net-(D16-Pad1)") (add_net "Net-(D16-Pad2)") (add_net "Net-(D17-Pad1)") (add_net "Net-(D17-Pad2)") (add_net "Net-(D18-Pad1)") (add_net "Net-(D18-Pad2)") (add_net "Net-(D19-Pad2)") (add_net "Net-(D2-Pad1)") (add_net "Net-(D3-Pad1)") (add_net "Net-(D4-Pad1)") (add_net "Net-(D5-Pad1)") (add_net "Net-(D6-Pad1)") (add_net "Net-(D7-Pad1)") (add_net "Net-(D8-Pad1)") (add_net "Net-(D9-Pad1)") (add_net "Net-(D9-Pad2)") (add_net "Net-(F1-Pad2)") (add_net "Net-(Q1-PadD1)") (add_net "Net-(Q1-PadD2)") (add_net "Net-(Q2-PadD1)") (add_net "Net-(Q2-PadD2)") (add_net "Net-(Q3-PadD1)") (add_net "Net-(Q3-PadD2)") (add_net "Net-(Q4-PadD1)") (add_net "Net-(Q4-PadD2)") (add_net "Net-(R118-Pad1)") (add_net "Net-(R120-Pad1)") (add_net "Net-(R121-Pad2)") (add_net "Net-(R129-Pad1)") (add_net "Net-(R133-Pad1)") (add_net "Net-(R137-Pad1)") (add_net "Net-(R161-Pad1)") (add_net "Net-(R162-Pad1)") (add_net "Net-(R163-Pad1)") (add_net "Net-(R166-Pad1)") (add_net "Net-(R167-Pad1)") (add_net "Net-(R168-Pad1)") (add_net "Net-(R169-Pad1)") (add_net "Net-(R170-Pad1)") (add_net "Net-(R171-Pad1)") (add_net "Net-(R172-Pad1)") (add_net "Net-(R173-Pad2)") (add_net "Net-(R174-Pad2)") (add_net "Net-(R175-Pad2)") (add_net "Net-(R176-Pad2)") (add_net "Net-(R177-Pad1)") (add_net "Net-(R178-Pad1)") (add_net "Net-(R179-Pad1)") (add_net "Net-(R180-Pad1)") (add_net "Net-(R181-Pad1)") (add_net "Net-(R182-Pad1)") (add_net "Net-(R185-Pad1)") (add_net "Net-(R195-Pad1)") (add_net "Net-(R199-Pad1)") (add_net "Net-(R2-Pad1)") (add_net "Net-(R200-Pad1)") (add_net "Net-(R201-Pad1)") (add_net "Net-(R202-Pad1)") (add_net "Net-(R205-Pad1)") (add_net "Net-(R206-Pad1)") (add_net "Net-(R207-Pad1)") (add_net "Net-(R208-Pad1)") (add_net "Net-(R209-Pad1)") (add_net "Net-(R210-Pad1)") (add_net "Net-(R211-Pad1)") (add_net "Net-(R214-Pad2)") (add_net "Net-(R217-Pad1)") (add_net "Net-(R218-Pad1)") (add_net "Net-(R219-Pad1)") (add_net "Net-(R220-Pad1)") (add_net "Net-(R221-Pad1)") (add_net "Net-(R43-Pad1)") (add_net "Net-(R44-Pad1)") (add_net "Net-(R9-Pad1)") ) (module azonenberg_pcb:BGA_1156_35x35_FULLARRAY_1MM (layer F.Cu) (tedit 56A48922) (tstamp 56A63B65) (at 115 74 270) (path /5685DE1C/5697B48A) (fp_text reference U5 (at -18.75 16.25 360) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value XC7A200T-1FFG1156C (at 13 19.5 270) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -18 18) (end -18 -16.5) (layer F.SilkS) (width 0.15)) (fp_line (start 18 18) (end -18 18) (layer F.SilkS) (width 0.15)) (fp_line (start 18 -18) (end 18 18) (layer F.SilkS) (width 0.15)) (fp_line (start -16.5 -18) (end 18 -18) (layer F.SilkS) (width 0.15)) (fp_line (start -18 -16.5) (end -16.5 -18) (layer F.SilkS) (width 0.15)) (pad A1 smd circle (at -16.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A2 smd circle (at -15.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad A3 smd circle (at -14.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad A4 smd circle (at -13.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad A5 smd circle (at -12.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad A6 smd circle (at -11.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad A7 smd circle (at -10.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad A8 smd circle (at -9.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad A9 smd circle (at -8.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad A10 smd circle (at -7.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad A11 smd circle (at -6.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A12 smd circle (at -5.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A13 smd circle (at -4.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 613 "/Backplane Connector/E7TX_N")) (pad A14 smd circle (at -3.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A15 smd circle (at -2.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 609 "/Backplane Connector/E5TX_N")) (pad A16 smd circle (at -1.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A17 smd circle (at -0.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 607 "/Backplane Connector/E4TX_N")) (pad A18 smd circle (at 0.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A19 smd circle (at 1.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 615 "/Backplane Connector/E3TX_N")) (pad A20 smd circle (at 2.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A21 smd circle (at 3.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 617 "/Backplane Connector/E2TX_N")) (pad A22 smd circle (at 4.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A23 smd circle (at 5.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 621 "/Backplane Connector/E0TX_N")) (pad A24 smd circle (at 6.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A25 smd circle (at 7.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad A26 smd circle (at 8.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A27 smd circle (at 9.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad A28 smd circle (at 10.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad A29 smd circle (at 11.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad A30 smd circle (at 12.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad A31 smd circle (at 13.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad A32 smd circle (at 14.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad A33 smd circle (at 15.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad A34 smd circle (at 16.5 -16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad B33 smd circle (at 15.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B30 smd circle (at 12.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad B34 smd circle (at 16.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad B31 smd circle (at 13.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad B32 smd circle (at 14.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad B6 smd circle (at -11.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad B2 smd circle (at -15.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad B3 smd circle (at -14.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad B5 smd circle (at -12.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad B7 smd circle (at -10.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad B1 smd circle (at -16.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad B4 smd circle (at -13.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad B12 smd circle (at -5.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B11 smd circle (at -6.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad B13 smd circle (at -4.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 612 "/Backplane Connector/E7TX_P")) (pad B8 smd circle (at -9.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B9 smd circle (at -8.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad B10 smd circle (at -7.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad B17 smd circle (at -0.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 606 "/Backplane Connector/E4TX_P")) (pad B16 smd circle (at -1.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad B18 smd circle (at 0.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad B19 smd circle (at 1.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 614 "/Backplane Connector/E3TX_P")) (pad B14 smd circle (at -3.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad B15 smd circle (at -2.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 608 "/Backplane Connector/E5TX_P")) (pad B23 smd circle (at 5.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 620 "/Backplane Connector/E0TX_P")) (pad B21 smd circle (at 3.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 616 "/Backplane Connector/E2TX_P")) (pad B20 smd circle (at 2.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad B24 smd circle (at 6.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B22 smd circle (at 4.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad B29 smd circle (at 11.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad B25 smd circle (at 7.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad B28 smd circle (at 10.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad B27 smd circle (at 9.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad B26 smd circle (at 8.5 -15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C32 smd circle (at 14.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C34 smd circle (at 16.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D31 smd circle (at 13.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C33 smd circle (at 15.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D33 smd circle (at 15.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D34 smd circle (at 16.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C31 smd circle (at 13.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D32 smd circle (at 14.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad D20 smd circle (at 2.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 196 "/Backplane Connector/ETH1_RX_P")) (pad D23 smd circle (at 5.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad D22 smd circle (at 4.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 618 "/Backplane Connector/E1TX_P")) (pad C21 smd circle (at 3.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad C20 smd circle (at 2.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 197 "/Backplane Connector/ETH1_RX_N")) (pad C22 smd circle (at 4.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 619 "/Backplane Connector/E1TX_N")) (pad C23 smd circle (at 5.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad D21 smd circle (at 3.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad C28 smd circle (at 10.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D28 smd circle (at 10.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C30 smd circle (at 12.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad C29 smd circle (at 11.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D30 smd circle (at 12.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D29 smd circle (at 11.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D27 smd circle (at 9.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad D26 smd circle (at 8.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C25 smd circle (at 7.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad C27 smd circle (at 9.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C26 smd circle (at 8.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C24 smd circle (at 6.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad D25 smd circle (at 7.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D24 smd circle (at 6.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C4 smd circle (at -13.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D5 smd circle (at -12.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C5 smd circle (at -12.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad C6 smd circle (at -11.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D7 smd circle (at -10.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad D6 smd circle (at -11.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C7 smd circle (at -10.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D4 smd circle (at -13.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C11 smd circle (at -6.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C10 smd circle (at -7.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad D12 smd circle (at -5.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad C12 smd circle (at -5.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad D11 smd circle (at -6.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C19 smd circle (at 1.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad D17 smd circle (at -0.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad D18 smd circle (at 0.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 200 "/Backplane Connector/ETH3_RX_P")) (pad C17 smd circle (at -0.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad C18 smd circle (at 0.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 201 "/Backplane Connector/ETH3_RX_N")) (pad D19 smd circle (at 1.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad C1 smd circle (at -16.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D2 smd circle (at -15.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad D3 smd circle (at -14.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C2 smd circle (at -15.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C3 smd circle (at -14.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D1 smd circle (at -16.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D16 smd circle (at -1.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 204 "/Backplane Connector/ETH5_RX_P")) (pad D14 smd circle (at -3.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 610 "/Backplane Connector/E6TX_P")) (pad D13 smd circle (at -4.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad C16 smd circle (at -1.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 205 "/Backplane Connector/ETH5_RX_N")) (pad C14 smd circle (at -3.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 611 "/Backplane Connector/E6TX_N")) (pad C15 smd circle (at -2.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad C13 smd circle (at -4.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad D15 smd circle (at -2.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad D8 smd circle (at -9.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C9 smd circle (at -8.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D10 smd circle (at -7.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C8 smd circle (at -9.5 -14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D9 smd circle (at -8.5 -13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F34 smd circle (at 16.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F33 smd circle (at 15.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad H34 smd circle (at 16.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 312 "/QDR-II+ SRAM/RAM_WD24")) (pad E33 smd circle (at 15.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E34 smd circle (at 16.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J34 smd circle (at 16.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 338 "/QDR-II+ SRAM/RAM_WD25")) (pad F29 smd circle (at 11.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E28 smd circle (at 10.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E29 smd circle (at 11.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad E30 smd circle (at 12.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F30 smd circle (at 12.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F32 smd circle (at 14.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E31 smd circle (at 13.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E32 smd circle (at 14.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F31 smd circle (at 13.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad H29 smd circle (at 11.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 405 "/QDR-II+ SRAM/RAM_CLK_P")) (pad J30 smd circle (at 12.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 412 "/QDR-II+ SRAM/RAM_WD28")) (pad F28 smd circle (at 10.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad H30 smd circle (at 12.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad J29 smd circle (at 11.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 333 "/QDR-II+ SRAM/RAM_WD18")) (pad H28 smd circle (at 10.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 305 "/Clocks / buffers/CLK_125MHZ_3_N")) (pad J28 smd circle (at 10.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 307 "/Clocks / buffers/CLK_125MHZ_3_P")) (pad J32 smd circle (at 14.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J33 smd circle (at 15.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 337 "/QDR-II+ SRAM/RAM_WD33")) (pad J31 smd circle (at 13.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 313 "/QDR-II+ SRAM/RAM_WD20")) (pad H32 smd circle (at 14.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 310 "/QDR-II+ SRAM/RAM_WD31")) (pad H31 smd circle (at 13.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 314 "/QDR-II+ SRAM/RAM_WD27")) (pad H33 smd circle (at 15.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 303 "/QDR-II+ SRAM/RAM_WD32")) (pad F10 smd circle (at -7.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E11 smd circle (at -6.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E10 smd circle (at -7.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F11 smd circle (at -6.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad F19 smd circle (at 1.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 198 "/Backplane Connector/ETH2_RX_P")) (pad E18 smd circle (at 0.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad F17 smd circle (at -0.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 202 "/Backplane Connector/ETH4_RX_P")) (pad E19 smd circle (at 1.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 199 "/Backplane Connector/ETH2_RX_N")) (pad E17 smd circle (at -0.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 203 "/Backplane Connector/ETH4_RX_N")) (pad H19 smd circle (at 1.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad H17 smd circle (at -0.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad H18 smd circle (at 0.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 69 "/Clocks / buffers/CLK_125MHZ_1_P")) (pad E13 smd circle (at -4.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 209 "/Backplane Connector/ETH7_RX_N")) (pad F14 smd circle (at -3.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad F13 smd circle (at -4.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 208 "/Backplane Connector/ETH7_RX_P")) (pad E14 smd circle (at -3.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad E12 smd circle (at -5.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad F12 smd circle (at -5.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J13 smd circle (at -4.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J16 smd circle (at -1.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J14 smd circle (at -3.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad H14 smd circle (at -3.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad H13 smd circle (at -4.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J15 smd circle (at -2.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad F15 smd circle (at -2.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 206 "/Backplane Connector/ETH6_RX_P")) (pad H16 smd circle (at -1.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 65 "/Clocks / buffers/CLK_125MHZ_0_P")) (pad E15 smd circle (at -2.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 207 "/Backplane Connector/ETH6_RX_N")) (pad E16 smd circle (at -1.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad F16 smd circle (at -1.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad H15 smd circle (at -2.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad H12 smd circle (at -5.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad J10 smd circle (at -7.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad H11 smd circle (at -6.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad H10 smd circle (at -7.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J12 smd circle (at -5.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad J11 smd circle (at -6.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F18 smd circle (at 0.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad J18 smd circle (at 0.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J19 smd circle (at 1.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J17 smd circle (at -0.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J7 smd circle (at -10.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J8 smd circle (at -9.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad H9 smd circle (at -8.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad H8 smd circle (at -9.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad J9 smd circle (at -8.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad H7 smd circle (at -10.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad H3 smd circle (at -14.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad J2 smd circle (at -15.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad H1 smd circle (at -16.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad J3 smd circle (at -14.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad H2 smd circle (at -15.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad J1 smd circle (at -16.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E9 smd circle (at -8.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad F9 smd circle (at -8.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E8 smd circle (at -9.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F8 smd circle (at -9.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E7 smd circle (at -10.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F7 smd circle (at -10.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F4 smd circle (at -13.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E4 smd circle (at -13.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad E3 smd circle (at -14.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F3 smd circle (at -14.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F2 smd circle (at -15.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F1 smd circle (at -16.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad E2 smd circle (at -15.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E1 smd circle (at -16.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E6 smd circle (at -11.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F6 smd circle (at -11.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad E5 smd circle (at -12.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F5 smd circle (at -12.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad J5 smd circle (at -12.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad H4 smd circle (at -13.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad H5 smd circle (at -12.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad H6 smd circle (at -11.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad J6 smd circle (at -11.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad J4 smd circle (at -13.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E23 smd circle (at 5.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad F22 smd circle (at 4.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad H23 smd circle (at 5.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad E22 smd circle (at 4.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad F23 smd circle (at 5.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad H22 smd circle (at 4.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad F24 smd circle (at 6.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E25 smd circle (at 7.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E24 smd circle (at 6.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad F25 smd circle (at 7.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F21 smd circle (at 3.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 194 "/Backplane Connector/ETH0_RX_P")) (pad F20 smd circle (at 2.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad E21 smd circle (at 3.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 195 "/Backplane Connector/ETH0_RX_N")) (pad E20 smd circle (at 2.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad E26 smd circle (at 8.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F27 smd circle (at 9.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E27 smd circle (at 9.5 -12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F26 smd circle (at 8.5 -11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad H27 smd circle (at 9.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 439 "/QDR-II+ SRAM/RAM_DM0")) (pad J27 smd circle (at 9.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad J26 smd circle (at 8.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 368 "/QDR-II+ SRAM/RAM_DM2")) (pad H26 smd circle (at 8.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 438 "/QDR-II+ SRAM/RAM_DM1")) (pad H25 smd circle (at 7.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J25 smd circle (at 7.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad H24 smd circle (at 6.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad J24 smd circle (at 6.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 315 "/QDR-II+ SRAM/RAM_WD3")) (pad J23 smd circle (at 5.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad H20 smd circle (at 2.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad J21 smd circle (at 3.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad H21 smd circle (at 3.5 -9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad J20 smd circle (at 2.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J22 smd circle (at 4.5 -8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad N30 smd circle (at 12.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad N31 smd circle (at 13.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 360 "/QDR-II+ SRAM/RAM_RD23")) (pad M30 smd circle (at 12.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 361 "/QDR-II+ SRAM/RAM_RD22")) (pad M31 smd circle (at 13.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 358 "/QDR-II+ SRAM/RAM_RD31")) (pad N32 smd circle (at 14.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 340 "/QDR-II+ SRAM/RAM_RD33")) (pad M32 smd circle (at 14.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 359 "/QDR-II+ SRAM/RAM_RD32")) (pad K29 smd circle (at 11.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad K30 smd circle (at 12.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 331 "/QDR-II+ SRAM/RAM_WD29")) (pad K28 smd circle (at 10.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 369 "/QDR-II+ SRAM/RAM_WD0")) (pad L28 smd circle (at 10.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 316 "/QDR-II+ SRAM/RAM_WD10")) (pad L30 smd circle (at 12.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 373 "/QDR-II+ SRAM/RAM_WD8")) (pad L29 smd circle (at 11.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 372 "/QDR-II+ SRAM/RAM_WD9")) (pad M29 smd circle (at 11.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 336 "/QDR-II+ SRAM/RAM_RD30")) (pad M28 smd circle (at 10.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad L31 smd circle (at 13.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad L32 smd circle (at 14.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 311 "/QDR-II+ SRAM/RAM_WD19")) (pad K32 smd circle (at 14.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 416 "/QDR-II+ SRAM/RAM_WD21")) (pad K31 smd circle (at 13.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 332 "/QDR-II+ SRAM/RAM_WD30")) (pad N33 smd circle (at 15.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 341 "/QDR-II+ SRAM/RAM_RD34")) (pad L34 smd circle (at 16.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 375 "/QDR-II+ SRAM/RAM_WD35")) (pad M34 smd circle (at 16.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 362 "/QDR-II+ SRAM/RAM_RD24")) (pad M33 smd circle (at 15.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad L33 smd circle (at 15.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 304 "/QDR-II+ SRAM/RAM_WD26")) (pad K34 smd circle (at 16.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad K33 smd circle (at 15.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 335 "/QDR-II+ SRAM/RAM_WD34")) (pad R34 smd circle (at 16.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad N34 smd circle (at 16.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 377 "/QDR-II+ SRAM/RAM_RD35")) (pad P33 smd circle (at 15.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 324 "/QDR-II+ SRAM/RAM_RD25")) (pad P34 smd circle (at 16.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 334 "/QDR-II+ SRAM/RAM_RD26")) (pad R33 smd circle (at 15.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 342 "/QDR-II+ SRAM/RAM_RD28")) (pad R30 smd circle (at 12.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 343 "/QDR-II+ SRAM/RAM_RCLK_N")) (pad R32 smd circle (at 14.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad P31 smd circle (at 13.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 344 "/QDR-II+ SRAM/RAM_RD19")) (pad P32 smd circle (at 14.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad P30 smd circle (at 12.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad R31 smd circle (at 13.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 379 "/QDR-II+ SRAM/RAM_RD0")) (pad T30 smd circle (at 12.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 352 "/QDR-II+ SRAM/RAM_RD2")) (pad U29 smd circle (at 11.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 349 "/QDR-II+ SRAM/RAM_RD4")) (pad T28 smd circle (at 10.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 350 "/QDR-II+ SRAM/RAM_RD13")) (pad T27 smd circle (at 9.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 346 "/QDR-II+ SRAM/RAM_RD15")) (pad T29 smd circle (at 11.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 371 "/QDR-II+ SRAM/RAM_RD3")) (pad U30 smd circle (at 12.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 347 "/QDR-II+ SRAM/RAM_RD12")) (pad U28 smd circle (at 10.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad U27 smd circle (at 9.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 357 "/QDR-II+ SRAM/RAM_RD5")) (pad N28 smd circle (at 10.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 321 "/QDR-II+ SRAM/RAM_RD20")) (pad N29 smd circle (at 11.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 325 "/QDR-II+ SRAM/RAM_RD21")) (pad R29 smd circle (at 11.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad P28 smd circle (at 10.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 355 "/QDR-II+ SRAM/RAM_RCLK_P")) (pad P29 smd circle (at 11.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad R28 smd circle (at 10.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 351 "/QDR-II+ SRAM/RAM_RD14")) (pad R27 smd circle (at 9.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad P27 smd circle (at 9.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad T31 smd circle (at 13.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad U34 smd circle (at 16.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 356 "/QDR-II+ SRAM/RAM_RD9")) (pad T34 smd circle (at 16.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 363 "/QDR-II+ SRAM/RAM_RD27")) (pad U32 smd circle (at 14.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 378 "/QDR-II+ SRAM/RAM_RD1")) (pad U33 smd circle (at 15.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad U31 smd circle (at 13.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 330 "/QDR-II+ SRAM/RAM_RD11")) (pad T32 smd circle (at 14.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 354 "/QDR-II+ SRAM/RAM_RD10")) (pad T33 smd circle (at 15.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 345 "/QDR-II+ SRAM/RAM_RD18")) (pad R23 smd circle (at 5.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad R21 smd circle (at 3.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad R20 smd circle (at 2.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad P21 smd circle (at 3.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad R22 smd circle (at 4.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad P22 smd circle (at 4.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad P20 smd circle (at 2.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad K20 smd circle (at 2.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad L21 smd circle (at 3.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad K21 smd circle (at 3.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 364 "Net-(R161-Pad1)")) (pad L20 smd circle (at 2.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad N22 smd circle (at 4.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad N21 smd circle (at 3.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad M21 smd circle (at 3.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M20 smd circle (at 2.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad M22 smd circle (at 4.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad N20 smd circle (at 2.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad N23 smd circle (at 5.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad L23 smd circle (at 5.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 374 "/QDR-II+ SRAM/RAM_WD7")) (pad L22 smd circle (at 4.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 365 "Net-(R163-Pad1)")) (pad K23 smd circle (at 5.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad K22 smd circle (at 4.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 366 "Net-(R162-Pad1)")) (pad M23 smd circle (at 5.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad U23 smd circle (at 5.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad T20 smd circle (at 2.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad U21 smd circle (at 3.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad T21 smd circle (at 3.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad U20 smd circle (at 2.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad T22 smd circle (at 4.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad U22 smd circle (at 4.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad L25 smd circle (at 7.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 317 "/QDR-II+ SRAM/RAM_WD5")) (pad L24 smd circle (at 6.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 436 "/QDR-II+ SRAM/RAM_WD6")) (pad K24 smd circle (at 6.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad K25 smd circle (at 7.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 427 "/QDR-II+ SRAM/RAM_WD4")) (pad M25 smd circle (at 7.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 309 "/QDR-II+ SRAM/RAM_WD13")) (pad M24 smd circle (at 6.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 308 "/QDR-II+ SRAM/RAM_WD14")) (pad N27 smd circle (at 9.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 339 "/QDR-II+ SRAM/RAM_RD29")) (pad N26 smd circle (at 8.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad R25 smd circle (at 7.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 376 "/QDR-II+ SRAM/RAM_RD_N")) (pad P26 smd circle (at 8.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 348 "/QDR-II+ SRAM/RAM_RD8")) (pad P25 smd circle (at 7.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad R26 smd circle (at 8.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 353 "/QDR-II+ SRAM/RAM_RD7")) (pad L26 smd circle (at 8.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad K26 smd circle (at 8.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 327 "/QDR-II+ SRAM/RAM_WD11")) (pad K27 smd circle (at 9.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 367 "/QDR-II+ SRAM/RAM_WD1")) (pad L27 smd circle (at 9.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 319 "/QDR-II+ SRAM/RAM_WD2")) (pad M26 smd circle (at 8.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 326 "/QDR-II+ SRAM/RAM_WD12")) (pad M27 smd circle (at 9.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad T26 smd circle (at 8.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad T25 smd circle (at 7.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 323 "/QDR-II+ SRAM/RAM_RD17")) (pad U25 smd circle (at 7.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 322 "/QDR-II+ SRAM/RAM_RD16")) (pad T24 smd circle (at 6.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad U24 smd circle (at 6.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad T23 smd circle (at 5.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad U26 smd circle (at 8.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 370 "/QDR-II+ SRAM/RAM_RD6")) (pad N25 smd circle (at 7.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad P23 smd circle (at 5.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad N24 smd circle (at 6.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad R24 smd circle (at 6.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad P24 smd circle (at 6.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 380 "/QDR-II+ SRAM/RAM_RVALID")) (pad T8 smd circle (at -9.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad U7 smd circle (at -10.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad U8 smd circle (at -9.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad T9 smd circle (at -8.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad U9 smd circle (at -8.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad T5 smd circle (at -12.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad R6 smd circle (at -11.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad U5 smd circle (at -12.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad T6 smd circle (at -11.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad U6 smd circle (at -11.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad U2 smd circle (at -15.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad T1 smd circle (at -16.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad U1 smd circle (at -16.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad R1 smd circle (at -16.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad P7 smd circle (at -10.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad P9 smd circle (at -8.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad P8 smd circle (at -9.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad T7 smd circle (at -10.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad R9 smd circle (at -8.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad R8 smd circle (at -9.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad R7 smd circle (at -10.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad T3 smd circle (at -14.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad U3 smd circle (at -14.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad T2 smd circle (at -15.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad R3 smd circle (at -14.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad R2 smd circle (at -15.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad R4 smd circle (at -13.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad R5 smd circle (at -12.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad T4 smd circle (at -13.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad U4 smd circle (at -13.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad N3 smd circle (at -14.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad N4 smd circle (at -13.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad M4 smd circle (at -13.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad M3 smd circle (at -14.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad P4 smd circle (at -13.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad P3 smd circle (at -14.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad L3 smd circle (at -14.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad L4 smd circle (at -13.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad K3 smd circle (at -14.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad K4 smd circle (at -13.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad K1 smd circle (at -16.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad L2 smd circle (at -15.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad K2 smd circle (at -15.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad L1 smd circle (at -16.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M2 smd circle (at -15.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad N2 smd circle (at -15.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad M1 smd circle (at -16.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad N1 smd circle (at -16.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad P2 smd circle (at -15.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad P1 smd circle (at -16.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad L5 smd circle (at -12.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad L6 smd circle (at -11.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad K6 smd circle (at -11.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad K5 smd circle (at -12.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad N6 smd circle (at -11.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad M6 smd circle (at -11.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad M5 smd circle (at -12.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad P6 smd circle (at -11.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad N5 smd circle (at -12.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad P5 smd circle (at -12.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad L18 smd circle (at 0.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M18 smd circle (at 0.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad L17 smd circle (at -0.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad M17 smd circle (at -0.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M19 smd circle (at 1.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad U17 smd circle (at -0.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad U18 smd circle (at 0.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad T18 smd circle (at 0.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 107 "/FPGA support/A1V8_ARTIX")) (pad U19 smd circle (at 1.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad T19 smd circle (at 1.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad N18 smd circle (at 0.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad N19 smd circle (at 1.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad P19 smd circle (at 1.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad N17 smd circle (at -0.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad P18 smd circle (at 0.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad P17 smd circle (at -0.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad R16 smd circle (at -1.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad U16 smd circle (at -1.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad U15 smd circle (at -2.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad R15 smd circle (at -2.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad P15 smd circle (at -2.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad P16 smd circle (at -1.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad T16 smd circle (at -1.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad T15 smd circle (at -2.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad T17 smd circle (at -0.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad R18 smd circle (at 0.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad R19 smd circle (at 1.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad R17 smd circle (at -0.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad L11 smd circle (at -6.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad K11 smd circle (at -6.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad K12 smd circle (at -5.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad L12 smd circle (at -5.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad M9 smd circle (at -8.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad M10 smd circle (at -7.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad N9 smd circle (at -8.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad N10 smd circle (at -7.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad P10 smd circle (at -7.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad N8 smd circle (at -9.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad N12 smd circle (at -5.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M11 smd circle (at -6.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad N11 smd circle (at -6.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 381 "/Power Supply/FPGA_RESET_N")) (pad M12 smd circle (at -5.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad P12 smd circle (at -5.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad P11 smd circle (at -6.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 382 "/FPGA Config/FPGA_DONE")) (pad K10 smd circle (at -7.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad L9 smd circle (at -8.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad L10 smd circle (at -7.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad K9 smd circle (at -8.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad T12 smd circle (at -5.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad U10 smd circle (at -7.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad T11 smd circle (at -6.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad U12 smd circle (at -5.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad U11 smd circle (at -6.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad R14 smd circle (at -3.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad R13 smd circle (at -4.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad P14 smd circle (at -3.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad P13 smd circle (at -4.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad T14 smd circle (at -3.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad U14 smd circle (at -3.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad U13 smd circle (at -4.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad T13 smd circle (at -4.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad R12 smd circle (at -5.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad T10 smd circle (at -7.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad R10 smd circle (at -7.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad R11 smd circle (at -6.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad M7 smd circle (at -10.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad L8 smd circle (at -9.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad K8 smd circle (at -9.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad M8 smd circle (at -9.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad L7 smd circle (at -10.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad K7 smd circle (at -10.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad N7 smd circle (at -10.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad N16 smd circle (at -1.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M16 smd circle (at -1.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad L16 smd circle (at -1.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad L15 smd circle (at -2.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad K15 smd circle (at -2.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad K16 smd circle (at -1.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad K14 smd circle (at -3.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad K13 smd circle (at -4.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad L14 smd circle (at -3.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad L13 smd circle (at -4.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad M13 smd circle (at -4.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M15 smd circle (at -2.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M14 smd circle (at -3.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad N14 smd circle (at -3.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad N15 smd circle (at -2.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad N13 smd circle (at -4.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad K19 smd circle (at 1.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad K18 smd circle (at 0.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad K17 smd circle (at -0.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad L19 smd circle (at 1.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad V34 smd circle (at 16.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad V33 smd circle (at 15.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad V32 smd circle (at 14.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 383 "/FPGA Config/FPGA_PANIC")) (pad V30 smd circle (at 12.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad V29 smd circle (at 11.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 384 "Net-(R167-Pad1)")) (pad V28 smd circle (at 10.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 385 "Net-(R166-Pad1)")) (pad V31 smd circle (at 13.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad V27 smd circle (at 9.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 386 "Net-(R169-Pad1)")) (pad V21 smd circle (at 3.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad V22 smd circle (at 4.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad V23 smd circle (at 5.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad V26 smd circle (at 8.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 387 "Net-(R168-Pad1)")) (pad V25 smd circle (at 7.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad V24 smd circle (at 6.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad V17 smd circle (at -0.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad V18 smd circle (at 0.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 99 "/FPGA support/1V25_REF")) (pad V19 smd circle (at 1.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad V20 smd circle (at 2.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad V13 smd circle (at -4.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad V14 smd circle (at -3.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad V15 smd circle (at -2.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad V16 smd circle (at -1.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad V10 smd circle (at -7.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad V12 smd circle (at -5.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad V11 smd circle (at -6.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 388 "/Power Supply/FPGA_INIT_B")) (pad V7 smd circle (at -10.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 216 "/Zynq CPU/ARM_MIO1")) (pad V8 smd circle (at -9.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad V9 smd circle (at -8.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad V6 smd circle (at -11.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad V3 smd circle (at -14.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 231 "/Zynq CPU/ARM_MIO48")) (pad V5 smd circle (at -12.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad V4 smd circle (at -13.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad V1 smd circle (at -16.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 222 "/Zynq CPU/ARM_MIO38")) (pad V2 smd circle (at -15.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 223 "/Zynq CPU/ARM_MIO35")) (pad AC34 smd circle (at 16.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AB34 smd circle (at 16.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 389 "Net-(R180-Pad1)")) (pad AB32 smd circle (at 14.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AB33 smd circle (at 15.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AC33 smd circle (at 15.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AC32 smd circle (at 14.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 390 "Net-(R178-Pad1)")) (pad AD33 smd circle (at 15.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 409 "/QDR-II+ SRAM/RAM_A3")) (pad AE34 smd circle (at 16.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AF34 smd circle (at 16.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 404 "/QDR-II+ SRAM/RAM_A2")) (pad AD34 smd circle (at 16.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 452 "/QDR-II+ SRAM/RAM_A8")) (pad AE33 smd circle (at 15.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 410 "/QDR-II+ SRAM/RAM_A11")) (pad AF33 smd circle (at 15.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 446 "/QDR-II+ SRAM/RAM_A10")) (pad AC31 smd circle (at 13.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 391 "Net-(R177-Pad1)")) (pad AD32 smd circle (at 14.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad AD31 smd circle (at 13.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 634 "/QDR-II+ SRAM/RAM_A20")) (pad AB31 smd circle (at 13.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 392 "/FPGA Config/RAM_TMS")) (pad AE32 smd circle (at 14.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 449 "/QDR-II+ SRAM/RAM_A5")) (pad AE31 smd circle (at 13.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 408 "/QDR-II+ SRAM/RAM_A4")) (pad AF31 smd circle (at 13.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AF32 smd circle (at 14.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad AD28 smd circle (at 10.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AE30 smd circle (at 12.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 400 "/QDR-II+ SRAM/RAM_A16")) (pad AC30 smd circle (at 12.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AD29 smd circle (at 11.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 396 "/QDR-II+ SRAM/RAM_A14")) (pad AD30 smd circle (at 12.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 632 "/QDR-II+ SRAM/RAM_A18")) (pad AF30 smd circle (at 12.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 447 "/QDR-II+ SRAM/RAM_A9")) (pad AF29 smd circle (at 11.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 401 "/QDR-II+ SRAM/RAM_A12")) (pad AC29 smd circle (at 11.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 393 "Net-(R182-Pad1)")) (pad AC28 smd circle (at 10.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 394 "Net-(R181-Pad1)")) (pad AB30 smd circle (at 12.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 395 "/FPGA Config/RAM_TCK")) (pad AB29 smd circle (at 11.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AB27 smd circle (at 9.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AB28 smd circle (at 10.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad AH27 smd circle (at 9.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AJ28 smd circle (at 10.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AH28 smd circle (at 10.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AJ29 smd circle (at 11.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AH29 smd circle (at 11.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AJ27 smd circle (at 9.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad AE29 smd circle (at 11.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad AE28 smd circle (at 10.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AE27 smd circle (at 9.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AD27 smd circle (at 9.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AC27 smd circle (at 9.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AF27 smd circle (at 9.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AG28 smd circle (at 10.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AF28 smd circle (at 10.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AG29 smd circle (at 11.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AG27 smd circle (at 9.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AC26 smd circle (at 8.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AD25 smd circle (at 7.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AD26 smd circle (at 8.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AC25 smd circle (at 7.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad AF26 smd circle (at 8.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad AE26 smd circle (at 8.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AE25 smd circle (at 7.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AF25 smd circle (at 7.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AH26 smd circle (at 8.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad AH25 smd circle (at 7.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AG25 smd circle (at 7.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AG26 smd circle (at 8.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AH30 smd circle (at 12.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad AJ30 smd circle (at 12.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AG31 smd circle (at 13.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 399 "/QDR-II+ SRAM/RAM_A13")) (pad AH31 smd circle (at 13.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 633 "/QDR-II+ SRAM/RAM_A19")) (pad AG30 smd circle (at 12.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 402 "/QDR-II+ SRAM/RAM_A15")) (pad AM34 smd circle (at 16.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 419 "/XAUI PHY/PHY_MDIO_A3")) (pad AL34 smd circle (at 16.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 397 "/XAUI PHY/PHY_JTAG_TRST_N")) (pad AN33 smd circle (at 15.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 420 "/XAUI PHY/PHY_MDIO")) (pad AM33 smd circle (at 15.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AN34 smd circle (at 16.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 434 "/XAUI PHY/PHY_MDIO_A2")) (pad AP32 smd circle (at 14.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad AP34 smd circle (at 16.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 421 "/XAUI PHY/PHY_MDIO_A4")) (pad AP33 smd circle (at 15.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 435 "/XAUI PHY/PHY_MODE")) (pad AG34 smd circle (at 16.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 407 "/QDR-II+ SRAM/RAM_A1")) (pad AH34 smd circle (at 16.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 448 "/QDR-II+ SRAM/RAM_A0")) (pad AJ33 smd circle (at 15.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 431 "/XAUI PHY/PHY_LS_OK_IN")) (pad AH33 smd circle (at 15.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 445 "/QDR-II+ SRAM/RAM_A6")) (pad AJ34 smd circle (at 16.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 433 "/XAUI PHY/PHY_JTAG_TDO")) (pad AG33 smd circle (at 15.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad AK33 smd circle (at 15.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 418 "/XAUI PHY/PHY_PRBS_EN")) (pad AK34 smd circle (at 16.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad G33 smd circle (at 15.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad G34 smd circle (at 16.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 328 "/QDR-II+ SRAM/RAM_WD23")) (pad AK32 smd circle (at 14.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad G32 smd circle (at 14.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad AJ31 smd circle (at 13.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AG32 smd circle (at 14.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 451 "/QDR-II+ SRAM/RAM_A7")) (pad AH32 smd circle (at 14.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 403 "/QDR-II+ SRAM/RAM_A17")) (pad AJ32 smd circle (at 14.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AL32 smd circle (at 14.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 429 "/XAUI PHY/PHY_JTAG_TMS")) (pad AN32 smd circle (at 14.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 423 "/XAUI PHY/PHY_MDIO_A1")) (pad AL33 smd circle (at 15.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 424 "/XAUI PHY/PHY_RESET_N")) (pad AM32 smd circle (at 14.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 411 "/XAUI PHY/PHY_PDWRDN_N")) (pad AL30 smd circle (at 12.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad G31 smd circle (at 13.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 318 "/QDR-II+ SRAM/RAM_DM3")) (pad G30 smd circle (at 12.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 320 "/QDR-II+ SRAM/RAM_WR_N")) (pad AK31 smd circle (at 13.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AL31 smd circle (at 13.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad AM29 smd circle (at 11.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AP28 smd circle (at 10.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 414 "/XAUI PHY/PHY_LS_OK_OUT")) (pad AN29 smd circle (at 11.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 413 "/XAUI PHY/PHY_LOS")) (pad AN28 smd circle (at 10.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 430 "/XAUI PHY/PHY_JTAG_TCK")) (pad AN27 smd circle (at 9.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AP29 smd circle (at 11.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 425 "/XAUI PHY/PHY_MDIO_A0")) (pad AP27 smd circle (at 9.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AK30 smd circle (at 12.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AK28 smd circle (at 10.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AK29 smd circle (at 11.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G28 smd circle (at 10.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G29 smd circle (at 11.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 406 "/QDR-II+ SRAM/RAM_CLK_N")) (pad G27 smd circle (at 9.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 426 "/QDR-II+ SRAM/RAM_WD16")) (pad AK27 smd circle (at 9.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AM27 smd circle (at 9.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AL28 smd circle (at 10.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AL29 smd circle (at 11.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AL27 smd circle (at 9.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AM28 smd circle (at 10.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad AM31 smd circle (at 13.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 415 "/XAUI PHY/PHY_JTAG_TDI")) (pad AN31 smd circle (at 13.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 432 "/XAUI PHY/PHY_PRBS_PASS")) (pad AM30 smd circle (at 12.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 428 "/XAUI PHY/PHY_GPIO")) (pad AN30 smd circle (at 12.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AP30 smd circle (at 12.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 398 "/XAUI PHY/PHY_MDIO_MODE")) (pad AP31 smd circle (at 13.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 422 "/XAUI PHY/PHY_MDC")) (pad AJ22 smd circle (at 4.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad AK22 smd circle (at 4.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AJ21 smd circle (at 3.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 130 "/XAUI PHY/XAUI_RXD3_P")) (pad AK21 smd circle (at 3.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 132 "/XAUI PHY/XAUI_RXD3_N")) (pad AK23 smd circle (at 5.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AJ23 smd circle (at 5.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AM23 smd circle (at 5.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AM24 smd circle (at 6.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AN24 smd circle (at 6.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AP25 smd circle (at 7.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AP23 smd circle (at 5.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 124 "/XAUI PHY/XAUI_TXD3_N")) (pad AN25 smd circle (at 7.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad AP26 smd circle (at 8.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AP24 smd circle (at 6.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AJ26 smd circle (at 8.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AJ25 smd circle (at 7.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AK26 smd circle (at 8.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad G26 smd circle (at 8.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 329 "/QDR-II+ SRAM/RAM_WD22")) (pad AN23 smd circle (at 5.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 122 "/XAUI PHY/XAUI_TXD3_P")) (pad AN22 smd circle (at 4.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad AM22 smd circle (at 4.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 140 "/XAUI PHY/XAUI_TXD2_N")) (pad AP22 smd circle (at 4.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AP21 smd circle (at 3.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 120 "/XAUI PHY/XAUI_TXD1_N")) (pad AN21 smd circle (at 3.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 118 "/XAUI PHY/XAUI_TXD1_P")) (pad AL21 smd circle (at 3.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad AL22 smd circle (at 4.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 138 "/XAUI PHY/XAUI_TXD2_P")) (pad G21 smd circle (at 3.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AL23 smd circle (at 5.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G22 smd circle (at 4.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 437 "Net-(R185-Pad1)")) (pad G23 smd circle (at 5.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AM21 smd circle (at 3.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AK25 smd circle (at 7.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AJ24 smd circle (at 6.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AK24 smd circle (at 6.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G25 smd circle (at 7.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 417 "/QDR-II+ SRAM/RAM_WD17")) (pad G24 smd circle (at 6.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 306 "/QDR-II+ SRAM/RAM_WD15")) (pad AL26 smd circle (at 8.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AM26 smd circle (at 8.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AM25 smd circle (at 7.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AL25 smd circle (at 7.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AL24 smd circle (at 6.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AN26 smd circle (at 8.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad Y28 smd circle (at 10.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad W27 smd circle (at 9.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad W28 smd circle (at 10.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad Y27 smd circle (at 9.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 440 "Net-(R171-Pad1)")) (pad AA27 smd circle (at 9.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AA28 smd circle (at 10.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AA30 smd circle (at 12.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 441 "/FPGA Config/RAM_TDO")) (pad Y29 smd circle (at 11.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad W30 smd circle (at 12.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad Y30 smd circle (at 12.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad W29 smd circle (at 11.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AA29 smd circle (at 11.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad W32 smd circle (at 14.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad Y31 smd circle (at 13.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 442 "/FPGA Config/RAM_TDI")) (pad Y32 smd circle (at 14.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AA31 smd circle (at 13.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad W31 smd circle (at 13.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AA32 smd circle (at 14.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad Y34 smd circle (at 16.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad Y33 smd circle (at 15.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AA33 smd circle (at 15.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AA34 smd circle (at 16.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 443 "Net-(R179-Pad1)")) (pad W33 smd circle (at 15.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad W34 smd circle (at 16.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AB20 smd circle (at 2.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AB21 smd circle (at 3.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AA20 smd circle (at 2.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AA21 smd circle (at 3.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad Y23 smd circle (at 5.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad Y25 smd circle (at 7.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad W23 smd circle (at 5.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad W24 smd circle (at 6.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad W25 smd circle (at 7.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad Y24 smd circle (at 6.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad AA22 smd circle (at 4.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AA23 smd circle (at 5.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad AB23 smd circle (at 5.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AB22 smd circle (at 4.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad AA24 smd circle (at 6.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AA26 smd circle (at 8.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad W26 smd circle (at 8.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 444 "Net-(R170-Pad1)")) (pad AA25 smd circle (at 7.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad Y26 smd circle (at 8.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad W20 smd circle (at 2.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad Y21 smd circle (at 3.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad W21 smd circle (at 3.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad W22 smd circle (at 4.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad Y22 smd circle (at 4.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad Y20 smd circle (at 2.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AB26 smd circle (at 8.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AC24 smd circle (at 6.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AB25 smd circle (at 7.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AB24 smd circle (at 6.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AC20 smd circle (at 2.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AD21 smd circle (at 3.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AC21 smd circle (at 3.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AD20 smd circle (at 2.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AE23 smd circle (at 5.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AE22 smd circle (at 4.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AF22 smd circle (at 4.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AF23 smd circle (at 5.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AE24 smd circle (at 6.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AF24 smd circle (at 6.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AC23 smd circle (at 5.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad AD22 smd circle (at 4.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AC22 smd circle (at 4.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AD23 smd circle (at 5.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AD24 smd circle (at 6.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AF20 smd circle (at 2.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AE20 smd circle (at 2.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AE21 smd circle (at 3.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AF21 smd circle (at 3.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AH22 smd circle (at 4.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 450 "Net-(R172-Pad1)")) (pad AH24 smd circle (at 6.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AG23 smd circle (at 5.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AH23 smd circle (at 5.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AH21 smd circle (at 3.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AG21 smd circle (at 3.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad AG22 smd circle (at 4.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AG24 smd circle (at 6.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AM20 smd circle (at 2.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 148 "/XAUI PHY/XAUI_RXD2_N")) (pad AN20 smd circle (at 2.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad AM19 smd circle (at 1.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AP19 smd circle (at 1.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 136 "/XAUI PHY/XAUI_TXD0_N")) (pad AN19 smd circle (at 1.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 134 "/XAUI PHY/XAUI_TXD0_P")) (pad AP20 smd circle (at 2.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AK14 smd circle (at -3.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G14 smd circle (at -3.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AK15 smd circle (at -2.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 453 "/Front panel SFP+s/ETH9_RX_N")) (pad AK13 smd circle (at -4.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 211 "/Backplane Connector/ETH8_RX_N")) (pad G18 smd circle (at 0.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 71 "/Clocks / buffers/CLK_125MHZ_1_N")) (pad AK18 smd circle (at 0.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AK19 smd circle (at 1.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 128 "/XAUI PHY/XAUI_RXD1_N")) (pad G19 smd circle (at 1.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AK17 smd circle (at -0.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 454 "/Front panel SFP+s/ETH11_RX_N")) (pad G17 smd circle (at -0.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AL17 smd circle (at -0.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad AK20 smd circle (at 2.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AL20 smd circle (at 2.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 146 "/XAUI PHY/XAUI_RXD2_P")) (pad G20 smd circle (at 2.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AL18 smd circle (at 0.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 142 "/XAUI PHY/XAUI_RXD0_P")) (pad AL19 smd circle (at 1.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad AL16 smd circle (at -1.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 455 "/Front panel SFP+s/ETH10_RX_P")) (pad AL15 smd circle (at -2.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad G15 smd circle (at -2.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G16 smd circle (at -1.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 67 "/Clocks / buffers/CLK_125MHZ_0_N")) (pad AK16 smd circle (at -1.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AL13 smd circle (at -4.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad AN13 smd circle (at -4.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 626 "/Front panel SFP+s/E8T_P")) (pad AL14 smd circle (at -3.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 456 "/Front panel SFP+s/ETH9_TX_P")) (pad G13 smd circle (at -4.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AM14 smd circle (at -3.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 457 "/Front panel SFP+s/ETH9_TX_N")) (pad AM13 smd circle (at -4.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AP13 smd circle (at -4.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 627 "/Front panel SFP+s/E8T_N")) (pad AM15 smd circle (at -2.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AN16 smd circle (at -1.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad AP14 smd circle (at -3.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AM16 smd circle (at -1.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 458 "/Front panel SFP+s/ETH10_RX_N")) (pad AN15 smd circle (at -2.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 459 "/Front panel SFP+s/ETH10_TX_P")) (pad AN14 smd circle (at -3.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad AP15 smd circle (at -2.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 460 "/Front panel SFP+s/ETH10_TX_N")) (pad AP16 smd circle (at -1.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AM17 smd circle (at -0.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AN18 smd circle (at 0.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad AP17 smd circle (at -0.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 461 "/Front panel SFP+s/ETH11_TX_N")) (pad AM18 smd circle (at 0.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 144 "/XAUI PHY/XAUI_RXD0_N")) (pad AN17 smd circle (at -0.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 462 "/Front panel SFP+s/ETH11_TX_P")) (pad AP18 smd circle (at 0.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AB14 smd circle (at -3.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AB13 smd circle (at -4.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AA14 smd circle (at -3.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AA13 smd circle (at -4.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad AC13 smd circle (at -4.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad AD14 smd circle (at -3.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AC14 smd circle (at -3.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AD13 smd circle (at -4.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 463 "Net-(R43-Pad1)")) (pad AE13 smd circle (at -4.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 188 "/Backplane Connector/JTAG_TMS")) (pad AE14 smd circle (at -3.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 191 "/Backplane Connector/JTAG_TDI")) (pad AF13 smd circle (at -4.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AF14 smd circle (at -3.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad W14 smd circle (at -3.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad W13 smd circle (at -4.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad Y14 smd circle (at -3.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad Y13 smd circle (at -4.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AE15 smd circle (at -2.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AD15 smd circle (at -2.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AE16 smd circle (at -1.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AD16 smd circle (at -1.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AF16 smd circle (at -1.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AF15 smd circle (at -2.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AH18 smd circle (at 0.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AJ19 smd circle (at 1.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 126 "/XAUI PHY/XAUI_RXD1_P")) (pad AH20 smd circle (at 2.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 79 "/Clocks / buffers/CLK_156MHZ_1_N")) (pad AG20 smd circle (at 2.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 78 "/Clocks / buffers/CLK_156MHZ_1_P")) (pad AH19 smd circle (at 1.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AJ20 smd circle (at 2.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad AJ18 smd circle (at 0.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad AD17 smd circle (at -0.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AE18 smd circle (at 0.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AD19 smd circle (at 1.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AE17 smd circle (at -0.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AE19 smd circle (at 1.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AD18 smd circle (at 0.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AF18 smd circle (at 0.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AF17 smd circle (at -0.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AF19 smd circle (at 1.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AG19 smd circle (at 1.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad AG17 smd circle (at -0.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad AG18 smd circle (at 0.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AH17 smd circle (at -0.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AJ15 smd circle (at -2.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 464 "/Front panel SFP+s/ETH9_RX_P")) (pad AJ16 smd circle (at -1.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad AH16 smd circle (at -1.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AG16 smd circle (at -1.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AJ17 smd circle (at -0.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 465 "/Front panel SFP+s/ETH11_RX_P")) (pad AH15 smd circle (at -2.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AG13 smd circle (at -4.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AJ13 smd circle (at -4.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 210 "/Backplane Connector/ETH8_RX_P")) (pad AG15 smd circle (at -2.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad AG14 smd circle (at -3.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 73 "/Clocks / buffers/CLK_125MHZ_2_P")) (pad AH14 smd circle (at -3.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 75 "/Clocks / buffers/CLK_125MHZ_2_N")) (pad AH13 smd circle (at -4.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AJ14 smd circle (at -3.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad Y16 smd circle (at -1.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad Y15 smd circle (at -2.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad W15 smd circle (at -2.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad W16 smd circle (at -1.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad W19 smd circle (at 1.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad W18 smd circle (at 0.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad Y18 smd circle (at 0.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad Y17 smd circle (at -0.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad W17 smd circle (at -0.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad Y19 smd circle (at 1.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AA18 smd circle (at 0.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AA17 smd circle (at -0.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AB19 smd circle (at 1.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AA19 smd circle (at 1.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AC16 smd circle (at -1.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AC15 smd circle (at -2.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AA15 smd circle (at -2.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AB16 smd circle (at -1.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AB15 smd circle (at -2.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AA16 smd circle (at -1.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AC17 smd circle (at -0.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AC18 smd circle (at 0.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AC19 smd circle (at 1.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AB18 smd circle (at 0.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad AB17 smd circle (at -0.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AJ12 smd circle (at -5.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AJ11 smd circle (at -6.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AK11 smd circle (at -6.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 490 "/Front panel SFP+s/ETH12_TX_FAULT")) (pad G11 smd circle (at -6.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AK12 smd circle (at -5.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G12 smd circle (at -5.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G10 smd circle (at -7.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AJ9 smd circle (at -8.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 466 "/Front panel SFP+s/ETH12_RX_LOS")) (pad AJ10 smd circle (at -7.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 193 "/Backplane Connector/BACKPLANE_I2C_SDA")) (pad AK10 smd circle (at -7.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 192 "/Backplane Connector/BACKPLANE_I2C_SCL")) (pad G9 smd circle (at -8.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AN11 smd circle (at -6.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AM12 smd circle (at -5.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AM11 smd circle (at -6.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AP10 smd circle (at -7.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 479 "/Front panel SFP+s/ETH11_SCL")) (pad AP12 smd circle (at -5.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AN10 smd circle (at -7.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad AN12 smd circle (at -5.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AP11 smd circle (at -6.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 482 "/Front panel SFP+s/ETH11_RX_LOS")) (pad G7 smd circle (at -10.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AK9 smd circle (at -8.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad AK8 smd circle (at -9.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 467 "/Front panel SFP+s/ETH12_LINK")) (pad AJ7 smd circle (at -10.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AJ8 smd circle (at -9.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 468 "/Front panel SFP+s/ETH11_ACT")) (pad AK7 smd circle (at -10.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 497 "/Current Shunt Monitors/PSU_I2C_SDA")) (pad G8 smd circle (at -9.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad AM8 smd circle (at -9.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AN9 smd circle (at -8.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 470 "/Current Shunt Monitors/PSU_I2C_SCL")) (pad AM9 smd circle (at -8.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AN8 smd circle (at -9.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 471 "/Front panel SFP+s/ETH12_ACT")) (pad AP8 smd circle (at -9.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AP7 smd circle (at -10.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad AN7 smd circle (at -10.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 473 "/Front panel SFP+s/ETH10_ACT")) (pad AP9 smd circle (at -8.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AL12 smd circle (at -5.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AL11 smd circle (at -6.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AL10 smd circle (at -7.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 491 "/Front panel SFP+s/ETH12_SCL")) (pad AM10 smd circle (at -7.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AL9 smd circle (at -8.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 483 "/Front panel SFP+s/ETH12_TX_DISABLE")) (pad AL8 smd circle (at -9.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 492 "/Front panel SFP+s/ETH11_SDA")) (pad AL7 smd circle (at -10.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 486 "/Front panel SFP+s/ETH12_PRESENT_N")) (pad AM7 smd circle (at -10.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 487 "/Front panel SFP+s/ETH11_PRESENT_N")) (pad AD8 smd circle (at -9.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 291 "/Zynq CPU/ZYNQ_RX3_N")) (pad AC9 smd circle (at -8.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AD9 smd circle (at -8.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 292 "/Zynq CPU/ZYNQ_RX3_P")) (pad AC8 smd circle (at -9.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AF8 smd circle (at -9.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 280 "/Zynq CPU/ZYNQ_RX7_N")) (pad AE9 smd circle (at -8.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AF9 smd circle (at -8.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 279 "/Zynq CPU/ZYNQ_RX7_P")) (pad AE8 smd circle (at -9.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 186 "/Zynq CPU/ZYNQ_JTAG_TDO")) (pad AD7 smd circle (at -10.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad AD6 smd circle (at -11.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 278 "/Zynq CPU/ZYNQ_RX2_P")) (pad AC6 smd circle (at -11.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AC7 smd circle (at -10.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AF7 smd circle (at -10.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 286 "/Zynq CPU/ZYNQ_TXCLK_P")) (pad AF6 smd circle (at -11.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AE6 smd circle (at -11.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 275 "/Zynq CPU/ZYNQ_RX2_N")) (pad AE7 smd circle (at -10.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 187 "/Zynq CPU/ZYNQ_JTAG_TDI")) (pad AH7 smd circle (at -10.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 274 "/Zynq CPU/ZYNQ_RX6_P")) (pad AG7 smd circle (at -10.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 285 "/Zynq CPU/ZYNQ_TXCLK_N")) (pad AH6 smd circle (at -11.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 273 "/Zynq CPU/ZYNQ_RX6_N")) (pad AG6 smd circle (at -11.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 268 "/Zynq CPU/ZYNQ_TX3_P")) (pad AG9 smd circle (at -8.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 277 "/Zynq CPU/ZYNQ_RX0_N")) (pad AH9 smd circle (at -8.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 256 "/Zynq CPU/ZYNQ_RX1_P")) (pad AH8 smd circle (at -9.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 257 "/Zynq CPU/ZYNQ_RX1_N")) (pad AG10 smd circle (at -7.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 290 "/Zynq CPU/ZYNQ_RX0_P")) (pad AG8 smd circle (at -9.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad AJ6 smd circle (at -11.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 484 "/Front panel SFP+s/ETH11_TX_DISABLE")) (pad G6 smd circle (at -11.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AK6 smd circle (at -11.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 472 "/Front panel SFP+s/ETH10_LINK")) (pad AL6 smd circle (at -11.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad AL5 smd circle (at -12.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 480 "/Front panel SFP+s/ETH11_TX_FAULT")) (pad G5 smd circle (at -12.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AM4 smd circle (at -13.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 499 "/Front panel SFP+s/ETH9_RX_LOS")) (pad AN4 smd circle (at -13.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 478 "/Front panel SFP+s/ETH10_PRESENT_N")) (pad AM3 smd circle (at -14.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad AP3 smd circle (at -14.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 630 "/Front panel SFP+s/ARM_TDO")) (pad AN3 smd circle (at -14.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 631 "/Front panel SFP+s/ARM_TDI")) (pad AP4 smd circle (at -13.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 629 "/Front panel SFP+s/ARM_TCK")) (pad AN2 smd circle (at -15.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 488 "/Front panel SFP+s/ETH9_PRESENT_N")) (pad G1 smd circle (at -16.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AP1 smd circle (at -16.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 495 "/Front panel SFP+s/ETH9_SCL")) (pad AM1 smd circle (at -16.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 477 "/Front panel SFP+s/ETH9_TX_DISABLE")) (pad AL1 smd circle (at -16.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AM2 smd circle (at -15.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 475 "/Front panel SFP+s/ETH9_LINK")) (pad AN1 smd circle (at -16.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 474 "/Front panel SFP+s/ETH9_SDA")) (pad AP2 smd circle (at -15.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G3 smd circle (at -14.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AL2 smd circle (at -15.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 476 "/Front panel SFP+s/ETH9_TX_FAULT")) (pad AL4 smd circle (at -13.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 469 "/Front panel SFP+s/ETH9_ACT")) (pad AL3 smd circle (at -14.5 13.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad G4 smd circle (at -13.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad G2 smd circle (at -15.5 -10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AJ3 smd circle (at -14.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 272 "/Zynq CPU/ZYNQ_RX4_N")) (pad AH3 smd circle (at -14.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 281 "/Zynq CPU/ZYNQ_RX4_P")) (pad AH4 smd circle (at -13.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 295 "/Zynq CPU/ZYNQ_RXCLK_P")) (pad AH5 smd circle (at -12.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad AJ1 smd circle (at -16.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 265 "/Zynq CPU/ZYNQ_TX6_N")) (pad AH2 smd circle (at -15.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 264 "/Zynq CPU/ZYNQ_TX6_P")) (pad AH1 smd circle (at -16.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 271 "/Zynq CPU/ZYNQ_TX4_N")) (pad AJ2 smd circle (at -15.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad AK2 smd circle (at -15.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AK1 smd circle (at -16.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AK3 smd circle (at -14.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 628 "/Front panel SFP+s/ARM_TMS")) (pad AK4 smd circle (at -13.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AJ4 smd circle (at -13.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 296 "/Zynq CPU/ZYNQ_RXCLK_N")) (pad AJ5 smd circle (at -12.5 11.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 485 "/Front panel SFP+s/ETH12_SDA")) (pad AK5 smd circle (at -12.5 12.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 496 "/Front panel SFP+s/ETH11_LINK")) (pad AM5 smd circle (at -12.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 493 "/Front panel SFP+s/ETH10_TX_FAULT")) (pad AN5 smd circle (at -12.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AM6 smd circle (at -11.5 14.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 494 "/Front panel SFP+s/ETH10_SCL")) (pad AN6 smd circle (at -11.5 15.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 481 "/Front panel SFP+s/ETH10_TX_DISABLE")) (pad AP6 smd circle (at -11.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 498 "/Front panel SFP+s/ETH10_SDA")) (pad AP5 smd circle (at -12.5 16.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 489 "/Front panel SFP+s/ETH10_RX_LOS")) (pad AA8 smd circle (at -9.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 244 "/Zynq CPU/ARM_MIO0")) (pad AA7 smd circle (at -10.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 243 "/Zynq CPU/ARM_MIO10")) (pad AB7 smd circle (at -10.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 246 "/Zynq CPU/ARM_MIO15")) (pad AB8 smd circle (at -9.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad Y11 smd circle (at -6.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad W10 smd circle (at -7.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad Y10 smd circle (at -7.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad W11 smd circle (at -6.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 500 "Net-(R44-Pad1)")) (pad Y12 smd circle (at -5.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad W12 smd circle (at -5.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AA9 smd circle (at -8.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AB10 smd circle (at -7.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AB9 smd circle (at -8.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AA10 smd circle (at -7.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AA11 smd circle (at -6.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AB11 smd circle (at -6.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AA12 smd circle (at -5.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AB12 smd circle (at -5.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad Y9 smd circle (at -8.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad Y8 smd circle (at -9.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 227 "/Zynq CPU/ARM_MIO12")) (pad W8 smd circle (at -9.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 234 "/Zynq CPU/ARM_MIO13")) (pad W9 smd circle (at -8.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad W7 smd circle (at -10.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad Y7 smd circle (at -10.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AC3 smd circle (at -14.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 253 "/Zynq CPU/ARM_GPIO1")) (pad AC4 smd circle (at -13.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 248 "/Zynq CPU/ARM_MIO49")) (pad AB3 smd circle (at -14.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad AD3 smd circle (at -14.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 283 "/Zynq CPU/ZYNQ_TX0_P")) (pad AD4 smd circle (at -13.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 259 "/Zynq CPU/ZYNQ_RX5_N")) (pad AB4 smd circle (at -13.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 252 "/Zynq CPU/ARM_GPIO3")) (pad AC5 smd circle (at -12.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AD5 smd circle (at -12.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 258 "/Zynq CPU/ZYNQ_RX5_P")) (pad AB5 smd circle (at -12.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AB6 smd circle (at -11.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 228 "/Zynq CPU/ARM_MIO14")) (pad AD2 smd circle (at -15.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AE2 smd circle (at -15.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 260 "/Zynq CPU/ZYNQ_TX1_P")) (pad AF2 smd circle (at -15.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 261 "/Zynq CPU/ZYNQ_TX1_N")) (pad AD1 smd circle (at -16.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 301 "/Zynq CPU/ZYNQ_TX5_P")) (pad AE1 smd circle (at -16.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 284 "/Zynq CPU/ZYNQ_TX5_N")) (pad AF1 smd circle (at -16.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad AG1 smd circle (at -16.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 270 "/Zynq CPU/ZYNQ_TX4_P")) (pad AG2 smd circle (at -15.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 266 "/Zynq CPU/ZYNQ_TX2_N")) (pad AF4 smd circle (at -13.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 300 "/Zynq CPU/ZYNQ_TX7_P")) (pad AE4 smd circle (at -13.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad AE3 smd circle (at -14.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 282 "/Zynq CPU/ZYNQ_TX0_N")) (pad AE5 smd circle (at -12.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 501 "/Clocks / buffers/CLK_156MHZ_2_P")) (pad AF5 smd circle (at -12.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 502 "/Clocks / buffers/CLK_156MHZ_2_N")) (pad AF3 smd circle (at -14.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 267 "/Zynq CPU/ZYNQ_TX2_P")) (pad AG3 smd circle (at -14.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AG4 smd circle (at -13.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 299 "/Zynq CPU/ZYNQ_TX7_N")) (pad AG5 smd circle (at -12.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 269 "/Zynq CPU/ZYNQ_TX3_N")) (pad AC1 smd circle (at -16.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AB2 smd circle (at -15.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 250 "/Zynq CPU/ARM_MIO34")) (pad AC2 smd circle (at -15.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AB1 smd circle (at -16.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 254 "/Zynq CPU/ARM_MIO32")) (pad W4 smd circle (at -13.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 221 "/Zynq CPU/ARM_MIO52")) (pad Y3 smd circle (at -14.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 239 "/Zynq CPU/ARM_MIO31")) (pad W3 smd circle (at -14.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 251 "/Zynq CPU/ARM_GPIO2")) (pad Y4 smd circle (at -13.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AA3 smd circle (at -14.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 241 "/Zynq CPU/ARM_MIO37")) (pad AA4 smd circle (at -13.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 240 "/Zynq CPU/ARM_MIO53")) (pad Y1 smd circle (at -16.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 233 "/Zynq CPU/ARM_MIO30")) (pad W1 smd circle (at -16.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 224 "/Zynq CPU/ARM_MIO28")) (pad W2 smd circle (at -15.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad Y2 smd circle (at -15.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 232 "/Zynq CPU/ARM_MIO36")) (pad AA1 smd circle (at -16.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AA2 smd circle (at -15.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 249 "/Zynq CPU/ARM_MIO39")) (pad W5 smd circle (at -12.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 225 "/Zynq CPU/ARM_MIO9")) (pad Y5 smd circle (at -12.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 247 "/Zynq CPU/ARM_MIO29")) (pad W6 smd circle (at -11.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 229 "/Zynq CPU/ARM_MIO11")) (pad Y6 smd circle (at -11.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 238 "/Zynq CPU/ARM_MIO33")) (pad AA5 smd circle (at -12.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 289 "/Zynq CPU/ARM_GPIO0")) (pad AA6 smd circle (at -11.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad AD12 smd circle (at -5.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad AD10 smd circle (at -7.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 302 "/Zynq CPU/ZYNQ_DONE")) (pad AC12 smd circle (at -5.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AC10 smd circle (at -7.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad AC11 smd circle (at -6.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AE12 smd circle (at -5.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 189 "/Backplane Connector/JTAG_TCK")) (pad AF12 smd circle (at -5.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 237 "/Zynq CPU/ZYNQ_POR_B")) (pad AD11 smd circle (at -6.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AG11 smd circle (at -6.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 184 "/Zynq CPU/ZYNQ_JTAG_TMS")) (pad AH10 smd circle (at -7.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AG12 smd circle (at -5.5 9.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 185 "/Zynq CPU/ZYNQ_JTAG_TCK")) (pad AH11 smd circle (at -6.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 293 "/Zynq CPU/ZYNQ_PROG_B")) (pad AH12 smd circle (at -5.5 10.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad AF11 smd circle (at -6.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad AF10 smd circle (at -7.5 8.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 230 "/Zynq CPU/ZYNQ_PS_SRST_B")) (pad AE11 smd circle (at -6.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad AE10 smd circle (at -7.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 242 "/Zynq CPU/ZYNQ_INIT_B")) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_bga/spbgan324.wrl (at (xyz 0 0 0)) (scale (xyz 2.25 2.25 1)) (rotate (xyz 0 0 180)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47BE4) (at 123.7 112.95 270) (path /5685DE78/56ACE537) (fp_text reference C190 (at 2.325 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71214) (at 104.203 106.95 180) (path /5685DE78/56AD2760) (fp_text reference R49 (at 4.253 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 369 "/QDR-II+ SRAM/RAM_WD0")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7124A) (at 101.975 108.45 180) (path /5685DE78/56AD45B3) (fp_text reference R58 (at 4.175 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 372 "/QDR-II+ SRAM/RAM_WD9")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:BGA_165_11x15_FULLARRAY_1MM (layer F.Cu) (tedit 56A48F04) (tstamp 56A679A5) (at 114.6 112.95 180) (path /5685DE78/5686674E) (fp_text reference U2 (at 6.25 8.55 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value CY7C1145KV18-400BZXC (at 0 9.75 180) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -5.5 -8) (end -7 -6.5) (layer F.SilkS) (width 0.15)) (fp_line (start -7 8) (end 7 8) (layer F.SilkS) (width 0.15)) (fp_line (start -5.5 -8) (end 7 -8) (layer F.SilkS) (width 0.15)) (fp_line (start 7 -8) (end 7 8) (layer F.SilkS) (width 0.15)) (fp_line (start -7 -6.5) (end -7 8) (layer F.SilkS) (width 0.15)) (pad A1 smd circle (at -5 -7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 343 "/QDR-II+ SRAM/RAM_RCLK_N")) (pad A2 smd circle (at -4 -7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 634 "/QDR-II+ SRAM/RAM_A20")) (pad A3 smd circle (at -3 -7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 632 "/QDR-II+ SRAM/RAM_A18")) (pad A4 smd circle (at -2 -7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 320 "/QDR-II+ SRAM/RAM_WR_N")) (pad A5 smd circle (at -1 -7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 368 "/QDR-II+ SRAM/RAM_DM2")) (pad A6 smd circle (at 0 -7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 406 "/QDR-II+ SRAM/RAM_CLK_N")) (pad A7 smd circle (at 1 -7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 438 "/QDR-II+ SRAM/RAM_DM1")) (pad A8 smd circle (at 2 -7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 376 "/QDR-II+ SRAM/RAM_RD_N")) (pad A9 smd circle (at 3 -7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 403 "/QDR-II+ SRAM/RAM_A17")) (pad A10 smd circle (at 4 -7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 633 "/QDR-II+ SRAM/RAM_A19")) (pad A11 smd circle (at 5 -7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 355 "/QDR-II+ SRAM/RAM_RCLK_P")) (pad B1 smd circle (at -5 -6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 363 "/QDR-II+ SRAM/RAM_RD27")) (pad B2 smd circle (at -4 -6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 345 "/QDR-II+ SRAM/RAM_RD18")) (pad B3 smd circle (at -3 -6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 333 "/QDR-II+ SRAM/RAM_WD18")) (pad B4 smd circle (at -2 -6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 400 "/QDR-II+ SRAM/RAM_A16")) (pad B5 smd circle (at -1 -6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 318 "/QDR-II+ SRAM/RAM_DM3")) (pad B6 smd circle (at 0 -6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 405 "/QDR-II+ SRAM/RAM_CLK_P")) (pad B7 smd circle (at 1 -6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 439 "/QDR-II+ SRAM/RAM_DM0")) (pad B8 smd circle (at 2 -6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 402 "/QDR-II+ SRAM/RAM_A15")) (pad B9 smd circle (at 3 -6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 417 "/QDR-II+ SRAM/RAM_WD17")) (pad B10 smd circle (at 4 -6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 323 "/QDR-II+ SRAM/RAM_RD17")) (pad B11 smd circle (at 5 -6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 348 "/QDR-II+ SRAM/RAM_RD8")) (pad C3 smd circle (at -3 -5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 311 "/QDR-II+ SRAM/RAM_WD19")) (pad C2 smd circle (at -4 -5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 342 "/QDR-II+ SRAM/RAM_RD28")) (pad D3 smd circle (at -3 -4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 344 "/QDR-II+ SRAM/RAM_RD19")) (pad C1 smd circle (at -5 -5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 314 "/QDR-II+ SRAM/RAM_WD27")) (pad D1 smd circle (at -5 -4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 412 "/QDR-II+ SRAM/RAM_WD28")) (pad D2 smd circle (at -4 -4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 313 "/QDR-II+ SRAM/RAM_WD20")) (pad C4 smd circle (at -2 -5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad D4 smd circle (at -2 -4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad D9 smd circle (at 3 -4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 322 "/QDR-II+ SRAM/RAM_RD16")) (pad D11 smd circle (at 5 -4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 374 "/QDR-II+ SRAM/RAM_WD7")) (pad D8 smd circle (at 2 -4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad C8 smd circle (at 2 -5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad C9 smd circle (at 3 -5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 426 "/QDR-II+ SRAM/RAM_WD16")) (pad C10 smd circle (at 4 -5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 353 "/QDR-II+ SRAM/RAM_RD7")) (pad C11 smd circle (at 5 -5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 373 "/QDR-II+ SRAM/RAM_WD8")) (pad D10 smd circle (at 4 -4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 306 "/QDR-II+ SRAM/RAM_WD15")) (pad D7 smd circle (at 1 -4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad D6 smd circle (at 0 -4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad C5 smd circle (at -1 -5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 396 "/QDR-II+ SRAM/RAM_A14")) (pad C6 smd circle (at 0 -5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C7 smd circle (at 1 -5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 399 "/QDR-II+ SRAM/RAM_A13")) (pad D5 smd circle (at -1 -4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad E3 smd circle (at -3 -3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 321 "/QDR-II+ SRAM/RAM_RD20")) (pad E2 smd circle (at -4 -3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 331 "/QDR-II+ SRAM/RAM_WD29")) (pad F3 smd circle (at -3 -2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 416 "/QDR-II+ SRAM/RAM_WD21")) (pad E1 smd circle (at -5 -3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 339 "/QDR-II+ SRAM/RAM_RD29")) (pad F1 smd circle (at -5 -2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 336 "/QDR-II+ SRAM/RAM_RD30")) (pad F2 smd circle (at -4 -2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 325 "/QDR-II+ SRAM/RAM_RD21")) (pad E4 smd circle (at -2 -3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad F4 smd circle (at -2 -2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad F9 smd circle (at 3 -2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 308 "/QDR-II+ SRAM/RAM_WD14")) (pad F11 smd circle (at 5 -2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 357 "/QDR-II+ SRAM/RAM_RD5")) (pad F8 smd circle (at 2 -2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad E8 smd circle (at 2 -3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad E9 smd circle (at 3 -3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 346 "/QDR-II+ SRAM/RAM_RD15")) (pad E10 smd circle (at 4 -3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 436 "/QDR-II+ SRAM/RAM_WD6")) (pad E11 smd circle (at 5 -3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 370 "/QDR-II+ SRAM/RAM_RD6")) (pad F10 smd circle (at 4 -2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 351 "/QDR-II+ SRAM/RAM_RD14")) (pad F7 smd circle (at 1 -2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad F6 smd circle (at 0 -2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad E5 smd circle (at -1 -3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad E6 smd circle (at 0 -3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad E7 smd circle (at 1 -3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad F5 smd circle (at -1 -2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad G3 smd circle (at -3 -1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 361 "/QDR-II+ SRAM/RAM_RD22")) (pad G2 smd circle (at -4 -1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 329 "/QDR-II+ SRAM/RAM_WD22")) (pad H3 smd circle (at -3 0 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad G1 smd circle (at -5 -1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 332 "/QDR-II+ SRAM/RAM_WD30")) (pad H1 smd circle (at -5 0 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad H2 smd circle (at -4 0 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad G4 smd circle (at -2 -1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad H4 smd circle (at -2 0 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad H9 smd circle (at 3 0 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad H11 smd circle (at 5 0 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 503 "/QDR-II+ SRAM/RAM_RZQ")) (pad H8 smd circle (at 2 0 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad G8 smd circle (at 2 -1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad G9 smd circle (at 3 -1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 350 "/QDR-II+ SRAM/RAM_RD13")) (pad G10 smd circle (at 4 -1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 309 "/QDR-II+ SRAM/RAM_WD13")) (pad G11 smd circle (at 5 -1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 317 "/QDR-II+ SRAM/RAM_WD5")) (pad H10 smd circle (at 4 0 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad H7 smd circle (at 1 0 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad H6 smd circle (at 0 0 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G5 smd circle (at -1 -1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad G6 smd circle (at 0 -1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G7 smd circle (at 1 -1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad H5 smd circle (at -1 0 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad J1 smd circle (at -5 1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 310 "/QDR-II+ SRAM/RAM_WD31")) (pad K1 smd circle (at -5 2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 359 "/QDR-II+ SRAM/RAM_RD32")) (pad K2 smd circle (at -4 2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 303 "/QDR-II+ SRAM/RAM_WD32")) (pad J2 smd circle (at -4 1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 358 "/QDR-II+ SRAM/RAM_RD31")) (pad K5 smd circle (at -1 2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad K3 smd circle (at -3 2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 360 "/QDR-II+ SRAM/RAM_RD23")) (pad J4 smd circle (at -2 1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad K4 smd circle (at -2 2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad J3 smd circle (at -3 1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 328 "/QDR-II+ SRAM/RAM_WD23")) (pad J5 smd circle (at -1 1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad J8 smd circle (at 2 1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad K8 smd circle (at 2 2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad K7 smd circle (at 1 2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad K6 smd circle (at 0 2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J6 smd circle (at 0 1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J7 smd circle (at 1 1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad K10 smd circle (at 4 2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 315 "/QDR-II+ SRAM/RAM_WD3")) (pad K9 smd circle (at 3 2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 347 "/QDR-II+ SRAM/RAM_RD12")) (pad K11 smd circle (at 5 2 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 371 "/QDR-II+ SRAM/RAM_RD3")) (pad J10 smd circle (at 4 1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 349 "/QDR-II+ SRAM/RAM_RD4")) (pad J11 smd circle (at 5 1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 427 "/QDR-II+ SRAM/RAM_WD4")) (pad J9 smd circle (at 3 1 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 326 "/QDR-II+ SRAM/RAM_WD12")) (pad L1 smd circle (at -5 3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 340 "/QDR-II+ SRAM/RAM_RD33")) (pad M1 smd circle (at -5 4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 337 "/QDR-II+ SRAM/RAM_WD33")) (pad M2 smd circle (at -4 4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 341 "/QDR-II+ SRAM/RAM_RD34")) (pad L2 smd circle (at -4 3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 362 "/QDR-II+ SRAM/RAM_RD24")) (pad M5 smd circle (at -1 4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M3 smd circle (at -3 4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 338 "/QDR-II+ SRAM/RAM_WD25")) (pad L4 smd circle (at -2 3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad M4 smd circle (at -2 4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad L3 smd circle (at -3 3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 312 "/QDR-II+ SRAM/RAM_WD24")) (pad L5 smd circle (at -1 3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad L8 smd circle (at 2 3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad M8 smd circle (at 2 4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M7 smd circle (at 1 4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M6 smd circle (at 0 4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad L6 smd circle (at 0 3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad L7 smd circle (at 1 3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M10 smd circle (at 4 4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 378 "/QDR-II+ SRAM/RAM_RD1")) (pad M9 smd circle (at 3 4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 316 "/QDR-II+ SRAM/RAM_WD10")) (pad M11 smd circle (at 5 4 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 319 "/QDR-II+ SRAM/RAM_WD2")) (pad L10 smd circle (at 4 3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 330 "/QDR-II+ SRAM/RAM_RD11")) (pad L11 smd circle (at 5 3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 352 "/QDR-II+ SRAM/RAM_RD2")) (pad L9 smd circle (at 3 3 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 327 "/QDR-II+ SRAM/RAM_WD11")) (pad N1 smd circle (at -5 5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 335 "/QDR-II+ SRAM/RAM_WD34")) (pad N3 smd circle (at -3 5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 324 "/QDR-II+ SRAM/RAM_RD25")) (pad R3 smd circle (at -3 7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 449 "/QDR-II+ SRAM/RAM_A5")) (pad P2 smd circle (at -4 6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 375 "/QDR-II+ SRAM/RAM_WD35")) (pad R2 smd circle (at -4 7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 395 "/FPGA Config/RAM_TCK")) (pad P3 smd circle (at -3 6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 334 "/QDR-II+ SRAM/RAM_RD26")) (pad N2 smd circle (at -4 5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 304 "/QDR-II+ SRAM/RAM_WD26")) (pad P1 smd circle (at -5 6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 377 "/QDR-II+ SRAM/RAM_RD35")) (pad R1 smd circle (at -5 7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 504 "Net-(R2-Pad1)")) (pad R5 smd circle (at -1 7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 409 "/QDR-II+ SRAM/RAM_A3")) (pad P4 smd circle (at -2 6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 447 "/QDR-II+ SRAM/RAM_A9")) (pad P5 smd circle (at -1 6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 452 "/QDR-II+ SRAM/RAM_A8")) (pad N5 smd circle (at -1 5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 401 "/QDR-II+ SRAM/RAM_A12")) (pad N4 smd circle (at -2 5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad R4 smd circle (at -2 7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 408 "/QDR-II+ SRAM/RAM_A4")) (pad N8 smd circle (at 2 5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad R9 smd circle (at 3 7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 448 "/QDR-II+ SRAM/RAM_A0")) (pad N9 smd circle (at 3 5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 354 "/QDR-II+ SRAM/RAM_RD10")) (pad R6 smd circle (at 0 7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad P8 smd circle (at 2 6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 445 "/QDR-II+ SRAM/RAM_A6")) (pad R8 smd circle (at 2 7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 407 "/QDR-II+ SRAM/RAM_A1")) (pad R7 smd circle (at 1 7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 404 "/QDR-II+ SRAM/RAM_A2")) (pad P9 smd circle (at 3 6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 356 "/QDR-II+ SRAM/RAM_RD9")) (pad N11 smd circle (at 5 5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 367 "/QDR-II+ SRAM/RAM_WD1")) (pad N10 smd circle (at 4 5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 372 "/QDR-II+ SRAM/RAM_WD9")) (pad N6 smd circle (at 0 5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 410 "/QDR-II+ SRAM/RAM_A11")) (pad N7 smd circle (at 1 5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 446 "/QDR-II+ SRAM/RAM_A10")) (pad P6 smd circle (at 0 6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 380 "/QDR-II+ SRAM/RAM_RVALID")) (pad P7 smd circle (at 1 6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 451 "/QDR-II+ SRAM/RAM_A7")) (pad R11 smd circle (at 5 7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 442 "/FPGA Config/RAM_TDI")) (pad R10 smd circle (at 4 7 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 392 "/FPGA Config/RAM_TMS")) (pad P10 smd circle (at 4 6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 369 "/QDR-II+ SRAM/RAM_WD0")) (pad P11 smd circle (at 5 6 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 379 "/QDR-II+ SRAM/RAM_RD0")) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_bga/mbga100.wrl (at (xyz 0 0 0)) (scale (xyz 2.5 2.25 1)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A47FE0) (at 56.15 121 180) (path /5685DDE2/56B88F94) (fp_text reference C361 (at 0 -1.5 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "22 uF" (at 0.25 2 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0 180) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 94 "/Power Supply/1V5_RAW")) (pad 2 smd rect (at 0.9 0 180) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47A82) (at 92.43 65.32) (path /569AEE1D/56A983B9) (fp_text reference C131 (at 2.58 -0.03) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 625 "/Clocks / buffers/Q2_156_N")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 79 "/Clocks / buffers/CLK_156MHZ_1_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B7BF19) (tstamp 56A481BA) (at 94.45 78.25) (path /5685DE62/56A7A621) (fp_text reference C440 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 119 "/XAUI PHY/XAUI_TXD1_C_N")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 120 "/XAUI PHY/XAUI_TXD1_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B7A33A) (tstamp 56A481C6) (at 94.05 80.5) (path /5685DE62/56A7AC5C) (fp_text reference C442 (at 0 0.9) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 123 "/XAUI PHY/XAUI_TXD3_C_N")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 124 "/XAUI PHY/XAUI_TXD3_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B7A33C) (tstamp 56A481C0) (at 94.05 81.2) (path /5685DE62/56A7AC56) (fp_text reference C441 (at -0.05 -0.95) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 121 "/XAUI PHY/XAUI_TXD3_C_P")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 122 "/XAUI PHY/XAUI_TXD3_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:BGA_144_13x13_FULLARRAY_1MM (layer F.Cu) (tedit 56A49178) (tstamp 56A69A74) (at 84.25 97.5 180) (path /5685DE62/5687940F) (fp_text reference U1 (at -0.05 7.8 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value TLK10232 (at 0 8.75 180) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start 7 -7) (end -5.5 -7) (layer F.SilkS) (width 0.15)) (fp_line (start 7 7) (end 7 -7) (layer F.SilkS) (width 0.15)) (fp_line (start -7 7) (end 7 7) (layer F.SilkS) (width 0.15)) (fp_line (start -7 -5.5) (end -7 7) (layer F.SilkS) (width 0.15)) (fp_line (start -5.5 -7) (end -7 -5.5) (layer F.SilkS) (width 0.15)) (pad A1 smd circle (at -5.5 -5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 117 "/XAUI PHY/XAUI_TXD1_C_P")) (pad A2 smd circle (at -4.5 -5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A3 smd circle (at -3.5 -5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 135 "/XAUI PHY/XAUI_TXD0_C_N")) (pad A4 smd circle (at -2.5 -5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 133 "/XAUI PHY/XAUI_TXD0_C_P")) (pad A5 smd circle (at -1.5 -5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A6 smd circle (at -0.5 -5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 141 "/XAUI PHY/XAUI_RXD0_C_P")) (pad A7 smd circle (at 0.5 -5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 143 "/XAUI PHY/XAUI_RXD0_C_N")) (pad A8 smd circle (at 1.5 -5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 411 "/XAUI PHY/PHY_PDWRDN_N")) (pad A9 smd circle (at 2.5 -5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad A10 smd circle (at 3.5 -5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad A11 smd circle (at 4.5 -5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A12 smd circle (at 5.5 -5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 505 "/Front panel SFP+s/ETH12_RX_N")) (pad B1 smd circle (at -5.5 -4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 119 "/XAUI PHY/XAUI_TXD1_C_N")) (pad B2 smd circle (at -4.5 -4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 137 "/XAUI PHY/XAUI_TXD2_C_P")) (pad B3 smd circle (at -3.5 -4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B4 smd circle (at -2.5 -4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B5 smd circle (at -1.5 -4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 125 "/XAUI PHY/XAUI_RXD1_C_P")) (pad B6 smd circle (at -0.5 -4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 127 "/XAUI PHY/XAUI_RXD1_C_N")) (pad B7 smd circle (at 0.5 -4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B8 smd circle (at 1.5 -4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 429 "/XAUI PHY/PHY_JTAG_TMS")) (pad B9 smd circle (at 2.5 -4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 418 "/XAUI PHY/PHY_PRBS_EN")) (pad B10 smd circle (at 3.5 -4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 431 "/XAUI PHY/PHY_LS_OK_IN")) (pad B11 smd circle (at 4.5 -4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B12 smd circle (at 5.5 -4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 506 "/Front panel SFP+s/ETH12_RX_P")) (pad C3 smd circle (at -3.5 -3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 5 "/XAUI PHY/1V5_A")) (pad C2 smd circle (at -4.5 -3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 139 "/XAUI PHY/XAUI_TXD2_C_N")) (pad D4 smd circle (at -2.5 -2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C1 smd circle (at -5.5 -3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad D1 smd circle (at -5.5 -2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 121 "/XAUI PHY/XAUI_TXD3_C_P")) (pad D3 smd circle (at -3.5 -2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad C4 smd circle (at -2.5 -3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 145 "/XAUI PHY/XAUI_RXD2_C_P")) (pad D2 smd circle (at -4.5 -2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 1 "/XAUI PHY/1V0_A")) (pad C12 smd circle (at 5.5 -3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad D9 smd circle (at 2.5 -2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 414 "/XAUI PHY/PHY_LS_OK_OUT")) (pad D11 smd circle (at 4.5 -2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad D12 smd circle (at 5.5 -2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 507 "/Front panel SFP+s/ETH12_TX_P")) (pad C9 smd circle (at 2.5 -3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C10 smd circle (at 3.5 -3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C11 smd circle (at 4.5 -3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D10 smd circle (at 3.5 -2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad D8 smd circle (at 1.5 -2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 430 "/XAUI PHY/PHY_JTAG_TCK")) (pad D6 smd circle (at -0.5 -2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 508 "Net-(R221-Pad1)")) (pad D5 smd circle (at -1.5 -2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad C6 smd circle (at -0.5 -3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad C7 smd circle (at 0.5 -3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad C8 smd circle (at 1.5 -3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 415 "/XAUI PHY/PHY_JTAG_TDI")) (pad C5 smd circle (at -1.5 -3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 147 "/XAUI PHY/XAUI_RXD2_C_N")) (pad D7 smd circle (at 0.5 -2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad E11 smd circle (at 4.5 -1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 5 "/XAUI PHY/1V5_A")) (pad F12 smd circle (at 5.5 -0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad F11 smd circle (at 4.5 -0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 1 "/XAUI PHY/1V0_A")) (pad E12 smd circle (at 5.5 -1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 509 "/Front panel SFP+s/ETH12_TX_N")) (pad F10 smd circle (at 3.5 -0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad H10 smd circle (at 3.5 1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 398 "/XAUI PHY/PHY_MDIO_MODE")) (pad G10 smd circle (at 3.5 0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 1 "/XAUI PHY/1V0_A")) (pad H9 smd circle (at 2.5 1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad H8 smd circle (at 1.5 1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad G9 smd circle (at 2.5 0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 423 "/XAUI PHY/PHY_MDIO_A1")) (pad G8 smd circle (at 1.5 0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad E8 smd circle (at 1.5 -1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad F9 smd circle (at 2.5 -0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 "/XAUI PHY/1V0_T")) (pad F8 smd circle (at 1.5 -0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad E9 smd circle (at 2.5 -1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 413 "/XAUI PHY/PHY_LOS")) (pad G12 smd circle (at 5.5 0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 11 "/XAUI PHY/UNUSED_4_N")) (pad H11 smd circle (at 4.5 1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad E10 smd circle (at 3.5 -1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 425 "/XAUI PHY/PHY_MDIO_A0")) (pad G11 smd circle (at 4.5 0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad H12 smd circle (at 5.5 1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 13 "/XAUI PHY/UNUSED_4_P")) (pad F7 smd circle (at 0.5 -0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad E7 smd circle (at 0.5 -1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad E6 smd circle (at -0.5 -1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad F6 smd circle (at -0.5 -0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad F2 smd circle (at -4.5 -0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 1 "/XAUI PHY/1V0_A")) (pad E2 smd circle (at -4.5 -1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad E1 smd circle (at -5.5 -1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 123 "/XAUI PHY/XAUI_TXD3_C_N")) (pad F1 smd circle (at -5.5 -0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad H2 smd circle (at -4.5 1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad H1 smd circle (at -5.5 1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 25 "/XAUI PHY/UNUSED_0_P")) (pad H4 smd circle (at -2.5 1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G2 smd circle (at -4.5 0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 1 "/XAUI PHY/1V0_A")) (pad G1 smd circle (at -5.5 0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad H3 smd circle (at -3.5 1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E4 smd circle (at -2.5 -1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad F3 smd circle (at -3.5 -0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 129 "/XAUI PHY/XAUI_RXD3_C_P")) (pad F5 smd circle (at -1.5 -0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad E5 smd circle (at -1.5 -1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 397 "/XAUI PHY/PHY_JTAG_TRST_N")) (pad E3 smd circle (at -3.5 -1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 131 "/XAUI PHY/XAUI_RXD3_C_N")) (pad F4 smd circle (at -2.5 -0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 "/XAUI PHY/1V0_T")) (pad G3 smd circle (at -3.5 0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G4 smd circle (at -2.5 0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 "/XAUI PHY/1V0_T")) (pad H5 smd circle (at -1.5 1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 424 "/XAUI PHY/PHY_RESET_N")) (pad H6 smd circle (at -0.5 1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad G6 smd circle (at -0.5 0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad G7 smd circle (at 0.5 0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G5 smd circle (at -1.5 0.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad H7 smd circle (at 0.5 1.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad J11 smd circle (at 4.5 2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 5 "/XAUI PHY/1V5_A")) (pad K12 smd circle (at 5.5 3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad K11 smd circle (at 4.5 3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J12 smd circle (at 5.5 2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad K10 smd circle (at 3.5 3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 8 "/XAUI PHY/UNUSED_5_N")) (pad M10 smd circle (at 3.5 5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 76 "/Clocks / buffers/CLK_156MHZ_0_P")) (pad L10 smd circle (at 3.5 4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 510 "/XAUI PHY/PHY_TEST_EN")) (pad M9 smd circle (at 2.5 5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 435 "/XAUI PHY/PHY_MODE")) (pad M8 smd circle (at 1.5 5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 421 "/XAUI PHY/PHY_MDIO_A4")) (pad L9 smd circle (at 2.5 4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 434 "/XAUI PHY/PHY_MDIO_A2")) (pad L8 smd circle (at 1.5 4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad J8 smd circle (at 1.5 2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 422 "/XAUI PHY/PHY_MDC")) (pad K9 smd circle (at 2.5 3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 10 "/XAUI PHY/UNUSED_5_P")) (pad K8 smd circle (at 1.5 3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad J9 smd circle (at 2.5 2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 432 "/XAUI PHY/PHY_PRBS_PASS")) (pad L12 smd circle (at 5.5 4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad M11 smd circle (at 4.5 5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 77 "/Clocks / buffers/CLK_156MHZ_0_N")) (pad J10 smd circle (at 3.5 2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 428 "/XAUI PHY/PHY_GPIO")) (pad L11 smd circle (at 4.5 4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M12 smd circle (at 5.5 5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad K7 smd circle (at 0.5 3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad J7 smd circle (at 0.5 2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 420 "/XAUI PHY/PHY_MDIO")) (pad J6 smd circle (at -0.5 2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 419 "/XAUI PHY/PHY_MDIO_A3")) (pad K6 smd circle (at -0.5 3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad K2 smd circle (at -4.5 3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 22 "/XAUI PHY/UNUSED_1_P")) (pad J2 smd circle (at -4.5 2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 1 "/XAUI PHY/1V0_A")) (pad J1 smd circle (at -5.5 2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 23 "/XAUI PHY/UNUSED_0_N")) (pad K1 smd circle (at -5.5 3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M2 smd circle (at -4.5 5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M1 smd circle (at -5.5 5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 17 "/XAUI PHY/UNUSED_2_N")) (pad M4 smd circle (at -2.5 5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 14 "/XAUI PHY/UNUSED_3_N")) (pad L2 smd circle (at -4.5 4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 20 "/XAUI PHY/UNUSED_1_N")) (pad L1 smd circle (at -5.5 4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 19 "/XAUI PHY/UNUSED_2_P")) (pad M3 smd circle (at -3.5 5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 16 "/XAUI PHY/UNUSED_3_P")) (pad J4 smd circle (at -2.5 2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad K3 smd circle (at -3.5 3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 5 "/XAUI PHY/1V5_A")) (pad K5 smd circle (at -1.5 3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad J5 smd circle (at -1.5 2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J3 smd circle (at -3.5 2.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad K4 smd circle (at -2.5 3.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad L3 smd circle (at -3.5 4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad L4 smd circle (at -2.5 4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M5 smd circle (at -1.5 5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M6 smd circle (at -0.5 5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad L6 smd circle (at -0.5 4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad L7 smd circle (at 0.5 4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad L5 smd circle (at -1.5 4.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad M7 smd circle (at 0.5 5.5 180) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_bga/tfbga144.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:CONN_SFP+_AMPHENOL_UE76_A10_2000T (layer F.Cu) (tedit 56A49BC9) (tstamp 56A6A8D7) (at 62.5 58.75) (path /5685DE45/56A44D46) (fp_text reference J5 (at -6.15 -5.3) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value CONN_SFP_HOST (at 0 8.25) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -4 -6) (end 4 -6) (layer F.CrtYd) (width 0.15)) (fp_line (start 0.9 -4.8) (end 0.9 4.8) (layer F.CrtYd) (width 0.15)) (fp_line (start -4 6) (end 4 6) (layer F.CrtYd) (width 0.15)) (pad 1 smd rect (at -3.2 -3.4) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at -3.2 -2.6) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 476 "/Front panel SFP+s/ETH9_TX_FAULT")) (pad 3 smd rect (at -3.2 -1.8) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 477 "/Front panel SFP+s/ETH9_TX_DISABLE")) (pad 4 smd rect (at -3.2 -1) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 474 "/Front panel SFP+s/ETH9_SDA")) (pad 7 smd rect (at -3.2 1.4) (size 2 0.5) (layers F.Cu F.Paste F.Mask)) (pad 6 smd rect (at -3.2 0.6) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 488 "/Front panel SFP+s/ETH9_PRESENT_N")) (pad 5 smd rect (at -3.2 -0.2) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 495 "/Front panel SFP+s/ETH9_SCL")) (pad 8 smd rect (at -3.2 2.2) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 499 "/Front panel SFP+s/ETH9_RX_LOS")) (pad 10 smd rect (at -3.2 3.8) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 9 smd rect (at -3.2 3) (size 2 0.5) (layers F.Cu F.Paste F.Mask)) (pad 17 smd rect (at 5 -1.4) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 18 smd rect (at 5 -2.2) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 456 "/Front panel SFP+s/ETH9_TX_P")) (pad 19 smd rect (at 5 -3) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 457 "/Front panel SFP+s/ETH9_TX_N")) (pad 20 smd rect (at 5 -3.8) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 14 smd rect (at 5 1) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 15 smd rect (at 5 0.2) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 48 "/Front panel SFP+s/ETH9_VDD_RX")) (pad 11 smd rect (at 5 3.4) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 16 smd rect (at 5 -0.6) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 50 "/Front panel SFP+s/ETH9_VDD_TX")) (pad 13 smd rect (at 5 1.8) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 464 "/Front panel SFP+s/ETH9_RX_P")) (pad 12 smd rect (at 5 2.6) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 453 "/Front panel SFP+s/ETH9_RX_N")) (pad "" np_thru_hole circle (at 0.9 -4.8) (size 1.55 1.55) (drill 1.55) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at 0.9 4.8) (size 1.55 1.55) (drill 1.55) (layers *.Cu *.Mask F.SilkS)) (model /nfs4/share/models/Molex/UE76-A20-2000T.wrl (at (xyz 0.19 0 0)) (scale (xyz 0.3937 0.3937 0.3937)) (rotate (xyz 270 0 -90)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A711AE) (at 60.19 60.95) (path /5685DE45/56A69538) (fp_text reference R32 (at -2.35 0.2) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 4.7k (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 499 "/Front panel SFP+s/ETH9_RX_LOS")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:BGA_225_13x13_FULLARRAY_0.8MM (layer F.Cu) (tedit 55A194EE) (tstamp 56A4845D) (at 108.4 45.2 270) (path /56869E40/568A66BA) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U3 (at 7.8 -6.35 360) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value XC7Z010-1CLG225C (at -0.25 -10.25 270) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -6.75 6.75) (end -6.75 -6) (layer F.SilkS) (width 0.15)) (fp_line (start 6.75 6.75) (end -6.75 6.75) (layer F.SilkS) (width 0.15)) (fp_line (start 6.75 -7) (end 6.75 6.75) (layer F.SilkS) (width 0.15)) (fp_line (start -5.75 -7) (end 6.75 -7) (layer F.SilkS) (width 0.15)) (fp_line (start -6.75 -6) (end -5.75 -7) (layer F.SilkS) (width 0.15)) (pad A1 smd circle (at -5.6 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A2 smd circle (at -4.8 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad A3 smd circle (at -4 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad A4 smd circle (at -3.2 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad A5 smd circle (at -2.4 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 216 "/Zynq CPU/ARM_MIO1")) (pad A6 smd circle (at -1.6 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad A7 smd circle (at -0.8 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 217 "Net-(R211-Pad1)")) (pad A8 smd circle (at 0 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 218 "/Zynq CPU/ZYNQ_JMODE")) (pad A9 smd circle (at 0.8 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 219 "Net-(R209-Pad1)")) (pad A10 smd circle (at 1.6 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 220 "Net-(R208-Pad1)")) (pad A11 smd circle (at 2.4 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A12 smd circle (at 3.2 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 221 "/Zynq CPU/ARM_MIO52")) (pad A13 smd circle (at 4 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 222 "/Zynq CPU/ARM_MIO38")) (pad A14 smd circle (at 4.8 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 223 "/Zynq CPU/ARM_MIO35")) (pad A15 smd circle (at 5.6 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 224 "/Zynq CPU/ARM_MIO28")) (pad B1 smd circle (at -5.6 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad B2 smd circle (at -4.8 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad B3 smd circle (at -4 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad B4 smd circle (at -3.2 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad B5 smd circle (at -2.4 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 225 "/Zynq CPU/ARM_MIO9")) (pad B6 smd circle (at -1.6 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 226 "Net-(R206-Pad1)")) (pad B7 smd circle (at -0.8 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 227 "/Zynq CPU/ARM_MIO12")) (pad B8 smd circle (at 0 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B9 smd circle (at 0.8 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 228 "/Zynq CPU/ARM_MIO14")) (pad B10 smd circle (at 1.6 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 229 "/Zynq CPU/ARM_MIO11")) (pad B11 smd circle (at 2.4 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 230 "/Zynq CPU/ZYNQ_PS_SRST_B")) (pad B12 smd circle (at 3.2 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 231 "/Zynq CPU/ARM_MIO48")) (pad B13 smd circle (at 4 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad B14 smd circle (at 4.8 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 232 "/Zynq CPU/ARM_MIO36")) (pad B15 smd circle (at 5.6 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 233 "/Zynq CPU/ARM_MIO30")) (pad C1 smd circle (at -5.6 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad C2 smd circle (at -4.8 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad C3 smd circle (at -4 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad C4 smd circle (at -3.2 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad C5 smd circle (at -2.4 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad C6 smd circle (at -1.6 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 "/Zynq CPU/ARM_MIO13")) (pad C7 smd circle (at -0.8 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 235 "/Clocks / buffers/CLK_ZYNQ")) (pad C8 smd circle (at 0 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 236 "Net-(R210-Pad1)")) (pad C9 smd circle (at 0.8 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 237 "/Zynq CPU/ZYNQ_POR_B")) (pad C10 smd circle (at 1.6 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad C11 smd circle (at 2.4 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 238 "/Zynq CPU/ARM_MIO33")) (pad C12 smd circle (at 3.2 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 239 "/Zynq CPU/ARM_MIO31")) (pad C13 smd circle (at 4 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 240 "/Zynq CPU/ARM_MIO53")) (pad C14 smd circle (at 4.8 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 241 "/Zynq CPU/ARM_MIO37")) (pad C15 smd circle (at 5.6 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad D1 smd circle (at -5.6 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad D2 smd circle (at -4.8 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad D3 smd circle (at -4 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad D4 smd circle (at -3.2 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad D5 smd circle (at -2.4 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 242 "/Zynq CPU/ZYNQ_INIT_B")) (pad D6 smd circle (at -1.6 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 243 "/Zynq CPU/ARM_MIO10")) (pad D7 smd circle (at -0.8 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad D8 smd circle (at 0 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 244 "/Zynq CPU/ARM_MIO0")) (pad D9 smd circle (at 0.8 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 245 "Net-(R207-Pad1)")) (pad D10 smd circle (at 1.6 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 246 "/Zynq CPU/ARM_MIO15")) (pad D11 smd circle (at 2.4 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 247 "/Zynq CPU/ARM_MIO29")) (pad D12 smd circle (at 3.2 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad D13 smd circle (at 4 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 248 "/Zynq CPU/ARM_MIO49")) (pad D14 smd circle (at 4.8 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 249 "/Zynq CPU/ARM_MIO39")) (pad D15 smd circle (at 5.6 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 250 "/Zynq CPU/ARM_MIO34")) (pad E1 smd circle (at -5.6 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad E2 smd circle (at -4.8 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad E3 smd circle (at -4 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad E4 smd circle (at -3.2 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad E5 smd circle (at -2.4 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad E6 smd circle (at -1.6 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad E7 smd circle (at -0.8 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad E8 smd circle (at 0 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad E9 smd circle (at 0.8 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad E10 smd circle (at 1.6 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad E11 smd circle (at 2.4 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 251 "/Zynq CPU/ARM_GPIO2")) (pad E12 smd circle (at 3.2 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 252 "/Zynq CPU/ARM_GPIO3")) (pad E13 smd circle (at 4 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 253 "/Zynq CPU/ARM_GPIO1")) (pad E14 smd circle (at 4.8 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad E15 smd circle (at 5.6 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 254 "/Zynq CPU/ARM_MIO32")) (pad F15 smd circle (at 5.6 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad G15 smd circle (at 5.6 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad H15 smd circle (at 5.6 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad J15 smd circle (at 5.6 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 301 "/Zynq CPU/ZYNQ_TX5_P")) (pad K15 smd circle (at 5.6 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 284 "/Zynq CPU/ZYNQ_TX5_N")) (pad L15 smd circle (at 5.6 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 267 "/Zynq CPU/ZYNQ_TX2_P")) (pad M15 smd circle (at 5.6 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 266 "/Zynq CPU/ZYNQ_TX2_N")) (pad N15 smd circle (at 5.6 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad P15 smd circle (at 5.6 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 264 "/Zynq CPU/ZYNQ_TX6_P")) (pad R15 smd circle (at 5.6 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 265 "/Zynq CPU/ZYNQ_TX6_N")) (pad R1 smd circle (at -5.6 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad P1 smd circle (at -5.6 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad M1 smd circle (at -5.6 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad N1 smd circle (at -5.6 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad L1 smd circle (at -5.6 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad K1 smd circle (at -5.6 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad J1 smd circle (at -5.6 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad H1 smd circle (at -5.6 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad G1 smd circle (at -5.6 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad F1 smd circle (at -5.6 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad F2 smd circle (at -4.8 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad F3 smd circle (at -4 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad G3 smd circle (at -4 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G2 smd circle (at -4.8 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad H2 smd circle (at -4.8 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad H3 smd circle (at -4 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 262 "Net-(R201-Pad1)")) (pad J3 smd circle (at -4 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 263 "Net-(R200-Pad1)")) (pad K2 smd circle (at -4.8 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad J2 smd circle (at -4.8 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad K3 smd circle (at -4 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad L3 smd circle (at -4 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad L2 smd circle (at -4.8 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad M2 smd circle (at -4.8 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad M3 smd circle (at -4 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad N3 smd circle (at -4 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad N2 smd circle (at -4.8 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad P2 smd circle (at -4.8 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad P3 smd circle (at -4 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad R3 smd circle (at -4 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad R2 smd circle (at -4.8 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad R4 smd circle (at -3.2 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad P4 smd circle (at -3.2 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad N4 smd circle (at -3.2 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad M4 smd circle (at -3.2 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad L4 smd circle (at -3.2 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad K4 smd circle (at -3.2 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad R5 smd circle (at -2.4 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad P5 smd circle (at -2.4 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad P6 smd circle (at -1.6 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad R6 smd circle (at -1.6 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad R7 smd circle (at -0.8 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 290 "/Zynq CPU/ZYNQ_RX0_P")) (pad P7 smd circle (at -0.8 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad P8 smd circle (at 0 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 258 "/Zynq CPU/ZYNQ_RX5_P")) (pad R8 smd circle (at 0 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 277 "/Zynq CPU/ZYNQ_RX0_N")) (pad R9 smd circle (at 0.8 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad P9 smd circle (at 0.8 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 259 "/Zynq CPU/ZYNQ_RX5_N")) (pad P10 smd circle (at 1.6 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 255 "Net-(R205-Pad1)")) (pad R10 smd circle (at 1.6 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 212 "/Zynq CPU/ARM_JTAG_TMS")) (pad R11 smd circle (at 2.4 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 257 "/Zynq CPU/ZYNQ_RX1_N")) (pad P11 smd circle (at 2.4 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 256 "/Zynq CPU/ZYNQ_RX1_P")) (pad P12 smd circle (at 3.2 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad R12 smd circle (at 3.2 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 268 "/Zynq CPU/ZYNQ_TX3_P")) (pad R13 smd circle (at 4 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 269 "/Zynq CPU/ZYNQ_TX3_N")) (pad P13 smd circle (at 4 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 270 "/Zynq CPU/ZYNQ_TX4_P")) (pad R14 smd circle (at 4.8 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad P14 smd circle (at 4.8 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 271 "/Zynq CPU/ZYNQ_TX4_N")) (pad N14 smd circle (at 4.8 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 299 "/Zynq CPU/ZYNQ_TX7_N")) (pad M14 smd circle (at 4.8 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 261 "/Zynq CPU/ZYNQ_TX1_N")) (pad L14 smd circle (at 4.8 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 260 "/Zynq CPU/ZYNQ_TX1_P")) (pad K14 smd circle (at 4.8 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J14 smd circle (at 4.8 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 275 "/Zynq CPU/ZYNQ_RX2_N")) (pad H14 smd circle (at 4.8 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad G14 smd circle (at 4.8 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 276 "Net-(R195-Pad1)")) (pad F14 smd circle (at 4.8 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad F13 smd circle (at 4 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad G13 smd circle (at 4 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad H13 smd circle (at 4 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 282 "/Zynq CPU/ZYNQ_TX0_N")) (pad J13 smd circle (at 4 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 278 "/Zynq CPU/ZYNQ_RX2_P")) (pad K13 smd circle (at 4 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 286 "/Zynq CPU/ZYNQ_TXCLK_P")) (pad L13 smd circle (at 4 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 285 "/Zynq CPU/ZYNQ_TXCLK_N")) (pad M13 smd circle (at 4 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad N13 smd circle (at 4 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 300 "/Zynq CPU/ZYNQ_TX7_P")) (pad N12 smd circle (at 3.2 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 215 "/Zynq CPU/ARM_JTAG_TDI")) (pad N11 smd circle (at 2.4 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 213 "/Zynq CPU/ARM_JTAG_TCK")) (pad N10 smd circle (at 1.6 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad N9 smd circle (at 0.8 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 280 "/Zynq CPU/ZYNQ_RX7_N")) (pad N8 smd circle (at 0 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 273 "/Zynq CPU/ZYNQ_RX6_N")) (pad N7 smd circle (at -0.8 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 274 "/Zynq CPU/ZYNQ_RX6_P")) (pad N6 smd circle (at -1.6 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad N5 smd circle (at -2.4 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M5 smd circle (at -2.4 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad L5 smd circle (at -2.4 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad K5 smd circle (at -2.4 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad J5 smd circle (at -2.4 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J4 smd circle (at -3.2 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad H4 smd circle (at -3.2 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad H5 smd circle (at -2.4 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad G5 smd circle (at -2.4 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G4 smd circle (at -3.2 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad F4 smd circle (at -3.2 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 287 "Net-(R202-Pad1)")) (pad F5 smd circle (at -2.4 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 108 "/Zynq CPU/ZYNQ_VPLL")) (pad F6 smd circle (at -1.6 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 288 "Net-(R199-Pad1)")) (pad G6 smd circle (at -1.6 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad G7 smd circle (at -0.8 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad F7 smd circle (at -0.8 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 103 "/Zynq CPU/A1V8")) (pad F8 smd circle (at 0 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G8 smd circle (at 0 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G9 smd circle (at 0.8 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 185 "/Zynq CPU/ZYNQ_JTAG_TCK")) (pad F9 smd circle (at 0.8 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad F10 smd circle (at 1.6 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G10 smd circle (at 1.6 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad G11 smd circle (at 2.4 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad F11 smd circle (at 2.4 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad F12 smd circle (at 3.2 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 289 "/Zynq CPU/ARM_GPIO0")) (pad G12 smd circle (at 3.2 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 283 "/Zynq CPU/ZYNQ_TX0_P")) (pad H12 smd circle (at 3.2 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad J12 smd circle (at 3.2 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad J11 smd circle (at 2.4 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 291 "/Zynq CPU/ZYNQ_RX3_N")) (pad H11 smd circle (at 2.4 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 292 "/Zynq CPU/ZYNQ_RX3_P")) (pad H10 smd circle (at 1.6 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J10 smd circle (at 1.6 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad J9 smd circle (at 0.8 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad H9 smd circle (at 0.8 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad H8 smd circle (at 0 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J8 smd circle (at 0 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad J7 smd circle (at -0.8 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad H7 smd circle (at -0.8 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 99 "/FPGA support/1V25_REF")) (pad H6 smd circle (at -1.6 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad J6 smd circle (at -1.6 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad K6 smd circle (at -1.6 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 293 "/Zynq CPU/ZYNQ_PROG_B")) (pad L6 smd circle (at -1.6 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad L7 smd circle (at -0.8 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 187 "/Zynq CPU/ZYNQ_JTAG_TDI")) (pad K7 smd circle (at -0.8 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad K8 smd circle (at 0 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad L8 smd circle (at 0 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 294 "Net-(R9-Pad1)")) (pad L9 smd circle (at 0.8 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 184 "/Zynq CPU/ZYNQ_JTAG_TMS")) (pad K9 smd circle (at 0.8 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad K10 smd circle (at 1.6 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad L10 smd circle (at 1.6 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad L11 smd circle (at 2.4 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad K11 smd circle (at 2.4 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 295 "/Zynq CPU/ZYNQ_RXCLK_P")) (pad K12 smd circle (at 3.2 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 296 "/Zynq CPU/ZYNQ_RXCLK_N")) (pad L12 smd circle (at 3.2 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 297 "/Clocks / buffers/CLK_156MHZ_3_P")) (pad M12 smd circle (at 3.2 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 298 "/Clocks / buffers/CLK_156MHZ_3_N")) (pad M11 smd circle (at 2.4 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 272 "/Zynq CPU/ZYNQ_RX4_N")) (pad M10 smd circle (at 1.6 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 281 "/Zynq CPU/ZYNQ_RX4_P")) (pad M9 smd circle (at 0.8 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 279 "/Zynq CPU/ZYNQ_RX7_P")) (pad M8 smd circle (at 0 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad M7 smd circle (at -0.8 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 302 "/Zynq CPU/ZYNQ_DONE")) (pad M6 smd circle (at -1.6 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_bga/ucbga225.wrl (at (xyz 0 0 0)) (scale (xyz 2 2 2)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:XILINX_JTAG_PTH_MOLEX_0878311420 (layer F.Cu) (tedit 53C52AB2) (tstamp 56A48378) (at 89 42.3 270) (path /56869E40/56D154E2) (fp_text reference J9 (at -9.15 0.05 360) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value XILINX_JTAG (at 0 3.4 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start 8.5 -3) (end -8.5 -3) (layer F.SilkS) (width 0.3)) (fp_line (start -8.5 -3) (end -8.5 3) (layer F.SilkS) (width 0.3)) (fp_line (start -2 3) (end -8.5 3) (layer F.SilkS) (width 0.3)) (fp_line (start 8.5 -3) (end 8.5 3) (layer F.SilkS) (width 0.3)) (fp_line (start 8.5 3) (end 2 3) (layer F.SilkS) (width 0.3)) (pad 1 thru_hole circle (at -6 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (pad 2 thru_hole circle (at -6 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 83 "/Clocks / buffers/2V5")) (pad 3 thru_hole circle (at -4 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 4 thru_hole circle (at -4 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 212 "/Zynq CPU/ARM_JTAG_TMS")) (pad 5 thru_hole circle (at -2 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 6 thru_hole circle (at -2 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 213 "/Zynq CPU/ARM_JTAG_TCK")) (pad 7 thru_hole circle (at 0 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 8 thru_hole circle (at 0 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 214 "/Zynq CPU/ARM_JTAG_TDO")) (pad 9 thru_hole circle (at 2 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 10 thru_hole circle (at 2 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 215 "/Zynq CPU/ARM_JTAG_TDI")) (pad 11 thru_hole circle (at 4 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 12 thru_hole circle (at 4 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (pad 13 thru_hole circle (at 6 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (pad 14 thru_hole circle (at 6 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/conn_strip/vasch_strip_7x2.wrl (at (xyz 0 0 0)) (scale (xyz 0.78 0.78 0.78)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:XILINX_JTAG_PTH_MOLEX_0878311420 (layer F.Cu) (tedit 53C52AB2) (tstamp 56AEF432) (at 77.2 42.3 270) (path /56869E40/5698AF87) (fp_text reference J2 (at -9.15 -0.05 360) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value XILINX_JTAG (at 0 3.4 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start 8.5 -3) (end -8.5 -3) (layer F.SilkS) (width 0.3)) (fp_line (start -8.5 -3) (end -8.5 3) (layer F.SilkS) (width 0.3)) (fp_line (start -2 3) (end -8.5 3) (layer F.SilkS) (width 0.3)) (fp_line (start 8.5 -3) (end 8.5 3) (layer F.SilkS) (width 0.3)) (fp_line (start 8.5 3) (end 2 3) (layer F.SilkS) (width 0.3)) (pad 1 thru_hole circle (at -6 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (pad 2 thru_hole circle (at -6 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 83 "/Clocks / buffers/2V5")) (pad 3 thru_hole circle (at -4 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 4 thru_hole circle (at -4 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 184 "/Zynq CPU/ZYNQ_JTAG_TMS")) (pad 5 thru_hole circle (at -2 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 6 thru_hole circle (at -2 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 185 "/Zynq CPU/ZYNQ_JTAG_TCK")) (pad 7 thru_hole circle (at 0 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 8 thru_hole circle (at 0 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 186 "/Zynq CPU/ZYNQ_JTAG_TDO")) (pad 9 thru_hole circle (at 2 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 10 thru_hole circle (at 2 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 187 "/Zynq CPU/ZYNQ_JTAG_TDI")) (pad 11 thru_hole circle (at 4 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 12 thru_hole circle (at 4 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (pad 13 thru_hole circle (at 6 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (pad 14 thru_hole circle (at 6 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/conn_strip/vasch_strip_7x2.wrl (at (xyz 0 0 0)) (scale (xyz 0.78 0.78 0.78)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:CONN_SFP_CAGE_FCI_10126909-101LF (layer F.Cu) (tedit 56A51F60) (tstamp 56A6FF8A) (at 28 51.5 90) (path /5685DE45/569FF8D1) (fp_text reference P18 (at -27 -2.25 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value QUAD_SFP_CAGE (at -27 -3.75 90) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -58.25 -7) (end 1.25 -7) (layer F.CrtYd) (width 0.15)) (fp_line (start -2.34 34.75) (end -2.34 36) (layer F.CrtYd) (width 0.15)) (fp_line (start -46.2 39.5) (end -46.2 40.5) (layer F.Fab) (width 0.15)) (fp_line (start -53 40.75) (end -53 42.25) (layer F.Fab) (width 0.15)) (fp_line (start -46 40.75) (end -46 42.25) (layer F.Fab) (width 0.15)) (fp_line (start -44 40.75) (end -46 40.75) (layer F.Fab) (width 0.15)) (fp_line (start -44 27.5) (end -44 40.75) (layer F.Fab) (width 0.15)) (fp_line (start -55.75 27.5) (end -44 27.5) (layer F.Fab) (width 0.15)) (fp_line (start -55.75 40.75) (end -55.75 27.5) (layer F.Fab) (width 0.15)) (fp_line (start -53 40.75) (end -55.75 40.75) (layer F.Fab) (width 0.15)) (fp_text user "Mounting hole centerline" (at 6.75 35.25 90) (layer Dwgs.User) (effects (font (size 0.5 0.5) (thickness 0.05))) ) (fp_line (start -58.25 35.38) (end 1.25 35.38) (layer F.CrtYd) (width 0.15)) (fp_line (start 1.25 -7) (end 1.25 42.29) (layer F.CrtYd) (width 0.15)) (fp_line (start -58.25 42.29) (end 1.25 42.29) (layer F.CrtYd) (width 0.15)) (fp_line (start -58.25 -7) (end -58.25 42.29) (layer F.CrtYd) (width 0.15)) (fp_line (start 1.25 0) (end -58.25 0) (layer F.CrtYd) (width 0.15)) (fp_line (start -10.25 40.75) (end -10.25 42.25) (layer F.Fab) (width 0.15)) (fp_line (start -10.25 40.75) (end -13 40.75) (layer F.Fab) (width 0.15)) (fp_line (start -13 40.75) (end -13 27.5) (layer F.Fab) (width 0.15)) (fp_line (start -3.25 40.75) (end -3.25 42.25) (layer F.Fab) (width 0.15)) (fp_line (start -1.25 40.75) (end -3.25 40.75) (layer F.Fab) (width 0.15)) (fp_line (start -1.25 27.5) (end -1.25 40.75) (layer F.Fab) (width 0.15)) (fp_line (start -13 27.5) (end -1.25 27.5) (layer F.Fab) (width 0.15)) (fp_line (start -38.75 40.75) (end -41.5 40.75) (layer F.Fab) (width 0.15)) (fp_line (start -41.5 40.75) (end -41.5 27.5) (layer F.Fab) (width 0.15)) (fp_line (start -31.75 40.75) (end -31.75 42.25) (layer F.Fab) (width 0.15)) (fp_line (start -29.75 40.75) (end -31.75 40.75) (layer F.Fab) (width 0.15)) (fp_line (start -29.75 27.5) (end -29.75 40.75) (layer F.Fab) (width 0.15)) (fp_line (start -41.5 27.5) (end -29.75 27.5) (layer F.Fab) (width 0.15)) (fp_line (start -38.75 40.75) (end -38.75 42.25) (layer F.Fab) (width 0.15)) (fp_line (start -27.25 40.75) (end -27.25 27.5) (layer F.Fab) (width 0.15)) (fp_line (start -15.5 40.75) (end -17.5 40.75) (layer F.Fab) (width 0.15)) (fp_line (start -24.5 40.75) (end -24.5 42.25) (layer F.Fab) (width 0.15)) (fp_line (start -24.5 40.75) (end -27.25 40.75) (layer F.Fab) (width 0.15)) (fp_line (start -17.5 40.75) (end -17.5 42.25) (layer F.Fab) (width 0.15)) (fp_line (start -27.25 27.5) (end -15.5 27.5) (layer F.Fab) (width 0.15)) (fp_line (start -15.5 27.5) (end -15.5 40.75) (layer F.Fab) (width 0.15)) (fp_line (start -31.95 39.5) (end -31.95 40.5) (layer F.Fab) (width 0.15)) (fp_line (start -17.7 39.5) (end -17.7 40.5) (layer F.Fab) (width 0.15)) (fp_line (start -3.45 39.5) (end -3.45 40.5) (layer F.Fab) (width 0.15)) (fp_line (start -3.84 31) (end -3.84 32) (layer F.Fab) (width 0.15)) (fp_line (start -18.09 31) (end -18.09 32) (layer F.Fab) (width 0.15)) (fp_line (start -32.34 31) (end -32.34 32) (layer F.Fab) (width 0.15)) (fp_line (start -46.59 31) (end -46.59 32) (layer F.Fab) (width 0.15)) (fp_line (start -16.59 34.75) (end -16.59 36) (layer F.CrtYd) (width 0.15)) (fp_line (start -30.84 34.75) (end -30.84 36) (layer F.CrtYd) (width 0.15)) (fp_line (start -45.09 34.75) (end -45.09 36) (layer F.CrtYd) (width 0.15)) (pad 1 thru_hole rect (at -8.59 4.5 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -14.25 4.5 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -22.83 4.5 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -37.06 4.5 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -51.31 4.5 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -57 4.5 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at 0 9.5 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -28.5 9.5 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -42.75 9.5 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -14.25 14.5 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -57 14.5 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at 0 19.51 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -5.69 19.51 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -11.07 19.51 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -19.94 19.51 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -25.32 19.51 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -28.5 19.51 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -34.19 19.51 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -39.57 19.51 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -42.75 19.51 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -48.44 19.51 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -53.82 19.51 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -14.25 24.51 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -57 24.51 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at 0 29.49 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -28.5 29.49 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -42.75 29.49 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at 0 39.5 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -28.5 39.5 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -42.75 39.5 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -57 32 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -57 37.01 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -14.25 32 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 1 thru_hole rect (at -14.25 37.01 90) (size 2.01 2.01) (drill 1.05) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad "" np_thru_hole circle (at 0 27.31 90) (size 0.95 0.95) (drill 0.95) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at -14.25 27.31 90) (size 0.95 0.95) (drill 0.95) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at -42.75 27.31 90) (size 0.95 0.95) (drill 0.95) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at -57 27.31 90) (size 0.95 0.95) (drill 0.95) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at -2.34 41.58 90) (size 0.95 0.95) (drill 0.95) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at -7.14 41.58 90) (size 0.95 0.95) (drill 0.95) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at -16.59 41.58 90) (size 0.95 0.95) (drill 0.95) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at -21.39 41.58 90) (size 0.95 0.95) (drill 0.95) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at -30.84 41.58 90) (size 0.95 0.95) (drill 0.95) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at -35.64 41.58 90) (size 0.95 0.95) (drill 0.95) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at -45.09 41.58 90) (size 0.95 0.95) (drill 0.95) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at -49.89 41.58 90) (size 0.95 0.95) (drill 0.95) (layers *.Cu *.Mask F.SilkS)) (pad "" smd rect (at -54.66 44.58 90) (size 2.54 3.56) (layers Dwgs.User)) (pad "" smd rect (at -45.09 44.58 90) (size 2.54 3.56) (layers Dwgs.User)) (pad "" smd rect (at -40.41 44.58 90) (size 2.54 3.56) (layers Dwgs.User)) (pad "" smd rect (at -30.84 44.58 90) (size 2.54 3.56) (layers Dwgs.User)) (pad "" smd rect (at -26.16 44.58 90) (size 2.54 3.56) (layers Dwgs.User)) (pad "" smd rect (at -16.59 44.58 90) (size 2.54 3.56) (layers Dwgs.User)) (pad "" smd rect (at -11.91 44.58 90) (size 2.54 3.56) (layers Dwgs.User)) (pad "" smd rect (at -2.34 44.58 90) (size 2.54 3.56) (layers Dwgs.User)) (model /nfs4/share/models/FCI/SFP/quad-sfp-cage.x3d (at (xyz -1.13 -1.63 0)) (scale (xyz 0.3937 0.3937 0.3937)) (rotate (xyz -90 0 180)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77759) (at 114.26 41.12 90) (path /56869E40/56CF5895) (fp_text reference R199 (at 2.31 0.29 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 0 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 288 "Net-(R199-Pad1)")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A47776) (at 91.4 96.6 180) (path /5685DE62/5687CDF0) (fp_text reference C1 (at 0.1 -1.15 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 1 "/XAUI PHY/1V0_A")) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A4777C) (at 76.5 98.05 270) (path /5685DE62/5687E956) (fp_text reference C2 (at 0 0.95 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 3 "/XAUI PHY/1V0_T")) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A47782) (at 92.9 91.25) (path /5685DE62/5687F4AD) (fp_text reference C3 (at 0 -1.5) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A47788) (at 78.45 104.25 180) (path /5685DE62/56880A72) (fp_text reference C4 (at 0 -1.5 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 5 "/XAUI PHY/1V5_A")) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A4778E) (at 89.7 91.15) (path /5685DE62/56881B2F) (fp_text reference C5 (at 0.3 -1.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D290) (tstamp 56A47794) (at 83.75 101.49 270) (path /5685DE62/56881D27) (fp_text reference C6 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A4779A) (at 77.4 101.05 90) (path /5685DE62/5687CF4D) (fp_text reference C7 (at -2 0.1 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 1 "/XAUI PHY/1V0_A")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A477A0) (at 77.6 98.05 270) (path /5685DE62/5687E9D1) (fp_text reference C8 (at -1.25 -1.05 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 3 "/XAUI PHY/1V0_T")) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A477A6) (at 80.25 89.5) (path /5685DE62/5687F521) (fp_text reference C9 (at 0 -1.5) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B7EBB6) (tstamp 56A477AC) (at 79.75 99.5 270) (path /5685DE62/56880B0C) (fp_text reference C10 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 5 "/XAUI PHY/1V5_A")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D266) (tstamp 56A477B2) (at 86.75 98.5 270) (path /5685DE62/5687EA1B) (fp_text reference C11 (at 2.075 0.025 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 "/XAUI PHY/1V0_T")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D24F) (tstamp 56A477B8) (at 85.25 99.48 315) (path /5685DE62/5687F58A) (fp_text reference C12 (at 0.05 -1.4 315) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 315) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 315) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0 315) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D2A6) (tstamp 56A477BE) (at 83.75 93.5 90) (path /5685DE62/56881DCF) (fp_text reference C13 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D276) (tstamp 56A477C4) (at 89.25 97.95) (path /5685DE62/5687CF8B) (fp_text reference C14 (at 1.9 0.05) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 "/XAUI PHY/1V0_A")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B7EBCB) (tstamp 56A477CA) (at 79.76 94.49 90) (path /5685DE62/56880BB5) (fp_text reference C15 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 5 "/XAUI PHY/1V5_A")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D256) (tstamp 56A477D0) (at 86.75 96.5 90) (path /5685DE62/5687EA98) (fp_text reference C16 (at 1.8 -0.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 "/XAUI PHY/1V0_T")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D24C) (tstamp 56A477D6) (at 85.25 98) (path /5685DE62/5687F614) (fp_text reference C17 (at 0.65 0.85) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D269) (tstamp 56A477DC) (at 88.75 99.55 90) (path /5685DE62/5687CFE7) (fp_text reference C18 (at -1.9 0.05 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 "/XAUI PHY/1V0_A")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B7EBF1) (tstamp 56A477E2) (at 87.75 93.5 90) (path /5685DE62/56880CF7) (fp_text reference C19 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 5 "/XAUI PHY/1V5_A")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D261) (tstamp 56A477E8) (at 81.225 98 180) (path /5685DE62/5687EAEA) (fp_text reference C20 (at 0.15 -0.875 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 "/XAUI PHY/1V0_T")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D259) (tstamp 56A477EE) (at 85.25 97.01) (path /5685DE62/5687F677) (fp_text reference C21 (at 0.69 -0.76) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D274) (tstamp 56A477F4) (at 89.25 97) (path /5685DE62/5687D023) (fp_text reference C22 (at 1.95 0) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 "/XAUI PHY/1V0_A")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B7EBDF) (tstamp 56A477FA) (at 87.76 101.5 270) (path /5685DE62/56880D6E) (fp_text reference C23 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 5 "/XAUI PHY/1V5_A")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D244) (tstamp 56A47800) (at 83.75 97.49 90) (path /5685DE62/5687F6D9) (fp_text reference C24 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D25C) (tstamp 56A47806) (at 88.75 95.5 270) (path /5685DE62/5687D072) (fp_text reference C25 (at -0.05 1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 "/XAUI PHY/1V0_A")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D253) (tstamp 56A4780C) (at 85.27 95.48 45) (path /5685DE62/5687F742) (fp_text reference C26 (at 0.05 -1.4 45) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 45) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 45) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0 45) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D26F) (tstamp 56A47812) (at 79.275 98 180) (path /5685DE62/5687D0B4) (fp_text reference C27 (at 1.975 0 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 "/XAUI PHY/1V0_A")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D247) (tstamp 56A47818) (at 82.75 97.49 270) (path /5685DE62/5687F7B2) (fp_text reference C28 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D26D) (tstamp 56A4781E) (at 80.25 97 180) (path /5685DE62/5687D0F5) (fp_text reference C29 (at 1.95 0 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 "/XAUI PHY/1V0_A")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47824) (at 100.57 134.47) (path /5685DE78/5686C6A9) (fp_text reference C30 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A4782A) (at 103.87 134.62) (path /5685DE78/5686C057) (fp_text reference C31 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47830) (at 100.52 131.57) (path /5685DE78/5686C5DD) (fp_text reference C32 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47836) (at 103.82 131.67) (path /5685DE78/5686BFF4) (fp_text reference C33 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A4783C) (at 100.07 145.62) (path /5685DE78/5686BED7) (fp_text reference C34 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47842) (at 104.57 143.1) (path /5685DE78/5686AB54) (fp_text reference C35 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47848) (at 99.92 142.57) (path /5685DE78/5686BEDD) (fp_text reference C36 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A4784E) (at 104.47 140.245) (path /5685DE78/5686ABD1) (fp_text reference C37 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56BD8EBF) (tstamp 56A47854) (at 117.1 111.95 270) (path /5685DE78/5686BEAD) (fp_text reference C38 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56BD8F68) (tstamp 56A4785A) (at 115.1 112.95 180) (path /5685DE78/5686A836) (fp_text reference C39 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56BD8EA4) (tstamp 56A47860) (at 112.1 111.95 270) (path /5685DE78/5686BEB3) (fp_text reference C40 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56BD8F45) (tstamp 56A47866) (at 115.1 114.96 180) (path /5685DE78/5686A9D7) (fp_text reference C41 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56BD8E4B) (tstamp 56A4786C) (at 111.59 114.45 180) (path /5685DE78/5686BEB9) (fp_text reference C42 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56BD8F75) (tstamp 56A47872) (at 114.09 111.93) (path /5685DE78/5686AA1D) (fp_text reference C43 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56BD8E27) (tstamp 56A47878) (at 117.1 113.95 90) (path /5685DE78/5686BEBF) (fp_text reference C44 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56BD8F28) (tstamp 56A4787E) (at 113.6 115.45 270) (path /5685DE78/5686AA56) (fp_text reference C45 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56BD8E22) (tstamp 56A47884) (at 116.6 116.43 270) (path /5685DE78/5686BEC5) (fp_text reference C46 (at 1.95 0 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56BD8F93) (tstamp 56A4788A) (at 113.59 110.44 90) (path /5685DE78/5686AA92) (fp_text reference C47 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56BD8EFE) (tstamp 56A47890) (at 112.6 109.44 90) (path /5685DE78/5686BECB) (fp_text reference C48 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56BD8F59) (tstamp 56A47896) (at 114.11 113.94) (path /5685DE78/5686AAD5) (fp_text reference C49 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56BD8ED8) (tstamp 56A4789C) (at 116.6 109.45 90) (path /5685DE78/5686BED1) (fp_text reference C50 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56BD8F81) (tstamp 56A478A2) (at 115.61 110.44 90) (path /5685DE78/5686AB13) (fp_text reference C51 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56BD8E6C) (tstamp 56A478A8) (at 112.61 116.44 270) (path /5685DE78/5686CE74) (fp_text reference C52 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A478AE) (at 77.2 93.88 180) (path /5685DE62/5688C4E0) (fp_text reference C53 (at -1.1 0.73 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 8 "/XAUI PHY/UNUSED_5_N")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 9 "Net-(C53-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A478B4) (at 77.2 94.6 180) (path /5685DE62/5688C4E7) (fp_text reference C54 (at 0.09 -0.87 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 10 "/XAUI PHY/UNUSED_5_P")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 9 "Net-(C53-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A478BA) (at 75.7 97 180) (path /5685DE62/56889E07) (fp_text reference C55 (at 0 -0.95 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 11 "/XAUI PHY/UNUSED_4_N")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 12 "Net-(C55-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A478C0) (at 75.7 96 180) (path /5685DE62/5688A08D) (fp_text reference C56 (at 0 0.85 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 13 "/XAUI PHY/UNUSED_4_P")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 12 "Net-(C55-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A478C6) (at 86.75 89.3 90) (path /5685DE62/5688A9E7) (fp_text reference C57 (at 0 -0.9 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 14 "/XAUI PHY/UNUSED_3_N")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 15 "Net-(C57-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A478CC) (at 87.75 89.3 90) (path /5685DE62/5688A9EE) (fp_text reference C58 (at 0 1.05 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 16 "/XAUI PHY/UNUSED_3_P")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 15 "Net-(C57-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A478D2) (at 92.7 92) (path /5685DE62/5688ABC7) (fp_text reference C59 (at 2.1 -0.4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 17 "/XAUI PHY/UNUSED_2_N")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 18 "Net-(C59-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A478D8) (at 92.7 93) (path /5685DE62/5688ABCE) (fp_text reference C60 (at 2.1 0.45) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 19 "/XAUI PHY/UNUSED_2_P")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 18 "Net-(C59-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A478DE) (at 91.65 93.1) (path /5685DE62/5688AFC9) (fp_text reference C61 (at 0 -0.95) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 20 "/XAUI PHY/UNUSED_1_N")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 21 "Net-(C61-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A478E4) (at 91.65 93.9) (path /5685DE62/5688AFD0) (fp_text reference C62 (at 0 1.1) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 22 "/XAUI PHY/UNUSED_1_P")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 21 "Net-(C61-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A478EA) (at 95 95) (path /5685DE62/5688B253) (fp_text reference C63 (at 1.95 -0.45) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 23 "/XAUI PHY/UNUSED_0_N")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 24 "Net-(C63-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A478F0) (at 95 96) (path /5685DE62/5688B25A) (fp_text reference C64 (at 2.05 0.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 25 "/XAUI PHY/UNUSED_0_P")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 24 "Net-(C63-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A478F6) (at 97.5 46 270) (path /56869E40/568A7EC5) (fp_text reference C65 (at 0 1.5 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF" (at 0 3.7 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A478FC) (at 119 40.25 270) (path /56869E40/568A8660) (fp_text reference C66 (at -2.5 0 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "47 uF" (at 0.25 2 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0 270) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.9 0 270) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47902) (at 116.25 50.5 90) (path /56869E40/568A8078) (fp_text reference C67 (at 0 1.5 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47908) (at 104.8 37.5) (path /56869E40/568A86C3) (fp_text reference C68 (at 0 -1) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BAB5) (tstamp 56A4790E) (at 108.8 45.64 90) (path /56869E40/568A8702) (fp_text reference C69 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BA4E) (tstamp 56A47914) (at 109.6 42.75 90) (path /56869E40/568A80AC) (fp_text reference C70 (at 0.475 -0.775 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BA4B) (tstamp 56A4791A) (at 106.4 42 90) (path /56869E40/568A80E7) (fp_text reference C71 (at 1.9 0 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A47920) (at 119.5 49.75 270) (path /56869E40/568A8EB9) (fp_text reference C72 (at 0 -1.75 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF" (at 0 3.7 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47926) (at 100.55 48.3 90) (path /56869E40/568A8F3A) (fp_text reference C73 (at 0 -1 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BB2E) (tstamp 56A4792C) (at 105.6 47.5 270) (path /56869E40/568A8FCA) (fp_text reference C74 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BA9B) (tstamp 56A47932) (at 110.4 45.6 90) (path /56869E40/568A903F) (fp_text reference C75 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BA85) (tstamp 56A47938) (at 107.975 47.15) (path /56869E40/568A907D) (fp_text reference C76 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A4793E) (at 101.9 34.95) (path /56869E40/568A9FAD) (fp_text reference C77 (at 0 -1.65) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF" (at 0 3.7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47944) (at 100.55 39.725 90) (path /56869E40/568A9FB3) (fp_text reference C78 (at 0 -1.125 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BB4E) (tstamp 56A4794A) (at 111.6 44 180) (path /56869E40/568A9FB9) (fp_text reference C79 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47950) (at 139.4 73.6 180) (path /56983D83/569A900C) (fp_text reference C80 (at -2 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 26 "/Backplane Connector/ETH4_TX_P")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 606 "/Backplane Connector/E4TX_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47956) (at 139.4 72.8 180) (path /56983D83/569A9012) (fp_text reference C81 (at -2 0.2 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 27 "/Backplane Connector/ETH4_TX_N")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 607 "/Backplane Connector/E4TX_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A4795C) (at 135.1 72.3 180) (path /56983D83/569A9160) (fp_text reference C82 (at -2 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 28 "/Backplane Connector/ETH5_TX_P")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 608 "/Backplane Connector/E5TX_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47962) (at 135.1 71.5 180) (path /56983D83/569A9166) (fp_text reference C83 (at -2 0.2 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 29 "/Backplane Connector/ETH5_TX_N")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 609 "/Backplane Connector/E5TX_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47968) (at 139.4 70.9 180) (path /56983D83/569A93FF) (fp_text reference C84 (at -2 -0.1 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 30 "/Backplane Connector/ETH6_TX_P")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 610 "/Backplane Connector/E6TX_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A4796E) (at 139.4 70.1 180) (path /56983D83/569A9405) (fp_text reference C85 (at -2 0.2 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 31 "/Backplane Connector/ETH6_TX_N")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 611 "/Backplane Connector/E6TX_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47974) (at 135.1 69.7 180) (path /56983D83/569A9536) (fp_text reference C86 (at -2 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 32 "/Backplane Connector/ETH7_TX_P")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 612 "/Backplane Connector/E7TX_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A4797A) (at 135.1 68.9 180) (path /56983D83/569A953C) (fp_text reference C87 (at -2 0.2 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 33 "/Backplane Connector/ETH7_TX_N")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 613 "/Backplane Connector/E7TX_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47980) (at 135.1 75.8 180) (path /56983D83/569A8D5E) (fp_text reference C88 (at -2 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 34 "/Backplane Connector/ETH3_TX_P")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 614 "/Backplane Connector/E3TX_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47986) (at 135.1 75 180) (path /56983D83/569A8D64) (fp_text reference C89 (at -2 0.2 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 35 "/Backplane Connector/ETH3_TX_N")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 615 "/Backplane Connector/E3TX_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A4798C) (at 139.4 77.8 180) (path /56983D83/569A8C3A) (fp_text reference C90 (at -2 -0.1 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 36 "/Backplane Connector/ETH2_TX_P")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 616 "/Backplane Connector/E2TX_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47992) (at 139.4 77 180) (path /56983D83/569A8C40) (fp_text reference C91 (at -2 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 37 "/Backplane Connector/ETH2_TX_N")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 617 "/Backplane Connector/E2TX_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47998) (at 135.1 78.9 180) (path /56983D83/569A8B26) (fp_text reference C92 (at -1.9 -0.2 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 38 "/Backplane Connector/ETH1_TX_P")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 618 "/Backplane Connector/E1TX_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A4799E) (at 135.1 78.1 180) (path /56983D83/569A8B2C) (fp_text reference C93 (at -1.9 0.1 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 39 "/Backplane Connector/ETH1_TX_N")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 619 "/Backplane Connector/E1TX_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A479A4) (at 139.4 80.5 180) (path /56983D83/569A8750) (fp_text reference C94 (at -1.9 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 40 "/Backplane Connector/ETH0_TX_P")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 620 "/Backplane Connector/E0TX_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A479AA) (at 139.4 79.7 180) (path /56983D83/569A8A03) (fp_text reference C95 (at -2 0.2 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 41 "/Backplane Connector/ETH0_TX_N")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 621 "/Backplane Connector/E0TX_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A479B0) (at 96.89 67.19 180) (path /5685DE45/56A433EE) (fp_text reference C96 (at 0.01 0.82 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 626 "/Front panel SFP+s/E8T_P")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 42 "/Backplane Connector/ETH8_TX_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A479B6) (at 96.89 67.93 180) (path /5685DE45/56A43583) (fp_text reference C97 (at 0 -0.94 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 627 "/Front panel SFP+s/E8T_N")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 43 "/Backplane Connector/ETH8_TX_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A479BC) (at 63.01 59.92) (path /5685DE45/56A62CB0) (fp_text reference C98 (at -0.2 0.8) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 44 "Net-(C98-Pad1)")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A479C2) (at 63 57.19) (path /5685DE45/56A63464) (fp_text reference C99 (at -0.45 -0.95) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 44 "Net-(C98-Pad1)")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A479C8) (at 62.975 74.1) (path /5685DE45/56A64134) (fp_text reference C100 (at 0 0.925) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 45 "Net-(C100-Pad1)")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A479CE) (at 62.975 71.375) (path /5685DE45/56A64158) (fp_text reference C101 (at 0 -0.9) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 45 "Net-(C100-Pad1)")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A479D4) (at 62.975 85.675) (path /5685DE45/56A649E6) (fp_text reference C102 (at 0 -0.8) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 46 "Net-(C102-Pad1)")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A479DA) (at 62.975 88.45) (path /5685DE45/56A64A0A) (fp_text reference C103 (at 0 0.875) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 46 "Net-(C102-Pad1)")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A479E0) (at 63 102.7) (path /5685DE45/56A64A3D) (fp_text reference C104 (at 0 0.8) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 47 "Net-(C104-Pad1)")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A479E6) (at 63.000001 99.85) (path /5685DE45/56A64A61) (fp_text reference C105 (at -0.000001 -0.75) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 47 "Net-(C104-Pad1)")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer B.Cu) (tedit 54A4E5F3) (tstamp 56A479EC) (at 66.1 60 270) (path /5685DE45/56A62E52) (fp_text reference C106 (at 2.85 -0.2 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF" (at 0.25 -2 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.9 0 270) (size 0.8 1.6) (layers B.Cu B.Paste B.Mask) (net 48 "/Front panel SFP+s/ETH9_VDD_RX")) (pad 2 smd rect (at 0.9 0 270) (size 0.8 1.6) (layers B.Cu B.Paste B.Mask) (net 49 "Net-(C106-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer B.Cu) (tedit 54A4E5F3) (tstamp 56A479F2) (at 66.1 57.1 90) (path /5685DE45/56A6346A) (fp_text reference C107 (at 3 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF" (at 0.25 -2 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.9 0 90) (size 0.8 1.6) (layers B.Cu B.Paste B.Mask) (net 50 "/Front panel SFP+s/ETH9_VDD_TX")) (pad 2 smd rect (at 0.9 0 90) (size 0.8 1.6) (layers B.Cu B.Paste B.Mask) (net 51 "Net-(C107-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer B.Cu) (tedit 54A4E5F3) (tstamp 56A479F8) (at 66.1 74.175 270) (path /5685DE45/56A6413A) (fp_text reference C108 (at 2.85 0.025 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF" (at 0.25 -2 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.9 0 270) (size 0.8 1.6) (layers B.Cu B.Paste B.Mask) (net 52 "/Front panel SFP+s/ETH10_VDD_RX")) (pad 2 smd rect (at 0.9 0 270) (size 0.8 1.6) (layers B.Cu B.Paste B.Mask) (net 53 "Net-(C108-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer B.Cu) (tedit 54A4E5F3) (tstamp 56A479FE) (at 66.1 71.35 90) (path /5685DE45/56A6415E) (fp_text reference C109 (at 2.975 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF" (at 0.25 -2 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.9 0 90) (size 0.8 1.6) (layers B.Cu B.Paste B.Mask) (net 54 "/Front panel SFP+s/ETH10_VDD_TX")) (pad 2 smd rect (at 0.9 0 90) (size 0.8 1.6) (layers B.Cu B.Paste B.Mask) (net 55 "Net-(C109-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer B.Cu) (tedit 54A4E5F3) (tstamp 56A47A04) (at 66.1 88.5 270) (path /5685DE45/56A649EC) (fp_text reference C110 (at 2.83 0.01 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF" (at 0.25 -2 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.9 0 270) (size 0.8 1.6) (layers B.Cu B.Paste B.Mask) (net 56 "/Front panel SFP+s/ETH11_VDD_RX")) (pad 2 smd rect (at 0.9 0 270) (size 0.8 1.6) (layers B.Cu B.Paste B.Mask) (net 57 "Net-(C110-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer B.Cu) (tedit 54A4E5F3) (tstamp 56A47A0A) (at 66.1 85.6 90) (path /5685DE45/56A64A10) (fp_text reference C111 (at 2.84 -0.01 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF" (at 0.25 -2 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.9 0 90) (size 0.8 1.6) (layers B.Cu B.Paste B.Mask) (net 58 "/Front panel SFP+s/ETH11_VDD_TX")) (pad 2 smd rect (at 0.9 0 90) (size 0.8 1.6) (layers B.Cu B.Paste B.Mask) (net 59 "Net-(C111-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer B.Cu) (tedit 54A4E5F3) (tstamp 56A47A10) (at 66.1 102.75 270) (path /5685DE45/56A64A43) (fp_text reference C112 (at 2.8 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF" (at 0.25 -2 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.9 0 270) (size 0.8 1.6) (layers B.Cu B.Paste B.Mask) (net 60 "/Front panel SFP+s/ETH12_VDD_RX")) (pad 2 smd rect (at 0.9 0 270) (size 0.8 1.6) (layers B.Cu B.Paste B.Mask) (net 61 "Net-(C112-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer B.Cu) (tedit 54A4E5F3) (tstamp 56A47A16) (at 66.1 99.85 90) (path /5685DE45/56A64A67) (fp_text reference C113 (at 2.95 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF" (at 0.25 -2 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.9 0 90) (size 0.8 1.6) (layers B.Cu B.Paste B.Mask) (net 62 "/Front panel SFP+s/ETH12_VDD_TX")) (pad 2 smd rect (at 0.9 0 90) (size 0.8 1.6) (layers B.Cu B.Paste B.Mask) (net 63 "Net-(C113-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47A1C) (at 67.525 59.45 270) (path /5685DE45/56A63034) (fp_text reference C114 (at 0.125 -1.8 360) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 48 "/Front panel SFP+s/ETH9_VDD_RX")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47A22) (at 67.525 57.65 90) (path /5685DE45/56A63477) (fp_text reference C115 (at 0.125 1.8 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 50 "/Front panel SFP+s/ETH9_VDD_TX")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47A28) (at 67.525 73.625 270) (path /5685DE45/56A64147) (fp_text reference C116 (at 0.475 -1.825 360) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 52 "/Front panel SFP+s/ETH10_VDD_RX")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47A2E) (at 67.525 71.925 90) (path /5685DE45/56A6416B) (fp_text reference C117 (at 0.375 1.775 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 54 "/Front panel SFP+s/ETH10_VDD_TX")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47A34) (at 67.51 87.96 270) (path /5685DE45/56A649F9) (fp_text reference C118 (at 0.3 -1.76 360) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 56 "/Front panel SFP+s/ETH11_VDD_RX")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47A3A) (at 67.5 86.15 90) (path /5685DE45/56A64A1D) (fp_text reference C119 (at 0.21 1.79 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 58 "/Front panel SFP+s/ETH11_VDD_TX")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47A40) (at 67.5 102.2 270) (path /5685DE45/56A64A50) (fp_text reference C120 (at 0.4 -1.8 360) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 60 "/Front panel SFP+s/ETH12_VDD_RX")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47A46) (at 67.5 100.4 90) (path /5685DE45/56A64A74) (fp_text reference C121 (at 0.35 1.7 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 62 "/Front panel SFP+s/ETH12_VDD_TX")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47A4C) (at 93.85 68.125) (path /569AEE1D/56A97B18) (fp_text reference C122 (at -2.4 -0.35) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 64 "/Clocks / buffers/Q0_125_P")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 65 "/Clocks / buffers/CLK_125MHZ_0_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47A52) (at 93.85 68.8) (path /569AEE1D/56A97C5A) (fp_text reference C123 (at -2.375 -0.075) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 66 "/Clocks / buffers/Q0_125_N")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 67 "/Clocks / buffers/CLK_125MHZ_0_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47A58) (at 90.825 74.325) (path /569AEE1D/56A97E3B) (fp_text reference C124 (at 0.575 -0.85) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 72 "/Clocks / buffers/Q2_125_P")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 69 "/Clocks / buffers/CLK_125MHZ_1_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47A5E) (at 90.825 75.075) (path /569AEE1D/56A97E41) (fp_text reference C125 (at 0.725 0.825) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 74 "/Clocks / buffers/Q2_125_N")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 71 "/Clocks / buffers/CLK_125MHZ_1_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47A64) (at 93.91 69.63) (path /569AEE1D/56A97EA9) (fp_text reference C126 (at -2.43 0.02) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 68 "/Clocks / buffers/Q1_125_P")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 73 "/Clocks / buffers/CLK_125MHZ_2_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47A6A) (at 93.91 70.36) (path /569AEE1D/56A97EAF) (fp_text reference C127 (at -2.45 0.35) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 70 "/Clocks / buffers/Q1_125_N")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 75 "/Clocks / buffers/CLK_125MHZ_2_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47A70) (at 89.35 67.77 270) (path /569AEE1D/56A983A5) (fp_text reference C128 (at 2.26 0.11 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 622 "/Clocks / buffers/Q3_156_P")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 76 "/Clocks / buffers/CLK_156MHZ_0_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47A76) (at 88.59 67.78 270) (path /569AEE1D/56A983AB) (fp_text reference C129 (at 0.02 0.89 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 623 "/Clocks / buffers/Q3_156_N")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 77 "/Clocks / buffers/CLK_156MHZ_0_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47A7C) (at 92.42 64.52) (path /569AEE1D/56A983B3) (fp_text reference C130 (at 2.53 -0.22) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 624 "/Clocks / buffers/Q2_156_P")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 78 "/Clocks / buffers/CLK_156MHZ_1_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer F.Cu) (tedit 54A4E4D1) (tstamp 56A47A88) (at 37.75 138.165) (path /5685DE1C/56A9BB2E) (fp_text reference C132 (at 0.2 2.1) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "220 uF" (at 0 3.7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493) (size 0.9 2.9) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 1.55 0.01493) (size 0.9 2.9) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D3A7) (tstamp 56A47A8E) (at 122 70.49 180) (path /5685DE1C/56AA31D6) (fp_text reference C133 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A47A94) (at 93.93 169.28) (path /5685DE1C/56AAACC5) (fp_text reference C134 (at 0.2 2.1) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF" (at 0 3.7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A47A9A) (at 68.15 150.94) (path /5685DE1C/56AADABD) (fp_text reference C135 (at -0.25 1.25) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "47 uF" (at 0.25 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer F.Cu) (tedit 54A4E4D1) (tstamp 56A47AA0) (at 37.67 133.47) (path /5685DE1C/56A9BB9A) (fp_text reference C136 (at 0.2 2.1) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "220 uF" (at 0 3.7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493) (size 0.9 2.9) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 1.55 0.01493) (size 0.9 2.9) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D3BA) (tstamp 56A47AA6) (at 109 70.49) (path /5685DE1C/56AA32D0) (fp_text reference C137 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6E8C2) (tstamp 56A47AAC) (at 120 76.5 180) (path /5685DE1C/56AAADD3) (fp_text reference C138 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47AB2) (at 75.85 150.79) (path /5685DE1C/56AADBCF) (fp_text reference C139 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer F.Cu) (tedit 54A4E4D1) (tstamp 56A47AB8) (at 32.67 133.47) (path /5685DE1C/56A9BBDD) (fp_text reference C140 (at 0.2 2.1) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "220 uF" (at 0 3.7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493) (size 0.9 2.9) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 1.55 0.01493) (size 0.9 2.9) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D3C8) (tstamp 56A47ABE) (at 115 70.49) (path /5685DE1C/56AA3366) (fp_text reference C141 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6E900) (tstamp 56A47AC4) (at 109 77.5 180) (path /5685DE1C/56AAAE7D) (fp_text reference C142 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47ACA) (at 79.35 150.89) (path /5685DE1C/56AADCB3) (fp_text reference C143 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47AD0) (at 42.45 136.34) (path /5685DE1C/56A9D242) (fp_text reference C144 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D3DA) (tstamp 56A47AD6) (at 113.99 77.5) (path /5685DE1C/56AA336C) (fp_text reference C145 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6E912) (tstamp 56A47ADC) (at 115 76.5) (path /5685DE1C/56AAAF2A) (fp_text reference C146 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47AE2) (at 82.65 150.79) (path /5685DE1C/56AADD5A) (fp_text reference C147 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47AE8) (at 42.35 133.44) (path /5685DE1C/56A9D2BB) (fp_text reference C148 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47AEE) (at 72.35 150.69) (path /5685DE1C/56AADE06) (fp_text reference C149 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D46A) (tstamp 56A47AF4) (at 118.5 73 270) (path /5685DE1C/56AA34FE) (fp_text reference C150 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47AFA) (at 46.6 133.34) (path /5685DE1C/56A9D307) (fp_text reference C151 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47B00) (at 86.1 150.84) (path /5685DE1C/56AADEC1) (fp_text reference C152 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D47B) (tstamp 56A47B06) (at 111.5 73 90) (path /5685DE1C/56AA3504) (fp_text reference C153 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47B0C) (at 46.6 136.69) (path /5685DE1C/56A9D3D6) (fp_text reference C154 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D521) (tstamp 56A47B12) (at 112.5 69 270) (path /5685DE1C/56AAE1FF) (fp_text reference C155 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D48B) (tstamp 56A47B18) (at 116.01 77.49) (path /5685DE1C/56AA350A) (fp_text reference C156 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47B1E) (at 50 133.39) (path /5685DE1C/56A9D3DC) (fp_text reference C157 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D4AF) (tstamp 56A47B24) (at 109.49 78.98 90) (path /5685DE1C/56AAE205) (fp_text reference C158 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D433) (tstamp 56A47B2A) (at 122.01 74.5 180) (path /5685DE1C/56AA3510) (fp_text reference C159 (at 0.05 -1.4 450) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47B30) (at 50.25 136.44) (path /5685DE1C/56A9D3E2) (fp_text reference C160 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D50A) (tstamp 56A47B36) (at 116.5 79 270) (path /5685DE1C/56AAE20B) (fp_text reference C161 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D371) (tstamp 56A47B3C) (at 109 76.5) (path /5685DE1C/56AA38F4) (fp_text reference C162 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47B42) (at 53.8 133.49) (path /5685DE1C/56A9D856) (fp_text reference C163 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D4F6) (tstamp 56A47B48) (at 113.5 78.98 90) (path /5685DE1C/56AAE211) (fp_text reference C164 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47B4E) (at 53.6 136.34) (path /5685DE1C/56A9D85C) (fp_text reference C165 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D386) (tstamp 56A47B54) (at 122.01 76.5 180) (path /5685DE1C/56AA38FA) (fp_text reference C166 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D4E6) (tstamp 56A47B5A) (at 109.5 68.98 90) (path /5685DE1C/56AAE217) (fp_text reference C167 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47B60) (at 57.05 133.39) (path /5685DE1C/56A9D862) (fp_text reference C168 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D3EB) (tstamp 56A47B66) (at 108.99 72.48) (path /5685DE1C/56AA3900) (fp_text reference C169 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D4D6) (tstamp 56A47B6C) (at 119.49 68.99 90) (path /5685DE1C/56AAE21D) (fp_text reference C170 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47B72) (at 57.2 136.39) (path /5685DE1C/56A9D868) (fp_text reference C171 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D3FC) (tstamp 56A47B78) (at 108.99 74.49) (path /5685DE1C/56AA3906) (fp_text reference C172 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47B7E) (at 60.2 133.24) (path /5685DE1C/56A9D86E) (fp_text reference C173 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D531) (tstamp 56A47B84) (at 116.5 69 270) (path /5685DE1C/56AAE223) (fp_text reference C174 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D40A) (tstamp 56A47B8A) (at 115.01 72.5) (path /5685DE1C/56AA390C) (fp_text reference C175 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47B90) (at 60.4 136.04) (path /5685DE1C/56A9D874) (fp_text reference C176 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D4BE) (tstamp 56A47B96) (at 119.5 79 90) (path /5685DE1C/56AAE229) (fp_text reference C177 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D418) (tstamp 56A47B9C) (at 122.01 72.5 180) (path /5685DE1C/56AA3912) (fp_text reference C178 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D540) (tstamp 56A47BA2) (at 114.5 69 270) (path /5685DE1C/56AAE22F) (fp_text reference C179 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A47BA8) (at 96.475 115.35 180) (path /5685DE78/56ACE15F) (fp_text reference C180 (at 3.7 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF" (at 0 3.7 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493 180) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (pad 2 smd rect (at 1.55 0.01493 180) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47BAE) (at 103.95 137.35) (path /5685DE78/56ACB293) (fp_text reference C181 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47BB4) (at 97.52 137.02) (path /5685DE78/56ACB325) (fp_text reference C182 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47BBA) (at 128.8 123.975) (path /5685DE78/56ACE269) (fp_text reference C183 (at 2.65 0.05) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47BC0) (at 97.57 134.27) (path /5685DE78/56ACABE8) (fp_text reference C184 (at 0.05 1.4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47BC6) (at 100.625 123.875 180) (path /5685DE78/56ACE32B) (fp_text reference C185 (at 2.85 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47BCC) (at 120.225 124.35) (path /5685DE78/56ACE3CE) (fp_text reference C186 (at 2.35 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56BD95F0) (tstamp 56A47BD2) (at 110.6 112.45) (path /5685DE78/56ACB541) (fp_text reference C187 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47BD8) (at 100.175 112.925 180) (path /5685DE78/56ACE48E) (fp_text reference C188 (at 2.4 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56BD95C3) (tstamp 56A47BDE) (at 118.6 112.45 180) (path /5685DE78/56ACB5C7) (fp_text reference C189 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47BEA) (at 97.07 145.27) (path /5685DE78/56ACB650) (fp_text reference C191 (at 0.05 1.4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47BF0) (at 102.3 105 180) (path /5685DE78/56ACE5E1) (fp_text reference C192 (at 2.375 0.025 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47BF6) (at 96.62 142.52) (path /5685DE78/56ACB6E2) (fp_text reference C193 (at 0.05 1.4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47BFC) (at 107.2 112.75 270) (path /5685DE78/56ACE68E) (fp_text reference C194 (at 2.25 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47C02) (at 97.3 139.65) (path /5685DE78/56ACB771) (fp_text reference C195 (at 0.05 1.4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47C08) (at 109.275 124.3 180) (path /5685DE78/56ACE73E) (fp_text reference C196 (at 2.6 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47C0E) (at 100.72 137.02) (path /5685DE78/56ACB889) (fp_text reference C197 (at 0.05 1.4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47C14) (at 100.79 139.42) (path /5685DE78/56ACB91E) (fp_text reference C198 (at 0.05 1.4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A47C1A) (at 67.65 183.64) (path /5685DE1C/56AECE55) (fp_text reference C199 (at -0.25 1.25) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "47 uF" (at 0.25 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A47C20) (at 67.5 175.44) (path /5685DE1C/56AF14EE) (fp_text reference C200 (at -0.25 1.25) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "47 uF" (at 0.25 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A47C26) (at 44.18 150.78) (path /5685DE1C/56AF1B4A) (fp_text reference C201 (at -0.25 1.25) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "47 uF" (at 0.25 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A47C2C) (at 92.98 162.03) (path /5685DE1C/56AF1F4C) (fp_text reference C202 (at -0.25 1.25) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "47 uF" (at 0.25 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A47C32) (at 44.85 174.69) (path /5685DE1C/56AF2549) (fp_text reference C203 (at -0.25 1.25) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "47 uF" (at 0.25 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47C38) (at 70.8 183.39) (path /5685DE1C/56AED01A) (fp_text reference C204 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47C3E) (at 71.15 175.24) (path /5685DE1C/56AF14F4) (fp_text reference C205 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47C44) (at 47.48 150.58) (path /5685DE1C/56AF1B50) (fp_text reference C206 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47C4A) (at 95.98 161.68) (path /5685DE1C/56AF1F52) (fp_text reference C207 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47C50) (at 47.85 174.69) (path /5685DE1C/56AF254F) (fp_text reference C208 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47C56) (at 74.2 183.44) (path /5685DE1C/56AED16B) (fp_text reference C209 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47C5C) (at 74.7 175.39) (path /5685DE1C/56AF14FA) (fp_text reference C210 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47C62) (at 51.08 150.555) (path /5685DE1C/56AF1B56) (fp_text reference C211 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47C68) (at 98.93 161.58) (path /5685DE1C/56AF1F58) (fp_text reference C212 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47C6E) (at 51.05 174.69) (path /5685DE1C/56AF2555) (fp_text reference C213 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B70A7E) (tstamp 56A47C74) (at 108 89.5 270) (path /5685DE1C/56AED247) (fp_text reference C214 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B713DE) (tstamp 56A47C7A) (at 120 85.6 270) (path /5685DE1C/56AF1500) (fp_text reference C215 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B710AF) (tstamp 56A47C80) (at 114 87.5 270) (path /5685DE1C/56AF1B5C) (fp_text reference C216 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B712C4) (tstamp 56A47C86) (at 117 81.5 90) (path /5685DE1C/56AF1F5E) (fp_text reference C217 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B70C76) (tstamp 56A47C8C) (at 99 82.5 270) (path /5685DE1C/56AF255B) (fp_text reference C218 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B70A81) (tstamp 56A47C92) (at 106.9 86.5 270) (path /5685DE1C/56AED36C) (fp_text reference C219 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B713DC) (tstamp 56A47C98) (at 118 84.5 90) (path /5685DE1C/56AF1506) (fp_text reference C220 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B710AD) (tstamp 56A47C9E) (at 111 88.5 270) (path /5685DE1C/56AF1B62) (fp_text reference C221 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B712C6) (tstamp 56A47CA4) (at 121 88.4 270) (path /5685DE1C/56AF1F64) (fp_text reference C222 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B70C73) (tstamp 56A47CAA) (at 99 87.5 90) (path /5685DE1C/56AF2561) (fp_text reference C223 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B70A83) (tstamp 56A47CB0) (at 106 83.5 270) (path /5685DE1C/56AED446) (fp_text reference C224 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B713D9) (tstamp 56A47CB6) (at 124 82.5 90) (path /5685DE1C/56AF150C) (fp_text reference C225 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B710AB) (tstamp 56A47CBC) (at 111 83.5 90) (path /5685DE1C/56AF1B68) (fp_text reference C226 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B712C9) (tstamp 56A47CC2) (at 122 81.5 270) (path /5685DE1C/56AF1F6A) (fp_text reference C227 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B70C6E) (tstamp 56A47CC8) (at 103 89.5 90) (path /5685DE1C/56AF2567) (fp_text reference C228 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B70A85) (tstamp 56A47CCE) (at 109 82.5 270) (path /5685DE1C/56AED52B) (fp_text reference C229 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B713D7) (tstamp 56A47CD4) (at 124 87.5 270) (path /5685DE1C/56AF1512) (fp_text reference C230 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B710A9) (tstamp 56A47CDA) (at 113.5 81) (path /5685DE1C/56AF1B6E) (fp_text reference C231 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B712CB) (tstamp 56A47CE0) (at 116 88.5 90) (path /5685DE1C/56AF1F70) (fp_text reference C232 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B70C6B) (tstamp 56A47CE6) (at 104 82.5 90) (path /5685DE1C/56AF256D) (fp_text reference C233 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A47CEC) (at 68 167.73) (path /5685DE1C/56AF34F8) (fp_text reference C234 (at -0.25 1.25) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "47 uF" (at 0.25 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A47CF2) (at 68.6 158.43) (path /5685DE1C/56AF3532) (fp_text reference C235 (at -0.25 1.25) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "47 uF" (at 0.25 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A47CF8) (at 44.75 159.23) (path /5685DE1C/56AF356C) (fp_text reference C236 (at -0.25 1.25) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "47 uF" (at 0.25 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A47CFE) (at 44.425 167.405) (path /5685DE1C/56AF35A7) (fp_text reference C237 (at -0.25 1.25) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "47 uF" (at 0.25 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A47D04) (at 92.73 153.83) (path /5685DE1C/56AF35E2) (fp_text reference C238 (at -0.25 1.25) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "47 uF" (at 0.25 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47D0A) (at 71.4 167.43) (path /5685DE1C/56AF34FE) (fp_text reference C239 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47D10) (at 71.8 158.63) (path /5685DE1C/56AF3538) (fp_text reference C240 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47D16) (at 48.125 158.905) (path /5685DE1C/56AF3572) (fp_text reference C241 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47D1C) (at 47.95 167.055) (path /5685DE1C/56AF35AD) (fp_text reference C242 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47D22) (at 95.93 153.58) (path /5685DE1C/56AF35E8) (fp_text reference C243 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47D28) (at 74.95 167.43) (path /5685DE1C/56AF3504) (fp_text reference C244 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47D2E) (at 75 158.68) (path /5685DE1C/56AF353E) (fp_text reference C245 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47D34) (at 51.3 158.905) (path /5685DE1C/56AF3578) (fp_text reference C246 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47D3A) (at 50.975 166.98) (path /5685DE1C/56AF35B3) (fp_text reference C247 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47D40) (at 99.03 153.83) (path /5685DE1C/56AF35EE) (fp_text reference C248 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B70833) (tstamp 56A47D46) (at 100.5 62 180) (path /5685DE1C/56AF350A) (fp_text reference C249 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6F5FB) (tstamp 56A47D4C) (at 109 62.5 90) (path /5685DE1C/56AF3544) (fp_text reference C250 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47D52) (at 114.5 64 180) (path /5685DE1C/56AF357E) (fp_text reference C251 (at -2.775 -0.375 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47D58) (at 128 59.55 90) (path /5685DE1C/56AF35B9) (fp_text reference C252 (at 0.05 -1.4 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47D5E) (at 124.5 68.5) (path /5685DE1C/56AF35F4) (fp_text reference C253 (at 0 -0.8) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B70830) (tstamp 56A47D64) (at 103.5 66) (path /5685DE1C/56AF3510) (fp_text reference C254 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6F595) (tstamp 56A47D6A) (at 104 62.5 270) (path /5685DE1C/56AF354A) (fp_text reference C255 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47D70) (at 115.5 61.95) (path /5685DE1C/56AF3584) (fp_text reference C256 (at 0.775 1.35) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47D76) (at 122.55 62.975) (path /5685DE1C/56AF35BF) (fp_text reference C257 (at -0.675 0.85) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47D7C) (at 130.5 61.95 180) (path /5685DE1C/56AF35FA) (fp_text reference C258 (at -0.7 0.8 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B7082C) (tstamp 56A47D82) (at 99.5 64) (path /5685DE1C/56AF3516) (fp_text reference C259 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6F576) (tstamp 56A47D88) (at 106 63.5 90) (path /5685DE1C/56AF3550) (fp_text reference C260 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47D8E) (at 111.5 65.05 180) (path /5685DE1C/56AF358A) (fp_text reference C261 (at 0.6 -0.85 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47D94) (at 118.5 60.975) (path /5685DE1C/56AF35C5) (fp_text reference C262 (at 2.525 -0.075) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47D9A) (at 125.45 61.95) (path /5685DE1C/56AF3600) (fp_text reference C263 (at -0.6 0.85) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B7082A) (tstamp 56A47DA0) (at 101 58.5 90) (path /5685DE1C/56AF351C) (fp_text reference C264 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6F570) (tstamp 56A47DA6) (at 108 59.5 90) (path /5685DE1C/56AF3556) (fp_text reference C265 (at -2.6 0.05 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6F5C3) (tstamp 56A47DAC) (at 112 61.5 90) (path /5685DE1C/56AF3590) (fp_text reference C266 (at 0.8 -1.675 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47DB2) (at 121.45 59.975) (path /5685DE1C/56AF35CB) (fp_text reference C267 (at 0.7 -0.85) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47DB8) (at 124.55 58.95) (path /5685DE1C/56AF3606) (fp_text reference C268 (at 0.05 -1.2) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A47DBE) (at 90.15 108.6 180) (path /5685DE62/56B18949) (fp_text reference C269 (at -2.65 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A47DC4) (at 75.6 100.25) (path /5685DE62/56B19A30) (fp_text reference C270 (at 0 1.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47DCA) (at 78.2 108.9) (path /5685DE62/56B19CAC) (fp_text reference C271 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 56A47DD0) (at 90.55 105.45) (path /5685DE62/56B18B9D) (fp_text reference C272 (at 3.75 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "100 uF" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 1 "/XAUI PHY/1V0_A")) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 56A47DD6) (at 73.71493 96.15 90) (path /5685DE62/56B19A36) (fp_text reference C273 (at 1.75 -1.46493 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "100 uF" (at 0 -3.7 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493 90) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 3 "/XAUI PHY/1V0_T")) (pad 2 smd rect (at 1.55 -0.01493 90) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A47DDC) (at 77.4 106.05 180) (path /5685DE62/56B19CB2) (fp_text reference C274 (at 2 1.45 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF" (at 0 3.7 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493 180) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 5 "/XAUI PHY/1V5_A")) (pad 2 smd rect (at 1.55 0.01493 180) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A47DE2) (at 97.5 51 270) (path /56869E40/56B1DB35) (fp_text reference C275 (at -1.25 1.5 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "47 uF" (at 0.25 2 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0 270) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.9 0 270) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A47DE8) (at 117.3 53) (path /56869E40/56B1E33F) (fp_text reference C276 (at 2.95 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "47 uF" (at 0.25 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A47DEE) (at 110.6 34.975 180) (path /56869E40/56B1F8EA) (fp_text reference C277 (at -0.05 1.425 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "47 uF" (at 0.25 2 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0 180) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.9 0 180) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47DF4) (at 100.5 45.15 90) (path /56869E40/56B1E4AE) (fp_text reference C278 (at 0 -1.275 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A47DFA) (at 116.25 41 90) (path /56869E40/56B1F8F2) (fp_text reference C279 (at -0.03 1 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47E00) (at 116.25 47.4 90) (path /56869E40/56B1E541) (fp_text reference C280 (at 0 1.5 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47E06) (at 108.3 37.5) (path /56869E40/56B1F8F8) (fp_text reference C281 (at 0 -1) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BE5B) (tstamp 56A47E0C) (at 107.2 48.3 90) (path /56869E40/56B1E5B7) (fp_text reference C282 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BA46) (tstamp 56A47E12) (at 110.4 47.625 90) (path /56869E40/56B1F8FE) (fp_text reference C283 (at 0.125 -0.825 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BC9C) (tstamp 56A47E18) (at 102.725 44 180) (path /56869E40/56B1E648) (fp_text reference C284 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BA75) (tstamp 56A47E1E) (at 108.4 51.25 180) (path /56869E40/56B1F904) (fp_text reference C285 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BB05) (tstamp 56A47E24) (at 106.41 44.39 90) (path /56869E40/56B1E6C2) (fp_text reference C286 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BE9A) (tstamp 56A47E2A) (at 111.2 50.9 270) (path /56869E40/56B1F90A) (fp_text reference C287 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BC6E) (tstamp 56A47E30) (at 101.9 50.4 180) (path /56869E40/56B1E73F) (fp_text reference C288 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BAE9) (tstamp 56A47E36) (at 107.2 45.62 270) (path /56869E40/56B1F910) (fp_text reference C289 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A47E3C) (at 97.5 39.75 270) (path /56869E40/56B1FCE0) (fp_text reference C290 (at 0 1.5 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF" (at 0 3.7 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A47E42) (at 106.5 35) (path /56869E40/56B20A7F) (fp_text reference C291 (at 0 -1.65) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF" (at 0 3.7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47E48) (at 111.175 37.5) (path /56869E40/56B20201) (fp_text reference C292 (at 0.025 -1.025) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47E4E) (at 102.02 37.51) (path /56869E40/56B20A88) (fp_text reference C293 (at -0.03 -1.1) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BD63) (tstamp 56A47E54) (at 114.91 43.26) (path /56869E40/56B202E0) (fp_text reference C294 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BC01) (tstamp 56A47E5A) (at 112.4 45.6) (path /56869E40/56B20A8E) (fp_text reference C295 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:CAP_AL_10MM_SMT (layer F.Cu) (tedit 56442031) (tstamp 56A47E60) (at 150.2 119 90) (path /5685DDE2/56B2D82A) (fp_text reference C296 (at 0 7 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF 50V" (at 0 9 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start 3.5 -5.5) (end 1.5 -5.5) (layer F.SilkS) (width 0.2)) (fp_line (start 5.5 -3.5) (end 3.5 -5.5) (layer F.SilkS) (width 0.2)) (fp_line (start 5.5 5.5) (end 5.5 -3.5) (layer F.SilkS) (width 0.2)) (fp_line (start 1.5 5.5) (end 5.5 5.5) (layer F.SilkS) (width 0.2)) (fp_line (start -5.5 5.5) (end -1.5 5.5) (layer F.SilkS) (width 0.2)) (fp_line (start -3.5 -5.5) (end -1.5 -5.5) (layer F.SilkS) (width 0.2)) (fp_line (start -5.5 -3.5) (end -3.5 -5.5) (layer F.SilkS) (width 0.2)) (fp_line (start -5.5 5.5) (end -5.5 -3.5) (layer F.SilkS) (width 0.2)) (pad 1 smd rect (at 0 -4 90) (size 1.6 3.5) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0") (solder_paste_margin 0.01)) (pad 2 smd rect (at 0 4 90) (size 1.6 3.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND") (solder_paste_margin 0.01)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_elec_10x10.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 270)) ) ) (module azonenberg_pcb:CAP_AL_10MM_SMT (layer F.Cu) (tedit 56442031) (tstamp 56A47E66) (at 169.95 119 90) (path /5685DDE2/56B2E04A) (fp_text reference C297 (at -0.1 -6.45 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF 50V" (at 0 9 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start 3.5 -5.5) (end 1.5 -5.5) (layer F.SilkS) (width 0.2)) (fp_line (start 5.5 -3.5) (end 3.5 -5.5) (layer F.SilkS) (width 0.2)) (fp_line (start 5.5 5.5) (end 5.5 -3.5) (layer F.SilkS) (width 0.2)) (fp_line (start 1.5 5.5) (end 5.5 5.5) (layer F.SilkS) (width 0.2)) (fp_line (start -5.5 5.5) (end -1.5 5.5) (layer F.SilkS) (width 0.2)) (fp_line (start -3.5 -5.5) (end -1.5 -5.5) (layer F.SilkS) (width 0.2)) (fp_line (start -5.5 -3.5) (end -3.5 -5.5) (layer F.SilkS) (width 0.2)) (fp_line (start -5.5 5.5) (end -5.5 -3.5) (layer F.SilkS) (width 0.2)) (pad 1 smd rect (at 0 -4 90) (size 1.6 3.5) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0") (solder_paste_margin 0.01)) (pad 2 smd rect (at 0 4 90) (size 1.6 3.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND") (solder_paste_margin 0.01)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_elec_10x10.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 270)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer B.Cu) (tedit 54A4E4D1) (tstamp 56A47E6C) (at 149.2 110) (path /5685DDE2/56B2D6CF) (fp_text reference C298 (at 2.8 -0.2 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF 25V" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer B.Cu) (tedit 54A4E4D1) (tstamp 56A47E72) (at 169.2 110) (path /5685DDE2/56B2E044) (fp_text reference C299 (at 2.8 -0.2 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF 25V" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer B.Cu) (tedit 54A4E4D1) (tstamp 56A47E78) (at 149.2 113.25) (path /5685DDE2/56B2DABC) (fp_text reference C300 (at 2.75 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF 25V" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer B.Cu) (tedit 54A4E4D1) (tstamp 56A47E7E) (at 169.2 113.2) (path /5685DDE2/56B2E054) (fp_text reference C301 (at 2.65 -0.214931 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF 25V" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer B.Cu) (tedit 54A4E4D1) (tstamp 56A47E84) (at 149.2 116.4) (path /5685DDE2/56B2DB0A) (fp_text reference C302 (at 2.8 -0.2 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF 25V" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer B.Cu) (tedit 54A4E4D1) (tstamp 56A47E8A) (at 169.2 116.4) (path /5685DDE2/56B2E05A) (fp_text reference C303 (at 2.7 -0.1 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF 25V" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer B.Cu) (tedit 54A4E4D1) (tstamp 56A47E90) (at 144.2 109.985069 180) (path /5685DDE2/56B2DB55) (fp_text reference C304 (at 2.6 -0.014931 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF 25V" (at 0 -3.7 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493 180) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 -0.01493 180) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer B.Cu) (tedit 54A4E4D1) (tstamp 56A47E96) (at 164.1 110 180) (path /5685DDE2/56B2E060) (fp_text reference C305 (at 2.6 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF 25V" (at 0 -3.7 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493 180) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 -0.01493 180) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer B.Cu) (tedit 54A4E4D1) (tstamp 56A47E9C) (at 144.2 113.2 180) (path /5685DDE2/56B2DBA7) (fp_text reference C306 (at 2.6 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF 25V" (at 0 -3.7 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493 180) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 -0.01493 180) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer B.Cu) (tedit 54A4E4D1) (tstamp 56A47EA2) (at 164.1 113.2 180) (path /5685DDE2/56B2E066) (fp_text reference C307 (at 2.6 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF 25V" (at 0 -3.7 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493 180) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 -0.01493 180) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer B.Cu) (tedit 54A4E4D1) (tstamp 56A47EA8) (at 144.2 116.4 180) (path /5685DDE2/56B2DC04) (fp_text reference C308 (at 2.6 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF 25V" (at 0 -3.7 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493 180) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 -0.01493 180) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer B.Cu) (tedit 54A4E4D1) (tstamp 56A47EAE) (at 164.1 116.4 180) (path /5685DDE2/56B2E06C) (fp_text reference C309 (at 2.65 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "22 uF 25V" (at 0 -3.7 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493 180) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 -0.01493 180) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A47EB4) (at 178.7 93) (path /5685DDE2/56B2EEDE) (fp_text reference C310 (at 3.8 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF" (at 0 3.7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A47EBA) (at 159.2 93) (path /5685DDE2/56B302A9) (fp_text reference C311 (at 3.4 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF" (at 0 3.7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A47EC0) (at 178.7 95) (path /5685DDE2/56B2EFF1) (fp_text reference C312 (at 3.75 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF" (at 0 3.7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A47EC6) (at 159.2 95) (path /5685DDE2/56B302B0) (fp_text reference C313 (at 3.4 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF" (at 0 3.7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A47ECC) (at 178.7 97) (path /5685DDE2/56B2F066) (fp_text reference C314 (at 3.75 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF" (at 0 3.7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A47ED2) (at 159.2 97) (path /5685DDE2/56B302B6) (fp_text reference C315 (at 3.4 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF" (at 0 3.7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A47ED8) (at 178.7 99) (path /5685DDE2/56B2F0D4) (fp_text reference C316 (at 3.75 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF" (at 0 3.7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A47EDE) (at 159.2 99) (path /5685DDE2/56B302BC) (fp_text reference C317 (at 3.5 -0.1) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF" (at 0 3.7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 56A47EE4) (at 178.7 93) (path /5685DDE2/56B2F145) (fp_text reference C318 (at 4.05 -0.01493) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "100 uF" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 56A47EEA) (at 159.2 93) (path /5685DDE2/56B302C2) (fp_text reference C319 (at 3.4 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "100 uF" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 56A47EF0) (at 178.7 95) (path /5685DDE2/56B2F1B9) (fp_text reference C320 (at 3.75 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "100 uF" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 56A47EF6) (at 159.2 95) (path /5685DDE2/56B302C8) (fp_text reference C321 (at 3.4 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "100 uF" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 56A47EFC) (at 178.7 97) (path /5685DDE2/56B2F234) (fp_text reference C322 (at 3.75 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "100 uF" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 56A47F02) (at 159.2 97) (path /5685DDE2/56B302CE) (fp_text reference C323 (at 3.4 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "100 uF" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 56A47F08) (at 178.7 99) (path /5685DDE2/56B2F2B6) (fp_text reference C324 (at 3.75 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "100 uF" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 56A47F0E) (at 159.2 99) (path /5685DDE2/56B302D4) (fp_text reference C325 (at 3.5 -0.1) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "100 uF" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47F14) (at 158.4 91) (path /5685DDE2/56B2F39A) (fp_text reference C326 (at 3.2 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47F1A) (at 177.9 91.3) (path /5685DDE2/56B302DA) (fp_text reference C327 (at 3.1 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A47F20) (at 158.4 91) (path /5685DDE2/56B2F467) (fp_text reference C328 (at 3.2 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A47F26) (at 177.9 91.3) (path /5685DDE2/56B302E0) (fp_text reference C329 (at 3.15 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47F2C) (at 158 89.95) (path /5685DDE2/56B2F4EE) (fp_text reference C330 (at 3.55 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47F32) (at 177.65 90.3) (path /5685DDE2/56B302E6) (fp_text reference C331 (at 3.3 -0.05) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47F38) (at 74.05 119.35 180) (path /5685DDE2/56B51BEC) (fp_text reference C332 (at 2.45 0.05 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "1 nF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 86 "/Power Supply/0V75_REF")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47F3E) (at 70.95 115.85 270) (path /5685DDE2/56B4678F) (fp_text reference C333 (at -2.45 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A47F44) (at 71.95 117.35) (path /5685DDE2/56B4665A) (fp_text reference C334 (at -2.85 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A47F4A) (at 71.35 122.05 270) (path /5685DDE2/56B54BE6) (fp_text reference C335 (at 2.8 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A47F50) (at 72.45 122.05 270) (path /5685DDE2/56B550BF) (fp_text reference C336 (at 2.85 -0.05 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A47F56) (at 73.55 122.05 270) (path /5685DDE2/56B55189) (fp_text reference C337 (at 2.9 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A47F5C) (at 74.65 122.05 270) (path /5685DDE2/56B55258) (fp_text reference C338 (at 2.9 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A47F62) (at 77.35 115.65 90) (path /5685DDE2/56B5CA67) (fp_text reference C339 (at 2.65 0.05 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "10 uF" (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 87 "/Power Supply/RAM_VTT_RAW")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A47F68) (at 78.45 115.65 90) (path /5685DDE2/56B5CE83) (fp_text reference C340 (at 2.7 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "10 uF" (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 87 "/Power Supply/RAM_VTT_RAW")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A47F6E) (at 76.25 115.65 90) (path /5685DDE2/56B5D13E) (fp_text reference C341 (at 2.65 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "10 uF" (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 87 "/Power Supply/RAM_VTT_RAW")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A47F74) (at 185.75 36.25 270) (path /5685DDE2/56B679C6) (fp_text reference C343 (at 0 -1.75 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF 25V" (at 0 3.7 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A47F7A) (at 180.75 36.25 270) (path /5685DDE2/56B67C2A) (fp_text reference C344 (at -2.75 0 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 603 "/LEDs and test points/5V0_SB")) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47F80) (at 179.75 35 90) (path /5685DDE2/56B6B080) (fp_text reference C345 (at 2.25 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.01 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 88 "Net-(C345-Pad1)")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A47F86) (at 174.75 38.25 270) (path /5685DDE2/56B6D1E8) (fp_text reference C346 (at 2.7 0.05 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 89 "/Clocks / buffers/1V8_SB")) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A47F8C) (at 174.75 35.25 90) (path /5685DDE2/56B6D647) (fp_text reference C347 (at 2.95 0.05 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 90 "/LEDs and test points/2V5_SB")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47F92) (at 170 36.4) (path /5685DDE2/56B703C6) (fp_text reference C348 (at 0.6 -0.9) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 90 "/LEDs and test points/2V5_SB")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47F98) (at 169.5 38.400001 90) (path /5685DDE2/56B70943) (fp_text reference C349 (at 0.100001 0.8 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 89 "/Clocks / buffers/1V8_SB")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47F9E) (at 171 38.3 90) (path /5685DDE2/56B70B6F) (fp_text reference C350 (at 1.1 1.1 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 89 "/Clocks / buffers/1V8_SB")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47FA4) (at 168.6 37.9 270) (path /5685DDE2/56B70C6C) (fp_text reference C351 (at -2.1 0 450) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 89 "/Clocks / buffers/1V8_SB")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47FAA) (at 65.5 40.75 90) (path /5685DDE2/56B7E397) (fp_text reference C352 (at -0.5 1.75 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "3.3 nF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 91 "Net-(C352-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 56A47FB0) (at 67.25 38.25 270) (path /5685DDE2/56B7E0DC) (fp_text reference C353 (at 0 -1.5 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "10 uF 25V" (at 0 -3.7 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493 270) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 -0.01493 270) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A47FB6) (at 63 41) (path /5685DDE2/56B81430) (fp_text reference C354 (at 1.5 1.75) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "22 uF" (at 0.25 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 92 "/Power Supply/3V3_RAW")) (pad 2 smd rect (at 0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47FBC) (at 65.5 38.5 270) (path /5685DDE2/56B83F07) (fp_text reference C355 (at -2.4 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF 25V" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A47FC2) (at 67.25 38.25 270) (path /5685DDE2/56B86791) (fp_text reference C356 (at 0 -1.5 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "10 uF 25V" (at 0 3.7 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A47FC8) (at 52.05 116 180) (path /5685DDE2/56B88F7D) (fp_text reference C357 (at 0 0.75 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "3.3 nF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 93 "Net-(C357-Pad1)")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A47FCE) (at 51.85 119 270) (path /5685DDE2/56B88F77) (fp_text reference C358 (at 0 1.5 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "10 uF 25V" (at 0 3.7 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 56A47FD4) (at 51.8 119 270) (path /5685DDE2/56B88FC5) (fp_text reference C359 (at 0 1.45 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "10 uF 25V" (at 0 -3.7 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493 270) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 -0.01493 270) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47FDA) (at 53.55 119.35 270) (path /5685DDE2/56B88F9C) (fp_text reference C360 (at 2.25 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF 25V" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47FE6) (at 148.4 46.1 180) (path /5685DDE2/56B92A57) (fp_text reference C362 (at 2.61 -0.02 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "3.3 nF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 95 "Net-(C362-Pad1)")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A47FEC) (at 150.63 46.41 270) (path /5685DDE2/56B92A51) (fp_text reference C363 (at 0.01 -1.51 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "10 uF 25V" (at 0 3.7 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 56A47FF2) (at 150.59 46.41 270) (path /5685DDE2/56B92A9D) (fp_text reference C364 (at 0 -1.55 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "10 uF 25V" (at 0 -3.7 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493 270) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 -0.01493 270) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A47FF8) (at 148.4 45.5 180) (path /5685DDE2/56B92A75) (fp_text reference C365 (at 0.01 0.92 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF 25V" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A47FFE) (at 147.39 49.02) (path /5685DDE2/56B92A6E) (fp_text reference C366 (at 2.97 0.21) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "22 uF" (at 0.25 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 96 "/Power Supply/1V2_RAW")) (pad 2 smd rect (at 0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A48004) (at 131.25 39.15 270) (path /5685DDE2/56B96BA6) (fp_text reference C367 (at 2.3 -0.65 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "3.3 nF" (at 0.05 3.1 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 97 "Net-(C367-Pad1)")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 56A4800A) (at 133 37 270) (path /5685DDE2/56B96BA0) (fp_text reference C368 (at 3.75 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "10 uF 25V" (at 0 -3.7 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493 270) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 -0.01493 270) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A48010) (at 133 37 270) (path /5685DDE2/56B96BEC) (fp_text reference C369 (at 3.75 0 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "10 uF 25V" (at 0 3.7 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A48016) (at 130.9 36.45 180) (path /5685DDE2/56B96BC4) (fp_text reference C370 (at 1.45 1.2 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF 25V" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A4801C) (at 128.95 39.6) (path /5685DDE2/56B96BBD) (fp_text reference C371 (at 1.1 1.45 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "22 uF" (at 0.25 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 98 "/Power Supply/2V5_RAW")) (pad 2 smd rect (at 0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A48022) (at 177.7 40.8 270) (path /5685DDE2/56BAA37C) (fp_text reference C372 (at 2.7 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 99 "/FPGA support/1V25_REF")) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A48028) (at 176.6 40.8 270) (path /5685DDE2/56BB4A35) (fp_text reference C373 (at 2.3 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 99 "/FPGA support/1V25_REF")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A4802E) (at 179.775 45.425 90) (path /5685DDE2/56BB7464) (fp_text reference C374 (at 0.675 -0.85 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 100 "/Power Supply/12V0_COMPARE")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A48034) (at 179.775 47.525 270) (path /5685DDE2/56BB7710) (fp_text reference C375 (at 2.825 0.025 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 100 "/Power Supply/12V0_COMPARE")) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A4803A) (at 182.475 47.1 90) (path /5685DDE2/56BB93B9) (fp_text reference C376 (at 0 1.125 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 90 "/LEDs and test points/2V5_SB")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A48040) (at 182.475 45 270) (path /5685DDE2/56BB9577) (fp_text reference C377 (at -2.4 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 90 "/LEDs and test points/2V5_SB")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A48046) (at 172.4 42.6 90) (path /5685DDE2/56BC0AB0) (fp_text reference C378 (at 3.43 1.32 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "3.3 nF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 101 "Net-(C378-Pad1)")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 56A4804C) (at 173.3 45.6 270) (path /5685DDE2/56BC0AAA) (fp_text reference C379 (at 0 -1.5 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "10 uF 25V" (at 0 -3.7 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -1.55 -0.01493 270) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 -0.01493 270) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 56A48052) (at 173.3 45.6 270) (path /5685DDE2/56BC0AD5) (fp_text reference C380 (at 3.1 -1.4 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "10 uF 25V" (at 0 3.7 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A48058) (at 173.2 42.6 90) (path /5685DDE2/56BC0ACE) (fp_text reference C381 (at 0.4 1.3 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF 25V" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A4805E) (at 169.7 48.4) (path /5685DDE2/56BC0AC7) (fp_text reference C382 (at 2.8 0.1 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "22 uF" (at 0.25 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 102 "/Power Supply/1V8_RAW")) (pad 2 smd rect (at 0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0805_CAP_NOSILK (layer F.Cu) (tedit 54A4E5F3) (tstamp 56A48064) (at 46.33 143.38) (path /5685DE1C/56C5C5D1) (fp_text reference C383 (at -0.25 1.25) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "47 uF" (at 0.25 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.9 0) (size 0.8 1.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A4806A) (at 75 52.65 270) (path /5697D556/56C858DD) (fp_text reference C384 (at 0 -1 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A48070) (at 80.85 52.6 180) (path /5697D556/56C85820) (fp_text reference C385 (at 0 -0.95 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A48076) (at 217.15 60.15) (path /5697D556/56C85AE9) (fp_text reference C386 (at 0.05 1.4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A4807C) (at 169.75 59.25) (path /56BEDE01/56C8923F) (fp_text reference C387 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 56A48082) (at 76.65 122.65 270) (path /56BEDE01/56C89293) (fp_text reference C388 (at -2.7 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A48088) (at 177.9 121.1) (path /56BEDE01/56C892C7) (fp_text reference C389 (at 0 1) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A4808E) (at 152.2 88.8) (path /56BEDE01/56C89330) (fp_text reference C390 (at -0.1 0.9) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A48094) (at 171.15 52.95 180) (path /56BEDE01/56C8935F) (fp_text reference C391 (at -2.5 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A4809A) (at 148.6 55.1 270) (path /56BEDE01/56C89389) (fp_text reference C392 (at 0.5 -1 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A480A0) (at 78.55 123.2 180) (path /56BEDE01/56C893B6) (fp_text reference C393 (at 0 -0.85 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A480A6) (at 65.4 123.65) (path /56BEDE01/56C893EC) (fp_text reference C394 (at 0 -0.95) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A480AC) (at 124.375 44.8 180) (path /56BEDE01/56C89423) (fp_text reference C395 (at 0.225 -1 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A480B2) (at 58.35 45.75 180) (path /56BEDE01/56C8945B) (fp_text reference C396 (at -2.55 0.05 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A480B8) (at 113.7 35.425 180) (path /56869E40/56D1E55E) (fp_text reference C397 (at -0.02 1.045 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A480BE) (at 114.025 37.475) (path /56869E40/56D1E9D4) (fp_text reference C398 (at 2.75 0.025) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 103 "/Zynq CPU/A1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BF08) (tstamp 56A480C4) (at 109.9 44.05 180) (path /56869E40/56D1EBA6) (fp_text reference C399 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 103 "/Zynq CPU/A1V8")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D451) (tstamp 56A480CA) (at 114.05 74.5 180) (path /5685DE1C/56D299AA) (fp_text reference C400 (at -2.05 -0.05 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 99 "/FPGA support/1V25_REF")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BD34) (tstamp 56A480D0) (at 108.7 43.6 90) (path /56869E40/56D28342) (fp_text reference C401 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 99 "/FPGA support/1V25_REF")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A480D6) (at 71.38 142.48) (path /5685DE1C/56D2BDCA) (fp_text reference C402 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A480DC) (at 68.13 139.68) (path /5685DE1C/56D30AC3) (fp_text reference C403 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A480E2) (at 74.68 142.43) (path /5685DE1C/56D2BF8E) (fp_text reference C404 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A480E8) (at 71.13 139.58) (path /5685DE1C/56D30AC9) (fp_text reference C405 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A480EE) (at 131 70.5) (path /5685DE1C/56D2C13F) (fp_text reference C406 (at 2.25 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A480F4) (at 127 70.5) (path /5685DE1C/56D30ACF) (fp_text reference C407 (at -2 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A480FA) (at 131 78.5) (path /5685DE1C/56D2C414) (fp_text reference C408 (at 1.4 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A48100) (at 127 76.5) (path /5685DE1C/56D30AD5) (fp_text reference C409 (at -2 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A48106) (at 77.83 142.38) (path /5685DE1C/56D2C5C5) (fp_text reference C410 (at 0.05 1.4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A4810C) (at 74.23 139.38) (path /5685DE1C/56D30ADB) (fp_text reference C411 (at 0.05 1.4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A48112) (at 80.88 142.28) (path /5685DE1C/56D2C805) (fp_text reference C412 (at 0.05 1.4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A48118) (at 77.28 139.38) (path /5685DE1C/56D30AE1) (fp_text reference C413 (at 0.05 1.4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A4811E) (at 135.585 67.582) (path /5685DE1C/56D36DB9) (fp_text reference C414 (at 2.8 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 106 "/FPGA support/1V2")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A48124) (at 84.93 139.68) (path /5685DE1C/56D37881) (fp_text reference C415 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A4812A) (at 136.785 65.582) (path /5685DE1C/56D374EB) (fp_text reference C416 (at 0.215 -1.082) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 106 "/FPGA support/1V2")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A48130) (at 84.73 142.43) (path /5685DE1C/56D37A57) (fp_text reference C417 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A48136) (at 48.65 182.49) (path /5685DE1C/56D4103A) (fp_text reference C418 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A4813C) (at 45.3 182.39) (path /5685DE1C/56D41041) (fp_text reference C419 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 107 "/FPGA support/A1V8_ARTIX")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B6D459) (tstamp 56A48142) (at 115.99 74.5 180) (path /5685DE1C/56D41048) (fp_text reference C420 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 107 "/FPGA support/A1V8_ARTIX")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A48148) (at 116.25 41.075 90) (path /56869E40/56D4768A) (fp_text reference C421 (at 0.015 1.05 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A4814E) (at 117.23 44.28) (path /56869E40/56D47690) (fp_text reference C422 (at 2.52 -0.01) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 108 "/Zynq CPU/ZYNQ_VPLL")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 56A48154) (at 117.24 43.2) (path /56869E40/56D46114) (fp_text reference C423 (at 2.55 0.02) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 108 "/Zynq CPU/ZYNQ_VPLL")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56A9BD8B) (tstamp 56A4815A) (at 110.89 42.35) (path /56869E40/56D44DE1) (fp_text reference C424 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 108 "/Zynq CPU/ZYNQ_VPLL")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A48160) (at 127.25 50.1 90) (path /569AEE1D/56D543E6) (fp_text reference C425 (at -0.05 1.2 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A48166) (at 162.1 37.9 270) (path /569AEE1D/56D4FD5D) (fp_text reference C426 (at 0 0.9 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 89 "/Clocks / buffers/1V8_SB")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A4816C) (at 78.24 74.77 90) (path /569AEE1D/56D6B289) (fp_text reference C427 (at 0.92 -1.17 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A48172) (at 83.15 64.75 90) (path /569AEE1D/56D6B154) (fp_text reference C428 (at 0 0.9 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A48178) (at 83.15 73.62 180) (path /569AEE1D/56D76CBA) (fp_text reference C429 (at 0.29 0.88 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 109 "/Clocks / buffers/CLK_125MHZ_AC_P")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 110 "/Clocks / buffers/CLK_125MHZ_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A4817E) (at 83.15 74.83 180) (path /569AEE1D/56D76F8C) (fp_text reference C430 (at 0.52 -0.91 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 111 "/Clocks / buffers/CLK_125MHZ_AC_N")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 112 "/Clocks / buffers/CLK_125MHZ_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A48184) (at 85.8 64.05 180) (path /569AEE1D/56D784F9) (fp_text reference C431 (at 0.35 1 360) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 113 "/Clocks / buffers/CLK_156MHZ_AC_P")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 114 "/Clocks / buffers/CLK_156MHZ_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56A4818A) (at 85.8 64.75 180) (path /569AEE1D/56D784FF) (fp_text reference C432 (at 0.35 -1.9 360) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 115 "/Clocks / buffers/CLK_156MHZ_AC_N")) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 116 "/Clocks / buffers/CLK_156MHZ_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A48190) (at 86.76 76.4) (path /569AEE1D/56D70A60) (fp_text reference C433 (at -0.01 -0.76) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A48196) (at 88.25 65.3 45) (path /569AEE1D/56D784E9) (fp_text reference C434 (at -0.388909 0.883883 45) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "1 uF" (at 0.05 -3.1 45) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 45) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.5 0 45) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A4819C) (at 86 73.44 315) (path /569AEE1D/56D7096D) (fp_text reference C435 (at -0.544472 -0.855599 315) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "1 uF" (at 0.05 -3.1 315) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 315) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 315) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A481A2) (at 88.25 63.65 315) (path /569AEE1D/56D784E3) (fp_text reference C436 (at -0.035355 -0.813173 315) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "1 uF" (at 0.05 -3.1 315) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 315) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.5 0 315) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:CAP_AL_10MM_SMT (layer F.Cu) (tedit 56442031) (tstamp 56A481A8) (at 180.8 57.2 90) (path /5685DDE2/56DBF3F6) (fp_text reference C437 (at 0 7 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF 50V" (at 0 9 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start 3.5 -5.5) (end 1.5 -5.5) (layer F.SilkS) (width 0.2)) (fp_line (start 5.5 -3.5) (end 3.5 -5.5) (layer F.SilkS) (width 0.2)) (fp_line (start 5.5 5.5) (end 5.5 -3.5) (layer F.SilkS) (width 0.2)) (fp_line (start 1.5 5.5) (end 5.5 5.5) (layer F.SilkS) (width 0.2)) (fp_line (start -5.5 5.5) (end -1.5 5.5) (layer F.SilkS) (width 0.2)) (fp_line (start -3.5 -5.5) (end -1.5 -5.5) (layer F.SilkS) (width 0.2)) (fp_line (start -5.5 -3.5) (end -3.5 -5.5) (layer F.SilkS) (width 0.2)) (fp_line (start -5.5 5.5) (end -5.5 -3.5) (layer F.SilkS) (width 0.2)) (pad 1 smd rect (at 0 -4 90) (size 1.6 3.5) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0") (solder_paste_margin 0.01)) (pad 2 smd rect (at 0 4 90) (size 1.6 3.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND") (solder_paste_margin 0.01)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_elec_10x10.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 270)) ) ) (module azonenberg_pcb:CAP_AL_10MM_SMT (layer F.Cu) (tedit 56442031) (tstamp 56A481AE) (at 180.8 45.4 90) (path /5685DDE2/56DBF6EC) (fp_text reference C438 (at 0 7 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "100 uF 50V" (at 0 9 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start 3.5 -5.5) (end 1.5 -5.5) (layer F.SilkS) (width 0.2)) (fp_line (start 5.5 -3.5) (end 3.5 -5.5) (layer F.SilkS) (width 0.2)) (fp_line (start 5.5 5.5) (end 5.5 -3.5) (layer F.SilkS) (width 0.2)) (fp_line (start 1.5 5.5) (end 5.5 5.5) (layer F.SilkS) (width 0.2)) (fp_line (start -5.5 5.5) (end -1.5 5.5) (layer F.SilkS) (width 0.2)) (fp_line (start -3.5 -5.5) (end -1.5 -5.5) (layer F.SilkS) (width 0.2)) (fp_line (start -5.5 -3.5) (end -3.5 -5.5) (layer F.SilkS) (width 0.2)) (fp_line (start -5.5 5.5) (end -5.5 -3.5) (layer F.SilkS) (width 0.2)) (pad 1 smd rect (at 0 -4 90) (size 1.6 3.5) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0") (solder_paste_margin 0.01)) (pad 2 smd rect (at 0 4 90) (size 1.6 3.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND") (solder_paste_margin 0.01)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_elec_10x10.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 270)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B7BF16) (tstamp 56A481B4) (at 94.45 77.55) (path /5685DE62/56A7A61B) (fp_text reference C439 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 117 "/XAUI PHY/XAUI_TXD1_C_P")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 118 "/XAUI PHY/XAUI_TXD1_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B797C6) (tstamp 56A481CC) (at 85.6 104.35 270) (path /5685DE62/56A7AF51) (fp_text reference C443 (at 2.4 -0.8 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 125 "/XAUI PHY/XAUI_RXD1_C_P")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 126 "/XAUI PHY/XAUI_RXD1_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B797C4) (tstamp 56A481D2) (at 84.9 104.35 270) (path /5685DE62/56A7AF57) (fp_text reference C444 (at -0.45 1.9 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 127 "/XAUI PHY/XAUI_RXD1_C_N")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 128 "/XAUI PHY/XAUI_RXD1_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A481D8) (at 92.7 98) (path /5685DE62/56A7AF5F) (fp_text reference C445 (at 2.3 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 129 "/XAUI PHY/XAUI_RXD3_C_P")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 130 "/XAUI PHY/XAUI_RXD3_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56A481DE) (at 92.7 99) (path /5685DE62/56A7AF65) (fp_text reference C446 (at 2.3 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 131 "/XAUI PHY/XAUI_RXD3_C_N")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 132 "/XAUI PHY/XAUI_RXD3_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B7BFC7) (tstamp 56A481E4) (at 95 75.55) (path /5685DE62/56A70E47) (fp_text reference C447 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 133 "/XAUI PHY/XAUI_TXD0_C_P")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 134 "/XAUI PHY/XAUI_TXD0_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B7BFC9) (tstamp 56A481EA) (at 95 76.25) (path /5685DE62/56A714DC) (fp_text reference C448 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 135 "/XAUI PHY/XAUI_TXD0_C_N")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 136 "/XAUI PHY/XAUI_TXD0_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B7B99E) (tstamp 56A481F0) (at 96.25 79.325) (path /5685DE62/56A71FAF) (fp_text reference C449 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 137 "/XAUI PHY/XAUI_TXD2_C_P")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 138 "/XAUI PHY/XAUI_TXD2_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B7B99B) (tstamp 56A481F6) (at 96.25 78.575) (path /5685DE62/56A71FB5) (fp_text reference C450 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 139 "/XAUI PHY/XAUI_TXD2_C_N")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 140 "/XAUI PHY/XAUI_TXD2_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B797DF) (tstamp 56A481FC) (at 84.6 106.25 270) (path /5685DE62/56A72470) (fp_text reference C451 (at 2.2 0.15 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 141 "/XAUI PHY/XAUI_RXD0_C_P")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 142 "/XAUI PHY/XAUI_RXD0_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B797E1) (tstamp 56A48202) (at 83.9 106.25 270) (path /5685DE62/56A72476) (fp_text reference C452 (at 2.25 -0.05 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 143 "/XAUI PHY/XAUI_RXD0_C_N")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 144 "/XAUI PHY/XAUI_RXD0_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B797DB) (tstamp 56A48208) (at 86.6 106.25 270) (path /5685DE62/56A72976) (fp_text reference C453 (at 2.3 -0.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 145 "/XAUI PHY/XAUI_RXD2_C_P")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 146 "/XAUI PHY/XAUI_RXD2_P")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 56B797DD) (tstamp 56A4820E) (at 85.9 106.25 270) (path /5685DE62/56A7297C) (fp_text reference C454 (at 2.35 -0.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 147 "/XAUI PHY/XAUI_RXD2_C_N")) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 148 "/XAUI PHY/XAUI_RXD2_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A48214) (at 72.8 53.8) (path /5685DE45/56AF724B) (fp_text reference D1 (at 0 -1.75) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 149 "Net-(D1-Pad1)")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A4821A) (at 72.8 63.4) (path /5685DE45/56AF839B) (fp_text reference D2 (at 0 1.4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 150 "Net-(D2-Pad1)")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A48220) (at 72.8 68) (path /5685DE45/56AF8790) (fp_text reference D3 (at 2.3 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 151 "Net-(D3-Pad1)")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A48226) (at 72.8 77.6) (path /5685DE45/56AF8B98) (fp_text reference D4 (at 0 1.4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 152 "Net-(D4-Pad1)")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A4822C) (at 72.8 82.4) (path /5685DE45/56AF8BAD) (fp_text reference D5 (at 2.2 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 153 "Net-(D5-Pad1)")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A48232) (at 72.8 91.8) (path /5685DE45/56AF8E8E) (fp_text reference D6 (at 0 1.4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 154 "Net-(D6-Pad1)")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A48238) (at 72.8 96.6) (path /5685DE45/56AF8EA3) (fp_text reference D7 (at 0 1.4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 155 "Net-(D7-Pad1)")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A4823E) (at 72.8 106.2) (path /5685DE45/56AF8EB8) (fp_text reference D8 (at 0 1.4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 156 "Net-(D8-Pad1)")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A48244) (at 135 36.25 90) (path /56CAEC0A/56CEA74B) (fp_text reference D9 (at 2 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 157 "Net-(D9-Pad1)")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 158 "Net-(D9-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A4824A) (at 136.5 36.25 90) (path /56CAEC0A/56CEB833) (fp_text reference D10 (at 2.5 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 159 "Net-(D10-Pad1)")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 160 "Net-(D10-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A48250) (at 138 36.25 90) (path /56CAEC0A/56CEB929) (fp_text reference D11 (at 2.5 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 161 "Net-(D11-Pad1)")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 162 "Net-(D11-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A48256) (at 139.5 36.25 90) (path /56CAEC0A/56CEB930) (fp_text reference D12 (at 2.5 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 163 "Net-(D12-Pad1)")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 164 "Net-(D12-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A4825C) (at 141 36.25 90) (path /56CAEC0A/56CEBC0A) (fp_text reference D13 (at 2.5 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 165 "Net-(D13-Pad1)")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 166 "Net-(D13-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A48262) (at 142.5 36.25 90) (path /56CAEC0A/56CEBC11) (fp_text reference D14 (at 2.5 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 167 "Net-(D14-Pad1)")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 168 "Net-(D14-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A48268) (at 144 36.25 90) (path /56CAEC0A/56CEBC18) (fp_text reference D15 (at 2.5 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 169 "Net-(D15-Pad1)")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 170 "Net-(D15-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A4826E) (at 145.5 36.25 90) (path /56CAEC0A/56CEBC1F) (fp_text reference D16 (at 2.5 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 171 "Net-(D16-Pad1)")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 172 "Net-(D16-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A48274) (at 150 36.25 90) (path /56CAEC0A/56CEBCD6) (fp_text reference D17 (at 2.5 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value RED (at 0.05 2.95 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 173 "Net-(D17-Pad1)")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 174 "Net-(D17-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A4827A) (at 147 36.25 90) (path /56CAEC0A/56D25AD0) (fp_text reference D18 (at 2.5 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 175 "Net-(D18-Pad1)")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 176 "Net-(D18-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 56A48280) (at 148.5 36.25 90) (path /56CAEC0A/56A618FC) (fp_text reference D19 (at 2.5 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 177 "Net-(D19-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_RES_NOSILK (layer F.Cu) (tedit 53C52A47) (tstamp 56A48286) (at 185.5 118.5 180) (path /5685DDE2/56B58E60) (fp_text reference F1 (at 0 1.6 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 5A (at 0.05 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.775 0 180) (size 0.787 0.864) (layers F.Cu F.Paste F.Mask) (net 178 "/Backplane Connector/12V0")) (pad 2 smd rect (at 0.775 0 180) (size 0.787 0.864) (layers F.Cu F.Paste F.Mask) (net 179 "Net-(F1-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:XILINX_JTAG_PTH_MOLEX_0878311420 (layer F.Cu) (tedit 53C52AB2) (tstamp 56A48298) (at 156 41.6 270) (path /5685DDE2/56985F44) (fp_text reference J1 (at 0 -4 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value XILINX_JTAG (at 0 3.4 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start 8.5 -3) (end -8.5 -3) (layer F.SilkS) (width 0.3)) (fp_line (start -8.5 -3) (end -8.5 3) (layer F.SilkS) (width 0.3)) (fp_line (start -2 3) (end -8.5 3) (layer F.SilkS) (width 0.3)) (fp_line (start 8.5 -3) (end 8.5 3) (layer F.SilkS) (width 0.3)) (fp_line (start 8.5 3) (end 2 3) (layer F.SilkS) (width 0.3)) (pad 1 thru_hole circle (at -6 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (pad 2 thru_hole circle (at -6 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 89 "/Clocks / buffers/1V8_SB")) (pad 3 thru_hole circle (at -4 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 4 thru_hole circle (at -4 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 180 "/Power Supply/CPLD_JTAG_TMS")) (pad 5 thru_hole circle (at -2 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 6 thru_hole circle (at -2 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 181 "/Power Supply/CPLD_JTAG_TCK")) (pad 7 thru_hole circle (at 0 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 8 thru_hole circle (at 0 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 182 "/Power Supply/CPLD_JTAG_TDO")) (pad 9 thru_hole circle (at 2 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 10 thru_hole circle (at 2 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 183 "/Power Supply/CPLD_JTAG_TDI")) (pad 11 thru_hole circle (at 4 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 12 thru_hole circle (at 4 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (pad 13 thru_hole circle (at 6 1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (pad 14 thru_hole circle (at 6 -1 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/conn_strip/vasch_strip_7x2.wrl (at (xyz 0 0 0)) (scale (xyz 0.78 0.78 0.78)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:XILINX_JTAG_PTH_MOLEX_0878311420 (layer F.Cu) (tedit 53C52AB2) (tstamp 56A482BC) (at 148.75 64 180) (path /5697D556/56C4CD20) (fp_text reference J3 (at 0 3.85 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value XILINX_JTAG_MONITOR (at 0 3.4 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start 8.5 -3) (end -8.5 -3) (layer F.SilkS) (width 0.3)) (fp_line (start -8.5 -3) (end -8.5 3) (layer F.SilkS) (width 0.3)) (fp_line (start -2 3) (end -8.5 3) (layer F.SilkS) (width 0.3)) (fp_line (start 8.5 -3) (end 8.5 3) (layer F.SilkS) (width 0.3)) (fp_line (start 8.5 3) (end 2 3) (layer F.SilkS) (width 0.3)) (pad 1 thru_hole circle (at -6 1 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (pad 2 thru_hole circle (at -6 -1 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 7 "/Backplane Connector/1V8")) (pad 3 thru_hole circle (at -4 1 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 4 thru_hole circle (at -4 -1 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 188 "/Backplane Connector/JTAG_TMS")) (pad 5 thru_hole circle (at -2 1 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 6 thru_hole circle (at -2 -1 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 189 "/Backplane Connector/JTAG_TCK")) (pad 7 thru_hole circle (at 0 1 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 8 thru_hole circle (at 0 -1 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 190 "/Backplane Connector/JTAG_TDO")) (pad 9 thru_hole circle (at 2 1 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 10 thru_hole circle (at 2 -1 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 191 "/Backplane Connector/JTAG_TDI")) (pad 11 thru_hole circle (at 4 1 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 "/Backplane Connector/GND")) (pad 12 thru_hole circle (at 4 -1 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (pad 13 thru_hole circle (at 6 1 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (pad 14 thru_hole circle (at 6 -1 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/conn_strip/vasch_strip_7x2.wrl (at (xyz 0 0 0)) (scale (xyz 0.78 0.78 0.78)) (rotate (xyz 0 0 0)) ) ) (module w_logo:Logo_silk_OSHW_6x6mm (layer F.Cu) (tedit 0) (tstamp 56A485B4) (at 149.6 73.15) (descr "Open Hardware Logo, 6x6mm") (fp_text reference G*** (at 0 0) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value LOGO (at 0 0.3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start 2.16 2.62) (end 2.16 3.08) (layer F.SilkS) (width 0.075)) (fp_line (start 2.25 2.62) (end 2.3 2.62) (layer F.SilkS) (width 0.075)) (fp_line (start 2.2 2.65) (end 2.25 2.62) (layer F.SilkS) (width 0.075)) (fp_line (start 2.18 2.67) (end 2.2 2.65) (layer F.SilkS) (width 0.075)) (fp_line (start 2.16 2.74) (end 2.18 2.67) (layer F.SilkS) (width 0.075)) (fp_line (start 2.6 3.08) (end 2.65 3.05) (layer F.SilkS) (width 0.075)) (fp_line (start 2.5 3.08) (end 2.6 3.08) (layer F.SilkS) (width 0.075)) (fp_line (start 2.46 3.05) (end 2.5 3.08) (layer F.SilkS) (width 0.075)) (fp_line (start 2.44 2.98) (end 2.46 3.05) (layer F.SilkS) (width 0.075)) (fp_line (start 2.44 2.71) (end 2.44 2.98) (layer F.SilkS) (width 0.075)) (fp_line (start 2.47 2.65) (end 2.44 2.71) (layer F.SilkS) (width 0.075)) (fp_line (start 2.51 2.62) (end 2.47 2.65) (layer F.SilkS) (width 0.075)) (fp_line (start 2.61 2.62) (end 2.51 2.62) (layer F.SilkS) (width 0.075)) (fp_line (start 2.65 2.66) (end 2.61 2.62) (layer F.SilkS) (width 0.075)) (fp_line (start 2.67 2.73) (end 2.65 2.66) (layer F.SilkS) (width 0.075)) (fp_line (start 2.67 2.85) (end 2.67 2.73) (layer F.SilkS) (width 0.075)) (fp_line (start 2.67 2.85) (end 2.44 2.85) (layer F.SilkS) (width 0.075)) (fp_line (start 1.92 2.71) (end 1.92 3.08) (layer F.SilkS) (width 0.075)) (fp_line (start 1.89 2.65) (end 1.92 2.71) (layer F.SilkS) (width 0.075)) (fp_line (start 1.85 2.62) (end 1.89 2.65) (layer F.SilkS) (width 0.075)) (fp_line (start 1.75 2.62) (end 1.85 2.62) (layer F.SilkS) (width 0.075)) (fp_line (start 1.7 2.65) (end 1.75 2.62) (layer F.SilkS) (width 0.075)) (fp_line (start 1.76 2.81) (end 1.71 2.84) (layer F.SilkS) (width 0.075)) (fp_line (start 1.88 2.81) (end 1.76 2.81) (layer F.SilkS) (width 0.075)) (fp_line (start 1.92 2.78) (end 1.88 2.81) (layer F.SilkS) (width 0.075)) (fp_line (start 1.87 3.08) (end 1.92 3.04) (layer F.SilkS) (width 0.075)) (fp_line (start 1.75 3.08) (end 1.87 3.08) (layer F.SilkS) (width 0.075)) (fp_line (start 1.7 3.04) (end 1.75 3.08) (layer F.SilkS) (width 0.075)) (fp_line (start 1.68 2.98) (end 1.7 3.04) (layer F.SilkS) (width 0.075)) (fp_line (start 1.68 2.91) (end 1.68 2.98) (layer F.SilkS) (width 0.075)) (fp_line (start 1.71 2.84) (end 1.68 2.91) (layer F.SilkS) (width 0.075)) (fp_line (start 1.13 2.62) (end 1.23 3.08) (layer F.SilkS) (width 0.075)) (fp_line (start 1.23 3.08) (end 1.32 2.74) (layer F.SilkS) (width 0.075)) (fp_line (start 1.32 2.74) (end 1.42 3.08) (layer F.SilkS) (width 0.075)) (fp_line (start 1.42 3.08) (end 1.52 2.62) (layer F.SilkS) (width 0.075)) (fp_line (start 0.94 3.05) (end 0.9 3.08) (layer F.SilkS) (width 0.075)) (fp_line (start 0.9 3.08) (end 0.79 3.08) (layer F.SilkS) (width 0.075)) (fp_line (start 0.79 3.08) (end 0.75 3.05) (layer F.SilkS) (width 0.075)) (fp_line (start 0.75 3.05) (end 0.73 3.02) (layer F.SilkS) (width 0.075)) (fp_line (start 0.73 3.02) (end 0.7 2.95) (layer F.SilkS) (width 0.075)) (fp_line (start 0.7 2.95) (end 0.7 2.75) (layer F.SilkS) (width 0.075)) (fp_line (start 0.7 2.75) (end 0.73 2.68) (layer F.SilkS) (width 0.075)) (fp_line (start 0.73 2.68) (end 0.75 2.65) (layer F.SilkS) (width 0.075)) (fp_line (start 0.75 2.65) (end 0.81 2.61) (layer F.SilkS) (width 0.075)) (fp_line (start 0.81 2.61) (end 0.88 2.61) (layer F.SilkS) (width 0.075)) (fp_line (start 0.88 2.61) (end 0.94 2.65) (layer F.SilkS) (width 0.075)) (fp_line (start 0.94 2.38) (end 0.94 3.08) (layer F.SilkS) (width 0.075)) (fp_line (start 0.42 2.74) (end 0.44 2.67) (layer F.SilkS) (width 0.075)) (fp_line (start 0.44 2.67) (end 0.46 2.65) (layer F.SilkS) (width 0.075)) (fp_line (start 0.46 2.65) (end 0.51 2.62) (layer F.SilkS) (width 0.075)) (fp_line (start 0.51 2.62) (end 0.56 2.62) (layer F.SilkS) (width 0.075)) (fp_line (start 0.42 2.62) (end 0.42 3.08) (layer F.SilkS) (width 0.075)) (fp_line (start -0.03 2.84) (end -0.06 2.91) (layer F.SilkS) (width 0.075)) (fp_line (start -0.06 2.91) (end -0.06 2.98) (layer F.SilkS) (width 0.075)) (fp_line (start -0.06 2.98) (end -0.04 3.04) (layer F.SilkS) (width 0.075)) (fp_line (start -0.04 3.04) (end 0.01 3.08) (layer F.SilkS) (width 0.075)) (fp_line (start 0.01 3.08) (end 0.13 3.08) (layer F.SilkS) (width 0.075)) (fp_line (start 0.13 3.08) (end 0.18 3.04) (layer F.SilkS) (width 0.075)) (fp_line (start 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-2.070304 -0.650875) (xy -2.046335 -0.681355) (xy -2.021416 -0.687917) (xy -1.983968 -0.671861) (xy -1.972529 -0.650875) (xy -1.972529 -0.650875)) (layer F.SilkS) (width 0.1)) (fp_poly (pts (xy -1.524 -1.003391) (xy -1.540658 -0.910801) (xy -1.585777 -0.833146) (xy -1.652076 -0.782757) (xy -1.655034 -0.781496) (xy -1.697172 -0.755401) (xy -1.7145 -0.727683) (xy -1.732278 -0.704746) (xy -1.784861 -0.704339) (xy -1.825625 -0.713091) (xy -1.855348 -0.733873) (xy -1.860993 -0.762761) (xy -1.841216 -0.781954) (xy -1.830916 -0.783167) (xy -1.802732 -0.793486) (xy -1.799166 -0.802243) (xy -1.782562 -0.823911) (xy -1.741012 -0.855099) (xy -1.723232 -0.866122) (xy -1.647622 -0.934537) (xy -1.614188 -0.995212) (xy -1.583005 -1.055387) (xy -1.554442 -1.078214) (xy -1.533221 -1.063265) (xy -1.52407 -1.010113) (xy -1.524 -1.003391) (xy -1.524 -1.003391)) (layer F.SilkS) (width 0.1)) (fp_poly (pts (xy -1.800936 -1.002306) (xy -1.804626 -0.967992) (xy -1.831919 -0.923216) (xy -1.855174 -0.898573) (xy -1.909905 -0.861684) (xy -1.978448 -0.847316) (xy -2.008632 -0.846378) (xy -2.077774 -0.844174) (xy -2.134804 -0.838989) (xy -2.148416 -0.836624) (xy -2.202601 -0.836911) (xy -2.235759 -0.845847) (xy -2.286129 -0.882202) (xy -2.333081 -0.93999) (xy -2.364421 -1.002106) (xy -2.370666 -1.035143) (xy -2.360405 -1.072134) (xy -2.333631 -1.074521) (xy -2.29636 -1.043541) (xy -2.275416 -1.015547) (xy -2.212 -0.955426) (xy -2.153972 -0.930197) (xy -2.101812 -0.920331) (xy -2.053887 -0.925218) (xy -1.993269 -0.947682) (xy -1.961429 -0.962339) (xy -1.896346 -0.991291) (xy -1.84511 -1.010774) (xy -1.823582 -1.016) (xy -1.800936 -1.002306) (xy -1.800936 -1.002306)) (layer F.SilkS) (width 0.1)) (fp_poly (pts (xy -2.455274 -0.926042) (xy -2.47226 -0.912288) (xy -2.510921 -0.911108) (xy -2.553045 -0.920901) (xy -2.578115 -0.936835) (xy -2.59208 -0.971) (xy -2.606003 -1.032828) (xy -2.615191 -1.095585) (xy -2.621987 -1.168436) (xy -2.620626 -1.20861) (xy -2.609791 -1.225206) (xy -2.596054 -1.227667) (xy -2.566011 -1.208636) (xy -2.550116 -1.169459) (xy -2.533026 -1.112961) (xy -2.505203 -1.044521) (xy -2.496738 -1.026584) (xy -2.471515 -0.971838) (xy -2.456816 -0.933519) (xy -2.455274 -0.926042) (xy -2.455274 -0.926042)) (layer F.SilkS) (width 0.1)) (fp_poly (pts (xy -1.735746 -1.26375) (xy -1.742283 -1.23937) (xy -1.769592 -1.233819) (xy -1.80975 -1.239647) (xy -1.859441 -1.245773) (xy -1.880197 -1.23576) (xy -1.883833 -1.212546) (xy -1.902338 -1.154662) (xy -1.950837 -1.111514) (xy -2.001308 -1.092249) (xy -2.001308 -1.20888) (xy -2.005151 -1.221412) (xy -2.044534 -1.227433) (xy -2.057785 -1.227667) (xy -2.120753 -1.231087) (xy -2.170453 -1.239402) (xy -2.173144 -1.240221) (xy -2.191033 -1.241738) (xy -2.174759 -1.222576) (xy -2.159 -1.209118) (xy -2.095083 -1.178575) (xy -2.031652 -1.187816) (xy -2.001308 -1.20888) (xy -2.001308 -1.092249) (xy -2.01881 -1.085568) (xy -2.095736 -1.07929) (xy -2.171092 -1.095146) (xy -2.229992 -1.131406) (xy -2.27399 -1.18432) (xy -2.28327 -1.226467) (xy -2.257066 -1.252838) (xy -2.248958 -1.25541) (xy -2.230116 -1.263057) (xy -2.251709 -1.267087) (xy -2.259541 -1.267545) (xy -2.286 -1.275923) (xy -2.286 -1.344084) (xy -2.296583 -1.354667) (xy -2.307166 -1.344084) (xy -2.296583 -1.3335) (xy -2.286 -1.344084) (xy -2.286 -1.275923) (xy -2.297335 -1.279511) (xy -2.308508 -1.296459) (xy -2.315662 -1.300522) (xy -2.328993 -1.275292) (xy -2.35492 -1.240226) (xy -2.386422 -1.228277) (xy -2.409267 -1.24202) (xy -2.413 -1.260097) (xy -2.403483 -1.31235) (xy -2.380049 -1.369317) (xy -2.350374 -1.416391) (xy -2.322134 -1.438961) (xy -2.31883 -1.439334) (xy -2.28995 -1.430976) (xy -2.28602 -1.423459) (xy -2.266718 -1.41654) (xy -2.215974 -1.412621) (xy -2.144565 -1.411575) (xy -2.063266 -1.413272) (xy -1.982853 -1.417582) (xy -1.914102 -1.424378) (xy -1.889916 -1.428198) (xy -1.841449 -1.432341) (xy -1.809464 -1.415375) (xy -1.778323 -1.371455) (xy -1.750261 -1.315954) (xy -1.736141 -1.269486) (xy -1.735746 -1.26375) (xy -1.735746 -1.26375)) (layer F.SilkS) (width 0.1)) (fp_poly (pts (xy -1.121833 -1.55575) (xy -1.138776 -1.527688) (xy -1.153583 -1.524) (xy -1.181645 -1.540944) (xy -1.185333 -1.55575) (xy -1.16839 -1.583813) (xy -1.153583 -1.5875) (xy -1.125521 -1.570557) (xy -1.121833 -1.55575) (xy -1.121833 -1.55575)) (layer F.SilkS) (width 0.1)) ) (module azonenberg_pcb:MECHANICAL_EUROCARD_3U_FRONTHOLES (layer F.Cu) (tedit 53ED9BAC) (tstamp 56A485BC) (at 30 80) (fp_text reference MECHANICAL_EUROCARD_3U_FRONTHOLES (at 16 40) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value VAL** (at 3 38) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start 0 -50) (end 0 50) (layer Dwgs.User) (width 0.2)) (fp_line (start 0 -50) (end 10 -50) (layer Dwgs.User) (width 0.2)) (fp_line (start 0 50) (end 10 50) (layer Dwgs.User) (width 0.2)) (fp_line (start 0 -47.5) (end 10 -47.5) (layer Dwgs.User) (width 0.2)) (fp_line (start 0 47.5) (end 10 47.5) (layer Dwgs.User) (width 0.2)) (pad "" np_thru_hole circle (at 3.165 44.45) (size 3.5 3.5) (drill 2.7) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at 3.165 -44.45) (size 3.5 3.5) (drill 2.7) (layers *.Cu *.Mask F.SilkS)) ) (module azonenberg_pcb:CONN_SFP+_AMPHENOL_UE76_A10_2000T (layer F.Cu) (tedit 56A49BC9) (tstamp 56A6A8F4) (at 62.5 73) (path /5685DE45/56A44F19) (fp_text reference J6 (at -6.1 -5.2) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value CONN_SFP_HOST (at 0 8.25) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -4 -6) (end 4 -6) (layer F.CrtYd) (width 0.15)) (fp_line (start 0.9 -4.8) (end 0.9 4.8) (layer F.CrtYd) (width 0.15)) (fp_line (start -4 6) (end 4 6) (layer F.CrtYd) (width 0.15)) (pad 1 smd rect (at -3.2 -3.4) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at -3.2 -2.6) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 493 "/Front panel SFP+s/ETH10_TX_FAULT")) (pad 3 smd rect (at -3.2 -1.8) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 481 "/Front panel SFP+s/ETH10_TX_DISABLE")) (pad 4 smd rect (at -3.2 -1) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 498 "/Front panel SFP+s/ETH10_SDA")) (pad 7 smd rect (at -3.2 1.4) (size 2 0.5) (layers F.Cu F.Paste F.Mask)) (pad 6 smd rect (at -3.2 0.6) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 478 "/Front panel SFP+s/ETH10_PRESENT_N")) (pad 5 smd rect (at -3.2 -0.2) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 494 "/Front panel SFP+s/ETH10_SCL")) (pad 8 smd rect (at -3.2 2.2) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 489 "/Front panel SFP+s/ETH10_RX_LOS")) (pad 10 smd rect (at -3.2 3.8) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 9 smd rect (at -3.2 3) (size 2 0.5) (layers F.Cu F.Paste F.Mask)) (pad 17 smd rect (at 5 -1.4) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 18 smd rect (at 5 -2.2) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 459 "/Front panel SFP+s/ETH10_TX_P")) (pad 19 smd rect (at 5 -3) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 460 "/Front panel SFP+s/ETH10_TX_N")) (pad 20 smd rect (at 5 -3.8) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 14 smd rect (at 5 1) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 15 smd rect (at 5 0.2) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 52 "/Front panel SFP+s/ETH10_VDD_RX")) (pad 11 smd rect (at 5 3.4) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 16 smd rect (at 5 -0.6) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 54 "/Front panel SFP+s/ETH10_VDD_TX")) (pad 13 smd rect (at 5 1.8) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 455 "/Front panel SFP+s/ETH10_RX_P")) (pad 12 smd rect (at 5 2.6) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 458 "/Front panel SFP+s/ETH10_RX_N")) (pad "" np_thru_hole circle (at 0.9 -4.8) (size 1.55 1.55) (drill 1.55) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at 0.9 4.8) (size 1.55 1.55) (drill 1.55) (layers *.Cu *.Mask F.SilkS)) (model /nfs4/share/models/Molex/UE76-A20-2000T.wrl (at (xyz 0.19 0 0)) (scale (xyz 0.3937 0.3937 0.3937)) (rotate (xyz 270 0 -90)) ) ) (module azonenberg_pcb:CONN_SFP+_AMPHENOL_UE76_A10_2000T (layer F.Cu) (tedit 56A49BC9) (tstamp 56A6A911) (at 62.5 87.25) (path /5685DE45/56A44F87) (fp_text reference J7 (at -6.15 -5.25) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value CONN_SFP_HOST (at 0 8.25) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -4 -6) (end 4 -6) (layer F.CrtYd) (width 0.15)) (fp_line (start 0.9 -4.8) (end 0.9 4.8) (layer F.CrtYd) (width 0.15)) (fp_line (start -4 6) (end 4 6) (layer F.CrtYd) (width 0.15)) (pad 1 smd rect (at -3.2 -3.4) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at -3.2 -2.6) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 480 "/Front panel SFP+s/ETH11_TX_FAULT")) (pad 3 smd rect (at -3.2 -1.8) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 484 "/Front panel SFP+s/ETH11_TX_DISABLE")) (pad 4 smd rect (at -3.2 -1) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 492 "/Front panel SFP+s/ETH11_SDA")) (pad 7 smd rect (at -3.2 1.4) (size 2 0.5) (layers F.Cu F.Paste F.Mask)) (pad 6 smd rect (at -3.2 0.6) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 487 "/Front panel SFP+s/ETH11_PRESENT_N")) (pad 5 smd rect (at -3.2 -0.2) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 479 "/Front panel SFP+s/ETH11_SCL")) (pad 8 smd rect (at -3.2 2.2) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 482 "/Front panel SFP+s/ETH11_RX_LOS")) (pad 10 smd rect (at -3.2 3.8) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 9 smd rect (at -3.2 3) (size 2 0.5) (layers F.Cu F.Paste F.Mask)) (pad 17 smd rect (at 5 -1.4) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 18 smd rect (at 5 -2.2) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 462 "/Front panel SFP+s/ETH11_TX_P")) (pad 19 smd rect (at 5 -3) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 461 "/Front panel SFP+s/ETH11_TX_N")) (pad 20 smd rect (at 5 -3.8) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 14 smd rect (at 5 1) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 15 smd rect (at 5 0.2) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 56 "/Front panel SFP+s/ETH11_VDD_RX")) (pad 11 smd rect (at 5 3.4) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 16 smd rect (at 5 -0.6) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 58 "/Front panel SFP+s/ETH11_VDD_TX")) (pad 13 smd rect (at 5 1.8) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 465 "/Front panel SFP+s/ETH11_RX_P")) (pad 12 smd rect (at 5 2.6) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 454 "/Front panel SFP+s/ETH11_RX_N")) (pad "" np_thru_hole circle (at 0.9 -4.8) (size 1.55 1.55) (drill 1.55) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at 0.9 4.8) (size 1.55 1.55) (drill 1.55) (layers *.Cu *.Mask F.SilkS)) (model /nfs4/share/models/Molex/UE76-A20-2000T.wrl (at (xyz 0.19 0 0)) (scale (xyz 0.3937 0.3937 0.3937)) (rotate (xyz 270 0 -90)) ) ) (module azonenberg_pcb:CONN_SFP+_AMPHENOL_UE76_A10_2000T (layer F.Cu) (tedit 56A49BC9) (tstamp 56A6A92E) (at 62.5 101.5) (path /5685DE45/56A44FF2) (fp_text reference J8 (at -6 -5.25) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value CONN_SFP_HOST (at 0 8.25) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -4 -6) (end 4 -6) (layer F.CrtYd) (width 0.15)) (fp_line (start 0.9 -4.8) (end 0.9 4.8) (layer F.CrtYd) (width 0.15)) (fp_line (start -4 6) (end 4 6) (layer F.CrtYd) (width 0.15)) (pad 1 smd rect (at -3.2 -3.4) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at -3.2 -2.6) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 490 "/Front panel SFP+s/ETH12_TX_FAULT")) (pad 3 smd rect (at -3.2 -1.8) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 483 "/Front panel SFP+s/ETH12_TX_DISABLE")) (pad 4 smd rect (at -3.2 -1) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 485 "/Front panel SFP+s/ETH12_SDA")) (pad 7 smd rect (at -3.2 1.4) (size 2 0.5) (layers F.Cu F.Paste F.Mask)) (pad 6 smd rect (at -3.2 0.6) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 486 "/Front panel SFP+s/ETH12_PRESENT_N")) (pad 5 smd rect (at -3.2 -0.2) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 491 "/Front panel SFP+s/ETH12_SCL")) (pad 8 smd rect (at -3.2 2.2) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 466 "/Front panel SFP+s/ETH12_RX_LOS")) (pad 10 smd rect (at -3.2 3.8) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 9 smd rect (at -3.2 3) (size 2 0.5) (layers F.Cu F.Paste F.Mask)) (pad 17 smd rect (at 5 -1.4) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 18 smd rect (at 5 -2.2) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 507 "/Front panel SFP+s/ETH12_TX_P")) (pad 19 smd rect (at 5 -3) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 509 "/Front panel SFP+s/ETH12_TX_N")) (pad 20 smd rect (at 5 -3.8) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 14 smd rect (at 5 1) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 15 smd rect (at 5 0.2) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 60 "/Front panel SFP+s/ETH12_VDD_RX")) (pad 11 smd rect (at 5 3.4) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 16 smd rect (at 5 -0.6) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 62 "/Front panel SFP+s/ETH12_VDD_TX")) (pad 13 smd rect (at 5 1.8) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 506 "/Front panel SFP+s/ETH12_RX_P")) (pad 12 smd rect (at 5 2.6) (size 2 0.5) (layers F.Cu F.Paste F.Mask) (net 505 "/Front panel SFP+s/ETH12_RX_N")) (pad "" np_thru_hole circle (at 0.9 -4.8) (size 1.55 1.55) (drill 1.55) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at 0.9 4.8) (size 1.55 1.55) (drill 1.55) (layers *.Cu *.Mask F.SilkS)) (model /nfs4/share/models/Molex/UE76-A20-2000T.wrl (at (xyz 0.19 0 0)) (scale (xyz 0.3937 0.3937 0.3937)) (rotate (xyz 270 0 -90)) ) ) (module azonenberg_pcb:TESTPOINT_SMT_KEYSTONE_5016 (layer F.Cu) (tedit 53C619BB) (tstamp 56A710A3) (at 69.65 45.65) (path /56CAEC0A/56CB061C) (fp_text reference P1 (at 0 3) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value CLIP (at 0 4.6) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at 0 0) (size 4.7 3.43) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) ) (module azonenberg_pcb:TESTPOINT_SMT_KEYSTONE_5016 (layer F.Cu) (tedit 53C619BB) (tstamp 56A710A8) (at 67.35 113.3) (path /56CAEC0A/56CB067B) (fp_text reference P2 (at 3.35 -0.05) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value CLIP (at 0 4.6) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at 0 0) (size 4.7 3.43) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) ) (module azonenberg_pcb:TESTPOINT_SMT_KEYSTONE_5016 (layer F.Cu) (tedit 53C619BB) (tstamp 56A710AD) (at 164.06 53.79) (path /56CAEC0A/56CB06B0) (fp_text reference P3 (at 0.01 2.42) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value CLIP (at 0 4.6) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at 0 0) (size 4.7 3.43) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) ) (module azonenberg_pcb:TESTPOINT_SMT_KEYSTONE_5016 (layer F.Cu) (tedit 53C619BB) (tstamp 56A710B2) (at 183.26 111.25) (path /56CAEC0A/56CB0725) (fp_text reference P4 (at 0 3) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value CLIP (at 0 4.6) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at 0 0) (size 4.7 3.43) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) ) (module azonenberg_pcb:DFN_6_0.65MM_2x2MM_GDS (layer F.Cu) (tedit 53D47FD5) (tstamp 56A710BE) (at 73.35 58.85 270) (path /5685DE45/56AF64CE) (solder_mask_margin 0.05) (solder_paste_ratio -0.15) (fp_text reference Q1 (at 0.05 -2 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SSM6N58NU (at 0 2.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.1 1) (end -0.8 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 -1.3) (end -1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 1.3) (end 1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 1.3) (end 1.1 -1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 -1.3) (end -1.1 -1.3) (layer F.SilkS) (width 0.15)) (pad S1 smd rect (at -0.65 0.86 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G1 smd rect (at 0 0.86 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 475 "/Front panel SFP+s/ETH9_LINK")) (pad D2 smd rect (at 0.65 0.86 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 511 "Net-(Q1-PadD2)")) (pad S2 smd rect (at 0.65 -0.86 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G2 smd rect (at 0 -0.86 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 469 "/Front panel SFP+s/ETH9_ACT")) (pad D1 smd rect (at -0.65 -0.86 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 512 "Net-(Q1-PadD1)")) (pad D2 smd rect (at 0.475 0 270) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 511 "Net-(Q1-PadD2)")) (pad D1 smd rect (at -0.475 0 270) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 512 "Net-(Q1-PadD1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn8.wrl (at (xyz 0 0 0)) (scale (xyz 0.75 0.75 0.75)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:DFN_6_0.65MM_2x2MM_GDS (layer F.Cu) (tedit 53D47FD5) (tstamp 56A710CA) (at 72.6 72.76) (path /5685DE45/56AF8796) (solder_mask_margin 0.05) (solder_paste_ratio -0.15) (fp_text reference Q2 (at 1.95 -0.01) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SSM6N58NU (at 0 2.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.1 1) (end -0.8 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 -1.3) (end -1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 1.3) (end 1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 1.3) (end 1.1 -1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 -1.3) (end -1.1 -1.3) (layer F.SilkS) (width 0.15)) (pad S1 smd rect (at -0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G1 smd rect (at 0 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 472 "/Front panel SFP+s/ETH10_LINK")) (pad D2 smd rect (at 0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 513 "Net-(Q2-PadD2)")) (pad S2 smd rect (at 0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G2 smd rect (at 0 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 473 "/Front panel SFP+s/ETH10_ACT")) (pad D1 smd rect (at -0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 514 "Net-(Q2-PadD1)")) (pad D2 smd rect (at 0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 513 "Net-(Q2-PadD2)")) (pad D1 smd rect (at -0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 514 "Net-(Q2-PadD1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn8.wrl (at (xyz 0 0 0)) (scale (xyz 0.75 0.75 0.75)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:DFN_6_0.65MM_2x2MM_GDS (layer F.Cu) (tedit 53D47FD5) (tstamp 56A710D6) (at 73.135 87.31) (path /5685DE45/56AF8BB3) (solder_mask_margin 0.05) (solder_paste_ratio -0.15) (fp_text reference Q3 (at 1.815 -0.01 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SSM6N58NU (at 0 2.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.1 1) (end -0.8 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 -1.3) (end -1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 1.3) (end 1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 1.3) (end 1.1 -1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 -1.3) (end -1.1 -1.3) (layer F.SilkS) (width 0.15)) (pad S1 smd rect (at -0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G1 smd rect (at 0 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 496 "/Front panel SFP+s/ETH11_LINK")) (pad D2 smd rect (at 0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 515 "Net-(Q3-PadD2)")) (pad S2 smd rect (at 0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G2 smd rect (at 0 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 468 "/Front panel SFP+s/ETH11_ACT")) (pad D1 smd rect (at -0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 516 "Net-(Q3-PadD1)")) (pad D2 smd rect (at 0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 515 "Net-(Q3-PadD2)")) (pad D1 smd rect (at -0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 516 "Net-(Q3-PadD1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn8.wrl (at (xyz 0 0 0)) (scale (xyz 0.75 0.75 0.75)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:DFN_6_0.65MM_2x2MM_GDS (layer B.Cu) (tedit 53D47FD5) (tstamp 56A710E2) (at 72.45 102.46 180) (path /5685DE45/56AF8EA9) (solder_mask_margin 0.05) (solder_paste_ratio -0.15) (fp_text reference Q4 (at 0 -1.75 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value SSM6N58NU (at 0 -2.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_line (start -1.1 -1) (end -0.8 -1.3) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 1.3) (end -1.1 -1.3) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 -1.3) (end 1.1 -1.3) (layer B.SilkS) (width 0.15)) (fp_line (start 1.1 -1.3) (end 1.1 1.3) (layer B.SilkS) (width 0.15)) (fp_line (start 1.1 1.3) (end -1.1 1.3) (layer B.SilkS) (width 0.15)) (pad S1 smd rect (at -0.65 -0.86 180) (size 0.3 0.3) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad G1 smd rect (at 0 -0.86 180) (size 0.3 0.3) (layers B.Cu B.Paste B.Mask) (net 467 "/Front panel SFP+s/ETH12_LINK")) (pad D2 smd rect (at 0.65 -0.86 180) (size 0.3 0.3) (layers B.Cu B.Paste B.Mask) (net 517 "Net-(Q4-PadD2)")) (pad S2 smd rect (at 0.65 0.86 180) (size 0.3 0.3) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad G2 smd rect (at 0 0.86 180) (size 0.3 0.3) (layers B.Cu B.Paste B.Mask) (net 471 "/Front panel SFP+s/ETH12_ACT")) (pad D1 smd rect (at -0.65 0.86 180) (size 0.3 0.3) (layers B.Cu B.Paste B.Mask) (net 518 "Net-(Q4-PadD1)")) (pad D2 smd rect (at 0.475 0 180) (size 0.65 0.9) (layers B.Cu B.Paste B.Mask) (net 517 "Net-(Q4-PadD2)")) (pad D1 smd rect (at -0.475 0 180) (size 0.65 0.9) (layers B.Cu B.Paste B.Mask) (net 518 "Net-(Q4-PadD1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn8.wrl (at (xyz 0 0 0)) (scale (xyz 0.75 0.75 0.75)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:DFN_6_0.65MM_2x2MM_GDS (layer F.Cu) (tedit 53D47FD5) (tstamp 56A710EE) (at 135.75 40) (path /56CAEC0A/56CEA7F1) (solder_mask_margin 0.05) (solder_paste_ratio -0.15) (fp_text reference Q5 (at 0 2) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SSM6N58NU (at 0 2.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.1 1) (end -0.8 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 -1.3) (end -1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 1.3) (end 1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 1.3) (end 1.1 -1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 -1.3) (end -1.1 -1.3) (layer F.SilkS) (width 0.15)) (pad S1 smd rect (at -0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G1 smd rect (at 0 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 519 "/LEDs and test points/12V0_LED")) (pad D2 smd rect (at 0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 159 "Net-(D10-Pad1)")) (pad S2 smd rect (at 0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G2 smd rect (at 0 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 520 "/LEDs and test points/1V0_LED")) (pad D1 smd rect (at -0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 157 "Net-(D9-Pad1)")) (pad D2 smd rect (at 0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 159 "Net-(D10-Pad1)")) (pad D1 smd rect (at -0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 157 "Net-(D9-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn8.wrl (at (xyz 0 0 0)) (scale (xyz 0.75 0.75 0.75)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:DFN_6_0.65MM_2x2MM_GDS (layer F.Cu) (tedit 53D47FD5) (tstamp 56A710FA) (at 138.75 40) (path /56CAEC0A/56CEAC87) (solder_mask_margin 0.05) (solder_paste_ratio -0.15) (fp_text reference Q6 (at 0 2) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SSM6N58NU (at 0 2.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.1 1) (end -0.8 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 -1.3) (end -1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 1.3) (end 1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 1.3) (end 1.1 -1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 -1.3) (end -1.1 -1.3) (layer F.SilkS) (width 0.15)) (pad S1 smd rect (at -0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G1 smd rect (at 0 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 521 "/LEDs and test points/1V2_LED")) (pad D2 smd rect (at 0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 163 "Net-(D12-Pad1)")) (pad S2 smd rect (at 0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G2 smd rect (at 0 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 522 "/LEDs and test points/1V5_LED")) (pad D1 smd rect (at -0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 161 "Net-(D11-Pad1)")) (pad D2 smd rect (at 0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 163 "Net-(D12-Pad1)")) (pad D1 smd rect (at -0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 161 "Net-(D11-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn8.wrl (at (xyz 0 0 0)) (scale (xyz 0.75 0.75 0.75)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:DFN_6_0.65MM_2x2MM_GDS (layer F.Cu) (tedit 53D47FD5) (tstamp 56A71106) (at 141.65 40) (path /56CAEC0A/56CEAE5C) (solder_mask_margin 0.05) (solder_paste_ratio -0.15) (fp_text reference Q7 (at 0 2) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SSM6N58NU (at 0 2.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.1 1) (end -0.8 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 -1.3) (end -1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 1.3) (end 1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 1.3) (end 1.1 -1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 -1.3) (end -1.1 -1.3) (layer F.SilkS) (width 0.15)) (pad S1 smd rect (at -0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G1 smd rect (at 0 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 523 "/LEDs and test points/1V8_LED")) (pad D2 smd rect (at 0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 167 "Net-(D14-Pad1)")) (pad S2 smd rect (at 0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G2 smd rect (at 0 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 524 "/LEDs and test points/2V5_LED")) (pad D1 smd rect (at -0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 165 "Net-(D13-Pad1)")) (pad D2 smd rect (at 0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 167 "Net-(D14-Pad1)")) (pad D1 smd rect (at -0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 165 "Net-(D13-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn8.wrl (at (xyz 0 0 0)) (scale (xyz 0.75 0.75 0.75)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:DFN_6_0.65MM_2x2MM_GDS (layer F.Cu) (tedit 53D47FD5) (tstamp 56A71112) (at 144.75 40) (path /56CAEC0A/56CEAE6D) (solder_mask_margin 0.05) (solder_paste_ratio -0.15) (fp_text reference Q8 (at 0 2) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SSM6N58NU (at 0 2.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.1 1) (end -0.8 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 -1.3) (end -1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 1.3) (end 1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 1.3) (end 1.1 -1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 -1.3) (end -1.1 -1.3) (layer F.SilkS) (width 0.15)) (pad S1 smd rect (at -0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G1 smd rect (at 0 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 525 "/LEDs and test points/3V3_LED")) (pad D2 smd rect (at 0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 171 "Net-(D16-Pad1)")) (pad S2 smd rect (at 0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G2 smd rect (at 0 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 382 "/FPGA Config/FPGA_DONE")) (pad D1 smd rect (at -0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 169 "Net-(D15-Pad1)")) (pad D2 smd rect (at 0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 171 "Net-(D16-Pad1)")) (pad D1 smd rect (at -0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 169 "Net-(D15-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn8.wrl (at (xyz 0 0 0)) (scale (xyz 0.75 0.75 0.75)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:DFN_6_0.65MM_2x2MM_GDS (layer F.Cu) (tedit 53D47FD5) (tstamp 56A7111E) (at 147.75 40) (path /56CAEC0A/56CEB315) (solder_mask_margin 0.05) (solder_paste_ratio -0.15) (fp_text reference Q9 (at 0 2) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SSM6N58NU (at 0 2.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.1 1) (end -0.8 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 -1.3) (end -1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 1.3) (end 1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 1.3) (end 1.1 -1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 -1.3) (end -1.1 -1.3) (layer F.SilkS) (width 0.15)) (pad S1 smd rect (at -0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G1 smd rect (at 0 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 527 "/LEDs and test points/VTT_LED")) (pad D2 smd rect (at 0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 173 "Net-(D17-Pad1)")) (pad S2 smd rect (at 0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G2 smd rect (at 0 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 526 "/LEDs and test points/FAULT_LED")) (pad D1 smd rect (at -0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 175 "Net-(D18-Pad1)")) (pad D2 smd rect (at 0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 173 "Net-(D17-Pad1)")) (pad D1 smd rect (at -0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 175 "Net-(D18-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn8.wrl (at (xyz 0 0 0)) (scale (xyz 0.75 0.75 0.75)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71124) (at 108.75 112.975 180) (path /5685DE78/568671A8) (fp_text reference R1 (at 0.3 -0.875 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "249 1%" (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 503 "/QDR-II+ SRAM/RAM_RZQ")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7112A) (at 119.6 105.35 90) (path /5685DE78/56866F5F) (fp_text reference R2 (at 0 1.05 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 504 "Net-(R2-Pad1)")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 441 "/FPGA Config/RAM_TDO")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71130) (at 76.7 92.23 90) (path /5685DE62/5688C4F2) (fp_text reference R3 (at 0.01 -0.93 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 100 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 9 "Net-(C53-Pad2)")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71136) (at 75.2 95.35 90) (path /5685DE62/5688A445) (fp_text reference R4 (at 1.8 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 100 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 12 "Net-(C55-Pad2)")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7113C) (at 87.2 87.35 90) (path /5685DE62/5688A9F9) (fp_text reference R5 (at 0 -0.85 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 100 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 15 "Net-(C57-Pad2)")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71142) (at 94.7 92.5) (path /5685DE62/5688ABD9) (fp_text reference R6 (at 1.85 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 100 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 18 "Net-(C59-Pad2)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71148) (at 93.75 93.5) (path /5685DE62/5688AFDB) (fp_text reference R7 (at 0 1) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 100 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 21 "Net-(C61-Pad2)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7114E) (at 96.95 95.5) (path /5685DE62/5688B265) (fp_text reference R8 (at 1.9 -0.05) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 100 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 24 "Net-(C63-Pad2)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71154) (at 104.1 43.225 180) (path /56869E40/56994D89) (fp_text reference R9 (at 1.8 -0.025 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 294 "Net-(R9-Pad1)")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 186 "/Zynq CPU/ZYNQ_JTAG_TDO")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7115A) (at 63.1 61.58) (path /5685DE45/56A62A8C) (fp_text reference R10 (at -1.5 0.95) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 0.1 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 44 "Net-(C98-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71160) (at 63.05 75.975) (path /5685DE45/56A64127) (fp_text reference R11 (at -2.125 0.15) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 0.1 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 45 "Net-(C100-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71166) (at 63.075 90.125) (path /5685DE45/56A649D9) (fp_text reference R12 (at -2.3 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 0.1 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 46 "Net-(C102-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7116C) (at 63.1 104.8) (path /5685DE45/56A64A30) (fp_text reference R13 (at -2.2 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 0.1 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 47 "Net-(C104-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71172) (at 64.775 60.225 90) (path /5685DE45/56A62F8A) (fp_text reference R14 (at -2.15 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 0.5 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 49 "Net-(C106-Pad2)")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71178) (at 64.775 56.875 270) (path /5685DE45/56A63471) (fp_text reference R15 (at -2.15 -0.025 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 0.5 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 51 "Net-(C107-Pad2)")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7117E) (at 64.775 74.4 90) (path /5685DE45/56A64141) (fp_text reference R16 (at -2.125 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 0.5 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 53 "Net-(C108-Pad2)")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71184) (at 64.775 71.125 270) (path /5685DE45/56A64165) (fp_text reference R17 (at -2.2 -0.025 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 0.5 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 55 "Net-(C109-Pad2)")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7118A) (at 64.78 88.727 90) (path /5685DE45/56A649F3) (fp_text reference R18 (at -2.053 -0.03 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 0.5 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 57 "Net-(C110-Pad2)")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71190) (at 64.775 85.378 270) (path /5685DE45/56A64A17) (fp_text reference R19 (at -2.078 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 0.5 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 59 "Net-(C111-Pad2)")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71196) (at 64.8 103.05 90) (path /5685DE45/56A64A4A) (fp_text reference R20 (at -2.15 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 0.5 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 61 "Net-(C112-Pad2)")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7119C) (at 64.8 99.45 270) (path /5685DE45/56A64A6E) (fp_text reference R21 (at -2 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 0.5 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 63 "Net-(C113-Pad2)")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A711A2) (at 60.29 56.16) (path /5685DE45/56A68BB1) (fp_text reference R30 (at -2.35 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 4.7k (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 476 "/Front panel SFP+s/ETH9_TX_FAULT")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A711A8) (at 59.9 59.38) (path /5685DE45/56A691C2) (fp_text reference R31 (at -2.25 0.25) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 4.7k (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 488 "/Front panel SFP+s/ETH9_PRESENT_N")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A711B4) (at 60.2 70.425) (path /5685DE45/56A69F6F) (fp_text reference R33 (at -2.05 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 4.7k (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 493 "/Front panel SFP+s/ETH10_TX_FAULT")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A711BA) (at 60.2 73.6) (path /5685DE45/56A69F77) (fp_text reference R34 (at -2.18 0.13) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 4.7k (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 478 "/Front panel SFP+s/ETH10_PRESENT_N")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A711C0) (at 60.2 75.2) (path /5685DE45/56A69F7E) (fp_text reference R35 (at -2.075 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 4.7k (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 489 "/Front panel SFP+s/ETH10_RX_LOS")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A711C6) (at 92.16 177.27) (path /5685DE45/56A6A287) (fp_text reference R36 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 4.7k (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 480 "/Front panel SFP+s/ETH11_TX_FAULT")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A711CC) (at 95.16 177.27) (path /5685DE45/56A6A28F) (fp_text reference R37 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 4.7k (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 487 "/Front panel SFP+s/ETH11_PRESENT_N")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A711D2) (at 91.51 180.17) (path /5685DE45/56A6A296) (fp_text reference R38 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 4.7k (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 482 "/Front panel SFP+s/ETH11_RX_LOS")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A711D8) (at 94.51 180.17) (path /5685DE45/56A6A2A1) (fp_text reference R39 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 4.7k (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 490 "/Front panel SFP+s/ETH12_TX_FAULT")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A711DE) (at 91.41 182.77) (path /5685DE45/56A6A2A9) (fp_text reference R40 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 4.7k (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 486 "/Front panel SFP+s/ETH12_PRESENT_N")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A711E4) (at 94.41 182.77) (path /5685DE45/56A6A2B0) (fp_text reference R41 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 4.7k (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 466 "/Front panel SFP+s/ETH12_RX_LOS")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A711EA) (at 116.6 123.725 270) (path /5685DE78/56AD13EF) (fp_text reference R42 (at 4.25 0 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 320 "/QDR-II+ SRAM/RAM_WR_N")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A711F0) (at 115.96 67.07 45) (path /5697D556/56AC2F14) (fp_text reference R43 (at 0.05 -0.82 45) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5 45) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 45) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 463 "Net-(R43-Pad1)")) (pad 2 smd rect (at 0.597 0 45) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 190 "/Backplane Connector/JTAG_TDO")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A711F6) (at 112.88 67.5 180) (path /5697D556/56AC2FF7) (fp_text reference R44 (at -0.05 0.82 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 500 "Net-(R44-Pad1)")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 528 "/FPGA Config/BOOT_SPI_SCK")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A711FC) (at 114.125 125.875 270) (path /5685DE78/56AD2016) (fp_text reference R45 (at 0.025 3.7 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 439 "/QDR-II+ SRAM/RAM_DM0")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71202) (at 113.6 123.7 270) (path /5685DE78/56AD22CE) (fp_text reference R46 (at 4.3 0 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 438 "/QDR-II+ SRAM/RAM_DM1")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71208) (at 115.6 123.725 270) (path /5685DE78/56AD22D6) (fp_text reference R47 (at 4.25 0 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 368 "/QDR-II+ SRAM/RAM_DM2")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7120E) (at 116.1 125.875 270) (path /5685DE78/56AD2758) (fp_text reference R48 (at 0 -4.275 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 318 "/QDR-II+ SRAM/RAM_DM3")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7121A) (at 104.2 107.95 180) (path /5685DE78/56AD34D2) (fp_text reference R50 (at 4.25 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 367 "/QDR-II+ SRAM/RAM_WD1")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71220) (at 104.2 108.975 180) (path /5685DE78/56AD34DA) (fp_text reference R51 (at 4.25 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 319 "/QDR-II+ SRAM/RAM_WD2")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71226) (at 104.197 110.95 180) (path /5685DE78/56AD34E3) (fp_text reference R52 (at 4.297 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 315 "/QDR-II+ SRAM/RAM_WD3")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7122C) (at 104.2 111.95 180) (path /5685DE78/56AD34EB) (fp_text reference R53 (at 4.325 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 427 "/QDR-II+ SRAM/RAM_WD4")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71232) (at 104.2 112.95 180) (path /5685DE78/56AD34AF) (fp_text reference R54 (at 2.075 -0.025 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 317 "/QDR-II+ SRAM/RAM_WD5")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71238) (at 104.2 115.975 180) (path /5685DE78/56AD34B7) (fp_text reference R55 (at 4.325 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 436 "/QDR-II+ SRAM/RAM_WD6")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7123E) (at 104.2 116.95 180) (path /5685DE78/56AD34C0) (fp_text reference R56 (at 4.3 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 374 "/QDR-II+ SRAM/RAM_WD7")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71244) (at 104.197 117.95 180) (path /5685DE78/56AD34C8) (fp_text reference R57 (at 4.297 0.025 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 373 "/QDR-II+ SRAM/RAM_WD8")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71250) (at 101.975 109.45 180) (path /5685DE78/56AD45BB) (fp_text reference R59 (at 4.175 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 316 "/QDR-II+ SRAM/RAM_WD10")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71256) (at 104.175 109.95 180) (path /5685DE78/56AD45C4) (fp_text reference R60 (at 4.275 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 327 "/QDR-II+ SRAM/RAM_WD11")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7125C) (at 107.8 111.45 180) (path /5685DE78/56AD45CC) (fp_text reference R61 (at 2.1 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 326 "/QDR-II+ SRAM/RAM_WD12")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71262) (at 104.2 113.95 180) (path /5685DE78/56AD4590) (fp_text reference R62 (at 4.325 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 309 "/QDR-II+ SRAM/RAM_WD13")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71268) (at 104.2 114.95 180) (path /5685DE78/56AD4598) (fp_text reference R63 (at 4.325 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 308 "/QDR-II+ SRAM/RAM_WD14")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7126E) (at 101.975 117.45 180) (path /5685DE78/56AD45A1) (fp_text reference R64 (at 4.275 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 306 "/QDR-II+ SRAM/RAM_WD15")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71274) (at 101.975 118.45 180) (path /5685DE78/56AD45A9) (fp_text reference R65 (at 4.325 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 426 "/QDR-II+ SRAM/RAM_WD16")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7127A) (at 101.975 119.45 180) (path /5685DE78/56AD5937) (fp_text reference R66 (at 2.15 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 417 "/QDR-II+ SRAM/RAM_WD17")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71280) (at 118.1 125.875 270) (path /5685DE78/56AD593F) (fp_text reference R67 (at 0 -4.7 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 333 "/QDR-II+ SRAM/RAM_WD18")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71286) (at 127.5 118.45) (path /5685DE78/56AD5948) (fp_text reference R68 (at 4.25 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 311 "/QDR-II+ SRAM/RAM_WD19")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7128C) (at 127.5 117.45) (path /5685DE78/56AD5950) (fp_text reference R69 (at 4.25 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 313 "/QDR-II+ SRAM/RAM_WD20")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71292) (at 125.25 114.95) (path /5685DE78/56AD5914) (fp_text reference R70 (at 4.3 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 416 "/QDR-II+ SRAM/RAM_WD21")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71298) (at 127.5 113.45) (path /5685DE78/56AD591C) (fp_text reference R71 (at 4.3 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 329 "/QDR-II+ SRAM/RAM_WD22")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7129E) (at 122.25 111.45) (path /5685DE78/56AD5925) (fp_text reference R72 (at 2.45 -0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 328 "/QDR-II+ SRAM/RAM_WD23")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A712A4) (at 122.25 109.45) (path /5685DE78/56AD592D) (fp_text reference R73 (at 4.25 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 312 "/QDR-II+ SRAM/RAM_WD24")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A712AA) (at 122.25 108.45) (path /5685DE78/56AD68CB) (fp_text reference R74 (at 4.25 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 338 "/QDR-II+ SRAM/RAM_WD25")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A712B0) (at 122.25 107.45) (path /5685DE78/56AD68D3) (fp_text reference R75 (at 4.3 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 304 "/QDR-II+ SRAM/RAM_WD26")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A712B6) (at 125.253 117.95) (path /5685DE78/56AD68DC) (fp_text reference R76 (at 4.272 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 314 "/QDR-II+ SRAM/RAM_WD27")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A712BC) (at 125.25 116.95) (path /5685DE78/56AD68E4) (fp_text reference R77 (at 4.275 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 412 "/QDR-II+ SRAM/RAM_WD28")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A712C2) (at 125.25 115.95) (path /5685DE78/56AD68A8) (fp_text reference R78 (at 4.275 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 331 "/QDR-II+ SRAM/RAM_WD29")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A712C8) (at 125.253 113.95) (path /5685DE78/56AD68B0) (fp_text reference R79 (at 4.297 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 332 "/QDR-II+ SRAM/RAM_WD30")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A712CE) (at 122.25 112.45) (path /5685DE78/56AD68B9) (fp_text reference R80 (at 4.3 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 310 "/QDR-II+ SRAM/RAM_WD31")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A712D4) (at 122.25 110.45) (path /5685DE78/56AD68C1) (fp_text reference R81 (at 4.25 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 303 "/QDR-II+ SRAM/RAM_WD32")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A712DA) (at 120.2 108.95) (path /5685DE78/56AD7764) (fp_text reference R82 (at 4.2 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 337 "/QDR-II+ SRAM/RAM_WD33")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A712E0) (at 120.2 107.95) (path /5685DE78/56AD776C) (fp_text reference R83 (at 4.2 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 335 "/QDR-II+ SRAM/RAM_WD34")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A712E6) (at 122.25 106.45) (path /5685DE78/56AD7774) (fp_text reference R84 (at 2.45 -0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 375 "/QDR-II+ SRAM/RAM_WD35")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A712F2) (at 112.625 123.7 270) (path /5685DE78/56AD8799) (fp_text reference R86 (at 4.3 0 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 376 "/QDR-II+ SRAM/RAM_RD_N")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A712F8) (at 115.1 125.875 270) (path /5685DE78/56AD87A2) (fp_text reference R87 (at -0.025 -3.875 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 405 "/QDR-II+ SRAM/RAM_CLK_P")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A712FE) (at 114.625 123.725 270) (path /5685DE78/56AD87AA) (fp_text reference R88 (at 4.25 0 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 406 "/QDR-II+ SRAM/RAM_CLK_N")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71304) (at 111.6 123.7 270) (path /5685DE78/56AD876E) (fp_text reference R89 (at -0.025 0.95 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 403 "/QDR-II+ SRAM/RAM_A17")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7130A) (at 117.1 125.878 270) (path /5685DE78/56AD8776) (fp_text reference R90 (at -0.003 -4.6 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 400 "/QDR-II+ SRAM/RAM_A16")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71310) (at 112.1 125.875 270) (path /5685DE78/56AD877F) (fp_text reference R91 (at 0.025 4.15 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 402 "/QDR-II+ SRAM/RAM_A15")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71316) (at 121.3 117.45) (path /5685DE78/56AD8787) (fp_text reference R92 (at 2.25 -0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 396 "/QDR-II+ SRAM/RAM_A14")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7131C) (at 113.1 125.872 270) (path /5685DE78/56AD9DB0) (fp_text reference R93 (at 0.053 4.2 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 399 "/QDR-II+ SRAM/RAM_A13")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71322) (at 107.8 108.45 180) (path /5685DE78/56AD9DB8) (fp_text reference R94 (at 2.450001 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 401 "/QDR-II+ SRAM/RAM_A12")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71328) (at 112.1 103.25 90) (path /5685DE78/56AD9DC1) (fp_text reference R95 (at 3.25 0.05 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 410 "/QDR-II+ SRAM/RAM_A11")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7132E) (at 107.8 107.45 180) (path /5685DE78/56AD9DC9) (fp_text reference R96 (at 3.2 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 446 "/QDR-II+ SRAM/RAM_A10")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71334) (at 117.4 103 90) (path /5685DE78/56AD9D8D) (fp_text reference R97 (at 2.5 0.05 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 447 "/QDR-II+ SRAM/RAM_A9")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7133A) (at 116.3 103 90) (path /5685DE78/56AD9D95) (fp_text reference R98 (at 3.2 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 452 "/QDR-II+ SRAM/RAM_A8")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71340) (at 113.1 103.25 90) (path /5685DE78/56AD9D9E) (fp_text reference R99 (at 3.15 0.05 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 451 "/QDR-II+ SRAM/RAM_A7")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71346) (at 104.2 105.95 180) (path /5685DE78/56AD9DA6) (fp_text reference R100 (at 3.875 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 445 "/QDR-II+ SRAM/RAM_A6")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7134C) (at 118.2 103.85) (path /5685DE78/56AD2EEB) (fp_text reference R101 (at 2.85 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 449 "/QDR-II+ SRAM/RAM_A5")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71352) (at 117.6 102.8) (path /5685DE78/56AD2EF3) (fp_text reference R102 (at 3.4 0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 408 "/QDR-II+ SRAM/RAM_A4")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71358) (at 115.45 103 90) (path /5685DE78/56AD2EFC) (fp_text reference R103 (at 2.85 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 409 "/QDR-II+ SRAM/RAM_A3")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7135E) (at 113.6 105.35 90) (path /5685DE78/56AD2F04) (fp_text reference R104 (at 2.82 -0.02 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 404 "/QDR-II+ SRAM/RAM_A2")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71364) (at 112.6 105.353 90) (path /5685DE78/56AD2CFC) (fp_text reference R105 (at 2.85 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 49.9 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 407 "/QDR-II+ SRAM/RAM_A1")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7136A) (at 104.2 105 180) (path /5685DE78/56AD2D04) (fp_text reference R106 (at 3.85 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 448 "/QDR-II+ SRAM/RAM_A0")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71370) (at 81.35 92.05 180) (path /5685DE62/56B14DE8) (fp_text reference R116 (at 2.56 0.82 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 4.7K (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 510 "/XAUI PHY/PHY_TEST_EN")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71376) (at 168.9 34.3 180) (path /5685DDE2/56B35216) (fp_text reference R120 (at 0 0.9 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 529 "Net-(R120-Pad1)")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 182 "/Power Supply/CPLD_JTAG_TDO")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7137C) (at 164 39.9 180) (path /569AEE1D/56B3E591) (fp_text reference R121 (at 0 -1 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 530 "/Clocks / buffers/CLK_32KHZ")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 531 "Net-(R121-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71382) (at 119.49 67.05 270) (path /5697D556/56C576D2) (fp_text reference R164 (at -0.38 -0.95 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 4.7K (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 381 "/Power Supply/FPGA_RESET_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71388) (at 132.6 44 90) (path /5697D556/56C5769B) (fp_text reference R165 (at 0.05 0.95 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 4.7K (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 388 "/Power Supply/FPGA_INIT_B")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7138E) (at 113.95 84.5 180) (path /5697D556/56C6056C) (fp_text reference R166 (at -2.2 0.85 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 385 "Net-(R166-Pad1)")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 532 "/FPGA Config/BOOT_SPI_DQ0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71394) (at 113.85 85.5 180) (path /5697D556/56C60707) (fp_text reference R167 (at 3.3 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 384 "Net-(R167-Pad1)")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 533 "/FPGA Config/BOOT_SPI_DQ1")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7139A) (at 111.45 81.45 180) (path /5697D556/56C60746) (fp_text reference R168 (at 0.8 0.9 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 387 "Net-(R168-Pad1)")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 534 "/FPGA Config/BOOT_SPI_DQ2")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A713A0) (at 112.9 86.3 180) (path /5697D556/56C6074F) (fp_text reference R169 (at 2.5 -0.25 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 386 "Net-(R169-Pad1)")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 535 "/FPGA Config/BOOT_SPI_DQ3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A713A6) (at 112.45 82.85 90) (path /5697D556/56C61113) (fp_text reference R171 (at 2.4 0.1 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 440 "Net-(R171-Pad1)")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 536 "/FPGA Config/BOOT_SPI_CS_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A713AC) (at 104.05 78.5 180) (path /5685DE62/56C6F54F) (fp_text reference R172 (at -0.3 0.85 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "100 1%" (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 450 "Net-(R172-Pad1)")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A713B2) (at 82 51.35) (path /5697D556/56C8436E) (fp_text reference R173 (at -2.8 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 535 "/FPGA Config/BOOT_SPI_DQ3")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 537 "Net-(R173-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A713B8) (at 84.6 51.35) (path /5697D556/56C84494) (fp_text reference R174 (at 2.6 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 532 "/FPGA Config/BOOT_SPI_DQ0")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 538 "Net-(R174-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A713BE) (at 216.7 56.95) (path /5697D556/56C85658) (fp_text reference R175 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 539 "/FPGA Config/DATA_SPI_DQ3")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 540 "Net-(R175-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A713C4) (at 216.05 54.1) (path /5697D556/56C8565E) (fp_text reference R176 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 541 "/FPGA Config/DATA_SPI_DQ0")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 542 "Net-(R176-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A713CA) (at 213.32 57.12) (path /5697D556/56C83C25) (fp_text reference R177 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 391 "Net-(R177-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 543 "/FPGA Config/DATA_SPI_CS_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A713D0) (at 212.8 54.05) (path /5697D556/56C83D76) (fp_text reference R178 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 390 "Net-(R178-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 544 "/FPGA Config/DATA_SPI_SCK")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A713D6) (at 208.95 53.05) (path /5697D556/56C83E3F) (fp_text reference R179 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 443 "Net-(R179-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 541 "/FPGA Config/DATA_SPI_DQ0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A713DC) (at 205.22 55.92) (path /5697D556/56C83E47) (fp_text reference R180 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 389 "Net-(R180-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 545 "/FPGA Config/DATA_SPI_DQ1")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A713E2) (at 205.42 60.12 180) (path /5697D556/56C83E99) (fp_text reference R181 (at 0 1.5 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 394 "Net-(R181-Pad1)")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 546 "/FPGA Config/DATA_SPI_DQ2")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A713E8) (at 205.2 53) (path /5697D556/56C83EA1) (fp_text reference R182 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 393 "Net-(R182-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 539 "/FPGA Config/DATA_SPI_DQ3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A713EE) (at 53.25 45.95) (path /56BEDE01/56C8FD4F) (fp_text reference R183 (at -2.75 -0.15) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 4.7K (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 497 "/Current Shunt Monitors/PSU_I2C_SDA")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A713F4) (at 53.25 46.8) (path /56BEDE01/56C8FEED) (fp_text reference R184 (at -2.8 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 4.7K (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 470 "/Current Shunt Monitors/PSU_I2C_SCL")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A713FA) (at 126.05 78.5) (path /56983D83/56C99BF2) (fp_text reference R185 (at 0.375 -0.925) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "100 1%" (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 437 "Net-(R185-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71400) (at 112.61 41.15 270) (path /56869E40/56CF9900) (fp_text reference R197 (at -1.67 -0.93 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 4.7K (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 242 "/Zynq CPU/ZYNQ_INIT_B")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71406) (at 106.325 40.1 90) (path /56869E40/56CF734A) (fp_text reference R200 (at 2.525 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 100 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 263 "Net-(R200-Pad1)")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7140C) (at 108.825 40.175 90) (path /56869E40/56CF7203) (fp_text reference R201 (at 0 -1.5 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 100 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 262 "Net-(R201-Pad1)")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71412) (at 101.9 47.45 180) (path /56869E40/56D065C4) (fp_text reference R205 (at 3.05 0.05 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 255 "Net-(R205-Pad1)")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 214 "/Zynq CPU/ARM_JTAG_TDO")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71418) (at 123.45 48.8) (path /569AEE1D/56D54E69) (fp_text reference R214 (at 0 0.95) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 235 "/Clocks / buffers/CLK_ZYNQ")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 547 "Net-(R214-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7141E) (at 82.05 61.65 180) (path /5697D556/56A07335) (fp_text reference R217 (at 2.6 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 548 "Net-(R217-Pad1)")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 533 "/FPGA Config/BOOT_SPI_DQ1")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71424) (at 84.5 61.65) (path /5697D556/56A07439) (fp_text reference R218 (at 2.35 -0.35) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 549 "Net-(R218-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 534 "/FPGA Config/BOOT_SPI_DQ2")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7142A) (at 209.72 57.32) (path /5697D556/56A07699) (fp_text reference R219 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 550 "Net-(R219-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 545 "/FPGA Config/DATA_SPI_DQ1")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71430) (at 209.62 60.12) (path /5697D556/56A0769F) (fp_text reference R220 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 551 "Net-(R220-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 546 "/FPGA Config/DATA_SPI_DQ2")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71436) (at 81.19 104.8 270) (path /5685DE62/56A60252) (fp_text reference R221 (at 1.95 0.89 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 508 "Net-(R221-Pad1)")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 433 "/XAUI PHY/PHY_JTAG_TDO")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7143C) (at 79.65 60.6) (path /5697D556/56AA5F05) (fp_text reference R223 (at 0 -0.95) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 4.7K (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 536 "/FPGA Config/BOOT_SPI_CS_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A71442) (at 213.12 59.72) (path /5697D556/56AA6F9D) (fp_text reference R224 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 4.7K (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 543 "/FPGA Config/DATA_SPI_CS_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A71448) (at 82.75 103.61 90) (path /5685DE62/56AABAC2) (fp_text reference R225 (at -2.73 0.2 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 4.7K (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 411 "/XAUI PHY/PHY_PDWRDN_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A76290) (at 83.65 74.225 270) (path /569AEE1D/56D74463) (fp_text reference R215 (at 2.575 0 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 100 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 109 "/Clocks / buffers/CLK_125MHZ_AC_P")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 111 "/Clocks / buffers/CLK_125MHZ_AC_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A76296) (at 86.35 64.45 270) (path /569AEE1D/56D784F1) (fp_text reference R216 (at 2.6 -0.3 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 100 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 113 "/Clocks / buffers/CLK_156MHZ_AC_P")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 115 "/Clocks / buffers/CLK_156MHZ_AC_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:QFN_16_0.5MM_3x3MM (layer F.Cu) (tedit 54AFBA37) (tstamp 56A762AF) (at 178.75 118.6 180) (path /56BEDE01/56C891D2) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U21 (at 0 2.5 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value INA230 (at 0.25 3.25 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.75 1.25) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.25) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 -1.25) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.25 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.25) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (pad 12 smd rect (at -0.75 -1.5 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 552 "/Power Supply/12V0_SHUNT_LO")) (pad 11 smd rect (at -0.25 -1.5 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 553 "/Power Supply/12V0_SHUNT_HI")) (pad 10 smd rect (at 0.25 -1.5 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 9 smd rect (at 0.75 -1.5 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 8 smd rect (at 1.5 -0.75 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 7 smd rect (at 1.5 -0.25 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 6 smd rect (at 1.5 0.25 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 5 smd rect (at 1.5 0.75 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 470 "/Current Shunt Monitors/PSU_I2C_SCL")) (pad 4 smd rect (at 0.75 1.5 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 497 "/Current Shunt Monitors/PSU_I2C_SDA")) (pad 3 smd rect (at 0.25 1.5 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 2 smd rect (at -0.25 1.5 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 1 smd rect (at -0.75 1.5 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 16 smd rect (at -1.5 0.75 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 15 smd rect (at -1.5 0.25 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 14 smd rect (at -1.5 -0.25 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 13 smd rect (at -1.5 -0.75 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 553 "/Power Supply/12V0_SHUNT_HI")) (pad PAD smd rect (at 0 0 180) (size 1.25 1.25) (layers F.Cu F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 -0.25 180) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 -0.25 180) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 0.25 180) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 0.25 180) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/qfn-16.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:QFN_16_0.5MM_3x3MM (layer F.Cu) (tedit 54AFBA37) (tstamp 56A762C8) (at 57.05 45.3 270) (path /56BEDE01/56C8B77E) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U22 (at -2.45 0.3 360) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value INA230 (at 0.25 3.25 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.75 1.25) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.25) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 -1.25) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.25 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.25) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (pad 12 smd rect (at -0.75 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 554 "/Power Supply/3V3_SHUNT_LO")) (pad 11 smd rect (at -0.25 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 555 "/Power Supply/3V3_SHUNT_HI")) (pad 10 smd rect (at 0.25 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 9 smd rect (at 0.75 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 8 smd rect (at 1.5 -0.75 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 7 smd rect (at 1.5 -0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 6 smd rect (at 1.5 0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 5 smd rect (at 1.5 0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 470 "/Current Shunt Monitors/PSU_I2C_SCL")) (pad 4 smd rect (at 0.75 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 497 "/Current Shunt Monitors/PSU_I2C_SDA")) (pad 3 smd rect (at 0.25 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 2 smd rect (at -0.25 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 1 smd rect (at -0.75 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 16 smd rect (at -1.5 0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 15 smd rect (at -1.5 0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 14 smd rect (at -1.5 -0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 13 smd rect (at -1.5 -0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 555 "/Power Supply/3V3_SHUNT_HI")) (pad PAD smd rect (at 0 0 270) (size 1.25 1.25) (layers F.Cu F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 -0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 -0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/qfn-16.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:QFN_16_0.5MM_3x3MM (layer F.Cu) (tedit 54AFBA37) (tstamp 56A762E1) (at 123.175 44.25 270) (path /56BEDE01/56C8B8F7) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U23 (at 2.525 -0.725 360) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value INA230 (at 0.25 3.25 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.75 1.25) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.25) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 -1.25) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.25 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.25) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (pad 12 smd rect (at -0.75 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 556 "/Power Supply/2V5_SHUNT_LO")) (pad 11 smd rect (at -0.25 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 557 "/Power Supply/2V5_SHUNT_HI")) (pad 10 smd rect (at 0.25 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 9 smd rect (at 0.75 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 8 smd rect (at 1.5 -0.75 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 7 smd rect (at 1.5 -0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 6 smd rect (at 1.5 0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 5 smd rect (at 1.5 0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 470 "/Current Shunt Monitors/PSU_I2C_SCL")) (pad 4 smd rect (at 0.75 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 497 "/Current Shunt Monitors/PSU_I2C_SDA")) (pad 3 smd rect (at 0.25 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 2 smd rect (at -0.25 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 497 "/Current Shunt Monitors/PSU_I2C_SDA")) (pad 1 smd rect (at -0.75 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 16 smd rect (at -1.5 0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 15 smd rect (at -1.5 0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 14 smd rect (at -1.5 -0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 13 smd rect (at -1.5 -0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 557 "/Power Supply/2V5_SHUNT_HI")) (pad PAD smd rect (at 0 0 270) (size 1.25 1.25) (layers F.Cu F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 -0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 -0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/qfn-16.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:QFN_16_0.5MM_3x3MM (layer F.Cu) (tedit 54AFBA37) (tstamp 56A762FA) (at 170.35 55.3) (path /56BEDE01/56C8B999) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U24 (at -2.55 0.1 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value INA230 (at 0.25 3.25) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.75 1.25) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.25) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 -1.25) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.25 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.25) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (pad 12 smd rect (at -0.75 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 558 "/Power Supply/1V8_SHUNT_LO")) (pad 11 smd rect (at -0.25 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 559 "/Power Supply/1V8_SHUNT_HI")) (pad 10 smd rect (at 0.25 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 9 smd rect (at 0.75 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 8 smd rect (at 1.5 -0.75 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 7 smd rect (at 1.5 -0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 6 smd rect (at 1.5 0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 5 smd rect (at 1.5 0.75 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 470 "/Current Shunt Monitors/PSU_I2C_SCL")) (pad 4 smd rect (at 0.75 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 497 "/Current Shunt Monitors/PSU_I2C_SDA")) (pad 3 smd rect (at 0.25 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 2 smd rect (at -0.25 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 470 "/Current Shunt Monitors/PSU_I2C_SCL")) (pad 1 smd rect (at -0.75 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 16 smd rect (at -1.5 0.75 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 15 smd rect (at -1.5 0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 14 smd rect (at -1.5 -0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 13 smd rect (at -1.5 -0.75 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 559 "/Power Supply/1V8_SHUNT_HI")) (pad PAD smd rect (at 0 0) (size 1.25 1.25) (layers F.Cu F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 -0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 -0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/qfn-16.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:QFN_16_0.5MM_3x3MM (layer F.Cu) (tedit 54AFBA37) (tstamp 56A76313) (at 66.6 124.15 90) (path /56BEDE01/56C8B9B0) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U25 (at 0 3.15 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value INA230 (at 0.25 3.25 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.75 1.25) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.25) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 -1.25) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.25 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.25) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (pad 12 smd rect (at -0.75 -1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 560 "/Power Supply/1V5_SHUNT_LO")) (pad 11 smd rect (at -0.25 -1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 561 "/Power Supply/1V5_SHUNT_HI")) (pad 10 smd rect (at 0.25 -1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 9 smd rect (at 0.75 -1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 8 smd rect (at 1.5 -0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 7 smd rect (at 1.5 -0.25 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 6 smd rect (at 1.5 0.25 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 5 smd rect (at 1.5 0.75 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 470 "/Current Shunt Monitors/PSU_I2C_SCL")) (pad 4 smd rect (at 0.75 1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 497 "/Current Shunt Monitors/PSU_I2C_SDA")) (pad 3 smd rect (at 0.25 1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 2 smd rect (at -0.25 1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 1 smd rect (at -0.75 1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 16 smd rect (at -1.5 0.75 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 15 smd rect (at -1.5 0.25 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 14 smd rect (at -1.5 -0.25 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 13 smd rect (at -1.5 -0.75 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 561 "/Power Supply/1V5_SHUNT_HI")) (pad PAD smd rect (at 0 0 90) (size 1.25 1.25) (layers F.Cu F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 -0.25 90) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 -0.25 90) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 0.25 90) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 0.25 90) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/qfn-16.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:QFN_16_0.5MM_3x3MM (layer F.Cu) (tedit 54AFBA37) (tstamp 56A7632C) (at 148.35 55.85) (path /56BEDE01/56C8BA25) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U26 (at 2.75 -0.4 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value INA230 (at 0.25 3.25) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.75 1.25) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.25) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 -1.25) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.25 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.25) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (pad 12 smd rect (at -0.75 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 562 "/Power Supply/1V2_SHUNT_LO")) (pad 11 smd rect (at -0.25 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 563 "/Power Supply/1V2_SHUNT_HI")) (pad 10 smd rect (at 0.25 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 9 smd rect (at 0.75 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 8 smd rect (at 1.5 -0.75 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 7 smd rect (at 1.5 -0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 6 smd rect (at 1.5 0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 5 smd rect (at 1.5 0.75 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 470 "/Current Shunt Monitors/PSU_I2C_SCL")) (pad 4 smd rect (at 0.75 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 497 "/Current Shunt Monitors/PSU_I2C_SDA")) (pad 3 smd rect (at 0.25 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 2 smd rect (at -0.25 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 1 smd rect (at -0.75 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 16 smd rect (at -1.5 0.75 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 15 smd rect (at -1.5 0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 14 smd rect (at -1.5 -0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 13 smd rect (at -1.5 -0.75 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 563 "/Power Supply/1V2_SHUNT_HI")) (pad PAD smd rect (at 0 0) (size 1.25 1.25) (layers F.Cu F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 -0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 -0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/qfn-16.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:QFN_16_0.5MM_3x3MM (layer F.Cu) (tedit 54AFBA37) (tstamp 56A76345) (at 152.65 86.05 180) (path /56BEDE01/56C8BA3C) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U27 (at 0 2.5 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value INA230 (at 0.25 3.25 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.75 1.25) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.25) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 -1.25) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.25 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.25) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (pad 12 smd rect (at -0.75 -1.5 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 564 "/Power Supply/1V0_SHUNT_HI")) (pad 11 smd rect (at -0.25 -1.5 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 565 "/Power Supply/1V0_SHUNT_LO")) (pad 10 smd rect (at 0.25 -1.5 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 9 smd rect (at 0.75 -1.5 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 8 smd rect (at 1.5 -0.75 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 7 smd rect (at 1.5 -0.25 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 6 smd rect (at 1.5 0.25 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 5 smd rect (at 1.5 0.75 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 470 "/Current Shunt Monitors/PSU_I2C_SCL")) (pad 4 smd rect (at 0.75 1.5 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 497 "/Current Shunt Monitors/PSU_I2C_SDA")) (pad 3 smd rect (at 0.25 1.5 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 2 smd rect (at -0.25 1.5 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 497 "/Current Shunt Monitors/PSU_I2C_SDA")) (pad 1 smd rect (at -0.75 1.5 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 16 smd rect (at -1.5 0.75 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 15 smd rect (at -1.5 0.25 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 14 smd rect (at -1.5 -0.25 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 13 smd rect (at -1.5 -0.75 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 565 "/Power Supply/1V0_SHUNT_LO")) (pad PAD smd rect (at 0 0 180) (size 1.25 1.25) (layers F.Cu F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 -0.25 180) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 -0.25 180) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 0.25 180) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 0.25 180) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/qfn-16.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:QFN_16_0.5MM_3x3MM (layer F.Cu) (tedit 54AFBA37) (tstamp 56A7635E) (at 79.8 121) (path /56BEDE01/56C8BABD) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U28 (at 0 3.15) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value INA230 (at 0.25 3.25) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.75 1.25) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.25) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 -1.25) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.25 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.25) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (pad 12 smd rect (at -0.75 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 566 "/Power Supply/VTT_SENSE_LO")) (pad 11 smd rect (at -0.25 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 567 "/Power Supply/VTT_SENSE_HI")) (pad 10 smd rect (at 0.25 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 9 smd rect (at 0.75 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 8 smd rect (at 1.5 -0.75 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 7 smd rect (at 1.5 -0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 6 smd rect (at 1.5 0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 5 smd rect (at 1.5 0.75 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 470 "/Current Shunt Monitors/PSU_I2C_SCL")) (pad 4 smd rect (at 0.75 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 497 "/Current Shunt Monitors/PSU_I2C_SDA")) (pad 3 smd rect (at 0.25 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 2 smd rect (at -0.25 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 470 "/Current Shunt Monitors/PSU_I2C_SCL")) (pad 1 smd rect (at -0.75 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 16 smd rect (at -1.5 0.75 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 15 smd rect (at -1.5 0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 14 smd rect (at -1.5 -0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 13 smd rect (at -1.5 -0.75 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 567 "/Power Supply/VTT_SENSE_HI")) (pad PAD smd rect (at 0 0) (size 1.25 1.25) (layers F.Cu F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 -0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 -0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/qfn-16.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A77615) (at 113.85 36.4) (path /56869E40/56D1DEB2) (fp_text reference L19 (at 2.2 -0.025) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 600R (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 103 "/Zynq CPU/A1V8")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7761B) (at 134.285 66.582) (path /5685DE1C/56D3351D) (fp_text reference L20 (at 2.1 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 600R (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 104 "/Backplane Connector/GTP_VTT")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 106 "/FPGA support/1V2")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A77621) (at 68.18 142.63) (path /5685DE1C/56D33DD9) (fp_text reference L21 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 600R (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 105 "/FPGA support/GTP_VDD")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A77627) (at 52.15 182.39) (path /5685DE1C/56D41030) (fp_text reference L22 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 600R (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 107 "/FPGA support/A1V8_ARTIX")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7762D) (at 57.2 58.55 180) (path /5685DE45/56A66231) (fp_text reference R22 (at 2.28 -0.04 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 3.3k (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 495 "/Front panel SFP+s/ETH9_SCL")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77633) (at 57.2 57.6 180) (path /5685DE45/56A66C1A) (fp_text reference R23 (at 2.35 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 3.3k (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 474 "/Front panel SFP+s/ETH9_SDA")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77639) (at 58.39 72.77 180) (path /5685DE45/56A67D08) (fp_text reference R24 (at 2.02 -0.11 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 3.3k (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 494 "/Front panel SFP+s/ETH10_SCL")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7763F) (at 58.39 71.98 180) (path /5685DE45/56A67D10) (fp_text reference R25 (at 2.05 0.03 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 3.3k (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 498 "/Front panel SFP+s/ETH10_SDA")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77645) (at 58.4 87 180) (path /5685DE45/56A67E02) (fp_text reference R26 (at 2.15 -0.1 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 3.3k (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 479 "/Front panel SFP+s/ETH11_SCL")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7764B) (at 58.397 86.2 180) (path /5685DE45/56A67E0A) (fp_text reference R27 (at 2.147 0.15 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 3.3k (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 492 "/Front panel SFP+s/ETH11_SDA")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77651) (at 58.4 101.35 180) (path /5685DE45/56A67E14) (fp_text reference R28 (at 2 -0.05 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 3.3k (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 491 "/Front panel SFP+s/ETH12_SCL")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77657) (at 58.4 100.45 180) (path /5685DE45/56A67E1C) (fp_text reference R29 (at 2 0.15 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 3.3k (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 485 "/Front panel SFP+s/ETH12_SDA")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7765D) (at 73.6 56.9 180) (path /5685DE45/56AF6C32) (fp_text reference R107 (at 0 1.05 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 220 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 512 "Net-(Q1-PadD1)")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 149 "Net-(D1-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A77663) (at 72.05 61.1 270) (path /5685DE45/56AF8392) (fp_text reference R108 (at -0.5 1.2 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 220 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 511 "Net-(Q1-PadD2)")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 150 "Net-(D2-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A77669) (at 71.95 70.2 90) (path /5685DE45/56AF8787) (fp_text reference R109 (at 0.3 0.95 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 220 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 514 "Net-(Q2-PadD1)")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 151 "Net-(D3-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7766F) (at 72.05 75.6 270) (path /5685DE45/56AF8B8F) (fp_text reference R110 (at 0 1 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 220 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 513 "Net-(Q2-PadD2)")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 152 "Net-(D4-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A77675) (at 72.05 84.15 90) (path /5685DE45/56AF8BA4) (fp_text reference R111 (at -0.1 1.3 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 220 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 516 "Net-(Q3-PadD1)")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 153 "Net-(D5-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7767B) (at 72.05 90.05 270) (path /5685DE45/56AF8E86) (fp_text reference R112 (at -0.65 0.9 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 220 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 515 "Net-(Q3-PadD2)")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 154 "Net-(D6-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77681) (at 71.7 98.25 90) (path /5685DE45/56AF8E9A) (fp_text reference R113 (at -0.05 -0.95 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 220 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 518 "Net-(Q4-PadD1)")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 155 "Net-(D7-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77687) (at 72.65 105.15 180) (path /5685DE45/56AF8EAF) (fp_text reference R114 (at -2.45 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 220 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 517 "Net-(Q4-PadD2)")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 156 "Net-(D8-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_RES_NOSILK (layer B.Cu) (tedit 53C52A47) (tstamp 56A7768D) (at 84.65 91.13 180) (path /5685DE62/56B13A8F) (fp_text reference R115 (at 0.86 1.19 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 2K (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.775 0 180) (size 0.787 0.864) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.775 0 180) (size 0.787 0.864) (layers B.Cu B.Paste B.Mask) (net 420 "/XAUI PHY/PHY_MDIO")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77693) (at 81.35 93 180) (path /5685DE62/56B14FB6) (fp_text reference R117 (at 2.58 0.78 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value DNP (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 510 "/XAUI PHY/PHY_TEST_EN")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77699) (at 175.7 113.45 270) (path /5685DDE2/56B2C7F8) (fp_text reference R118 (at 0.55 -1.05 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 2.49k (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 568 "Net-(R118-Pad1)")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 569 "/Power Supply/1V0_MASTER_SYNCI")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7769F) (at 79.45 87.2 90) (path /5685DDE2/56B2A77C) (fp_text reference R119 (at 0 -1.05 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 0 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 570 "/Power Supply/REMOTE_SENSE")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A776A5) (at 74.1 120.25) (path /5685DDE2/56B51CEF) (fp_text reference R122 (at -2.55 -0.05) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 10K (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 86 "/Power Supply/0V75_REF")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A776AB) (at 74.1 119.35 180) (path /5685DDE2/56B53572) (fp_text reference R123 (at 2.55 0.1 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 10K (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 86 "/Power Supply/0V75_REF")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A776B1) (at 110.65 126.95 180) (path /5685DDE2/56B55CBA) (fp_text reference R124 (at 2.55 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 0 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 571 "/Power Supply/VTT_SENSE")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A776B7) (at 165.9 42.7 180) (path /5685DDE2/56B4D3DF) (fp_text reference R125 (at 2.5 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 10K (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 89 "/Clocks / buffers/1V8_SB")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 572 "/Power Supply/VTT_PGOOD")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A776BD) (at 168.45 42.15 90) (path /5685DDE2/56B4590D) (fp_text reference R126 (at -2.45 -0.13 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 1K (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 89 "/Clocks / buffers/1V8_SB")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 573 "/Power Supply/1V0_PGOOD")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A776C3) (at 164.45 38.9 180) (path /5685DDE2/56B776FB) (fp_text reference R127 (at 1.8 -0.9 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 10K (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 574 "/Power Supply/3V3_PGOOD")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 89 "/Clocks / buffers/1V8_SB")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A776C9) (at 53.65 101.35 180) (path /5685DDE2/56B7F332) (fp_text reference R128 (at 0 -1.05 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 0 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 575 "/Power Supply/3V3_SENSE")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A776CF) (at 166.025 40.175 225) (path /5685DDE2/56B88F6E) (fp_text reference R131 (at 1.378858 0.919239 225) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 10K (at 0 -3.5 225) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 225) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 576 "/Power Supply/1V5_PGOOD")) (pad 2 smd rect (at 0.597 0 225) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 89 "/Clocks / buffers/1V8_SB")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A776D5) (at 108.4 123.15 180) (path /5685DDE2/56B88F84) (fp_text reference R132 (at 2.55 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 0 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 577 "/Power Supply/1V5_SENSE")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A776DB) (at 167.375 42.1 270) (path /5685DDE2/56B92A48) (fp_text reference R135 (at 2.4 0.075 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 10K (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 578 "/Power Supply/1V2_PGOOD")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 89 "/Clocks / buffers/1V8_SB")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A776E1) (at 134.885 64.982 90) (path /5685DDE2/56B92A5E) (fp_text reference R136 (at 2.8 0.1 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 0 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 106 "/FPGA support/1V2")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 579 "/Power Supply/1V2_SENSE")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A776E7) (at 165.05 37.45 180) (path /5685DDE2/56B96B97) (fp_text reference R139 (at 2.4 -0.35 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 10K (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 580 "/Power Supply/2V5_PGOOD")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 90 "/LEDs and test points/2V5_SB")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A776ED) (at 99.9 42.9 180) (path /5685DDE2/56B96BAD) (fp_text reference R140 (at 2.525 -0.025 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 0 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 581 "/Power Supply/2V5_SENSE")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A776F3) (at 177.1 39 180) (path /5685DDE2/56BA7B0F) (fp_text reference R141 (at 0 1 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 10K (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 99 "/FPGA support/1V25_REF")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 90 "/LEDs and test points/2V5_SB")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A776F9) (at 172.32 41.03) (path /5685DDE2/56BC0AA1) (fp_text reference R144 (at 2.45 -0.625) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 10K (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 582 "/Power Supply/1V8_PGOOD")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 90 "/LEDs and test points/2V5_SB")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A776FF) (at 117.05 57.5) (path /5685DDE2/56BC0AB7) (fp_text reference R145 (at 0 -0.9) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 0 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 583 "/Power Supply/1V8_SENSE")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A77705) (at 69.3 115.9) (path /5685DDE2/56C1ED1C) (fp_text reference R154 (at -2.7 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 1K (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 584 "/Power Supply/VTT_EN")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A7770B) (at 161.55 102.45 90) (path /5685DDE2/56C1FD85) (fp_text reference R155 (at -2.6 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 1K (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 585 "/Power Supply/1V0_EN")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A77711) (at 150.6 42.3 180) (path /5685DDE2/56C20A0A) (fp_text reference R156 (at 0 0.9 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 1K (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 586 "/Power Supply/1V2_EN")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A77717) (at 54.5 124.047 90) (path /5685DDE2/56C2278E) (fp_text reference R157 (at -0.403 -0.95 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 1K (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 587 "/Power Supply/1V5_EN")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7771D) (at 170.9 44.5 90) (path /5685DDE2/56C22794) (fp_text reference R158 (at -2.725 0.075 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 1K (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 588 "/Power Supply/1V8_EN")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A77723) (at 131.25 33.55 180) (path /5685DDE2/56C233A4) (fp_text reference R159 (at 0.15 0.85 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 1K (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 589 "/Power Supply/2V5_EN")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56A77729) (at 64.25 34.9) (path /5685DDE2/56C242F6) (fp_text reference R160 (at 2.6 0.05) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 1K (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 590 "/Power Supply/3V3_EN")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7772F) (at 122.975 77.5) (path /5697D556/56C68B41) (fp_text reference R161 (at -2.4 0.025) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 1K (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 364 "Net-(R161-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77735) (at 123.05 78.5) (path /5697D556/56C68C8D) (fp_text reference R162 (at 1.15 0.925) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 1K (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 366 "Net-(R162-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7773B) (at 120.95 78.5 180) (path /5697D556/56C68CCA) (fp_text reference R163 (at -0.4 -0.95 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 1K (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 365 "Net-(R163-Pad1)")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77741) (at 113.5 83.05 270) (path /5697D556/56C5FF9D) (fp_text reference R170 (at -0.75 2.05 540) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 1K (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 444 "Net-(R170-Pad1)")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77747) (at 110.475 52.575 270) (path /56869E40/56CF46E5) (fp_text reference R195 (at 2.425 -0.05 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 1K (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 276 "Net-(R195-Pad1)")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7774D) (at 104.34 42.39) (path /56869E40/56CF9237) (fp_text reference R196 (at -2.5 -0.14) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 1K (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 293 "/Zynq CPU/ZYNQ_PROG_B")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77753) (at 114.097 48 180) (path /56869E40/56A68F2D) (fp_text reference R198 (at -2.003 -1 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 1K (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 230 "/Zynq CPU/ZYNQ_PS_SRST_B")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7775F) (at 110.9 41.575) (path /56869E40/56CFE14F) (fp_text reference R202 (at -0.29 -1.645) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 10K (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 287 "Net-(R202-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77765) (at 110.9 40.77) (path /56869E40/56CFE36D) (fp_text reference R203 (at -0.27 -1.79) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 10K (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 287 "Net-(R202-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7776B) (at 108.35 52.1) (path /56869E40/56D001CE) (fp_text reference R204 (at -0.5 0.919239) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 1K (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 237 "/Zynq CPU/ZYNQ_POR_B")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77771) (at 115.22 41.1 90) (path /56869E40/56D0344F) (fp_text reference R206 (at 2.4 0.27 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 20K (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 226 "Net-(R206-Pad1)")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77777) (at 117.625 47.05) (path /56869E40/56D033BE) (fp_text reference R207 (at 2.425 0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 20K (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 245 "Net-(R207-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7777D) (at 117.675 47.975) (path /56869E40/56D02F94) (fp_text reference R208 (at 2.45 0.025) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 20K (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 220 "Net-(R208-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77783) (at 118.275 46.15) (path /56869E40/56D014A0) (fp_text reference R209 (at 2.525 0.025) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 20K (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 219 "Net-(R209-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77789) (at 114.325 45.6) (path /56869E40/56D01EBE) (fp_text reference R210 (at 0 -1.5) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 20K (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 236 "Net-(R210-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7778F) (at 118.6 44.3 180) (path /56869E40/56D01F5F) (fp_text reference R211 (at -1.35 0.95 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 20K (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 217 "Net-(R211-Pad1)")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A77795) (at 118.25 45.3 180) (path /56869E40/56D01F67) (fp_text reference R212 (at -2.625 0.15 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 20K (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 218 "/Zynq CPU/ZYNQ_JMODE")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56A7779B) (at 119.91 42.27 180) (path /56869E40/56AAF021) (fp_text reference R226 (at -2.44 0.02 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value DNP (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 218 "/Zynq CPU/ZYNQ_JMODE")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:QFN_16_0.5MM_3x3MM (layer F.Cu) (tedit 54AFBA37) (tstamp 56AA2AB9) (at 64 37.75 270) (path /5685DDE2/56B74DBC) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U12 (at -2.65 2.25 360) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value TPS62142RGTR (at 0.25 3.25 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.75 1.25) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.25) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 -1.25) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.25 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.25) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (pad 12 smd rect (at -0.75 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 11 smd rect (at -0.25 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 10 smd rect (at 0.25 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 9 smd rect (at 0.75 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 91 "Net-(C352-Pad2)")) (pad 8 smd rect (at 1.5 -0.75 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 7 smd rect (at 1.5 -0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 6 smd rect (at 1.5 0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 5 smd rect (at 1.5 0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 4 smd rect (at 0.75 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 574 "/Power Supply/3V3_PGOOD")) (pad 3 smd rect (at 0.25 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 595 "/Power Supply/3V3_SW")) (pad 2 smd rect (at -0.25 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 595 "/Power Supply/3V3_SW")) (pad 1 smd rect (at -0.75 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 595 "/Power Supply/3V3_SW")) (pad 16 smd rect (at -1.5 0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 15 smd rect (at -1.5 0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 14 smd rect (at -1.5 -0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 575 "/Power Supply/3V3_SENSE")) (pad 13 smd rect (at -1.5 -0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 590 "/Power Supply/3V3_EN")) (pad PAD smd rect (at 0 0 270) (size 1.25 1.25) (layers F.Cu F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 -0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 -0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/qfn-16.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:QFN_16_0.5MM_3x3MM (layer F.Cu) (tedit 54AFBA37) (tstamp 56AA2AD2) (at 55.25 117.6 90) (path /5685DDE2/56B88F64) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U13 (at 2.95 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value TPS62140RGTR (at 0.25 3.25 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.75 1.25) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.25) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 -1.25) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.25 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.25) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (pad 12 smd rect (at -0.75 -1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 11 smd rect (at -0.25 -1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 10 smd rect (at 0.25 -1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 9 smd rect (at 0.75 -1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 93 "Net-(C357-Pad1)")) (pad 8 smd rect (at 1.5 -0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 7 smd rect (at 1.5 -0.25 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 6 smd rect (at 1.5 0.25 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 5 smd rect (at 1.5 0.75 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 596 "Net-(R129-Pad1)")) (pad 4 smd rect (at 0.75 1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 576 "/Power Supply/1V5_PGOOD")) (pad 3 smd rect (at 0.25 1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 597 "/Power Supply/1V5_SW")) (pad 2 smd rect (at -0.25 1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 597 "/Power Supply/1V5_SW")) (pad 1 smd rect (at -0.75 1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 597 "/Power Supply/1V5_SW")) (pad 16 smd rect (at -1.5 0.75 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 15 smd rect (at -1.5 0.25 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 14 smd rect (at -1.5 -0.25 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 577 "/Power Supply/1V5_SENSE")) (pad 13 smd rect (at -1.5 -0.75 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 587 "/Power Supply/1V5_EN")) (pad PAD smd rect (at 0 0 90) (size 1.25 1.25) (layers F.Cu F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 -0.25 90) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 -0.25 90) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 0.25 90) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 0.25 90) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/qfn-16.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:QFN_16_0.5MM_3x3MM (layer F.Cu) (tedit 54AFBA37) (tstamp 56AA2AEB) (at 147.55 45.79 270) (path /5685DDE2/56B92A3E) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U14 (at -2.49 2.65 360) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value TPS62140RGTR (at 0.25 3.25 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.75 1.25) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.25) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 -1.25) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.25 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.25) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (pad 12 smd rect (at -0.75 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 11 smd rect (at -0.25 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 10 smd rect (at 0.25 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 9 smd rect (at 0.75 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 95 "Net-(C362-Pad1)")) (pad 8 smd rect (at 1.5 -0.75 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 7 smd rect (at 1.5 -0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 6 smd rect (at 1.5 0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 5 smd rect (at 1.5 0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 598 "Net-(R133-Pad1)")) (pad 4 smd rect (at 0.75 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 578 "/Power Supply/1V2_PGOOD")) (pad 3 smd rect (at 0.25 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 599 "/Power Supply/1V2_SW")) (pad 2 smd rect (at -0.25 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 599 "/Power Supply/1V2_SW")) (pad 1 smd rect (at -0.75 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 599 "/Power Supply/1V2_SW")) (pad 16 smd rect (at -1.5 0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 15 smd rect (at -1.5 0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 14 smd rect (at -1.5 -0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 579 "/Power Supply/1V2_SENSE")) (pad 13 smd rect (at -1.5 -0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 586 "/Power Supply/1V2_EN")) (pad PAD smd rect (at 0 0 270) (size 1.25 1.25) (layers F.Cu F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 -0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 -0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/qfn-16.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:QFN_16_0.5MM_3x3MM (layer F.Cu) (tedit 54AFBA37) (tstamp 56AA2B04) (at 129.75 36.2 270) (path /5685DDE2/56B96B8D) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U15 (at -2.5 1.1 360) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value TPS62140RGTR (at 0.25 3.25 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.75 1.25) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.25) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 -1.25) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.25 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.25) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (pad 12 smd rect (at -0.75 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 11 smd rect (at -0.25 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 10 smd rect (at 0.25 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 9 smd rect (at 0.75 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 97 "Net-(C367-Pad1)")) (pad 8 smd rect (at 1.5 -0.75 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 7 smd rect (at 1.5 -0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 6 smd rect (at 1.5 0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 5 smd rect (at 1.5 0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 600 "Net-(R137-Pad1)")) (pad 4 smd rect (at 0.75 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 580 "/Power Supply/2V5_PGOOD")) (pad 3 smd rect (at 0.25 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 601 "/Power Supply/2V5_SW")) (pad 2 smd rect (at -0.25 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 601 "/Power Supply/2V5_SW")) (pad 1 smd rect (at -0.75 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 601 "/Power Supply/2V5_SW")) (pad 16 smd rect (at -1.5 0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 15 smd rect (at -1.5 0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 14 smd rect (at -1.5 -0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 581 "/Power Supply/2V5_SENSE")) (pad 13 smd rect (at -1.5 -0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 589 "/Power Supply/2V5_EN")) (pad PAD smd rect (at 0 0 270) (size 1.25 1.25) (layers F.Cu F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 -0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 -0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/qfn-16.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:QFN_16_0.5MM_3x3MM (layer F.Cu) (tedit 54AFBA37) (tstamp 56AA2B1D) (at 170.2 45.35 270) (path /5685DDE2/56BC0A97) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U18 (at -2.55 1.1 540) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value TPS62131RGTT (at 0.25 3.25 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.75 1.25) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.25) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 -1.25) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.25 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.25) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (pad 12 smd rect (at -0.75 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 11 smd rect (at -0.25 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 10 smd rect (at 0.25 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad 9 smd rect (at 0.75 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 101 "Net-(C378-Pad1)")) (pad 8 smd rect (at 1.5 -0.75 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 7 smd rect (at 1.5 -0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 6 smd rect (at 1.5 0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 5 smd rect (at 1.5 0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 4 smd rect (at 0.75 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 582 "/Power Supply/1V8_PGOOD")) (pad 3 smd rect (at 0.25 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 602 "/Power Supply/1V8_SW")) (pad 2 smd rect (at -0.25 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 602 "/Power Supply/1V8_SW")) (pad 1 smd rect (at -0.75 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 602 "/Power Supply/1V8_SW")) (pad 16 smd rect (at -1.5 0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 15 smd rect (at -1.5 0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 14 smd rect (at -1.5 -0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 583 "/Power Supply/1V8_SENSE")) (pad 13 smd rect (at -1.5 -0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 588 "/Power Supply/1V8_EN")) (pad PAD smd rect (at 0 0 270) (size 1.25 1.25) (layers F.Cu F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 -0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 -0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/qfn-16.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:QFN_16_0.5MM_3x3MM (layer F.Cu) (tedit 54AFBA37) (tstamp 56AA2B36) (at 86.8 74.2 270) (path /569AEE1D/56D70420) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U32 (at -2.6 1.675 360) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SI53306 (at 0.25 3.25 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.75 1.25) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.25) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 -1.25) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.25 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.25) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (pad 12 smd rect (at -0.75 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 68 "/Clocks / buffers/Q1_125_P")) (pad 11 smd rect (at -0.25 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 70 "/Clocks / buffers/Q1_125_N")) (pad 10 smd rect (at 0.25 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 72 "/Clocks / buffers/Q2_125_P")) (pad 9 smd rect (at 0.75 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 74 "/Clocks / buffers/Q2_125_N")) (pad 8 smd rect (at 1.5 -0.75 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 7 smd rect (at 1.5 -0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 307 "/Clocks / buffers/CLK_125MHZ_3_P")) (pad 6 smd rect (at 1.5 0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 305 "/Clocks / buffers/CLK_125MHZ_3_N")) (pad 5 smd rect (at 1.5 0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 4 smd rect (at 0.75 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 3 smd rect (at 0.25 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 111 "/Clocks / buffers/CLK_125MHZ_AC_N")) (pad 2 smd rect (at -0.25 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 109 "/Clocks / buffers/CLK_125MHZ_AC_P")) (pad 1 smd rect (at -0.75 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 16 smd rect (at -1.5 0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 15 smd rect (at -1.5 0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 64 "/Clocks / buffers/Q0_125_P")) (pad 14 smd rect (at -1.5 -0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 66 "/Clocks / buffers/Q0_125_N")) (pad 13 smd rect (at -1.5 -0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0 0 270) (size 1.25 1.25) (layers F.Cu F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 -0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 -0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/qfn-16.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:QFN_16_0.5MM_3x3MM (layer F.Cu) (tedit 54AFBA37) (tstamp 56AA2B4F) (at 88.98 64.43 270) (path /569AEE1D/56D784DD) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U33 (at -2.63 -0.07 360) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SI53306 (at 0.25 3.25 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.75 1.25) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.25) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 -1.25) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.25 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.25) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (pad 12 smd rect (at -0.75 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 501 "/Clocks / buffers/CLK_156MHZ_2_P")) (pad 11 smd rect (at -0.25 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 502 "/Clocks / buffers/CLK_156MHZ_2_N")) (pad 10 smd rect (at 0.25 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 624 "/Clocks / buffers/Q2_156_P")) (pad 9 smd rect (at 0.75 -1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 625 "/Clocks / buffers/Q2_156_N")) (pad 8 smd rect (at 1.5 -0.75 180) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 7 smd rect (at 1.5 -0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 622 "/Clocks / buffers/Q3_156_P")) (pad 6 smd rect (at 1.5 0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 623 "/Clocks / buffers/Q3_156_N")) (pad 5 smd rect (at 1.5 0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 4 smd rect (at 0.75 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 3 smd rect (at 0.25 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 115 "/Clocks / buffers/CLK_156MHZ_AC_N")) (pad 2 smd rect (at -0.25 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 113 "/Clocks / buffers/CLK_156MHZ_AC_P")) (pad 1 smd rect (at -0.75 1.5 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 16 smd rect (at -1.5 0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 15 smd rect (at -1.5 0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 297 "/Clocks / buffers/CLK_156MHZ_3_P")) (pad 14 smd rect (at -1.5 -0.25) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 298 "/Clocks / buffers/CLK_156MHZ_3_N")) (pad 13 smd rect (at -1.5 -0.75) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0 0 270) (size 1.25 1.25) (layers F.Cu F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 -0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 -0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.25 0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.25 0.25 270) (size 0.5 0.5) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/qfn-16.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:INDUCTOR_COILTRONICS_FPV1006 (layer F.Cu) (tedit 56A52C93) (tstamp 56A77605) (at 150.7 96 180) (path /5685DDE2/56B369F2) (fp_text reference L12 (at 5.1 5.6 360) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "85 nH" (at 0 8.25 180) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -6 5) (end -6 -5) (layer F.SilkS) (width 0.15)) (fp_line (start 6 -5) (end 6 5) (layer F.SilkS) (width 0.15)) (fp_line (start -6 -5) (end 6 -5) (layer F.SilkS) (width 0.15)) (fp_line (start -6 5) (end 6 5) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.6 0 180) (size 3.2 3.7) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 3.6 0 180) (size 3.2 3.7) (layers F.Cu F.Paste F.Mask) (net 604 "/Power Supply/1V0_SW")) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_inductors/inductor_smd_6.5x4.8mm.wrl (at (xyz 0 0 0)) (scale (xyz 1.5 1.5 1)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:INDUCTOR_COILTRONICS_FPV1006 (layer F.Cu) (tedit 56A52C93) (tstamp 56A7760F) (at 170.100001 96 180) (path /5685DDE2/56B36EC3) (fp_text reference L13 (at 5.100001 5.8 360) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "85 nH" (at 0 8.25 180) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -6 5) (end -6 -5) (layer F.SilkS) (width 0.15)) (fp_line (start 6 -5) (end 6 5) (layer F.SilkS) (width 0.15)) (fp_line (start -6 -5) (end 6 -5) (layer F.SilkS) (width 0.15)) (fp_line (start -6 5) (end 6 5) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.6 0 180) (size 3.2 3.7) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 2 smd rect (at 3.6 0 180) (size 3.2 3.7) (layers F.Cu F.Paste F.Mask) (net 605 "/Power Supply/1V0_SW2")) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_inductors/inductor_smd_6.5x4.8mm.wrl (at (xyz 0 0 0)) (scale (xyz 1.5 1.5 1)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:EIA_0603_INDUCTOR_NOSILK (layer B.Cu) (tedit 53CD20DE) (tstamp 56AA3E72) (at 63.1 59.1 180) (path /5685DE45/56A62BB7) (fp_text reference L1 (at 1.9 0.25 360) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uH" (at 0 -1.75 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 48 "/Front panel SFP+s/ETH9_VDD_RX")) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 44 "Net-(C98-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_inductors/inductor_smd_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_INDUCTOR_NOSILK (layer B.Cu) (tedit 53CD20DE) (tstamp 56AA3E78) (at 63.1 58 180) (path /5685DE45/56A6345D) (fp_text reference L2 (at 1.875 0.1 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uH" (at 0 -1.75 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 50 "/Front panel SFP+s/ETH9_VDD_TX")) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 44 "Net-(C98-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_inductors/inductor_smd_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_INDUCTOR_NOSILK (layer B.Cu) (tedit 53CD20DE) (tstamp 56AA3E7E) (at 63.1 73.25 180) (path /5685DE45/56A6412D) (fp_text reference L3 (at 1.925 0.45 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uH" (at 0 -1.75 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 52 "/Front panel SFP+s/ETH10_VDD_RX")) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 45 "Net-(C100-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_inductors/inductor_smd_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_INDUCTOR_NOSILK (layer B.Cu) (tedit 53CD20DE) (tstamp 56AA3E84) (at 63.1 72.25 180) (path /5685DE45/56A64152) (fp_text reference L4 (at 1.9 0.425 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uH" (at 0 -1.75 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 54 "/Front panel SFP+s/ETH10_VDD_TX")) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 45 "Net-(C100-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_inductors/inductor_smd_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_INDUCTOR_NOSILK (layer B.Cu) (tedit 53CD20DE) (tstamp 56AA3E8A) (at 63.1 87.625 180) (path /5685DE45/56A649DF) (fp_text reference L5 (at 1.925 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uH" (at 0 -1.75 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 56 "/Front panel SFP+s/ETH11_VDD_RX")) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 46 "Net-(C102-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_inductors/inductor_smd_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_INDUCTOR_NOSILK (layer B.Cu) (tedit 53CD20DE) (tstamp 56AA3E90) (at 63.1 86.5 180) (path /5685DE45/56A64A04) (fp_text reference L6 (at 1.875 -0.025 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uH" (at 0 -1.75 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 58 "/Front panel SFP+s/ETH11_VDD_TX")) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 46 "Net-(C102-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_inductors/inductor_smd_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_INDUCTOR_NOSILK (layer B.Cu) (tedit 53CD20DE) (tstamp 56AA3E96) (at 63.1 101.85 180) (path /5685DE45/56A64A36) (fp_text reference L7 (at 1.95 -0.05 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uH" (at 0 -1.75 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 60 "/Front panel SFP+s/ETH12_VDD_RX")) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 47 "Net-(C104-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_inductors/inductor_smd_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_INDUCTOR_NOSILK (layer B.Cu) (tedit 53CD20DE) (tstamp 56AA3E9C) (at 63.1 100.75 180) (path /5685DE45/56A64A5B) (fp_text reference L8 (at 1.95 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uH" (at 0 -1.75 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 62 "/Front panel SFP+s/ETH12_VDD_TX")) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 47 "Net-(C104-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_inductors/inductor_smd_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_INDUCTOR_NOSILK (layer B.Cu) (tedit 53CD20DE) (tstamp 56AA3EA2) (at 90.1 106.9) (path /5685DE62/56B182C6) (fp_text reference L9 (at 2 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "110R 100 MHz" (at 0 -1.75) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 1 "/XAUI PHY/1V0_A")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_inductors/inductor_smd_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_INDUCTOR_NOSILK (layer B.Cu) (tedit 53CD20DE) (tstamp 56AA3EA8) (at 73.65 99.5 270) (path /5685DE62/56B19A28) (fp_text reference L10 (at 0.05 0.95 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "110R 100 MHz" (at 0 -1.75 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 3 "/XAUI PHY/1V0_T")) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 4 "/FPGA support/1V0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_inductors/inductor_smd_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_INDUCTOR_NOSILK (layer F.Cu) (tedit 53CD20DE) (tstamp 56AA3EAE) (at 78.2 107.8 180) (path /5685DE62/56B19CA4) (fp_text reference L11 (at 2.45 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "110R 100 MHz" (at 0 1.75 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 5 "/XAUI PHY/1V5_A")) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_inductors/inductor_smd_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:INDUCTOR_YUDEN_NRS5030 (layer F.Cu) (tedit 56A54495) (tstamp 56AA3EB8) (at 58.25 39.25 90) (path /5685DDE2/56B7F5F1) (fp_text reference L14 (at 0 -3.75 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "2.2 uH" (at 0 6.45 90) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -3 3) (end -3 -3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 3) (end -3 3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 -3) (end 3 3) (layer F.SilkS) (width 0.15)) (fp_line (start -3 -3) (end 3 -3) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.8 0 90) (size 1.5 4) (layers F.Cu F.Paste F.Mask) (net 92 "/Power Supply/3V3_RAW")) (pad 2 smd rect (at 1.8 0 90) (size 1.5 4) (layers F.Cu F.Paste F.Mask) (net 595 "/Power Supply/3V3_SW")) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_inductors/inductor_smd_6.5x4.8mm.wrl (at (xyz 0 0 0)) (scale (xyz 0.9 0.9 0.9)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:INDUCTOR_YUDEN_NRS5030 (layer F.Cu) (tedit 56A54495) (tstamp 56AA3EC2) (at 60.9 119.7 90) (path /5685DDE2/56B88F8A) (fp_text reference L15 (at 0 4.4 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "2.2 uH" (at 0 6.45 90) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -3 3) (end -3 -3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 3) (end -3 3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 -3) (end 3 3) (layer F.SilkS) (width 0.15)) (fp_line (start -3 -3) (end 3 -3) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.8 0 90) (size 1.5 4) (layers F.Cu F.Paste F.Mask) (net 94 "/Power Supply/1V5_RAW")) (pad 2 smd rect (at 1.8 0 90) (size 1.5 4) (layers F.Cu F.Paste F.Mask) (net 597 "/Power Supply/1V5_SW")) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_inductors/inductor_smd_6.5x4.8mm.wrl (at (xyz 0 0 0)) (scale (xyz 0.9 0.9 0.9)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:INDUCTOR_YUDEN_NRS5030 (layer F.Cu) (tedit 56A54495) (tstamp 56AA3ECC) (at 142.11 47.4 90) (path /5685DDE2/56B92A64) (fp_text reference L16 (at -0.02 -3.73 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "2.2 uH" (at 0 6.45 90) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -3 3) (end -3 -3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 3) (end -3 3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 -3) (end 3 3) (layer F.SilkS) (width 0.15)) (fp_line (start -3 -3) (end 3 -3) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.8 0 90) (size 1.5 4) (layers F.Cu F.Paste F.Mask) (net 96 "/Power Supply/1V2_RAW")) (pad 2 smd rect (at 1.8 0 90) (size 1.5 4) (layers F.Cu F.Paste F.Mask) (net 599 "/Power Supply/1V2_SW")) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_inductors/inductor_smd_6.5x4.8mm.wrl (at (xyz 0 0 0)) (scale (xyz 0.9 0.9 0.9)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:INDUCTOR_YUDEN_NRS5030 (layer F.Cu) (tedit 56A54495) (tstamp 56AA3ED6) (at 124.3 37.85 90) (path /5685DDE2/56B96BB3) (fp_text reference L17 (at 3.6 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "2.2 uH" (at 0 6.45 90) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -3 3) (end -3 -3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 3) (end -3 3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 -3) (end 3 3) (layer F.SilkS) (width 0.15)) (fp_line (start -3 -3) (end 3 -3) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.8 0 90) (size 1.5 4) (layers F.Cu F.Paste F.Mask) (net 98 "/Power Supply/2V5_RAW")) (pad 2 smd rect (at 1.8 0 90) (size 1.5 4) (layers F.Cu F.Paste F.Mask) (net 601 "/Power Supply/2V5_SW")) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_inductors/inductor_smd_6.5x4.8mm.wrl (at (xyz 0 0 0)) (scale (xyz 0.9 0.9 0.9)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:INDUCTOR_YUDEN_NRS5030 (layer F.Cu) (tedit 56A54495) (tstamp 56AA3EE0) (at 164.35 46.6 90) (path /5685DDE2/56BC0ABD) (fp_text reference L18 (at 3.5 -1.65 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "2.2 uH" (at 0 6.45 90) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -3 3) (end -3 -3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 3) (end -3 3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 -3) (end 3 3) (layer F.SilkS) (width 0.15)) (fp_line (start -3 -3) (end 3 -3) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.8 0 90) (size 1.5 4) (layers F.Cu F.Paste F.Mask) (net 102 "/Power Supply/1V8_RAW")) (pad 2 smd rect (at 1.8 0 90) (size 1.5 4) (layers F.Cu F.Paste F.Mask) (net 602 "/Power Supply/1V8_SW")) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_inductors/inductor_smd_6.5x4.8mm.wrl (at (xyz 0 0 0)) (scale (xyz 0.9 0.9 0.9)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56AA3EE6) (at 117.05 45.3) (path /56869E40/56D47681) (fp_text reference L23 (at 2.24 0.05) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 120R (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 108 "/Zynq CPU/ZYNQ_VPLL")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 56AA3EEB) (at 162.05 85.46) (path /56CAEC0A/56CB10A1) (fp_text reference P5 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 4 "/FPGA support/1V0")) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 56AA3EF0) (at 151.77 51.1) (path /56CAEC0A/56CB1252) (fp_text reference P6 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 106 "/FPGA support/1V2")) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 56AA3EF5) (at 62.2 123.95) (path /56CAEC0A/56CB12C2) (fp_text reference P7 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 6 "/FPGA support/1V5")) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 56AA3EFA) (at 173.2 50.2) (path /56CAEC0A/56CB12F1) (fp_text reference P8 (at 1.1 0.8) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 7 "/Backplane Connector/1V8")) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 56AA3EFF) (at 129.65 44.65) (path /56CAEC0A/56CB1327) (fp_text reference P9 (at 1.25 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 83 "/Clocks / buffers/2V5")) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 56AA3F04) (at 64.75 46.25) (path /56CAEC0A/56CB1356) (fp_text reference P10 (at 0 1) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 82 "/Current Shunt Monitors/3V3")) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 56AA3F09) (at 81.5 113.45) (path /56CAEC0A/56CB13AC) (fp_text reference P11 (at 0 -0.95) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 81 "/LEDs and test points/RAM_VREF")) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 56AA3F0E) (at 84.75 116.4) (path /56CAEC0A/56CB141C) (fp_text reference P12 (at 1.45 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 56AA3F13) (at 161.8 35.1) (path /56CAEC0A/56CB1466) (fp_text reference P13 (at 1.5 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 89 "/Clocks / buffers/1V8_SB")) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 56AA3F18) (at 173.5 35.2) (path /56CAEC0A/56CB14BC) (fp_text reference P14 (at 0 -1.5 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 90 "/LEDs and test points/2V5_SB")) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 56AA3F1D) (at 133.34 34.15) (path /56CAEC0A/56CB150E) (fp_text reference P15 (at 0.01 -1.65 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 603 "/LEDs and test points/5V0_SB")) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 56AA3F22) (at 182.84 106.56) (path /56CAEC0A/56CB15F6) (fp_text reference P16 (at 0 1.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 84 "/LEDs and test points/12V0")) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 56AA3F27) (at 178.8 39) (path /56CAEC0A/56CCF171) (fp_text reference P17 (at -1.1 -0.5) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 99 "/FPGA support/1V25_REF")) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56AA3F2D) (at 58.05 114.1) (path /5685DDE2/56B8CDF4) (fp_text reference R129 (at 2.6 -0.05) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "150K 1%" (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 596 "Net-(R129-Pad1)")) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56AA3F33) (at 147.84 48.86 270) (path /5685DDE2/56B92AAF) (fp_text reference R133 (at 2.56 -0.01 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "150K 1%" (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 598 "Net-(R133-Pad1)")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:OHMITE_LVK12 (layer F.Cu) (tedit 5642E860) (tstamp 56AA5104) (at 182.5 120 90) (path /5685DDE2/56BCC804) (fp_text reference R146 (at -2.9 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "10 mR" (at 0 2.75 90) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 4 smd rect (at 1.375 0.7 90) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 179 "Net-(F1-Pad2)")) (pad 3 smd rect (at 1.375 -0.7 90) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 553 "/Power Supply/12V0_SHUNT_HI")) (pad 1 smd rect (at -1.375 -0.7 90) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 552 "/Power Supply/12V0_SHUNT_LO")) (pad 2 smd rect (at -1.375 0.7 90) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:OHMITE_LVK12 (layer F.Cu) (tedit 5642E860) (tstamp 56AA510C) (at 58.45 124.65 180) (path /5685DDE2/56BD934D) (fp_text reference R148 (at 0 -2 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "10 mR" (at 0 2.75 180) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 4 smd rect (at 1.375 0.7 180) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 94 "/Power Supply/1V5_RAW")) (pad 3 smd rect (at 1.375 -0.7 180) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 561 "/Power Supply/1V5_SHUNT_HI")) (pad 1 smd rect (at -1.375 -0.7 180) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 560 "/Power Supply/1V5_SHUNT_LO")) (pad 2 smd rect (at -1.375 0.7 180) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:OHMITE_LVK12 (layer F.Cu) (tedit 5642E860) (tstamp 56AA5114) (at 61.25 45 90) (path /5685DDE2/56BDFD7C) (fp_text reference R149 (at 0 1.9 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "10 mR" (at 0 2.75 90) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 4 smd rect (at 1.375 0.7 90) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 92 "/Power Supply/3V3_RAW")) (pad 3 smd rect (at 1.375 -0.7 90) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 555 "/Power Supply/3V3_SHUNT_HI")) (pad 1 smd rect (at -1.375 -0.7 90) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 554 "/Power Supply/3V3_SHUNT_LO")) (pad 2 smd rect (at -1.375 0.7 90) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:OHMITE_LVK12 (layer F.Cu) (tedit 5642E860) (tstamp 56AA511C) (at 170.2 50.9 180) (path /5685DDE2/56BDC67F) (fp_text reference R150 (at 2.85 -0.35 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "10 mR" (at 0 2.75 180) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 4 smd rect (at 1.375 0.7 180) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 102 "/Power Supply/1V8_RAW")) (pad 3 smd rect (at 1.375 -0.7 180) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 559 "/Power Supply/1V8_SHUNT_HI")) (pad 1 smd rect (at -1.375 -0.7 180) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 558 "/Power Supply/1V8_SHUNT_LO")) (pad 2 smd rect (at -1.375 0.7 180) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:OHMITE_LVK12 (layer F.Cu) (tedit 5642E860) (tstamp 56AA5124) (at 127.35 43.4 90) (path /5685DDE2/56BDEA74) (fp_text reference R151 (at -2.9 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "20 mR" (at 0 2.75 90) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 4 smd rect (at 1.375 0.7 90) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 98 "/Power Supply/2V5_RAW")) (pad 3 smd rect (at 1.375 -0.7 90) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 557 "/Power Supply/2V5_SHUNT_HI")) (pad 1 smd rect (at -1.375 -0.7 90) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 556 "/Power Supply/2V5_SHUNT_LO")) (pad 2 smd rect (at -1.375 0.7 90) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:OHMITE_LVK12 (layer F.Cu) (tedit 5642E860) (tstamp 56AA512C) (at 147.87 51.82 180) (path /5685DDE2/56BD43B7) (fp_text reference R152 (at 4.38 0.04 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "10 mR" (at 0 2.75 180) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 4 smd rect (at 1.375 0.7 180) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 96 "/Power Supply/1V2_RAW")) (pad 3 smd rect (at 1.375 -0.7 180) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 563 "/Power Supply/1V2_SHUNT_HI")) (pad 1 smd rect (at -1.375 -0.7 180) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 562 "/Power Supply/1V2_SHUNT_LO")) (pad 2 smd rect (at -1.375 0.7 180) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 106 "/FPGA support/1V2")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:OHMITE_LVK12 (layer F.Cu) (tedit 5642E860) (tstamp 56AA5134) (at 78.75 117.1 180) (path /5685DDE2/56BF40EC) (fp_text reference R153 (at -3.95 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "10 mR" (at 0 2.75 180) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 4 smd rect (at 1.375 0.7 180) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 87 "/Power Supply/RAM_VTT_RAW")) (pad 3 smd rect (at 1.375 -0.7 180) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 567 "/Power Supply/VTT_SENSE_HI")) (pad 1 smd rect (at -1.375 -0.7 180) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 566 "/Power Supply/VTT_SENSE_LO")) (pad 2 smd rect (at -1.375 0.7 180) (size 1.75 1.1) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56AA513A) (at 135 34.75 270) (path /56CAEC0A/56CEA533) (fp_text reference R186 (at -2.653 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 560 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 603 "/LEDs and test points/5V0_SB")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 158 "Net-(D9-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56AA5140) (at 136.5 34.75 270) (path /56CAEC0A/56CEC0D9) (fp_text reference R187 (at -2.5 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 560 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 603 "/LEDs and test points/5V0_SB")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 160 "Net-(D10-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56AA5146) (at 138 34.75 270) (path /56CAEC0A/56CEC18C) (fp_text reference R188 (at -2.5 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 560 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 603 "/LEDs and test points/5V0_SB")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 162 "Net-(D11-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56AA514C) (at 139.5 34.75 270) (path /56CAEC0A/56CEC193) (fp_text reference R189 (at -2.5 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 560 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 603 "/LEDs and test points/5V0_SB")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 164 "Net-(D12-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56AA5152) (at 141 34.75 270) (path /56CAEC0A/56CEC372) (fp_text reference R190 (at -2.5 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 560 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 603 "/LEDs and test points/5V0_SB")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 166 "Net-(D13-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56AA5158) (at 142.5 34.75 270) (path /56CAEC0A/56CEC379) (fp_text reference R191 (at -2.5 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 560 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 603 "/LEDs and test points/5V0_SB")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 168 "Net-(D14-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56AA515E) (at 144 34.75 270) (path /56CAEC0A/56CEC380) (fp_text reference R192 (at -2.5 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 560 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 603 "/LEDs and test points/5V0_SB")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 170 "Net-(D15-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56AA5164) (at 145.5 34.75 270) (path /56CAEC0A/56CEC387) (fp_text reference R193 (at -2.5 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 560 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 603 "/LEDs and test points/5V0_SB")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 172 "Net-(D16-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56AA516A) (at 150 34.75 270) (path /56CAEC0A/56CEC48B) (fp_text reference R194 (at -2.5 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 560 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 603 "/LEDs and test points/5V0_SB")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 174 "Net-(D17-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56AA5170) (at 147 34.75 270) (path /56CAEC0A/56D25AD7) (fp_text reference R213 (at -2.5 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 560 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 603 "/LEDs and test points/5V0_SB")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 176 "Net-(D18-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56AA5176) (at 148.5 34.75 270) (path /56CAEC0A/56A61B1E) (fp_text reference R222 (at -2.5 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 560 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 603 "/LEDs and test points/5V0_SB")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 177 "Net-(D19-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56AA604C) (at 58.05 115 180) (path /5685DDE2/56B8C3D8) (fp_text reference R130 (at -2.6 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "130K 1%" (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 596 "Net-(R129-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56AA6052) (at 146.79 48.88 90) (path /5685DDE2/56B92AA8) (fp_text reference R134 (at -2.62 0.01 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "75K 1%" (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 106 "/FPGA support/1V2")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 598 "Net-(R133-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56AA6058) (at 129 39.05 270) (path /5685DDE2/56B96BFE) (fp_text reference R137 (at -1 -0.9 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "180K 1%" (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 600 "Net-(R137-Pad1)")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56AA605E) (at 128.15 39.05 90) (path /5685DDE2/56B96BF7) (fp_text reference R138 (at 0 -1 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "390K 1%" (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 600 "Net-(R137-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56AA6064) (at 178.8 47.45 270) (path /5685DDE2/56BB02ED) (fp_text reference R142 (at 0.175 0.9 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "7.5K 1%" (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 100 "/Power Supply/12V0_COMPARE")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 84 "/LEDs and test points/12V0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 56AA606A) (at 180.8 47.4 270) (path /5685DDE2/56BAFE0B) (fp_text reference R143 (at 2.6 0.025 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "1K 1%" (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 100 "/Power Supply/12V0_COMPARE")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:OSCILLATOR_2.5x2.0 (layer F.Cu) (tedit 53CC9DC2) (tstamp 56AA7523) (at 162.75 37.9 90) (path /569AEE1D/56B3E548) (fp_text reference U8 (at -0.7 2.075 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "32 kHz" (at 3.5 -0.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_circle (center 1.76779 -1.485515) (end 1.76779 -1.235515) (layer F.SilkS) (width 0.2)) (pad 3 smd rect (at -0.85 0.65 90) (size 1.1 0.9) (layers F.Cu F.Paste F.Mask) (net 531 "Net-(R121-Pad2)")) (pad 4 smd rect (at 0.85 0.65 90) (size 1.1 0.9) (layers F.Cu F.Paste F.Mask) (net 89 "/Clocks / buffers/1V8_SB")) (pad 1 smd rect (at 0.85 -0.65 90) (size 1.1 0.9) (layers F.Cu F.Paste F.Mask) (net 89 "/Clocks / buffers/1V8_SB")) (pad 2 smd rect (at -0.85 -0.65 90) (size 1.1 0.9) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn-6_clock.wrl (at (xyz 0 0 0)) (scale (xyz 0.2 0.2 0.2)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:OSCILLATOR_3.2x2.5 (layer F.Cu) (tedit 54A60C8C) (tstamp 56AA752B) (at 126.4 50.1 90) (path /569AEE1D/56D541D1) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U29 (at 0.05 2 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "50 MHz" (at 0.25 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_circle (center -2.25 1.75) (end -2.25 1.5) (layer F.SilkS) (width 0.15)) (pad 4 smd rect (at -1.27 -0.825 90) (size 1.2 1) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad 3 smd rect (at 1.27 -0.825 90) (size 1.2 1) (layers F.Cu F.Paste F.Mask) (net 547 "Net-(R214-Pad2)")) (pad 2 smd rect (at 1.27 0.825 90) (size 1.2 1) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 1 smd rect (at -1.27 0.825 90) (size 1.2 1) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/crystal/crystal_smd_5x3.2mm.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:OSCILLATOR_LVDS_3.2x2.5 (layer B.Cu) (tedit 54A614AA) (tstamp 56AA7535) (at 79.389999 74.8 90) (path /569AEE1D/56D6ADD3) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U30 (at 0.5 -3.75 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value DSC1123CI2-125.0000 (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_line (start -1.75 -1.5) (end -1.5 -1.75) (layer B.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.75 -1.5) (layer B.SilkS) (width 0.15)) (fp_line (start -1.5 -1.75) (end -1.75 -1.75) (layer B.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.5 -1.75) (layer B.SilkS) (width 0.15)) (fp_line (start 1.75 -1.5) (end 1.75 -1.75) (layer B.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.75 1.5) (layer B.SilkS) (width 0.15)) (fp_line (start 1.5 1.75) (end 1.75 1.75) (layer B.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.5) (layer B.SilkS) (width 0.15)) (fp_line (start -1.5 1.75) (end -1.75 1.75) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.075 -0.95 90) (size 0.9 1) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0 -0.95 90) (size 0.5 1) (layers B.Cu B.Paste B.Mask)) (pad 3 smd rect (at 1.075 -0.95 90) (size 0.9 1) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad 4 smd rect (at 1.075 0.95 90) (size 0.9 1) (layers B.Cu B.Paste B.Mask) (net 110 "/Clocks / buffers/CLK_125MHZ_P")) (pad 6 smd rect (at -1.075 0.95 90) (size 0.9 1) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 5 smd rect (at 0 0.95 90) (size 0.5 1) (layers B.Cu B.Paste B.Mask) (net 112 "/Clocks / buffers/CLK_125MHZ_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn-6_clock.wrl (at (xyz 0 0 0)) (scale (xyz 0.25 0.25 0.25)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:OSCILLATOR_LVDS_3.2x2.5 (layer B.Cu) (tedit 54A614AA) (tstamp 56AA753F) (at 84.1 64.75 90) (path /569AEE1D/56D6AD26) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U31 (at 0 -2.45 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value DSC1123CI2-156.2500 (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_line (start -1.75 -1.5) (end -1.5 -1.75) (layer B.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.75 -1.5) (layer B.SilkS) (width 0.15)) (fp_line (start -1.5 -1.75) (end -1.75 -1.75) (layer B.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.5 -1.75) (layer B.SilkS) (width 0.15)) (fp_line (start 1.75 -1.5) (end 1.75 -1.75) (layer B.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.75 1.5) (layer B.SilkS) (width 0.15)) (fp_line (start 1.5 1.75) (end 1.75 1.75) (layer B.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.5) (layer B.SilkS) (width 0.15)) (fp_line (start -1.5 1.75) (end -1.75 1.75) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.075 -0.95 90) (size 0.9 1) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0 -0.95 90) (size 0.5 1) (layers B.Cu B.Paste B.Mask)) (pad 3 smd rect (at 1.075 -0.95 90) (size 0.9 1) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad 4 smd rect (at 1.075 0.95 90) (size 0.9 1) (layers B.Cu B.Paste B.Mask) (net 114 "/Clocks / buffers/CLK_156MHZ_P")) (pad 6 smd rect (at -1.075 0.95 90) (size 0.9 1) (layers B.Cu B.Paste B.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 5 smd rect (at 0 0.95 90) (size 0.5 1) (layers B.Cu B.Paste B.Mask) (net 116 "/Clocks / buffers/CLK_156MHZ_N")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn-6_clock.wrl (at (xyz 0 0 0)) (scale (xyz 0.25 0.25 0.25)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:DFN_10_0.5MM_3x3MM (layer F.Cu) (tedit 5642EA1C) (tstamp 56AA8E7F) (at 73.2 116.425 90) (path /5685DDE2/56B444FB) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U9 (at 2.375 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value TPS51200 (at -3.75 2.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 -1.75) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1 1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 86 "/Power Supply/0V75_REF")) (pad 2 smd rect (at -0.5 1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA support/1V5")) (pad 3 smd rect (at 0 1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 87 "/Power Supply/RAM_VTT_RAW")) (pad 4 smd rect (at 0.5 1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 5 smd rect (at 1 1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 571 "/Power Supply/VTT_SENSE")) (pad 6 smd rect (at 1 -1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 81 "/LEDs and test points/RAM_VREF")) (pad 7 smd rect (at 0.5 -1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 584 "/Power Supply/VTT_EN")) (pad 8 smd rect (at 0 -1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 9 smd rect (at -0.5 -1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 572 "/Power Supply/VTT_PGOOD")) (pad 10 smd rect (at -1 -1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad PAD smd rect (at 0 0 90) (size 2.5 1.7) (layers F.Cu F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.825 -0.4 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.825 0.4 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.025 0.4 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.025 -0.4 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.775 -0.4 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.775 0.4 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn10_3x3.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 -90)) ) ) (module azonenberg_pcb:DFN_8_0.5MM_2x3MM (layer F.Cu) (tedit 53C55214) (tstamp 56AA8E8C) (at 183.05 36.25 270) (path /5685DDE2/56B66DC6) (fp_text reference U10 (at -2.25 0.05 360) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value MCP1703T-5002E/MC (at 0 4.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -1.2 1.1) (end -1.6 0.7) (layer F.SilkS) (width 0.15)) (fp_line (start 1.2 -1.1) (end 1.6 -1.1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.6 -1.1) (end 1.6 1.1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.6 1.1) (end 1.2 1.1) (layer F.SilkS) (width 0.15)) (fp_line (start -1.6 -1.1) (end -1.6 1.1) (layer F.SilkS) (width 0.15)) (fp_line (start -1.6 1.1) (end -1.2 1.1) (layer F.SilkS) (width 0.15)) (fp_line (start -1.6 -1.1) (end -1.2 -1.1) (layer F.SilkS) (width 0.15)) (pad PAD smd rect (at 0 0 270) (size 2.2 0.61) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 1 smd rect (at -0.75 0.95 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 603 "/LEDs and test points/5V0_SB")) (pad 2 smd rect (at -0.25 0.95 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)) (pad 3 smd rect (at 0.25 0.95 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)) (pad 4 smd rect (at 0.75 0.95 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 5 smd rect (at 0.75 -0.95 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)) (pad 6 smd rect (at 0.25 -0.95 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)) (pad 7 smd rect (at -0.25 -0.95 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)) (pad 8 smd rect (at -0.75 -0.95 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn8.wrl (at (xyz 0 0 0)) (scale (xyz 1 0.75 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:DFN_10_0.5MM_3x3MM (layer F.Cu) (tedit 5642EA1C) (tstamp 56AA8EA1) (at 177.25 36 90) (path /5685DDE2/56B6114F) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U11 (at 2.5 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value MIC2211-GJYML (at -3.75 2.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 -1.75) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1 1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 603 "/LEDs and test points/5V0_SB")) (pad 2 smd rect (at -0.5 1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 603 "/LEDs and test points/5V0_SB")) (pad 3 smd rect (at 0 1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 603 "/LEDs and test points/5V0_SB")) (pad 4 smd rect (at 0.5 1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 88 "Net-(C345-Pad1)")) (pad 5 smd rect (at 1 1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 6 smd rect (at 1 -1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 7 smd rect (at 0.5 -1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 8 smd rect (at 0 -1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 9 smd rect (at -0.5 -1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 90 "/LEDs and test points/2V5_SB")) (pad 10 smd rect (at -1 -1.5 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 89 "/Clocks / buffers/1V8_SB")) (pad PAD smd rect (at 0 0 90) (size 2.5 1.7) (layers F.Cu F.Mask) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.825 -0.4 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.825 0.4 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.025 0.4 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at -0.025 -0.4 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.775 -0.4 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (pad PAD smd rect (at 0.775 0.4 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn10_3x3.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 -90)) ) ) (module azonenberg_pcb:SOT23_3 (layer B.Cu) (tedit 56A563C5) (tstamp 56AA8EA8) (at 179.75 40.3 180) (path /5685DDE2/56BA6C60) (fp_text reference U16 (at -2.15 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value TS4061BILT-1.25 (at 4.2 0 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 3 smd rect (at 0 -1.3 180) (size 0.65 1) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad 1 smd rect (at 0.95 1.3 180) (size 0.65 1) (layers B.Cu B.Paste B.Mask) (net 99 "/FPGA support/1V25_REF")) (pad 2 smd rect (at -0.95 1.3 180) (size 0.65 1) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_trans/sot23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 180)) ) ) (module azonenberg_pcb:DFN_6_0.35MM_1x1MM (layer B.Cu) (tedit 56A564D9) (tstamp 56AA8EB2) (at 180.95 45.15 90) (path /5685DDE2/56BB6964) (fp_text reference U17 (at 1.575 -0.275 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value TLV3691-X2SON (at 0 -3.95 90) (layer B.Fab) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text user . (at -0.6 -0.35 90) (layer B.SilkS) (effects (font (size 1 1) (thickness 0.125)) (justify mirror)) ) (pad 6 smd rect (at -0.35 0.45 90) (size 0.15 0.25) (layers B.Cu B.Paste B.Mask) (net 90 "/LEDs and test points/2V5_SB")) (pad 5 smd rect (at 0 0.45 90) (size 0.15 0.25) (layers B.Cu B.Paste B.Mask)) (pad 4 smd rect (at 0.35 0.45 90) (size 0.15 0.25) (layers B.Cu B.Paste B.Mask) (net 594 "/Power Supply/12V0_PGOOD")) (pad 1 smd rect (at -0.35 -0.45 90) (size 0.15 0.25) (layers B.Cu B.Paste B.Mask) (net 100 "/Power Supply/12V0_COMPARE")) (pad 2 smd rect (at 0 -0.45 90) (size 0.15 0.25) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad 3 smd rect (at 0.35 -0.45 90) (size 0.15 0.25) (layers B.Cu B.Paste B.Mask) (net 99 "/FPGA support/1V25_REF")) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_qfn/dfn6-3x3.wrl (at (xyz 0 0 0)) (scale (xyz 0.33 0.33 0.33)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:DFN_8_1.27MM_8x6MM (layer F.Cu) (tedit 56A566F5) (tstamp 56AA8ECE) (at 83.265 56.6 90) (path /5697D556/56C83FFA) (fp_text reference U19 (at -0.1 3.85 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value N25Q128A11EF840E (at 0 6.4 90) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -5 -3.2) (end -4.6 -3.2) (layer F.SilkS) (width 0.15)) (fp_line (start -5 3.2) (end -5 -3.2) (layer F.SilkS) (width 0.15)) (fp_line (start 5 3.2) (end -5 3.2) (layer F.SilkS) (width 0.15)) (fp_line (start 5 -3.2) (end 5 3.2) (layer F.SilkS) (width 0.15)) (fp_line (start -4.6 -3.2) (end 5 -3.2) (layer F.SilkS) (width 0.15)) (fp_line (start -5 -2.8) (end -4.6 -3.2) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -4 -1.905 90) (size 1 0.4) (layers F.Cu F.Paste F.Mask) (net 536 "/FPGA Config/BOOT_SPI_CS_N")) (pad 2 smd rect (at -4 -0.635 90) (size 1 0.4) (layers F.Cu F.Paste F.Mask) (net 548 "Net-(R217-Pad1)")) (pad 3 smd rect (at -4 0.635 90) (size 1 0.4) (layers F.Cu F.Paste F.Mask) (net 549 "Net-(R218-Pad1)")) (pad 4 smd rect (at -4 1.905 90) (size 1 0.4) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 5 smd rect (at 4 1.905 90) (size 1 0.4) (layers F.Cu F.Paste F.Mask) (net 538 "Net-(R174-Pad2)")) (pad 6 smd rect (at 4 0.635 90) (size 1 0.4) (layers F.Cu F.Paste F.Mask) (net 528 "/FPGA Config/BOOT_SPI_SCK")) (pad 7 smd rect (at 4 -0.635 90) (size 1 0.4) (layers F.Cu F.Paste F.Mask) (net 537 "Net-(R173-Pad2)")) (pad 8 smd rect (at 4 -1.905 90) (size 1 0.4) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad PAD smd rect (at 0 0 90) (size 5.16 4.8) (layers F.Cu F.Mask)) (pad PAD smd rect (at -1.5 1.5 90) (size 1 1) (layers F.Paste)) (pad PAD smd rect (at 0 1.5 90) (size 1 1) (layers F.Paste)) (pad PAD smd rect (at 1.5 1.5 90) (size 1 1) (layers F.Paste)) (pad PAD smd rect (at -1.5 0 90) (size 1 1) (layers F.Paste)) (pad PAD smd rect (at 0 0 90) (size 1 1) (layers F.Paste)) (pad PAD smd rect (at 1.5 0 90) (size 1 1) (layers F.Paste)) (pad PAD smd rect (at -1.5 -1.5 90) (size 1 1) (layers F.Paste)) (pad PAD smd rect (at 1.5 -1.5 90) (size 1 1) (layers F.Paste)) (pad PAD smd rect (at 0 -1.5 90) (size 1 1) (layers F.Paste)) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_qfn/dfn8-2x3.wrl (at (xyz 0 0 0)) (scale (xyz 2.54 2.5 1)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:DFN_8_1.27MM_8x6MM (layer F.Cu) (tedit 56A566F5) (tstamp 56AA8EEA) (at 208.9 66.55) (path /5697D556/56C85650) (fp_text reference U20 (at 0 4.6) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value N25Q128A11EF840E (at 0 6.4) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -5 -3.2) (end -4.6 -3.2) (layer F.SilkS) (width 0.15)) (fp_line (start -5 3.2) (end -5 -3.2) (layer F.SilkS) (width 0.15)) (fp_line (start 5 3.2) (end -5 3.2) (layer F.SilkS) (width 0.15)) (fp_line (start 5 -3.2) (end 5 3.2) (layer F.SilkS) (width 0.15)) (fp_line (start -4.6 -3.2) (end 5 -3.2) (layer F.SilkS) (width 0.15)) (fp_line (start -5 -2.8) (end -4.6 -3.2) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -4 -1.905) (size 1 0.4) (layers F.Cu F.Paste F.Mask) (net 543 "/FPGA Config/DATA_SPI_CS_N")) (pad 2 smd rect (at -4 -0.635) (size 1 0.4) (layers F.Cu F.Paste F.Mask) (net 550 "Net-(R219-Pad1)")) (pad 3 smd rect (at -4 0.635) (size 1 0.4) (layers F.Cu F.Paste F.Mask) (net 551 "Net-(R220-Pad1)")) (pad 4 smd rect (at -4 1.905) (size 1 0.4) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 5 smd rect (at 4 1.905) (size 1 0.4) (layers F.Cu F.Paste F.Mask) (net 542 "Net-(R176-Pad2)")) (pad 6 smd rect (at 4 0.635) (size 1 0.4) (layers F.Cu F.Paste F.Mask) (net 544 "/FPGA Config/DATA_SPI_SCK")) (pad 7 smd rect (at 4 -0.635) (size 1 0.4) (layers F.Cu F.Paste F.Mask) (net 540 "Net-(R175-Pad2)")) (pad 8 smd rect (at 4 -1.905) (size 1 0.4) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad PAD smd rect (at 0 0) (size 5.16 4.8) (layers F.Cu F.Mask)) (pad PAD smd rect (at -1.5 1.5) (size 1 1) (layers F.Paste)) (pad PAD smd rect (at 0 1.5) (size 1 1) (layers F.Paste)) (pad PAD smd rect (at 1.5 1.5) (size 1 1) (layers F.Paste)) (pad PAD smd rect (at -1.5 0) (size 1 1) (layers F.Paste)) (pad PAD smd rect (at 0 0) (size 1 1) (layers F.Paste)) (pad PAD smd rect (at 1.5 0) (size 1 1) (layers F.Paste)) (pad PAD smd rect (at -1.5 -1.5) (size 1 1) (layers F.Paste)) (pad PAD smd rect (at 1.5 -1.5) (size 1 1) (layers F.Paste)) (pad PAD smd rect (at 0 -1.5) (size 1 1) (layers F.Paste)) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_qfn/dfn8-2x3.wrl (at (xyz 0 0 0)) (scale (xyz 2.54 2.5 1)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:CONN_MW_X16 (layer F.Cu) (tedit 5636C9CD) (tstamp 56A48366) (at 197.15 107 90) (path /56983D83/569A6179) (solder_mask_margin 0.05) (solder_paste_margin -2) (fp_text reference J4 (at 0 2.5 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value CONN_MW_SWITCH_CARD (at 0 5 90) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start 0 -8.4) (end 0 0) (layer Dwgs.User) (width 0.15)) (fp_line (start 72.15 0) (end 72.15 -8.4) (layer Dwgs.User) (width 0.15)) (fp_line (start 0.95 0) (end 72.15 0) (layer Dwgs.User) (width 0.15)) (fp_line (start -12.15 -8.4) (end 72.15 -8.4) (layer Dwgs.User) (width 0.15)) (fp_line (start -12.15 0) (end -12.15 -8.4) (layer Dwgs.User) (width 0.15)) (fp_line (start -0.95 0) (end -12.15 0) (layer Dwgs.User) (width 0.15)) (fp_line (start -0.95 0) (end -0.95 -5.6) (layer Dwgs.User) (width 0.15)) (fp_line (start 0.95 -5.6) (end 0.95 0) (layer Dwgs.User) (width 0.15)) (fp_arc (start 0 -5.55) (end -0.95 -5.55) (angle 180) (layer Dwgs.User) (width 0.15)) (pad B2 smd rect (at -10.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 178 "/Backplane Connector/12V0")) (pad B3 smd rect (at -9.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 178 "/Backplane Connector/12V0")) (pad B4 smd rect (at -8.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B5 smd rect (at -7.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 192 "/Backplane Connector/BACKPLANE_I2C_SCL")) (pad B6 smd rect (at -6.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 193 "/Backplane Connector/BACKPLANE_I2C_SDA")) (pad B7 smd rect (at -5.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B8 smd rect (at -4.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 7 "/Backplane Connector/1V8")) (pad B9 smd rect (at -3.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask)) (pad B10 smd rect (at -2.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask)) (pad B11 smd rect (at -1.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask)) (pad B12 smd rect (at 1.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask)) (pad B1 smd rect (at -11.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 178 "/Backplane Connector/12V0")) (pad B13 smd rect (at 2.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B14 smd rect (at 3.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask)) (pad B15 smd rect (at 4.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask)) (pad B16 smd rect (at 5.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B17 smd rect (at 6.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B18 smd rect (at 7.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B19 smd rect (at 8.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 194 "/Backplane Connector/ETH0_RX_P")) (pad B20 smd rect (at 9.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 195 "/Backplane Connector/ETH0_RX_N")) (pad B21 smd rect (at 10.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B22 smd rect (at 11.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B23 smd rect (at 12.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 196 "/Backplane Connector/ETH1_RX_P")) (pad B24 smd rect (at 13.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 197 "/Backplane Connector/ETH1_RX_N")) (pad B25 smd rect (at 14.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B26 smd rect (at 15.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B27 smd rect (at 16.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 198 "/Backplane Connector/ETH2_RX_P")) (pad B28 smd rect (at 17.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 199 "/Backplane Connector/ETH2_RX_N")) (pad B29 smd rect (at 18.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B30 smd rect (at 19.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B31 smd rect (at 20.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B32 smd rect (at 21.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B33 smd rect (at 22.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 200 "/Backplane Connector/ETH3_RX_P")) (pad B34 smd rect (at 23.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 201 "/Backplane Connector/ETH3_RX_N")) (pad B35 smd rect (at 24.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B36 smd rect (at 25.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B37 smd rect (at 26.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 202 "/Backplane Connector/ETH4_RX_P")) (pad B38 smd rect (at 27.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 203 "/Backplane Connector/ETH4_RX_N")) (pad B39 smd rect (at 28.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B40 smd rect (at 29.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B41 smd rect (at 30.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 204 "/Backplane Connector/ETH5_RX_P")) (pad B42 smd rect (at 31.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 205 "/Backplane Connector/ETH5_RX_N")) (pad B43 smd rect (at 32.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B44 smd rect (at 33.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B45 smd rect (at 34.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 206 "/Backplane Connector/ETH6_RX_P")) (pad B46 smd rect (at 35.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 207 "/Backplane Connector/ETH6_RX_N")) (pad B47 smd rect (at 36.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B48 smd rect (at 37.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B49 smd rect (at 38.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B50 smd rect (at 39.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 208 "/Backplane Connector/ETH7_RX_P")) (pad B51 smd rect (at 40.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 209 "/Backplane Connector/ETH7_RX_N")) (pad B52 smd rect (at 41.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B53 smd rect (at 42.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B54 smd rect (at 43.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 210 "/Backplane Connector/ETH8_RX_P")) (pad B55 smd rect (at 44.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 211 "/Backplane Connector/ETH8_RX_N")) (pad B56 smd rect (at 45.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B57 smd rect (at 46.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B58 smd rect (at 47.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask)) (pad B59 smd rect (at 48.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask)) (pad B60 smd rect (at 49.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B61 smd rect (at 50.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B62 smd rect (at 51.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask)) (pad B63 smd rect (at 52.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask)) (pad B64 smd rect (at 53.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B65 smd rect (at 54.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B66 smd rect (at 55.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask)) (pad B67 smd rect (at 56.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask)) (pad B68 smd rect (at 57.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B69 smd rect (at 58.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B70 smd rect (at 59.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask)) (pad B71 smd rect (at 60.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask)) (pad B72 smd rect (at 61.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B73 smd rect (at 62.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B74 smd rect (at 63.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask)) (pad B75 smd rect (at 64.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask)) (pad B76 smd rect (at 65.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B77 smd rect (at 66.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B78 smd rect (at 67.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask)) (pad B79 smd rect (at 68.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask)) (pad B80 smd rect (at 69.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B81 smd rect (at 70.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad B82 smd rect (at 71.5 -2.8 90) (size 0.7 5.6) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A8 smd rect (at -4.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 188 "/Backplane Connector/JTAG_TMS")) (pad A6 smd rect (at -6.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 191 "/Backplane Connector/JTAG_TDI")) (pad A5 smd rect (at -7.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 189 "/Backplane Connector/JTAG_TCK")) (pad A7 smd rect (at -5.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 190 "/Backplane Connector/JTAG_TDO")) (pad A9 smd rect (at -3.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 7 "/Backplane Connector/1V8")) (pad A11 smd rect (at -1.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 381 "/Power Supply/FPGA_RESET_N")) (pad A10 smd rect (at -2.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask)) (pad A1 smd rect (at -11.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 178 "/Backplane Connector/12V0")) (pad A4 smd rect (at -8.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A2 smd rect (at -10.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 178 "/Backplane Connector/12V0")) (pad A3 smd rect (at -9.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 178 "/Backplane Connector/12V0")) (pad A14 smd rect (at 3.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A13 smd rect (at 2.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask)) (pad A15 smd rect (at 4.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A12 smd rect (at 1.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask)) (pad A16 smd rect (at 5.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask)) (pad A21 smd rect (at 10.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 40 "/Backplane Connector/ETH0_TX_P")) (pad A17 smd rect (at 6.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask)) (pad A18 smd rect (at 7.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A19 smd rect (at 8.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A20 smd rect (at 9.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A24 smd rect (at 13.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A23 smd rect (at 12.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A25 smd rect (at 14.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 38 "/Backplane Connector/ETH1_TX_P")) (pad A22 smd rect (at 11.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 41 "/Backplane Connector/ETH0_TX_N")) (pad A26 smd rect (at 15.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 39 "/Backplane Connector/ETH1_TX_N")) (pad A27 smd rect (at 16.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A29 smd rect (at 18.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 36 "/Backplane Connector/ETH2_TX_P")) (pad A30 smd rect (at 19.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 37 "/Backplane Connector/ETH2_TX_N")) (pad A31 smd rect (at 20.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A32 smd rect (at 21.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A33 smd rect (at 22.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A28 smd rect (at 17.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A35 smd rect (at 24.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 34 "/Backplane Connector/ETH3_TX_P")) (pad A36 smd rect (at 25.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 35 "/Backplane Connector/ETH3_TX_N")) (pad A34 smd rect (at 23.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A37 smd rect (at 26.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A40 smd rect (at 29.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 27 "/Backplane Connector/ETH4_TX_N")) (pad A38 smd rect (at 27.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A41 smd rect (at 30.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A39 smd rect (at 28.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 26 "/Backplane Connector/ETH4_TX_P")) (pad A64 smd rect (at 53.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask)) (pad A63 smd rect (at 52.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A65 smd rect (at 54.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask)) (pad A62 smd rect (at 51.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A66 smd rect (at 55.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A67 smd rect (at 56.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A69 smd rect (at 58.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask)) (pad A70 smd rect (at 59.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A68 smd rect (at 57.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask)) (pad A71 smd rect (at 60.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A72 smd rect (at 61.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask)) (pad A73 smd rect (at 62.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask)) (pad A74 smd rect (at 63.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A75 smd rect (at 64.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A76 smd rect (at 65.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask)) (pad A77 smd rect (at 66.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask)) (pad A79 smd rect (at 68.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A80 smd rect (at 69.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask)) (pad A78 smd rect (at 67.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A81 smd rect (at 70.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask)) (pad A82 smd rect (at 71.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A44 smd rect (at 33.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 29 "/Backplane Connector/ETH5_TX_N")) (pad A43 smd rect (at 32.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 28 "/Backplane Connector/ETH5_TX_P")) (pad A45 smd rect (at 34.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A42 smd rect (at 31.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A46 smd rect (at 35.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A47 smd rect (at 36.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 30 "/Backplane Connector/ETH6_TX_P")) (pad A49 smd rect (at 38.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A50 smd rect (at 39.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A48 smd rect (at 37.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 31 "/Backplane Connector/ETH6_TX_N")) (pad A51 smd rect (at 40.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A52 smd rect (at 41.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 32 "/Backplane Connector/ETH7_TX_P")) (pad A53 smd rect (at 42.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 33 "/Backplane Connector/ETH7_TX_N")) (pad A55 smd rect (at 44.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A56 smd rect (at 45.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 42 "/Backplane Connector/ETH8_TX_P")) (pad A54 smd rect (at 43.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A57 smd rect (at 46.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 43 "/Backplane Connector/ETH8_TX_N")) (pad A60 smd rect (at 49.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask)) (pad A58 smd rect (at 47.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad A61 smd rect (at 50.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask)) (pad A59 smd rect (at 48.5 -2.8 90) (size 0.7 5.6) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (pad ~ smd rect (at 30 -4 90) (size 85 9) (layers F.Mask)) (pad ~ smd rect (at 30 -4 90) (size 85 9) (layers B.Mask)) ) (module azonenberg_pcb:BOURNS_0612_4TERM (layer F.Cu) (tedit 56A57D28) (tstamp 56AA6072) (at 157.05 87.2 270) (path /5685DDE2/56BD166E) (fp_text reference R147 (at -1.95 0 360) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "750 uR" (at 0 4.95 270) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 2 smd rect (at -0.85 -0.6 270) (size 1 2.3) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA support/1V0")) (pad 4 smd rect (at 0.85 -0.6 270) (size 1 2.3) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad 3 smd rect (at 0.85 1.35 270) (size 1 0.8) (layers F.Cu F.Paste F.Mask) (net 564 "/Power Supply/1V0_SHUNT_HI")) (pad 1 smd rect (at -0.85 1.35 270) (size 1 0.8) (layers F.Cu F.Paste F.Mask) (net 565 "/Power Supply/1V0_SHUNT_LO")) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_resistors/r_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:BGA_56_6x6_DEPOP4x4_0.5MM (layer F.Cu) (tedit 55A884D4) (tstamp 56AABD7E) (at 169.25 38.15) (path /5685DDE2/56AF4370) (solder_mask_margin 0.05) (fp_text reference U4 (at -7.75 -4) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value XC2C64A-7-CPG56 (at 7.5 -6.25) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -3.25 3.25) (end -3.25 -2.5) (layer F.SilkS) (width 0.15)) (fp_line (start 3.25 3.25) (end -3.25 3.25) (layer F.SilkS) (width 0.15)) (fp_line (start 3.25 -3.25) (end 3.25 3.25) (layer F.SilkS) (width 0.15)) (fp_line (start -2.5 -3.25) (end 3.25 -3.25) (layer F.SilkS) (width 0.15)) (fp_line (start -3.25 -2.5) (end -2.5 -3.25) (layer F.SilkS) (width 0.15)) (pad A1 smd circle (at -2.25 -2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 525 "/LEDs and test points/3V3_LED")) (pad A2 smd circle (at -1.75 -2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 523 "/LEDs and test points/1V8_LED")) (pad A3 smd circle (at -1.25 -2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 524 "/LEDs and test points/2V5_LED")) (pad A4 smd circle (at -0.75 -2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask)) (pad A5 smd circle (at -0.25 -2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask)) (pad A6 smd circle (at 0.25 -2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 529 "Net-(R120-Pad1)")) (pad A7 smd circle (at 0.75 -2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask)) (pad A8 smd circle (at 1.25 -2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask)) (pad A9 smd circle (at 1.75 -2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask)) (pad A10 smd circle (at 2.25 -2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 520 "/LEDs and test points/1V0_LED")) (pad B1 smd circle (at -2.25 -1.75) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 526 "/LEDs and test points/FAULT_LED")) (pad B10 smd circle (at 2.25 -1.75) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 594 "/Power Supply/12V0_PGOOD")) (pad C1 smd circle (at -2.25 -1.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 527 "/LEDs and test points/VTT_LED")) (pad C3 smd circle (at -1.25 -1.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask)) (pad C4 smd circle (at -0.75 -1.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 521 "/LEDs and test points/1V2_LED")) (pad C5 smd circle (at -0.25 -1.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 522 "/LEDs and test points/1V5_LED")) (pad C6 smd circle (at 0.25 -1.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 90 "/LEDs and test points/2V5_SB")) (pad C7 smd circle (at 0.75 -1.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad C8 smd circle (at 1.25 -1.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 519 "/LEDs and test points/12V0_LED")) (pad C10 smd circle (at 2.25 -1.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 588 "/Power Supply/1V8_EN")) (pad D1 smd circle (at -2.25 -0.75) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask)) (pad D3 smd circle (at -1.25 -0.75) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 89 "/Clocks / buffers/1V8_SB")) (pad D8 smd circle (at 1.25 -0.75) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask)) (pad D10 smd circle (at 2.25 -0.75) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask)) (pad E1 smd circle (at -2.25 -0.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 589 "/Power Supply/2V5_EN")) (pad E3 smd circle (at -1.25 -0.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 580 "/Power Supply/2V5_PGOOD")) (pad E8 smd circle (at 1.25 -0.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 582 "/Power Supply/1V8_PGOOD")) (pad E10 smd circle (at 2.25 -0.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask)) (pad F1 smd circle (at -2.25 0.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 584 "/Power Supply/VTT_EN")) (pad F3 smd circle (at -1.25 0.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 576 "/Power Supply/1V5_PGOOD")) (pad F8 smd circle (at 1.25 0.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad F10 smd circle (at 2.25 0.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 382 "/FPGA Config/FPGA_DONE")) (pad G1 smd circle (at -2.25 0.75) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 574 "/Power Supply/3V3_PGOOD")) (pad G3 smd circle (at -1.25 0.75) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 578 "/Power Supply/1V2_PGOOD")) (pad G8 smd circle (at 1.25 0.75) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 89 "/Clocks / buffers/1V8_SB")) (pad G10 smd circle (at 2.25 0.75) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 388 "/Power Supply/FPGA_INIT_B")) (pad H1 smd circle (at -2.25 1.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 590 "/Power Supply/3V3_EN")) (pad H3 smd circle (at -1.25 1.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 573 "/Power Supply/1V0_PGOOD")) (pad H4 smd circle (at -0.75 1.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad H5 smd circle (at -0.25 1.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 586 "/Power Supply/1V2_EN")) (pad H6 smd circle (at 0.25 1.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 89 "/Clocks / buffers/1V8_SB")) (pad H7 smd circle (at 0.75 1.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask)) (pad H8 smd circle (at 1.25 1.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 587 "/Power Supply/1V5_EN")) (pad H10 smd circle (at 2.25 1.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 383 "/FPGA Config/FPGA_PANIC")) (pad J1 smd circle (at -2.25 1.75) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 530 "/Clocks / buffers/CLK_32KHZ")) (pad J10 smd circle (at 2.25 1.75) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 183 "/Power Supply/CPLD_JTAG_TDI")) (pad K1 smd circle (at -2.25 2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 381 "/Power Supply/FPGA_RESET_N")) (pad K2 smd circle (at -1.75 2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask)) (pad K3 smd circle (at -1.25 2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 572 "/Power Supply/VTT_PGOOD")) (pad K4 smd circle (at -0.75 2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask)) (pad K5 smd circle (at -0.25 2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 585 "/Power Supply/1V0_EN")) (pad K6 smd circle (at 0.25 2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask)) (pad K7 smd circle (at 0.75 2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask)) (pad K8 smd circle (at 1.25 2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask)) (pad K9 smd circle (at 1.75 2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 180 "/Power Supply/CPLD_JTAG_TMS")) (pad K10 smd circle (at 2.25 2.25) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask) (net 181 "/Power Supply/CPLD_JTAG_TCK")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_bga/mbga100.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56B2E897) (at 95.5 55.9 90) (path /56869E40/56B55A4A) (fp_text reference C342 (at -2.6 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 56B2E89D) (at 95.5 54 90) (path /56869E40/56B55FEE) (fp_text reference C455 (at 0 1 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:QFN_12_0.4MM_2x2MM (layer F.Cu) (tedit 56B2E70D) (tstamp 56B317B0) (at 93.75 55.45 180) (path /56869E40/56B5399D) (fp_text reference U34 (at 0 2.5 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value TXB0104RUT (at 0 4.5 180) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.8 0.72 180) (size 0.2 0.75) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (pad 2 smd rect (at -0.4 0.72 180) (size 0.2 0.75) (layers F.Cu F.Paste F.Mask) (net 215 "/Zynq CPU/ARM_JTAG_TDI")) (pad 3 smd rect (at 0 0.72 180) (size 0.2 0.75) (layers F.Cu F.Paste F.Mask) (net 214 "/Zynq CPU/ARM_JTAG_TDO")) (pad 4 smd rect (at 0.4 0.72 180) (size 0.2 0.75) (layers F.Cu F.Paste F.Mask) (net 212 "/Zynq CPU/ARM_JTAG_TMS")) (pad 5 smd rect (at 0.8 0.72 180) (size 0.2 0.75) (layers F.Cu F.Paste F.Mask) (net 213 "/Zynq CPU/ARM_JTAG_TCK")) (pad 6 smd rect (at 0.85 0 270) (size 0.2 0.75) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad 7 smd rect (at 0.8 -0.72 180) (size 0.2 0.75) (layers F.Cu F.Paste F.Mask) (net 629 "/Front panel SFP+s/ARM_TCK")) (pad 8 smd rect (at 0.4 -0.72 180) (size 0.2 0.75) (layers F.Cu F.Paste F.Mask) (net 628 "/Front panel SFP+s/ARM_TMS")) (pad 9 smd rect (at 0 -0.72 180) (size 0.2 0.75) (layers F.Cu F.Paste F.Mask) (net 630 "/Front panel SFP+s/ARM_TDO")) (pad 10 smd rect (at -0.4 -0.72 180) (size 0.2 0.75) (layers F.Cu F.Paste F.Mask) (net 631 "/Front panel SFP+s/ARM_TDI")) (pad 11 smd rect (at -0.8 -0.72 180) (size 0.2 0.75) (layers F.Cu F.Paste F.Mask) (net 82 "/Current Shunt Monitors/3V3")) (pad 12 smd rect (at -0.85 0 270) (size 0.2 0.75) (layers F.Cu F.Paste F.Mask) (net 83 "/Clocks / buffers/2V5")) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_qfn/dfn10_3x3.wrl (at (xyz 0 0 0)) (scale (xyz 0.7 0.7 0.7)) (rotate (xyz 0 0 270)) ) ) (module azonenberg_pcb:VICOR_PI34XX (layer F.Cu) (tedit 56B800D5) (tstamp 56A93AC0) (at 172.2 107.5 180) (path /5685DDE2/56B2C31F) (fp_text reference U7 (at 8.45 5.01 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PI3420-00-LGIZ (at 0 7.75 180) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -7.5 4.5) (end -6.5 5.5) (layer F.SilkS) (width 0.15)) (fp_line (start -7.5 -5.5) (end 7.5 -5.5) (layer F.SilkS) (width 0.15)) (fp_line (start -7.5 5.5) (end 7.5 5.5) (layer F.SilkS) (width 0.15)) (fp_line (start 7.5 -5.5) (end 7.5 5.5) (layer F.SilkS) (width 0.15)) (fp_line (start -7.5 5.5) (end -7.5 -5.5) (layer F.SilkS) (width 0.15)) (pad A1 smd rect (at -6.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 573 "/Power Supply/1V0_PGOOD")) (pad B1 smd rect (at -6.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask)) (pad C1 smd rect (at -6.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 591 "/Power Supply/1V0_TRK")) (pad D1 smd rect (at -6.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask)) (pad E1 smd rect (at -6.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask)) (pad BL1 smd rect (at -6.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G1 smd rect (at -6.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask)) (pad H1 smd rect (at -6.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask)) (pad BL1 smd rect (at -6.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -6.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A2 smd rect (at -5.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 592 "/Power Supply/1V0_MASTER_EAO")) (pad BL1 smd rect (at -5.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -5.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -5.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -5.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -5.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -5.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -5.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -5.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -5.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -4.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -4.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A3 smd rect (at -4.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 585 "/Power Supply/1V0_EN")) (pad BL1 smd rect (at -3.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -3.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -4.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A4 smd rect (at -3.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask)) (pad K3 smd rect (at -4.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask)) (pad BL2 smd rect (at -3.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -3.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -4.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -4.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad K4 smd rect (at -3.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 568 "Net-(R118-Pad1)")) (pad BL2 smd rect (at -3.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -3.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -4.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -4.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -4.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -3.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -1.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad K5 smd rect (at -2.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 593 "/Power Supply/1V0_MASTER_SYNCO")) (pad BL2 smd rect (at -1.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -2.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -2.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -0.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -0.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL5 smd rect (at -1.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad BL5 smd rect (at -1.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad A5 smd rect (at -2.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 570 "/Power Supply/REMOTE_SENSE")) (pad BL5 smd rect (at -0.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad BL5 smd rect (at -1.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad BL5 smd rect (at -1.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad BL5 smd rect (at -0.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad BL5 smd rect (at -0.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad BL5 smd rect (at -0.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad BL2 smd rect (at -2.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -2.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -2.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL3 smd rect (at 4.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 4.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 4.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 4.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL4 smd rect (at 4.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 605 "/Power Supply/1V0_SW2")) (pad BL4 smd rect (at 4.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 605 "/Power Supply/1V0_SW2")) (pad BL4 smd rect (at 4.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 605 "/Power Supply/1V0_SW2")) (pad BL4 smd rect (at 4.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 605 "/Power Supply/1V0_SW2")) (pad BL4 smd rect (at 4.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 605 "/Power Supply/1V0_SW2")) (pad BL3 smd rect (at 6.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 5.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 6.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 5.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 6.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 5.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 6.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 5.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL4 smd rect (at 5.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 605 "/Power Supply/1V0_SW2")) (pad BL4 smd rect (at 5.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 605 "/Power Supply/1V0_SW2")) (pad BL4 smd rect (at 6.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 605 "/Power Supply/1V0_SW2")) (pad BL4 smd rect (at 6.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 605 "/Power Supply/1V0_SW2")) (pad BL4 smd rect (at 6.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 605 "/Power Supply/1V0_SW2")) (pad BL4 smd rect (at 5.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 605 "/Power Supply/1V0_SW2")) (pad BL4 smd rect (at 6.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 605 "/Power Supply/1V0_SW2")) (pad BL4 smd rect (at 6.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 605 "/Power Supply/1V0_SW2")) (pad BL4 smd rect (at 5.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 605 "/Power Supply/1V0_SW2")) (pad BL4 smd rect (at 5.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 605 "/Power Supply/1V0_SW2")) (pad BL2 smd rect (at -1.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -1.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -0.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -0.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -1.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -1.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -0.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -0.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_bga/tfbga48.wrl (at (xyz 0 0 0)) (scale (xyz 1.75 1.75 1.75)) (rotate (xyz 0 0 -90)) ) ) (module azonenberg_pcb:VICOR_PI34XX (layer F.Cu) (tedit 56B800D5) (tstamp 56A93A3C) (at 152.2 107.5 180) (path /5685DDE2/56B2A384) (fp_text reference U6 (at 8.46 5.07 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PI3420-00-LGIZ (at 0 7.75 180) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_line (start -7.5 4.5) (end -6.5 5.5) (layer F.SilkS) (width 0.15)) (fp_line (start -7.5 -5.5) (end 7.5 -5.5) (layer F.SilkS) (width 0.15)) (fp_line (start -7.5 5.5) (end 7.5 5.5) (layer F.SilkS) (width 0.15)) (fp_line (start 7.5 -5.5) (end 7.5 5.5) (layer F.SilkS) (width 0.15)) (fp_line (start -7.5 5.5) (end -7.5 -5.5) (layer F.SilkS) (width 0.15)) (pad A1 smd rect (at -6.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 569 "/Power Supply/1V0_MASTER_SYNCI")) (pad B1 smd rect (at -6.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask)) (pad C1 smd rect (at -6.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 591 "/Power Supply/1V0_TRK")) (pad D1 smd rect (at -6.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask)) (pad E1 smd rect (at -6.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask)) (pad BL1 smd rect (at -6.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad G1 smd rect (at -6.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask)) (pad H1 smd rect (at -6.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask)) (pad BL1 smd rect (at -6.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -6.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A2 smd rect (at -5.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 592 "/Power Supply/1V0_MASTER_EAO")) (pad BL1 smd rect (at -5.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -5.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -5.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -5.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -5.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -5.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -5.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -5.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -5.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -4.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -4.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A3 smd rect (at -4.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 585 "/Power Supply/1V0_EN")) (pad BL1 smd rect (at -3.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -3.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -4.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad A4 smd rect (at -3.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask)) (pad K3 smd rect (at -4.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask)) (pad BL2 smd rect (at -3.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -3.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -4.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -4.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad K4 smd rect (at -3.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 593 "/Power Supply/1V0_MASTER_SYNCO")) (pad BL2 smd rect (at -3.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -3.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -4.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -4.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL1 smd rect (at -4.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -3.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -1.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad K5 smd rect (at -2.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 569 "/Power Supply/1V0_MASTER_SYNCI")) (pad BL2 smd rect (at -1.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -2.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -2.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -0.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -0.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL5 smd rect (at -1.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad BL5 smd rect (at -1.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad A5 smd rect (at -2.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 570 "/Power Supply/REMOTE_SENSE")) (pad BL5 smd rect (at -0.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad BL5 smd rect (at -1.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad BL5 smd rect (at -1.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad BL5 smd rect (at -0.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad BL5 smd rect (at -0.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad BL5 smd rect (at -0.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 85 "/Power Supply/1V0_RAW")) (pad BL2 smd rect (at -2.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -2.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -2.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL3 smd rect (at 4.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 4.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 4.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 4.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL4 smd rect (at 4.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 604 "/Power Supply/1V0_SW")) (pad BL4 smd rect (at 4.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 604 "/Power Supply/1V0_SW")) (pad BL4 smd rect (at 4.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 604 "/Power Supply/1V0_SW")) (pad BL4 smd rect (at 4.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 604 "/Power Supply/1V0_SW")) (pad BL4 smd rect (at 4.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 604 "/Power Supply/1V0_SW")) (pad BL3 smd rect (at 6.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 5.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 6.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 5.5 -4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 6.5 -3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 5.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 6.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL3 smd rect (at 5.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 84 "/LEDs and test points/12V0")) (pad BL4 smd rect (at 5.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 604 "/Power Supply/1V0_SW")) (pad BL4 smd rect (at 5.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 604 "/Power Supply/1V0_SW")) (pad BL4 smd rect (at 6.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 604 "/Power Supply/1V0_SW")) (pad BL4 smd rect (at 6.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 604 "/Power Supply/1V0_SW")) (pad BL4 smd rect (at 6.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 604 "/Power Supply/1V0_SW")) (pad BL4 smd rect (at 5.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 604 "/Power Supply/1V0_SW")) (pad BL4 smd rect (at 6.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 604 "/Power Supply/1V0_SW")) (pad BL4 smd rect (at 6.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 604 "/Power Supply/1V0_SW")) (pad BL4 smd rect (at 5.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 604 "/Power Supply/1V0_SW")) (pad BL4 smd rect (at 5.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 604 "/Power Supply/1V0_SW")) (pad BL2 smd rect (at -1.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -1.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -0.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -0.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 -2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 -1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -1.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -1.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -0.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at -0.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 -0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 0.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 2.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 1.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 4.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 2.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 1.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (pad BL2 smd rect (at 0.5 3.5 180) (size 0.55 0.55) (layers F.Cu F.Paste F.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_bga/tfbga48.wrl (at (xyz 0 0 0)) (scale (xyz 1.75 1.75 1.75)) (rotate (xyz 0 0 -90)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56BDA309) (at 117.6 123.75 270) (path /5685DE78/56BE2481) (fp_text reference R227 (at 4.525 0 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 632 "/QDR-II+ SRAM/RAM_A18")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56BDA30F) (at 104.175 120.45 180) (path /5685DE78/56BE2488) (fp_text reference R228 (at 2.6 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 633 "/QDR-II+ SRAM/RAM_A19")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 56BDA315) (at 118.625 123.75 270) (path /5685DE78/56BE248F) (fp_text reference R229 (at 4.55 0 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 49.9 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 634 "/QDR-II+ SRAM/RAM_A20")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 56C00D02) (at 110.7 104.6) (path /5685DE78/56C75134) (fp_text reference C456 (at -2.3 0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 80 "/LEDs and test points/RAM_VTT")) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 "/Backplane Connector/GND")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (gr_text "ARM\nJTAG" (at 88.65 53.55) (layer F.SilkS) (tstamp 56AEB02B) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text "FPGA bank 13" (at 76.55 179.89) (layer F.SilkS) (tstamp 56AF3750) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "FPGA BRAM" (at 100.53 174.03) (layer F.SilkS) (tstamp 56AF371E) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "FPGA bank 0" (at 50.73 147.53) (layer F.SilkS) (tstamp 56AF3715) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "FPGA bank 12" (at 76.15 187.25) (layer F.SilkS) (tstamp 56AF36E3) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "FPGA bank 16" (at 53.2 178.69) (layer F.SilkS) (tstamp 56AF36BC) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "FPGA bank 36" (at 101.43 158.33) (layer F.SilkS) (tstamp 56AF368D) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "FPGA bank 15" (at 101.18 165.53) (layer F.SilkS) (tstamp 56AF3666) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "FPGA bank 14" (at 52.88 155.58) (layer F.SilkS) (tstamp 56AF3636) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "FPGA bank 32" (at 76.7 172.03) (layer F.SilkS) (tstamp 56AF3609) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "FPGA bank 33" (at 77.25 162.93) (layer F.SilkS) (tstamp 56AF35DC) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "FPGA VCCAUX" (at 76.5 155.19) (layer F.SilkS) (tstamp 56AF351E) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "QDR decoupling" (at 101.9 149.65) (layer F.SilkS) (tstamp 56AF3401) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "SFP pullups" (at 98.58 187.13) (layer F.SilkS) (tstamp 56AF29EA) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "FPGA GTPs" (at 73.23 147.63) (layer F.SilkS) (tstamp 56AF2882) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "FPGA ADC" (at 49.95 186.99) (layer F.SilkS) (tstamp 56AF2819) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "FPGA bank 35" (at 53.7 171.605) (layer F.SilkS) (tstamp 56AF2659) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "FPGA bank 34" (at 53.75 163.13) (layer F.SilkS) (tstamp 56AF2617) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "FPGA VCCINT" (at 50.65 140.7) (layer F.SilkS) (tstamp 56AF24F2) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "Data flash" (at 224.25 68) (layer F.SilkS) (effects (font (size 2 2) (thickness 0.2))) ) (gr_text "ZYNQ\nJTAG" (at 77.4 53.45) (layer F.SilkS) (tstamp 56AEF553) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text "FPGA\nJTAG" (at 160.3 64.05) (layer F.SilkS) (tstamp 56AEA209) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text "CPLD\nJTAG" (at 155.85 52.8) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text "MARBLEWALRUS Ethernet Switch v0.1\nA. Zonenberg / 2016-02-14 / $Rev: 2306 $" (at 161.8 80) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.125))) ) (gr_line (start 40 127.5) (end 188.5 127.5) (layer Dwgs.User) (width 0.2)) (gr_line (start 40 32.5) (end 189 32.5) (layer Dwgs.User) (width 0.2)) (gr_arc (start 191.6 107) (end 191.6 107.95) (angle 180) (layer Edge.Cuts) (width 0.15)) (gr_line (start 188.75 34.85) (end 197.15 34.85) (layer Edge.Cuts) (width 0.15)) (gr_line (start 188.75 30) (end 188.75 34.85) (layer Edge.Cuts) (width 0.15)) (gr_line (start 30 30) (end 188.75 30) (layer Edge.Cuts) (width 0.15)) (gr_line (start 197.15 106.05) (end 197.15 34.85) (layer Edge.Cuts) (width 0.15)) (gr_line (start 191.6 106.05) (end 197.15 106.05) (layer Edge.Cuts) (width 0.15)) (gr_line (start 197.15 107.95) (end 191.6 107.95) (layer Edge.Cuts) (width 0.15)) (gr_line (start 197.15 119.15) (end 197.15 107.95) (layer Edge.Cuts) (width 0.15)) (gr_line (start 188.5 119.15) (end 197.15 119.15) (layer Edge.Cuts) (width 0.15)) (gr_line (start 188.5 130) (end 188.5 119.15) (layer Edge.Cuts) (width 0.15)) (gr_line (start 30 130) (end 188.5 130) (layer Edge.Cuts) (width 0.15)) (gr_line (start 30 30) (end 30 130) (layer Edge.Cuts) (width 0.15)) (segment (start 89 105.43507) (end 89 106.55) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 89 106.55) (end 89.35 106.9) (width 0.127) (layer In3.Cu_pwr) (net 1)) (via (at 89.35 106.9) (size 0.45) (drill 0.25) (layers F.Cu B.Cu) (net 1) (status 30)) (segment (start 88.825 101.475) (end 88.25 101.475) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 88.25 101.475) (end 87.85 101.475) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 89 104.2) (end 88.25 103.45) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 88.25 103.45) (end 88.25 101.475) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 89 105.43507) (end 89 104.2) (width 0.127) (layer In3.Cu_pwr) (net 1)) (via (at 89 105.43507) (size 0.45) (drill 0.25) (layers F.Cu B.Cu) (net 1) (status 30)) (segment (start 89.361499 95.234499) (end 89.361499 96.6) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 89.361499 96.6) (end 89.361499 97) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 92.15 96.6) (end 89.361499 96.6) (width 0.127) (layer In3.Cu_pwr) (net 1)) (via (at 92.15 96.6) (size 0.45) (drill 0.25) (layers F.Cu B.Cu) (net 1) (status 30)) (segment (start 78.849982 101.475) (end 80.25 101.475) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 80.25 101.475) (end 87.85 101.475) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 80.275 98.75) (end 80.275 101.45) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 80.275 101.45) (end 80.25 101.475) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 77.4 101.8) (end 78.524982 101.8) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 78.524982 101.8) (end 78.849982 101.475) (width 0.127) (layer In3.Cu_pwr) (net 1)) (via (at 77.4 101.8) (size 0.45) (drill 0.25) (layers F.Cu B.Cu) (net 1) (status 30)) (segment (start 89.361499 99.6) (end 89.361499 100) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 89.361499 100) (end 89.361499 100.938501) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 88.75 100) (end 89.361499 100) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 87.85 101.475) (end 88.075 101.475) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 89.361499 100.938501) (end 88.825 101.475) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 89.361499 99.6) (end 89.361499 99.765501) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 89.361499 98) (end 89.361499 99.6) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 80.275 98.75) (end 80.275 98) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 80.275 98) (end 80.275 97.475) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 79.75 98) (end 80.275 98) (width 0.127) (layer In3.Cu_pwr) (net 1)) (segment (start 80.275 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