(kicad_pcb (version 20171130) (host pcbnew "(5.1.4)") (general (thickness 1.6) (drawings 36) (tracks 4708) (zones 0) (modules 214) (nets 252) ) (page A4) (layers (0 F.Cu signal) (1 In1.Cu signal) (2 In2.Cu signal) (31 B.Cu signal) (32 B.Adhes user) (33 F.Adhes user) (34 B.Paste user) (35 F.Paste user) (36 B.SilkS user) (37 F.SilkS user) (38 B.Mask user) (39 F.Mask user) (40 Dwgs.User user) (41 Cmts.User user) (42 Eco1.User user) (43 Eco2.User user) (44 Edge.Cuts user) (45 Margin user) (46 B.CrtYd user) (47 F.CrtYd user) (48 B.Fab user) (49 F.Fab user) ) (setup (last_trace_width 0.175) (user_trace_width 0.125) (user_trace_width 0.165) (user_trace_width 0.175) (trace_clearance 0.1) (zone_clearance 0.25) (zone_45_only no) (trace_min 0.125) (via_size 0.55) (via_drill 0.25) (via_min_size 0.55) (via_min_drill 0.25) (user_via 0.55 0.25) (uvia_size 0.3) (uvia_drill 0.1) (uvias_allowed no) (uvia_min_size 0.2) (uvia_min_drill 0.1) (edge_width 0.05) (segment_width 0.2) (pcb_text_width 0.3) (pcb_text_size 1.5 1.5) (mod_edge_width 0.12) (mod_text_size 1 1) (mod_text_width 0.15) (pad_size 1.524 1.524) (pad_drill 0.762) (pad_to_mask_clearance 0.05) (solder_mask_min_width 0.05) (aux_axis_origin 0 0) (visible_elements FFFDFF7F) (pcbplotparams (layerselection 0x210fc_ffffffff) (usegerberextensions false) (usegerberattributes false) (usegerberadvancedattributes false) (creategerberjobfile false) (excludeedgelayer true) (linewidth 0.100000) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15.000000) (psnegative false) (psa4output false) (plotreference false) (plotvalue false) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 0) (scaleselection 1) (outputdirectory "output/")) ) (net 0 "") (net 1 /GND) (net 2 /2V5) (net 3 /1V8) (net 4 /1V2) (net 5 /3V3) (net 6 /Ethernet/ETH1_A2V5) (net 7 /Ethernet/ETH1_A1V2_PLL) (net 8 /Ethernet/ETH2_A2V5) (net 9 /Ethernet/ETH2_A1V2_PLL) (net 10 /Ethernet/ETH3_A2V5) (net 11 /Ethernet/ETH3_A1V2_PLL) (net 12 "Net-(C55-Pad1)") (net 13 "Net-(C56-Pad1)") (net 14 "Net-(C57-Pad1)") (net 15 "Net-(C58-Pad1)") (net 16 "Net-(C59-Pad1)") (net 17 "Net-(C60-Pad1)") (net 18 "Net-(C61-Pad1)") (net 19 "Net-(C62-Pad1)") (net 20 "Net-(C63-Pad1)") (net 21 "Net-(C64-Pad1)") (net 22 "Net-(C65-Pad1)") (net 23 "Net-(C66-Pad1)") (net 24 "Net-(C67-Pad1)") (net 25 "Net-(C68-Pad1)") (net 26 "Net-(C69-Pad1)") (net 27 "Net-(C70-Pad1)") (net 28 "Net-(C71-Pad1)") (net 29 "Net-(C72-Pad1)") (net 30 "Net-(C73-Pad1)") (net 31 "Net-(C74-Pad1)") (net 32 "/Power Supply/5V0") (net 33 /Ethernet/ETH2_A1V2) (net 34 /Ethernet/ETH1_A1V2) (net 35 /Ethernet/ETH3_A1V2) (net 36 "Net-(C85-Pad2)") (net 37 "Net-(C86-Pad1)") (net 38 "Net-(D1-Pad2)") (net 39 "Net-(F1-Pad2)") (net 40 "/Power Supply/5V0_UNFUSED") (net 41 "/MCU PMODs/PD4") (net 42 /JTAG_TDI) (net 43 "/MCU PMODs/PD5") (net 44 /JTAG_TMS) (net 45 /FPGA_DONE) (net 46 "/MCU PMODs/PE4") (net 47 "/MCU PMODs/PF6") (net 48 "/MCU PMODs/PE5") (net 49 "/MCU PMODs/PF8") (net 50 "/MCU PMODs/PD3") (net 51 /JTAG_TCK) (net 52 "/MCU PMODs/PB4") (net 53 /JTAG_TDO) (net 54 "/MCU PMODs/PE6") (net 55 "/MCU PMODs/PF7") (net 56 "/MCU PMODs/PB5") (net 57 /FPGA_RST_N) (net 58 "/MCU PMODs/PE3") (net 59 "/MCU PMODs/PC2") (net 60 "/MCU PMODs/PF3") (net 61 "/MCU PMODs/PC0") (net 62 "/MCU PMODs/PB1") (net 63 "/MCU PMODs/PF2") (net 64 "/MCU PMODs/PA0") (net 65 "/MCU PMODs/PF0") (net 66 "/MCU PMODs/PC3") (net 67 "/MCU PMODs/PE0") (net 68 /MCU_BOOT0) (net 69 "/MCU PMODs/PE2") (net 70 "/MCU PMODs/PB2") (net 71 "/MCU PMODs/PE1") (net 72 "/MCU PMODs/PB0") (net 73 "/MCU PMODs/PF1") (net 74 "/MCU PMODs/PA3") (net 75 "/MCU PMODs/PC13") (net 76 "/MCU PMODs/PF9") (net 77 /MCU_RST_N) (net 78 "/MCU PMODs/PA5") (net 79 "/MCU PMODs/PD10") (net 80 "/MCU PMODs/PD7") (net 81 "/MCU PMODs/PD15") (net 82 "/MCU PMODs/PD6") (net 83 "/MCU PMODs/PD9") (net 84 "/MCU PMODs/PD0") (net 85 "/MCU PMODs/PD8") (net 86 "/MCU PMODs/PC12") (net 87 "/MCU PMODs/PD14") (net 88 "/MCU PMODs/PD1") (net 89 "/MCU PMODs/PB14") (net 90 "/MCU PMODs/PD2") (net 91 "/MCU PMODs/PB15") (net 92 "/MCU PMODs/PC10") (net 93 "/MCU PMODs/PB10") (net 94 "/MCU PMODs/PA12") (net 95 "/MCU PMODs/PE13") (net 96 "/MCU PMODs/PA11") (net 97 "/MCU PMODs/PD13") (net 98 "/MCU PMODs/PA10") (net 99 "/MCU PMODs/PE14") (net 100 "/MCU PMODs/PA9") (net 101 "/MCU PMODs/PE15") (net 102 "/MCU PMODs/PA8") (net 103 "/MCU PMODs/PD12") (net 104 /Ethernet/ETH0_4_N) (net 105 "/MCU PMODs/PD11") (net 106 /Ethernet/ETH0_4_P) (net 107 "/MCU PMODs/PE12") (net 108 /Ethernet/ETH0_3_N) (net 109 "/MCU PMODs/PE11") (net 110 /Ethernet/ETH0_3_P) (net 111 "/MCU PMODs/PE9") (net 112 /Ethernet/ETH0_2_N) (net 113 "/MCU PMODs/PE10") (net 114 /Ethernet/ETH0_2_P) (net 115 "/MCU PMODs/PE8") (net 116 /Ethernet/ETH0_1_N) (net 117 "/MCU PMODs/PE7") (net 118 /Ethernet/ETH0_1_P) (net 119 /Ethernet/ETH1_RXD0) (net 120 /Ethernet/ETH1_RX_DV) (net 121 /Ethernet/ETH2_TXD0) (net 122 /Ethernet/ETH2_TXD1) (net 123 /Ethernet/ETH3_RST_N) (net 124 /Ethernet/ETH2_TX_CLK) (net 125 /Ethernet/ETH2_TX_EN) (net 126 /Ethernet/ETH2_MDIO) (net 127 /Ethernet/ETH2_RST_N) (net 128 /Ethernet/ETH3_MDIO) (net 129 /Ethernet/ETH1_LED1_N) (net 130 /Ethernet/ETH1_LED2_N) (net 131 /Ethernet/ETH2_RX_CLK) (net 132 /Ethernet/ETH3_RX_CLK) (net 133 /Ethernet/ETH1_RXD1) (net 134 /Ethernet/ETH2_RX_DV) (net 135 /Ethernet/ETH2_MDC) (net 136 /Ethernet/ETH3_RX_DV) (net 137 /Ethernet/ETH3_MDC) (net 138 /Ethernet/ETH1_RXD2) (net 139 /LVDS_CLK_P) (net 140 /Ethernet/ETH3_RXD2) (net 141 /LVDS_CLK_N) (net 142 /Ethernet/ETH3_RXD3) (net 143 /Ethernet/ETH3_TXD2) (net 144 /Ethernet/ETH3_TXD3) (net 145 /Ethernet/ETH3_TXD0) (net 146 /Ethernet/ETH3_TXD1) (net 147 /Ethernet/ETH2_TXD2) (net 148 /Ethernet/ETH2_TXD3) (net 149 /Ethernet/ETH3_TX_CLK) (net 150 /Ethernet/ETH3_TX_EN) (net 151 /Ethernet/ETH2_RXD3) (net 152 /Ethernet/ETH2_RXD2) (net 153 /Ethernet/ETH2_RXD1) (net 154 /Ethernet/ETH2_RXD0) (net 155 /Ethernet/ETH3_RXD1) (net 156 /Ethernet/ETH3_RXD0) (net 157 /Ethernet/ETH1_MDIO) (net 158 /Ethernet/ETH1_RXD3) (net 159 /Ethernet/ETH1_MDC) (net 160 /Ethernet/ETH1_RST_N) (net 161 /Ethernet/ETH1_TX_CLK) (net 162 /Ethernet/ETH1_TX_EN) (net 163 /Ethernet/ETH1_TXD2) (net 164 /Ethernet/ETH1_TXD3) (net 165 /Ethernet/ETH1_TXD1) (net 166 /Ethernet/ETH1_RX_CLK) (net 167 /Ethernet/ETH1_TXD0) (net 168 /LVDS_DQ1_P) (net 169 /LVDS_DQ0_P) (net 170 /LVDS_DQ1_N) (net 171 /LVDS_DQ0_N) (net 172 /LVDS_DQ2_P) (net 173 /LVDS_DQ2_N) (net 174 /LVDS_DQ4_P) (net 175 /LVDS_DQ4_N) (net 176 /ETH0_LED1_P) (net 177 /ETH0_LED2_P) (net 178 "Net-(J3-Pad16)") (net 179 "Net-(J3-Pad14)") (net 180 "Net-(J4-Pad16)") (net 181 "Net-(J4-Pad14)") (net 182 /Ethernet/ETH1_1_P) (net 183 /Ethernet/ETH1_1_N) (net 184 /Ethernet/ETH1_4_N) (net 185 /Ethernet/ETH1_4_P) (net 186 /Ethernet/ETH1_2_N) (net 187 /Ethernet/ETH1_2_P) (net 188 /Ethernet/ETH1_3_P) (net 189 /Ethernet/ETH1_3_N) (net 190 "Net-(J5-Pad16)") (net 191 /Ethernet/ETH2_LED2_N) (net 192 "Net-(J5-Pad14)") (net 193 /Ethernet/ETH2_LED1_N) (net 194 /Ethernet/ETH2_1_P) (net 195 /Ethernet/ETH2_1_N) (net 196 /Ethernet/ETH2_4_N) (net 197 /Ethernet/ETH2_4_P) (net 198 /Ethernet/ETH2_2_N) (net 199 /Ethernet/ETH2_2_P) (net 200 /Ethernet/ETH2_3_P) (net 201 /Ethernet/ETH2_3_N) (net 202 "Net-(J6-Pad16)") (net 203 /Ethernet/ETH3_LED2_N) (net 204 "Net-(J6-Pad14)") (net 205 /Ethernet/ETH3_LED1_N) (net 206 /Ethernet/ETH3_1_P) (net 207 /Ethernet/ETH3_1_N) (net 208 /Ethernet/ETH3_4_N) (net 209 /Ethernet/ETH3_4_P) (net 210 /Ethernet/ETH3_2_N) (net 211 /Ethernet/ETH3_2_P) (net 212 /Ethernet/ETH3_3_P) (net 213 /Ethernet/ETH3_3_N) (net 214 "/Power Supply/1V2_PGOOD") (net 215 "Net-(L11-Pad2)") (net 216 "Net-(R2-Pad2)") (net 217 "Net-(R3-Pad2)") (net 218 "Net-(R4-Pad2)") (net 219 "Net-(R5-Pad2)") (net 220 "Net-(R6-Pad2)") (net 221 "Net-(R7-Pad2)") (net 222 "Net-(R8-Pad2)") (net 223 "Net-(R9-Pad2)") (net 224 "Net-(R11-Pad2)") (net 225 "Net-(R12-Pad2)") (net 226 "Net-(R13-Pad2)") (net 227 "Net-(R14-Pad2)") (net 228 "Net-(R15-Pad2)") (net 229 "Net-(R16-Pad2)") (net 230 "Net-(R17-Pad2)") (net 231 "Net-(R18-Pad2)") (net 232 /Ethernet/ETH1_CLK_25MHZ) (net 233 "Net-(R21-Pad1)") (net 234 /Ethernet/ETH2_CLK_25MHZ) (net 235 "Net-(R22-Pad1)") (net 236 "Net-(R26-Pad2)") (net 237 "Net-(R27-Pad2)") (net 238 "Net-(R28-Pad2)") (net 239 "Net-(R29-Pad2)") (net 240 "Net-(R30-Pad2)") (net 241 "Net-(R31-Pad2)") (net 242 "Net-(R32-Pad2)") (net 243 "Net-(R33-Pad2)") (net 244 /Ethernet/ETH3_CLK_25MHZ) (net 245 "Net-(R35-Pad1)") (net 246 /Ethernet/ETH3_LED2_N_1V8) (net 247 /Ethernet/ETH3_LED1_N_1V8) (net 248 /LVDS_DQ8_P) (net 249 /LVDS_DQ8_N) (net 250 /LVDS_DQ6_P) (net 251 /LVDS_DQ6_N) (net_class Default "This is the default net class." (clearance 0.1) (trace_width 0.175) (via_dia 0.55) (via_drill 0.25) (uvia_dia 0.3) (uvia_drill 0.1) (diff_pair_width 0.165) (diff_pair_gap 0.1) (add_net /1V2) (add_net /1V8) (add_net /2V5) (add_net /3V3) (add_net /ETH0_LED1_P) (add_net /ETH0_LED2_P) (add_net /Ethernet/ETH0_1_N) (add_net /Ethernet/ETH0_1_P) (add_net /Ethernet/ETH0_2_N) (add_net /Ethernet/ETH0_2_P) (add_net /Ethernet/ETH0_3_N) (add_net /Ethernet/ETH0_3_P) (add_net /Ethernet/ETH0_4_N) (add_net /Ethernet/ETH0_4_P) (add_net /Ethernet/ETH1_1_N) (add_net /Ethernet/ETH1_1_P) (add_net /Ethernet/ETH1_2_N) (add_net /Ethernet/ETH1_2_P) (add_net /Ethernet/ETH1_3_N) (add_net /Ethernet/ETH1_3_P) (add_net /Ethernet/ETH1_4_N) (add_net /Ethernet/ETH1_4_P) (add_net /Ethernet/ETH1_A1V2) (add_net /Ethernet/ETH1_A1V2_PLL) (add_net /Ethernet/ETH1_A2V5) (add_net /Ethernet/ETH1_CLK_25MHZ) (add_net /Ethernet/ETH1_LED1_N) (add_net /Ethernet/ETH1_LED2_N) (add_net /Ethernet/ETH1_MDC) (add_net /Ethernet/ETH1_MDIO) (add_net /Ethernet/ETH1_RST_N) (add_net /Ethernet/ETH1_RXD0) (add_net /Ethernet/ETH1_RXD1) (add_net /Ethernet/ETH1_RXD2) (add_net /Ethernet/ETH1_RXD3) (add_net /Ethernet/ETH1_RX_CLK) (add_net /Ethernet/ETH1_RX_DV) (add_net /Ethernet/ETH1_TXD0) (add_net /Ethernet/ETH1_TXD1) (add_net /Ethernet/ETH1_TXD2) (add_net /Ethernet/ETH1_TXD3) (add_net /Ethernet/ETH1_TX_CLK) (add_net /Ethernet/ETH1_TX_EN) (add_net /Ethernet/ETH2_1_N) (add_net /Ethernet/ETH2_1_P) (add_net /Ethernet/ETH2_2_N) (add_net /Ethernet/ETH2_2_P) (add_net /Ethernet/ETH2_3_N) (add_net /Ethernet/ETH2_3_P) (add_net /Ethernet/ETH2_4_N) (add_net /Ethernet/ETH2_4_P) (add_net /Ethernet/ETH2_A1V2) (add_net /Ethernet/ETH2_A1V2_PLL) (add_net /Ethernet/ETH2_A2V5) (add_net /Ethernet/ETH2_CLK_25MHZ) (add_net /Ethernet/ETH2_LED1_N) (add_net /Ethernet/ETH2_LED2_N) (add_net /Ethernet/ETH2_MDC) (add_net /Ethernet/ETH2_MDIO) (add_net /Ethernet/ETH2_RST_N) (add_net /Ethernet/ETH2_RXD0) (add_net /Ethernet/ETH2_RXD1) (add_net /Ethernet/ETH2_RXD2) (add_net /Ethernet/ETH2_RXD3) (add_net /Ethernet/ETH2_RX_CLK) (add_net /Ethernet/ETH2_RX_DV) (add_net /Ethernet/ETH2_TXD0) (add_net /Ethernet/ETH2_TXD1) (add_net /Ethernet/ETH2_TXD2) (add_net /Ethernet/ETH2_TXD3) (add_net /Ethernet/ETH2_TX_CLK) (add_net /Ethernet/ETH2_TX_EN) (add_net /Ethernet/ETH3_1_N) (add_net /Ethernet/ETH3_1_P) (add_net /Ethernet/ETH3_2_N) (add_net /Ethernet/ETH3_2_P) (add_net /Ethernet/ETH3_3_N) (add_net /Ethernet/ETH3_3_P) (add_net /Ethernet/ETH3_4_N) (add_net /Ethernet/ETH3_4_P) (add_net /Ethernet/ETH3_A1V2) (add_net /Ethernet/ETH3_A1V2_PLL) (add_net /Ethernet/ETH3_A2V5) (add_net /Ethernet/ETH3_CLK_25MHZ) (add_net /Ethernet/ETH3_LED1_N) (add_net /Ethernet/ETH3_LED1_N_1V8) (add_net /Ethernet/ETH3_LED2_N) (add_net /Ethernet/ETH3_LED2_N_1V8) (add_net /Ethernet/ETH3_MDC) (add_net /Ethernet/ETH3_MDIO) (add_net /Ethernet/ETH3_RST_N) (add_net /Ethernet/ETH3_RXD0) (add_net /Ethernet/ETH3_RXD1) (add_net /Ethernet/ETH3_RXD2) (add_net /Ethernet/ETH3_RXD3) (add_net /Ethernet/ETH3_RX_CLK) (add_net /Ethernet/ETH3_RX_DV) (add_net /Ethernet/ETH3_TXD0) (add_net /Ethernet/ETH3_TXD1) (add_net /Ethernet/ETH3_TXD2) (add_net /Ethernet/ETH3_TXD3) (add_net /Ethernet/ETH3_TX_CLK) (add_net /Ethernet/ETH3_TX_EN) (add_net /FPGA_DONE) (add_net /FPGA_RST_N) (add_net /GND) (add_net /JTAG_TCK) (add_net /JTAG_TDI) (add_net /JTAG_TDO) (add_net /JTAG_TMS) (add_net /LVDS_CLK_N) (add_net /LVDS_CLK_P) (add_net /LVDS_DQ0_N) (add_net /LVDS_DQ0_P) (add_net /LVDS_DQ1_N) (add_net /LVDS_DQ1_P) (add_net /LVDS_DQ2_N) (add_net /LVDS_DQ2_P) (add_net /LVDS_DQ4_N) (add_net /LVDS_DQ4_P) (add_net /LVDS_DQ6_N) (add_net /LVDS_DQ6_P) (add_net /LVDS_DQ8_N) (add_net /LVDS_DQ8_P) (add_net "/MCU PMODs/PA0") (add_net "/MCU PMODs/PA10") (add_net "/MCU PMODs/PA11") (add_net "/MCU PMODs/PA12") (add_net "/MCU PMODs/PA3") (add_net "/MCU PMODs/PA5") (add_net "/MCU PMODs/PA8") (add_net "/MCU PMODs/PA9") (add_net "/MCU PMODs/PB0") (add_net "/MCU PMODs/PB1") (add_net "/MCU PMODs/PB10") (add_net "/MCU PMODs/PB14") (add_net "/MCU PMODs/PB15") (add_net "/MCU PMODs/PB2") (add_net "/MCU PMODs/PB4") (add_net "/MCU PMODs/PB5") (add_net "/MCU PMODs/PC0") (add_net "/MCU PMODs/PC10") (add_net "/MCU PMODs/PC12") (add_net "/MCU PMODs/PC13") (add_net "/MCU PMODs/PC2") (add_net "/MCU PMODs/PC3") (add_net "/MCU PMODs/PD0") (add_net "/MCU PMODs/PD1") (add_net "/MCU PMODs/PD10") (add_net "/MCU PMODs/PD11") (add_net "/MCU PMODs/PD12") (add_net "/MCU PMODs/PD13") (add_net "/MCU PMODs/PD14") (add_net "/MCU PMODs/PD15") (add_net "/MCU PMODs/PD2") (add_net "/MCU PMODs/PD3") (add_net "/MCU PMODs/PD4") (add_net "/MCU PMODs/PD5") (add_net "/MCU PMODs/PD6") (add_net "/MCU PMODs/PD7") (add_net "/MCU PMODs/PD8") (add_net "/MCU PMODs/PD9") (add_net "/MCU PMODs/PE0") (add_net "/MCU PMODs/PE1") (add_net "/MCU PMODs/PE10") (add_net "/MCU PMODs/PE11") (add_net "/MCU PMODs/PE12") (add_net "/MCU PMODs/PE13") (add_net "/MCU PMODs/PE14") (add_net "/MCU PMODs/PE15") (add_net "/MCU PMODs/PE2") (add_net "/MCU PMODs/PE3") (add_net "/MCU PMODs/PE4") (add_net "/MCU PMODs/PE5") (add_net "/MCU PMODs/PE6") (add_net "/MCU PMODs/PE7") (add_net "/MCU PMODs/PE8") (add_net "/MCU PMODs/PE9") (add_net "/MCU PMODs/PF0") (add_net "/MCU PMODs/PF1") (add_net "/MCU PMODs/PF2") (add_net "/MCU PMODs/PF3") (add_net "/MCU PMODs/PF6") (add_net "/MCU PMODs/PF7") (add_net "/MCU PMODs/PF8") (add_net "/MCU PMODs/PF9") (add_net /MCU_BOOT0) (add_net /MCU_RST_N) (add_net "/Power Supply/1V2_PGOOD") (add_net "/Power Supply/5V0") (add_net "/Power Supply/5V0_UNFUSED") (add_net "Net-(C55-Pad1)") (add_net "Net-(C56-Pad1)") (add_net "Net-(C57-Pad1)") (add_net "Net-(C58-Pad1)") (add_net "Net-(C59-Pad1)") (add_net "Net-(C60-Pad1)") (add_net "Net-(C61-Pad1)") (add_net "Net-(C62-Pad1)") (add_net "Net-(C63-Pad1)") (add_net "Net-(C64-Pad1)") (add_net "Net-(C65-Pad1)") (add_net "Net-(C66-Pad1)") (add_net "Net-(C67-Pad1)") (add_net "Net-(C68-Pad1)") (add_net "Net-(C69-Pad1)") (add_net "Net-(C70-Pad1)") (add_net "Net-(C71-Pad1)") (add_net "Net-(C72-Pad1)") (add_net "Net-(C73-Pad1)") (add_net "Net-(C74-Pad1)") (add_net "Net-(C85-Pad2)") (add_net "Net-(C86-Pad1)") (add_net "Net-(D1-Pad2)") (add_net "Net-(F1-Pad2)") (add_net "Net-(J2-Pad48)") (add_net "Net-(J2-Pad56)") (add_net "Net-(J2-Pad60)") (add_net "Net-(J3-Pad14)") (add_net "Net-(J3-Pad16)") (add_net "Net-(J4-Pad14)") (add_net "Net-(J4-Pad16)") (add_net "Net-(J5-Pad14)") (add_net "Net-(J5-Pad16)") (add_net "Net-(J6-Pad14)") (add_net "Net-(J6-Pad16)") (add_net "Net-(L11-Pad2)") (add_net "Net-(R11-Pad2)") (add_net "Net-(R12-Pad2)") (add_net "Net-(R13-Pad2)") (add_net "Net-(R14-Pad2)") (add_net "Net-(R15-Pad2)") (add_net "Net-(R16-Pad2)") (add_net "Net-(R17-Pad2)") (add_net "Net-(R18-Pad2)") (add_net "Net-(R2-Pad2)") (add_net "Net-(R21-Pad1)") (add_net "Net-(R22-Pad1)") (add_net "Net-(R26-Pad2)") (add_net "Net-(R27-Pad2)") (add_net "Net-(R28-Pad2)") (add_net "Net-(R29-Pad2)") (add_net "Net-(R3-Pad2)") (add_net "Net-(R30-Pad2)") (add_net "Net-(R31-Pad2)") (add_net "Net-(R32-Pad2)") (add_net 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3.475984) (xy 7.420812 3.508764) (xy 7.390968 3.58351) (xy 7.420812 3.631933) (xy 7.530049 3.700707) (xy 7.682658 3.775677) (xy 7.84066 3.839574) (xy 7.948083 3.871697) (xy 8.055375 3.919626) (xy 8.090876 4.003078)) (layer F.SilkS) (width 0.1)) ) (module w_logo:Logo_silk_polarity_center_5x1.4mm locked (layer F.Cu) (tedit 526ADA31) (tstamp 5DCC2096) (at 27.6 144.9 180) (descr "Polarity logo, positive center, 5x1.4mm") (fp_text reference G*** (at -0.9 0.6) (layer F.SilkS) hide (effects (font (size 0.0889 0.0889) (thickness 0.01778))) ) (fp_text value LOGO (at 1 0.6) (layer F.SilkS) hide (effects (font (size 0.0889 0.0889) (thickness 0.01778))) ) (fp_arc (start 0 0) (end -0.65 0) (angle 90) (layer F.SilkS) (width 0.15)) (fp_arc (start 0 0) (end 0 0.65) (angle 90) (layer F.SilkS) (width 0.15)) (fp_line (start -0.65 0) (end -1.2 0) (layer F.SilkS) (width 0.15)) (fp_circle (center -1.85 0) (end -1.2 0) (layer F.SilkS) (width 0.15)) (fp_circle (center 1.85 0) (end 2.5 0) (layer F.SilkS) (width 0.15)) (fp_line (start 1.2 0) (end 0.3 0) (layer F.SilkS) (width 0.15)) (fp_circle (center 0 0) (end -0.1 0) (layer F.SilkS) (width 0.3)) (fp_circle (center 0 0) (end -0.2 0) (layer F.SilkS) (width 0.3)) (fp_arc (start 0 0) (end -0.55 -0.35) (angle 90) (layer F.SilkS) (width 0.15)) (fp_arc (start 0 0) (end 0.35 0.55) (angle 90) (layer F.SilkS) (width 0.15)) (fp_line (start -2.2 0) (end -1.5 0) (layer F.SilkS) (width 0.15)) (fp_line (start 1.5 0) (end 2.2 0) (layer F.SilkS) (width 0.15)) (fp_line (start 1.85 0.35) (end 1.85 -0.35) (layer F.SilkS) (width 0.15)) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DCC0AAF) (at 44.7 74.5) (path /5DBDC3C0/5EBB13E4) (fp_text reference C89 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:FIDUCIAL_1MM locked (layer B.Cu) (tedit 53D60D63) (tstamp 5DCBDEC4) (at 30 160) (fp_text reference FIDUCIAL_1MM (at 0 -2) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_text value VAL** (at 0.1 -3.5) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad "" smd circle (at 0 0) (size 1 1) (layers B.Cu B.Mask) (solder_mask_margin 1) (clearance 1)) ) (module azonenberg_pcb:FIDUCIAL_1MM locked (layer B.Cu) (tedit 53D60D63) (tstamp 5DCBDE88) (at 126 44) (fp_text reference FIDUCIAL_1MM (at 0 -2) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_text value VAL** (at 0.1 -3.5) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad "" smd circle (at 0 0) (size 1 1) (layers B.Cu B.Mask) (solder_mask_margin 1) (clearance 1)) ) (module azonenberg_pcb:FIDUCIAL_1MM locked (layer B.Cu) (tedit 53D60D63) (tstamp 5DCBDE68) (at 36 40) (fp_text reference FIDUCIAL_1MM (at 0 -2) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_text value VAL** (at 0.1 -3.5) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad "" smd circle (at 0 0) (size 1 1) (layers B.Cu B.Mask) (solder_mask_margin 1) (clearance 1)) ) (module azonenberg_pcb:FIDUCIAL_1MM locked (layer F.Cu) (tedit 53D60D63) (tstamp 5DCBDE4F) (at 30 160) (fp_text reference FIDUCIAL_1MM (at 0 2) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value VAL** (at 0.1 3.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad "" smd circle (at 0 0) (size 1 1) (layers F.Cu F.Mask) (solder_mask_margin 1) (clearance 1)) ) (module azonenberg_pcb:FIDUCIAL_1MM locked (layer F.Cu) (tedit 53D60D63) (tstamp 5DCBDE33) (at 126 44) (fp_text reference FIDUCIAL_1MM (at 0 2) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value VAL** (at 0.1 3.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad "" smd circle (at 0 0) (size 1 1) (layers F.Cu F.Mask) (solder_mask_margin 1) (clearance 1)) ) (module azonenberg_pcb:FIDUCIAL_1MM locked (layer F.Cu) (tedit 53D60D63) (tstamp 5DCBDE0A) (at 36 40) (fp_text reference FIDUCIAL_1MM (at 0 2) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value VAL** (at 0.1 3.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad "" smd circle (at 0 0) (size 1 1) (layers F.Cu F.Mask) (solder_mask_margin 1) (clearance 1)) ) (module azonenberg_pcb:INDUCTOR_YUDEN_NRS5030 (layer F.Cu) (tedit 56A54495) (tstamp 5DC242D5) (at 24.4 136.1) (path /5DF7080A/5E17287D) (fp_text reference L11 (at 0 4.4) (layer F.SilkS) hide (effects (font (size 1.5 1.5) (thickness 0.15))) ) (fp_text value NRS5030T1R0NMGJ (at 0 6.45) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (fp_line (start -3 -3) (end 3 -3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 -3) (end 3 3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 3) (end -3 3) (layer F.SilkS) (width 0.15)) (fp_line (start -3 3) (end -3 -3) (layer F.SilkS) (width 0.15)) (pad 2 smd rect (at 1.8 0) (size 1.5 4) (layers F.Cu F.Paste F.Mask) (net 215 "Net-(L11-Pad2)")) (pad 1 smd rect (at -1.8 0) (size 1.5 4) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_inductors/inductor_smd_6.5x4.8mm.wrl (at (xyz 0 0 0)) (scale (xyz 0.9 0.9 0.9)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 5DC24272) (at 99.75 111.2) (path /5DF7080A/5E205A4A) (fp_text reference J27 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value TESTPAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 5 /3V3)) ) (module azonenberg_pcb:SERIALNUM_MOLEX_0916580020 locked (layer F.Cu) (tedit 5C00E08C) (tstamp 5DCACFCF) (at 34.5 46.25) (fp_text reference REF** (at 0 1.8) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value SERIALNUM_MOLEX_0916580020 (at 0 3.1) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd rect (at 0 0) (size 2.95 1.95) (layers F.Cu F.Paste F.Mask)) ) (module azonenberg_pcb:CONN_SAMTEC_QSH-060-01-L-D-A (layer F.Cu) (tedit 5C384B9A) (tstamp 5DCB0EB3) (at 40 75 180) (path /5DBBCD32) (fp_text reference J2 (at -6.5 0 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value CONN_INTEGRALSTICK_FPGA_HOST (at 0 -21) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user 119 (at -4.8 17.2) (layer F.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_text user 120 (at 4.7 17.2) (layer F.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_text user 62 (at 4.6 2.8) (layer F.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_text user 61 (at -4.6 2.8) (layer F.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_line (start 4 19.753) (end 4 20.753) (layer F.SilkS) (width 0.15)) (fp_line (start 3 20.753) (end 4 19.753) (layer F.SilkS) (width 0.15)) (fp_line (start 4 -20.7) (end 4 -20.7) (layer F.SilkS) (width 0.1)) (fp_line (start 4 -19.7) (end 4 -20.7) (layer F.SilkS) (width 0.15)) (fp_line (start 3 -20.7) (end 4 -19.7) (layer F.SilkS) (width 0.15)) (fp_line (start -4 -20.75) (end 4 -20.75) (layer F.SilkS) (width 0.15)) (fp_line (start 4 20.753) (end -4 20.753) (layer F.SilkS) (width 0.15)) (fp_text user 1 (at -4.765 -17.3) (layer F.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_text user 2 (at 4.815 -17.3) (layer F.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_text user 60 (at 4.615 -2.7) (layer F.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_text user 59 (at -4.565 -2.7) (layer F.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (pad 65 smd rect (at -2.865 3.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 146 /Ethernet/ETH3_TXD1)) (pad 66 smd rect (at 2.865 3.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 149 /Ethernet/ETH3_TX_CLK)) (pad 73 smd rect (at -2.865 5.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 160 /Ethernet/ETH1_RST_N)) (pad 74 smd rect (at 2.865 5.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 203 /Ethernet/ETH3_LED2_N)) (pad 67 smd rect (at -2.865 4.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 145 /Ethernet/ETH3_TXD0)) (pad 68 smd rect (at 2.865 4.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 144 /Ethernet/ETH3_TXD3)) (pad 69 smd rect (at -2.865 4.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 70 smd rect (at 2.865 4.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 120 smd rect (at 2.865 17.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 121 /Ethernet/ETH2_TXD0)) (pad 128 smd rect (at 0 18.068 180) (size 0.64 2.54) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 125 smd rect (at 0 1.938 180) (size 0.64 2.54) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 79 smd rect (at -2.865 7.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 159 /Ethernet/ETH1_MDC)) (pad 80 smd rect (at 2.865 7.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 127 /Ethernet/ETH2_RST_N)) (pad 91 smd rect (at -2.865 10.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 138 /Ethernet/ETH1_RXD2)) (pad 92 smd rect (at 2.865 10.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 154 /Ethernet/ETH2_RXD0)) (pad 93 smd rect (at -2.865 10.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 94 smd rect (at 2.865 10.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 119 smd rect (at -2.865 17.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 167 /Ethernet/ETH1_TXD0)) (pad 127 smd rect (at 0 13.194 180) (size 0.64 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 126 smd rect (at 0 6.844 180) (size 0.64 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 95 smd rect (at -2.865 11.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 158 /Ethernet/ETH1_RXD3)) (pad 96 smd rect (at 2.865 11.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 153 /Ethernet/ETH2_RXD1)) (pad 63 smd rect (at -2.865 3.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) (pad 64 smd rect (at 2.865 3.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) (pad 71 smd rect (at -2.865 5.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 166 /Ethernet/ETH1_RX_CLK)) (pad 72 smd rect (at 2.865 5.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 131 /Ethernet/ETH2_RX_CLK)) (pad 62 smd rect (at 2.865 2.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 150 /Ethernet/ETH3_TX_EN)) (pad 89 smd rect (at -2.865 9.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 133 /Ethernet/ETH1_RXD1)) (pad 90 smd rect (at 2.865 9.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 134 /Ethernet/ETH2_RX_DV)) (pad 75 smd rect (at -2.865 6.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 76 smd rect (at 2.865 6.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 115 smd rect (at -2.865 16.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 165 /Ethernet/ETH1_TXD1)) (pad 116 smd rect (at 2.865 16.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 122 /Ethernet/ETH2_TXD1)) (pad 87 smd rect (at -2.865 9.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 88 smd rect (at 2.865 9.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 111 smd rect (at -2.865 15.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 112 smd rect (at 2.865 15.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 117 smd rect (at -2.865 16.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 118 smd rect (at 2.865 16.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 61 smd rect (at -2.865 2.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 143 /Ethernet/ETH3_TXD2)) (pad 109 smd rect (at -2.865 14.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 139 /LVDS_CLK_P)) (pad 110 smd rect (at 2.865 14.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 148 /Ethernet/ETH2_TXD3)) (pad 107 smd rect (at -2.865 14.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 141 /LVDS_CLK_N)) (pad 108 smd rect (at 2.865 14.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 124 /Ethernet/ETH2_TX_CLK)) (pad 101 smd rect (at -2.865 12.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 161 /Ethernet/ETH1_TX_CLK)) (pad 102 smd rect (at 2.865 12.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 151 /Ethernet/ETH2_RXD3)) (pad 97 smd rect (at -2.865 11.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 162 /Ethernet/ETH1_TX_EN)) (pad 98 smd rect (at 2.865 11.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 152 /Ethernet/ETH2_RXD2)) (pad 77 smd rect (at -2.865 6.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 157 /Ethernet/ETH1_MDIO)) (pad 78 smd rect (at 2.865 6.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 205 /Ethernet/ETH3_LED1_N)) (pad 103 smd rect (at -2.865 13.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 164 /Ethernet/ETH1_TXD3)) (pad 104 smd rect (at 2.865 13.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 125 /Ethernet/ETH2_TX_EN)) (pad 83 smd rect (at -2.865 8.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 120 /Ethernet/ETH1_RX_DV)) (pad 84 smd rect (at 2.865 8.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 126 /Ethernet/ETH2_MDIO)) (pad 81 smd rect (at -2.865 7.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 82 smd rect (at 2.865 7.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 105 smd rect (at -2.865 13.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 106 smd rect (at 2.865 13.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 85 smd rect (at -2.865 8.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 119 /Ethernet/ETH1_RXD0)) (pad 86 smd rect (at 2.865 8.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 135 /Ethernet/ETH2_MDC)) (pad 99 smd rect (at -2.865 12.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 100 smd rect (at 2.865 12.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 113 smd rect (at -2.865 15.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 163 /Ethernet/ETH1_TXD2)) (pad 114 smd rect (at 2.865 15.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 147 /Ethernet/ETH2_TXD2)) (pad "" thru_hole circle (at 2.67 -20.065 180) (size 1.02 1.02) (drill 1.02) (layers *.Cu *.Mask F.SilkS)) (pad 59 smd rect (at -2.865 -2.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 142 /Ethernet/ETH3_RXD3)) (pad 123 smd rect (at 0 -6.809 180) (size 0.64 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 122 smd rect (at 0 -13.159 180) (size 0.64 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 124 smd rect (at 0 -1.935 180) (size 0.64 2.54) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 121 smd rect (at 0 -18.065 180) (size 0.64 2.54) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad "" thru_hole circle (at 2.67 20.065 180) (size 1.02 1.02) (drill 1.02) (layers *.Cu *.Mask F.SilkS)) (pad 60 smd rect (at 2.865 -2.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask)) (pad 57 smd rect (at -2.865 -3.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) (pad 58 smd rect (at 2.865 -3.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) (pad 55 smd rect (at -2.865 -3.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 140 /Ethernet/ETH3_RXD2)) (pad 56 smd rect (at 2.865 -3.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask)) (pad 53 smd rect (at -2.865 -4.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 155 /Ethernet/ETH3_RXD1)) (pad 54 smd rect (at 2.865 -4.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 247 /Ethernet/ETH3_LED1_N_1V8)) (pad 51 smd rect (at -2.865 -4.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) (pad 52 smd rect (at 2.865 -4.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) (pad 49 smd rect (at -2.865 -5.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 156 /Ethernet/ETH3_RXD0)) (pad 50 smd rect (at 2.865 -5.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 246 /Ethernet/ETH3_LED2_N_1V8)) (pad 47 smd rect (at -2.865 -5.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 136 /Ethernet/ETH3_RX_DV)) (pad 48 smd rect (at 2.865 -5.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask)) (pad 45 smd rect (at -2.865 -6.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) (pad 46 smd rect (at 2.865 -6.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) (pad 43 smd rect (at -2.865 -6.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 137 /Ethernet/ETH3_MDC)) (pad 44 smd rect (at 2.865 -6.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 123 /Ethernet/ETH3_RST_N)) (pad 41 smd rect (at -2.865 -7.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 132 /Ethernet/ETH3_RX_CLK)) (pad 42 smd rect (at 2.865 -7.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 128 /Ethernet/ETH3_MDIO)) (pad 39 smd rect (at -2.865 -7.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) (pad 40 smd rect (at 2.865 -7.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) (pad 37 smd rect (at -2.865 -8.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad 38 smd rect (at 2.865 -8.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad 35 smd rect (at -2.865 -8.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 168 /LVDS_DQ1_P)) (pad 36 smd rect (at 2.865 -8.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 169 /LVDS_DQ0_P)) (pad 33 smd rect (at -2.865 -9.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 170 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F.Mask)) (pad 24 smd rect (at 2.865 -11.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 174 /LVDS_DQ4_P)) (pad 21 smd rect (at -2.865 -12.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask)) (pad 22 smd rect (at 2.865 -12.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 175 /LVDS_DQ4_N)) (pad 19 smd rect (at -2.865 -12.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad 20 smd rect (at 2.865 -12.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad 17 smd rect (at -2.865 -13.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask)) (pad 18 smd rect (at 2.865 -13.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 250 /LVDS_DQ6_P)) (pad 15 smd rect (at -2.865 -13.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask)) (pad 16 smd rect (at 2.865 -13.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 251 /LVDS_DQ6_N)) (pad 13 smd rect (at -2.865 -14.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad 14 smd rect (at 2.865 -14.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad 11 smd rect (at -2.865 -14.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 176 /ETH0_LED1_P)) (pad 12 smd rect (at 2.865 -14.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 248 /LVDS_DQ8_P)) (pad 9 smd rect (at -2.865 -15.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 177 /ETH0_LED2_P)) (pad 10 smd rect (at 2.865 -15.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 249 /LVDS_DQ8_N)) (pad 7 smd rect (at -2.865 -15.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad 8 smd rect (at 2.865 -15.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad 5 smd rect (at -2.865 -16.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 32 "/Power Supply/5V0")) (pad 6 smd rect (at 2.865 -16.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 32 "/Power Supply/5V0")) (pad 3 smd rect (at -2.865 -16.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 32 "/Power Supply/5V0")) (pad 4 smd rect (at 2.865 -16.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 32 "/Power Supply/5V0")) (pad 1 smd rect (at -2.865 -17.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 32 "/Power Supply/5V0")) (pad 2 smd rect (at 2.865 -17.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 32 "/Power Supply/5V0")) (model :share:Samtec/QSH-060-01-L-D-A.stp (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz -90 0 90)) ) (model /nfs4/home/azonenberg/code/integralstick/models/integralstick.wrl (offset (xyz 0 0 5)) (scale (xyz 0.3937 0.3937 0.3937)) (rotate (xyz 0 0 180)) ) ) (module w_logo:Logo_silk_ROHS_5x2.8mm locked (layer F.Cu) (tedit 526CD411) (tstamp 5DC7F0E3) (at 128.75 89.75) (descr "ROHS logo, 5x2.8mm") (fp_text reference G*** (at -0.8 -0.4) (layer F.SilkS) hide (effects (font (size 0.0889 0.0889) (thickness 0.01778))) ) (fp_text value LOGO (at 0.5 -0.4) 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0.075)) (fp_line (start 2.16 2.62) (end 2.16 3.08) (layer F.SilkS) (width 0.075)) ) (module azonenberg_pcb:MECHANICAL_CLEARANCEHOLE_4_40 locked (layer F.Cu) (tedit 5AD85C08) (tstamp 5DC4C408) (at 24 160) (fp_text reference REF** (at 0 6.75) (layer F.SilkS) hide (effects (font (size 1.5 1.5) (thickness 0.15))) ) (fp_text value MECHANICAL_CLEARANCEHOLE_4_40 (at 0 5.25) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3.27) (layers *.Cu *.Mask) (solder_mask_margin 0.5)) (model :SAMTEC:4-40-screw.step (offset (xyz 0 0 -6.499999902379794)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:MECHANICAL_CLEARANCEHOLE_4_40 locked (layer F.Cu) (tedit 5AD85C08) (tstamp 5DC4C372) (at 131 40.5) (fp_text reference REF** (at 0 6.75) (layer F.SilkS) hide (effects (font (size 1.5 1.5) (thickness 0.15))) ) (fp_text value MECHANICAL_CLEARANCEHOLE_4_40 (at 0 5.25) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3.27) (layers *.Cu *.Mask) (solder_mask_margin 0.5)) (model :SAMTEC:4-40-screw.step (offset (xyz 0 0 -6.499999902379794)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:MECHANICAL_CLEARANCEHOLE_4_40 locked (layer F.Cu) (tedit 5AD85C08) (tstamp 5DC4C310) (at 30 40.5) (fp_text reference REF** (at 0 6.75) (layer F.SilkS) hide (effects (font (size 1.5 1.5) (thickness 0.15))) ) (fp_text value MECHANICAL_CLEARANCEHOLE_4_40 (at 0 5.25) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3.27) (layers *.Cu *.Mask) (solder_mask_margin 0.5)) (model :SAMTEC:4-40-screw.step (offset (xyz 0 0 -6.499999902379794)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:MECHANICAL_CLEARANCEHOLE_4_40 locked (layer F.Cu) (tedit 5AD85C08) (tstamp 5DC4C25F) (at 131 160) (fp_text reference REF** (at 0 6.75) (layer F.SilkS) hide (effects (font (size 1.5 1.5) (thickness 0.15))) ) (fp_text value MECHANICAL_CLEARANCEHOLE_4_40 (at 0 5.25) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3.27) (layers *.Cu *.Mask) (solder_mask_margin 0.5)) (model :SAMTEC:4-40-screw.step (offset (xyz 0 0 -6.499999902379794)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:QFN_16_0.5MM_3x3MM (layer F.Cu) (tedit 54AFBA37) (tstamp 5DC24558) (at 29.9 136.4) (path /5DF7080A/5E16AEF4) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U7 (at 0 2.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SC185EUL (at 0.25 3.25) (layer F.SilkS) hide (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_line (start -1.75 -1.25) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.25 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 -1.25) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.25) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.25) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (pad PAD smd rect (at -0.25 0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 0.25 0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 0.25 -0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at -0.25 -0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 0 0) (size 1.25 1.25) (layers F.Cu F.Mask) (net 1 /GND)) (pad 13 smd rect (at -1.5 -0.75 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 14 smd rect (at -1.5 -0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 215 "Net-(L11-Pad2)")) (pad 15 smd rect (at -1.5 0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 215 "Net-(L11-Pad2)")) (pad 16 smd rect (at -1.5 0.75 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 215 "Net-(L11-Pad2)")) (pad 1 smd rect (at -0.75 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 32 "/Power Supply/5V0")) (pad 2 smd rect (at -0.25 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 32 "/Power Supply/5V0")) (pad 3 smd rect (at 0.25 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 4 smd rect (at 0.75 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 36 "Net-(C85-Pad2)")) (pad 5 smd rect (at 1.5 0.75 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 32 "/Power Supply/5V0")) (pad 6 smd rect (at 1.5 0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 32 "/Power Supply/5V0")) (pad 7 smd rect (at 1.5 -0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 214 "/Power Supply/1V2_PGOOD")) (pad 8 smd rect (at 1.5 -0.75 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask)) (pad 9 smd rect (at 0.75 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 37 "Net-(C86-Pad1)")) (pad 10 smd rect (at 0.25 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 11 smd rect (at -0.25 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 12 smd rect (at -0.75 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/qfn-16.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:OSCILLATOR_1.6x1.2 (layer F.Cu) (tedit 5BE68696) (tstamp 5DC24536) (at 38.15 127.6) (path /5DBDC3C0/5DD84648) (fp_text reference U6 (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value ECS-1612MV-250-CN-TR (at 0 4.5) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -1 0.8) (end -0.7 0.8) (layer F.SilkS) (width 0.15)) (fp_line (start -1 0.5) (end -1 0.8) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.56 0.375) (size 0.43 0.5) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) (pad 2 smd rect (at 0.6 0.375) (size 0.35 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 3 smd rect (at 0.6 -0.375) (size 0.35 0.5) (layers F.Cu F.Paste F.Mask) (net 245 "Net-(R35-Pad1)")) (pad 4 smd rect (at -0.6 -0.375) (size 0.35 0.5) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) ) (module azonenberg_pcb:QFN_48_0.5MM_7x7MM (layer F.Cu) (tedit 54AFB938) (tstamp 5DC2452C) (at 46 125.5 90) (path /5DBDC3C0/5DD8457A) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U5 (at 0.4 4.75 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value KSZ9031RNX (at 0.4 5.75 90) (layer F.SilkS) hide (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_line (start -3 -3.75) (end -3.75 -3.75) (layer F.SilkS) (width 0.15)) (fp_line (start -3.75 -3.75) (end -3.75 -3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 -3.75) (end 3.75 -3.75) (layer F.SilkS) (width 0.15)) (fp_line (start 3.75 -3.75) (end 3.75 -3) (layer F.SilkS) (width 0.15)) (fp_line (start -3.75 3) (end -3.75 3.75) (layer F.SilkS) (width 0.15)) (fp_line (start -3.75 3.75) (end -3 3.75) (layer F.SilkS) (width 0.15)) (fp_line (start 3.75 3) (end 3.75 3.75) (layer F.SilkS) (width 0.15)) (fp_line (start 3.75 3.75) (end 3 3.75) (layer F.SilkS) (width 0.15)) (fp_line (start -3 -3.75) (end -3.75 -3) (layer F.SilkS) (width 0.15)) (pad PAD smd rect (at 1 1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 0 1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at -1 1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at -1 0 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 0 0 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 1 0 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 1 -1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 0 -1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at -1 -1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 0 0 90) (size 3 3) (layers F.Cu F.Mask) (net 1 /GND)) (pad 25 smd rect (at 3.4 2.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 150 /Ethernet/ETH3_TX_EN)) (pad 26 smd rect (at 3.4 2.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 27 smd rect (at 3.4 1.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 236 "Net-(R26-Pad2)")) (pad 29 smd rect (at 3.4 0.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 28 smd rect (at 3.4 1.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 237 "Net-(R27-Pad2)")) (pad 30 smd rect (at 3.4 0.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 31 smd rect (at 3.4 -0.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 238 "Net-(R28-Pad2)")) (pad 32 smd rect (at 3.4 -0.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 239 "Net-(R29-Pad2)")) (pad 33 smd rect (at 3.4 -1.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 240 "Net-(R30-Pad2)")) (pad 34 smd rect (at 3.4 -1.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) (pad 35 smd rect (at 3.4 -2.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 241 "Net-(R31-Pad2)")) (pad 36 smd rect (at 3.4 -2.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 137 /Ethernet/ETH3_MDC)) (pad 12 smd rect (at -3.4 2.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 10 /Ethernet/ETH3_A2V5)) (pad 11 smd rect (at -3.4 2.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 209 /Ethernet/ETH3_4_P)) (pad 10 smd rect (at -3.4 1.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 208 /Ethernet/ETH3_4_N)) (pad 9 smd rect (at -3.4 1.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 35 /Ethernet/ETH3_A1V2)) (pad 8 smd rect (at -3.4 0.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 213 /Ethernet/ETH3_3_N)) (pad 7 smd rect (at -3.4 0.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 212 /Ethernet/ETH3_3_P)) (pad 6 smd rect (at -3.4 -0.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 211 /Ethernet/ETH3_2_P)) (pad 5 smd rect (at -3.4 -0.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 210 /Ethernet/ETH3_2_N)) (pad 4 smd rect (at -3.4 -1.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 35 /Ethernet/ETH3_A1V2)) (pad 3 smd rect (at -3.4 -1.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 207 /Ethernet/ETH3_1_N)) (pad 2 smd rect (at -3.4 -2.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 206 /Ethernet/ETH3_1_P)) (pad 1 smd rect (at -3.4 -2.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 10 /Ethernet/ETH3_A2V5)) (pad 13 smd rect (at -2.75 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 14 smd rect (at -2.25 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 15 smd rect (at -1.75 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 246 /Ethernet/ETH3_LED2_N_1V8)) (pad 16 smd rect (at -1.25 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) (pad 17 smd rect (at -0.75 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 247 /Ethernet/ETH3_LED1_N_1V8)) (pad 18 smd rect (at -0.25 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 19 smd rect (at 0.25 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 145 /Ethernet/ETH3_TXD0)) (pad 20 smd rect (at 0.75 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 146 /Ethernet/ETH3_TXD1)) (pad 21 smd rect (at 1.25 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 143 /Ethernet/ETH3_TXD2)) (pad 22 smd rect (at 1.75 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 144 /Ethernet/ETH3_TXD3)) (pad 23 smd rect (at 2.25 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 24 smd rect (at 2.75 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 149 /Ethernet/ETH3_TX_CLK)) (pad 37 smd rect (at 2.75 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 128 /Ethernet/ETH3_MDIO)) (pad 38 smd rect (at 2.25 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask)) (pad 39 smd rect (at 1.75 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 40 smd rect (at 1.25 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) (pad 41 smd rect (at 0.75 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 242 "Net-(R32-Pad2)")) (pad 42 smd rect (at 0.25 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 123 /Ethernet/ETH3_RST_N)) (pad 43 smd rect (at -0.25 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask)) (pad 44 smd rect (at -0.75 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 11 /Ethernet/ETH3_A1V2_PLL)) (pad 45 smd rect (at -1.25 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask)) (pad 46 smd rect (at -1.75 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 244 /Ethernet/ETH3_CLK_25MHZ)) (pad 47 smd rect (at -2.25 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 10 /Ethernet/ETH3_A2V5)) (pad 48 smd rect (at -2.75 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 243 "Net-(R33-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/lfcsp-48.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:OSCILLATOR_1.6x1.2 (layer F.Cu) (tedit 5BE68696) (tstamp 5DC244E5) (at 61.2 127.625) (path /5DBDC3C0/5DCCDCAD) (fp_text reference U4 (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value ECS-1612MV-250-CN-TR (at 0 4.5) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -1 0.8) (end -0.7 0.8) (layer F.SilkS) (width 0.15)) (fp_line (start -1 0.5) (end -1 0.8) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.56 0.375) (size 0.43 0.5) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 2 smd rect (at 0.6 0.375) (size 0.35 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 3 smd rect (at 0.6 -0.375) (size 0.35 0.5) (layers F.Cu F.Paste F.Mask) (net 235 "Net-(R22-Pad1)")) (pad 4 smd rect (at -0.6 -0.375) (size 0.35 0.5) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) ) (module azonenberg_pcb:OSCILLATOR_1.6x1.2 (layer F.Cu) (tedit 5BE68696) (tstamp 5DC244DB) (at 84.8 127.6) (path /5DBDC3C0/5DC58B96) (fp_text reference U3 (at -2.1 0) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value ECS-1612MV-250-CN-TR (at 0 4.5) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -1 0.8) (end -0.7 0.8) (layer F.SilkS) (width 0.15)) (fp_line (start -1 0.5) (end -1 0.8) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.56 0.375) (size 0.43 0.5) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 2 smd rect (at 0.6 0.375) (size 0.35 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 3 smd rect (at 0.6 -0.375) (size 0.35 0.5) (layers F.Cu F.Paste F.Mask) (net 233 "Net-(R21-Pad1)")) (pad 4 smd rect (at -0.6 -0.375) (size 0.35 0.5) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) ) (module azonenberg_pcb:QFN_48_0.5MM_7x7MM (layer F.Cu) (tedit 54AFB938) (tstamp 5DCA534A) (at 69 125.5 90) (path /5DBDC3C0/5DCCDBB8) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U2 (at 0.4 4.75 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value KSZ9031RNX (at 0.4 5.75 90) (layer F.SilkS) hide (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_line (start -3 -3.75) (end -3.75 -3.75) (layer F.SilkS) (width 0.15)) (fp_line (start -3.75 -3.75) (end -3.75 -3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 -3.75) (end 3.75 -3.75) (layer F.SilkS) (width 0.15)) (fp_line (start 3.75 -3.75) (end 3.75 -3) (layer F.SilkS) (width 0.15)) (fp_line (start -3.75 3) (end -3.75 3.75) (layer F.SilkS) (width 0.15)) (fp_line (start -3.75 3.75) (end -3 3.75) (layer F.SilkS) (width 0.15)) (fp_line (start 3.75 3) (end 3.75 3.75) (layer F.SilkS) (width 0.15)) (fp_line (start 3.75 3.75) (end 3 3.75) (layer F.SilkS) (width 0.15)) (fp_line (start -3 -3.75) (end -3.75 -3) (layer F.SilkS) (width 0.15)) (pad PAD smd rect (at 1 1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 0 1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at -1 1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at -1 0 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 0 0 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 1 0 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 1 -1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 0 -1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at -1 -1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 0 0 90) (size 3 3) (layers F.Cu F.Mask) (net 1 /GND)) (pad 25 smd rect (at 3.4 2.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 125 /Ethernet/ETH2_TX_EN)) (pad 26 smd rect (at 3.4 2.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 27 smd rect (at 3.4 1.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 224 "Net-(R11-Pad2)")) (pad 29 smd rect (at 3.4 0.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 28 smd rect (at 3.4 1.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 225 "Net-(R12-Pad2)")) (pad 30 smd rect (at 3.4 0.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 31 smd rect (at 3.4 -0.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 226 "Net-(R13-Pad2)")) (pad 32 smd rect (at 3.4 -0.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 227 "Net-(R14-Pad2)")) (pad 33 smd rect (at 3.4 -1.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 228 "Net-(R15-Pad2)")) (pad 34 smd rect (at 3.4 -1.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 35 smd rect (at 3.4 -2.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 229 "Net-(R16-Pad2)")) (pad 36 smd rect (at 3.4 -2.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 135 /Ethernet/ETH2_MDC)) (pad 12 smd rect (at -3.4 2.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 8 /Ethernet/ETH2_A2V5)) (pad 11 smd rect (at -3.4 2.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 197 /Ethernet/ETH2_4_P)) (pad 10 smd rect (at -3.4 1.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 196 /Ethernet/ETH2_4_N)) (pad 9 smd rect (at -3.4 1.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 33 /Ethernet/ETH2_A1V2)) (pad 8 smd rect (at -3.4 0.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 201 /Ethernet/ETH2_3_N)) (pad 7 smd rect (at -3.4 0.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 200 /Ethernet/ETH2_3_P)) (pad 6 smd rect (at -3.4 -0.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 199 /Ethernet/ETH2_2_P)) (pad 5 smd rect (at -3.4 -0.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 198 /Ethernet/ETH2_2_N)) (pad 4 smd rect (at -3.4 -1.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 33 /Ethernet/ETH2_A1V2)) (pad 3 smd rect (at -3.4 -1.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 195 /Ethernet/ETH2_1_N)) (pad 2 smd rect (at -3.4 -2.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 194 /Ethernet/ETH2_1_P)) (pad 1 smd rect (at -3.4 -2.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 8 /Ethernet/ETH2_A2V5)) (pad 13 smd rect (at -2.75 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 14 smd rect (at -2.25 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 15 smd rect (at -1.75 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 191 /Ethernet/ETH2_LED2_N)) (pad 16 smd rect (at -1.25 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 17 smd rect (at -0.75 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 193 /Ethernet/ETH2_LED1_N)) (pad 18 smd rect (at -0.25 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 19 smd rect (at 0.25 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 121 /Ethernet/ETH2_TXD0)) (pad 20 smd rect (at 0.75 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 122 /Ethernet/ETH2_TXD1)) (pad 21 smd rect (at 1.25 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 147 /Ethernet/ETH2_TXD2)) (pad 22 smd rect (at 1.75 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 148 /Ethernet/ETH2_TXD3)) (pad 23 smd rect (at 2.25 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 24 smd rect (at 2.75 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 124 /Ethernet/ETH2_TX_CLK)) (pad 37 smd rect (at 2.75 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 126 /Ethernet/ETH2_MDIO)) (pad 38 smd rect (at 2.25 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask)) (pad 39 smd rect (at 1.75 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 40 smd rect (at 1.25 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 41 smd rect (at 0.75 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 230 "Net-(R17-Pad2)")) (pad 42 smd rect (at 0.25 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 127 /Ethernet/ETH2_RST_N)) (pad 43 smd rect (at -0.25 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask)) (pad 44 smd rect (at -0.75 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 9 /Ethernet/ETH2_A1V2_PLL)) (pad 45 smd rect (at -1.25 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask)) (pad 46 smd rect (at -1.75 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 234 /Ethernet/ETH2_CLK_25MHZ)) (pad 47 smd rect (at -2.25 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 8 /Ethernet/ETH2_A2V5)) (pad 48 smd rect (at -2.75 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 231 "Net-(R18-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/lfcsp-48.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:QFN_48_0.5MM_7x7MM (layer F.Cu) (tedit 54AFB938) (tstamp 5DC2448A) (at 92 125.5 90) (path /5DBDC3C0/5DC07F29) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U1 (at -3.6 4.85 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value KSZ9031RNX (at 0.4 5.75 90) (layer F.SilkS) hide (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_line (start -3 -3.75) (end -3.75 -3.75) (layer F.SilkS) (width 0.15)) (fp_line (start -3.75 -3.75) (end -3.75 -3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 -3.75) (end 3.75 -3.75) (layer F.SilkS) (width 0.15)) (fp_line (start 3.75 -3.75) (end 3.75 -3) (layer F.SilkS) (width 0.15)) (fp_line (start -3.75 3) (end -3.75 3.75) (layer F.SilkS) (width 0.15)) (fp_line (start -3.75 3.75) (end -3 3.75) (layer F.SilkS) (width 0.15)) (fp_line (start 3.75 3) (end 3.75 3.75) (layer F.SilkS) (width 0.15)) (fp_line (start 3.75 3.75) (end 3 3.75) (layer F.SilkS) (width 0.15)) (fp_line (start -3 -3.75) (end -3.75 -3) (layer F.SilkS) (width 0.15)) (pad PAD smd rect (at 1 1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 0 1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at -1 1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at -1 0 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 0 0 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 1 0 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 1 -1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 0 -1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at -1 -1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 1 /GND)) (pad PAD smd rect (at 0 0 90) (size 3 3) (layers F.Cu F.Mask) (net 1 /GND)) (pad 25 smd rect (at 3.4 2.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 162 /Ethernet/ETH1_TX_EN)) (pad 26 smd rect (at 3.4 2.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 27 smd rect (at 3.4 1.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 216 "Net-(R2-Pad2)")) (pad 29 smd rect (at 3.4 0.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 28 smd rect (at 3.4 1.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 217 "Net-(R3-Pad2)")) (pad 30 smd rect (at 3.4 0.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 31 smd rect (at 3.4 -0.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 218 "Net-(R4-Pad2)")) (pad 32 smd rect (at 3.4 -0.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 219 "Net-(R5-Pad2)")) (pad 33 smd rect (at 3.4 -1.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 220 "Net-(R6-Pad2)")) (pad 34 smd rect (at 3.4 -1.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 35 smd rect (at 3.4 -2.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 221 "Net-(R7-Pad2)")) (pad 36 smd rect (at 3.4 -2.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 159 /Ethernet/ETH1_MDC)) (pad 12 smd rect (at -3.4 2.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 6 /Ethernet/ETH1_A2V5)) (pad 11 smd rect (at -3.4 2.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 185 /Ethernet/ETH1_4_P)) (pad 10 smd rect (at -3.4 1.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 184 /Ethernet/ETH1_4_N)) (pad 9 smd rect (at -3.4 1.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 34 /Ethernet/ETH1_A1V2)) (pad 8 smd rect (at -3.4 0.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 189 /Ethernet/ETH1_3_N)) (pad 7 smd rect (at -3.4 0.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 188 /Ethernet/ETH1_3_P)) (pad 6 smd rect (at -3.4 -0.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 187 /Ethernet/ETH1_2_P)) (pad 5 smd rect (at -3.4 -0.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 186 /Ethernet/ETH1_2_N)) (pad 4 smd rect (at -3.4 -1.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 34 /Ethernet/ETH1_A1V2)) (pad 3 smd rect (at -3.4 -1.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 183 /Ethernet/ETH1_1_N)) (pad 2 smd rect (at -3.4 -2.25 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 182 /Ethernet/ETH1_1_P)) (pad 1 smd rect (at -3.4 -2.75 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 6 /Ethernet/ETH1_A2V5)) (pad 13 smd rect (at -2.75 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 14 smd rect (at -2.25 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 15 smd rect (at -1.75 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 130 /Ethernet/ETH1_LED2_N)) (pad 16 smd rect (at -1.25 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 17 smd rect (at -0.75 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 129 /Ethernet/ETH1_LED1_N)) (pad 18 smd rect (at -0.25 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 19 smd rect (at 0.25 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 167 /Ethernet/ETH1_TXD0)) (pad 20 smd rect (at 0.75 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 165 /Ethernet/ETH1_TXD1)) (pad 21 smd rect (at 1.25 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 163 /Ethernet/ETH1_TXD2)) (pad 22 smd rect (at 1.75 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 164 /Ethernet/ETH1_TXD3)) (pad 23 smd rect (at 2.25 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 24 smd rect (at 2.75 3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 161 /Ethernet/ETH1_TX_CLK)) (pad 37 smd rect (at 2.75 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 157 /Ethernet/ETH1_MDIO)) (pad 38 smd rect (at 2.25 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask)) (pad 39 smd rect (at 1.75 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 40 smd rect (at 1.25 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 41 smd rect (at 0.75 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 222 "Net-(R8-Pad2)")) (pad 42 smd rect (at 0.25 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 160 /Ethernet/ETH1_RST_N)) (pad 43 smd rect (at -0.25 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask)) (pad 44 smd rect (at -0.75 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 7 /Ethernet/ETH1_A1V2_PLL)) (pad 45 smd rect (at -1.25 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask)) (pad 46 smd rect (at -1.75 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 232 /Ethernet/ETH1_CLK_25MHZ)) (pad 47 smd rect (at -2.25 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 6 /Ethernet/ETH1_A2V5)) (pad 48 smd rect (at -2.75 -3.4 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 223 "Net-(R9-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/lfcsp-48.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:SWITCH_RAFI_MICON_5 (layer F.Cu) (tedit 590FD624) (tstamp 5DC24443) (at 24 63 90) (path /5E09DAEF) (fp_text reference SW3 (at 0 5.25 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SW_SPST (at 0 7.5 90) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (fp_line (start 2 4) (end -2 4) (layer F.SilkS) (width 0.1)) (fp_line (start 2 -4) (end 2 4) (layer F.SilkS) (width 0.1)) (fp_line (start -2 -4) (end 2 -4) (layer F.SilkS) (width 0.1)) (fp_line (start -2 -4) (end -2 4) (layer F.SilkS) (width 0.1)) (pad 1 smd rect (at 1.27 2.9 90) (size 0.55 1.6) (layers F.Cu F.Paste F.Mask) (net 77 /MCU_RST_N)) (pad 2 smd rect (at 0 2.9 90) (size 0.55 1.6) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -1.27 2.9 90) (size 0.55 1.6) (layers F.Cu F.Paste F.Mask) (net 77 /MCU_RST_N)) (pad 1 smd rect (at 1.27 -2.9 90) (size 0.55 1.6) (layers F.Cu F.Paste F.Mask) (net 77 /MCU_RST_N)) (pad 2 smd rect (at 0 -2.9 90) (size 0.55 1.6) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -1.27 -2.9 90) (size 0.55 1.6) (layers F.Cu F.Paste F.Mask) (net 77 /MCU_RST_N)) ) (module azonenberg_pcb:SWITCH_RAFI_MICON_5 (layer F.Cu) (tedit 590FD624) (tstamp 5DC24435) (at 128.5 67 270) (path /5E09CB1A) (fp_text reference SW2 (at 0 5.25 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SW_SPST (at 0 7.5 90) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (fp_line (start 2 4) (end -2 4) (layer F.SilkS) (width 0.1)) (fp_line (start 2 -4) (end 2 4) (layer F.SilkS) (width 0.1)) (fp_line (start -2 -4) (end 2 -4) (layer F.SilkS) (width 0.1)) (fp_line (start -2 -4) (end -2 4) (layer F.SilkS) (width 0.1)) (pad 1 smd rect (at 1.27 2.9 270) (size 0.55 1.6) (layers F.Cu F.Paste F.Mask) (net 57 /FPGA_RST_N)) (pad 2 smd rect (at 0 2.9 270) (size 0.55 1.6) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -1.27 2.9 270) (size 0.55 1.6) (layers F.Cu F.Paste F.Mask) (net 57 /FPGA_RST_N)) (pad 1 smd rect (at 1.27 -2.9 270) (size 0.55 1.6) (layers F.Cu F.Paste F.Mask) (net 57 /FPGA_RST_N)) (pad 2 smd rect (at 0 -2.9 270) (size 0.55 1.6) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -1.27 -2.9 270) (size 0.55 1.6) (layers F.Cu F.Paste F.Mask) (net 57 /FPGA_RST_N)) ) (module azonenberg_pcb:SWITCH_RAFI_MICON_5 (layer F.Cu) (tedit 590FD624) (tstamp 5DC24427) (at 24 75 270) (path /5E08C249) (fp_text reference SW1 (at 0 5.25 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SW_SPST (at 0 7.5 90) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (fp_line (start 2 4) (end -2 4) (layer F.SilkS) (width 0.1)) (fp_line (start 2 -4) (end 2 4) (layer F.SilkS) (width 0.1)) (fp_line (start -2 -4) (end 2 -4) (layer F.SilkS) (width 0.1)) (fp_line (start -2 -4) (end -2 4) (layer F.SilkS) (width 0.1)) (pad 1 smd rect (at 1.27 2.9 270) (size 0.55 1.6) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 2 smd rect (at 0 2.9 270) (size 0.55 1.6) (layers F.Cu F.Paste F.Mask) (net 68 /MCU_BOOT0)) (pad 1 smd rect (at -1.27 2.9 270) (size 0.55 1.6) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 1 smd rect (at 1.27 -2.9 270) (size 0.55 1.6) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 2 smd rect (at 0 -2.9 270) (size 0.55 1.6) (layers F.Cu F.Paste F.Mask) (net 68 /MCU_BOOT0)) (pad 1 smd rect (at -1.27 -2.9 270) (size 0.55 1.6) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 5C85B125) (tstamp 5DC24419) (at 30.8 138.65) (path /5DF7080A/5E198AEC) (fp_text reference R54 (at 0 -1.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 1 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 36 "Net-(C85-Pad2)")) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 32 "/Power Supply/5V0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC24413) (at 33.5 136.15 180) (path /5DF7080A/5E1CC81F) (fp_text reference R53 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 10K (at 0 3.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 214 "/Power Supply/1V2_PGOOD")) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 32 "/Power Supply/5V0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC2440D) (at 106.3 44.4 90) (path /5E09F499) (fp_text reference R52 (at 0.1 1 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 270 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 38 "Net-(D1-Pad2)")) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 45 /FPGA_DONE)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 5C85B125) (tstamp 5DC24407) (at 24.75 63 270) (path /5E09DAE3) (fp_text reference R51 (at 0 1.2 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value DNP (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 77 /MCU_RST_N)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 5 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 5C85B125) (tstamp 5DC24401) (at 126.3 69) (path /5E09C4B3) (fp_text reference R50 (at 1.95 0) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value DNP (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 57 /FPGA_RST_N)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 5 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 5C85B125) (tstamp 5DC243FB) (at 23.45 75.5 270) (path /5E09A8BA) (fp_text reference R49 (at 0 -1.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value DNP (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 68 /MCU_BOOT0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 5C85B125) (tstamp 5DC243F5) (at 57 156.7 90) (path /5DBDC3C0/5DD4D135) (fp_text reference R48 (at 0 -1.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 1M (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 31 "Net-(C74-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 5C85B125) (tstamp 5DC243EF) (at 78.8 156.65 90) (path /5DBDC3C0/5DCCDBAA) (fp_text reference R47 (at 0 -1.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 1M (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 30 "Net-(C73-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 5C85B125) (tstamp 5DC243E9) (at 101.85 156.7 90) (path /5DBDC3C0/5DC02791) (fp_text reference R46 (at -2.3 0 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 1M (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 29 "Net-(C72-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 5C85B125) (tstamp 5DC243E3) (at 124.9 156.7 90) (path /5DBDC3C0/5DBF3353) (fp_text reference R45 (at -2 0 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 1M (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 28 "Net-(C71-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 5C85B125) (tstamp 5DC243DD) (at 38.15 133.65 180) (path /5DBDC3C0/5DD4D0E2) (fp_text reference R44 (at 0 -1.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 270 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 5 /3V3)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 202 "Net-(J6-Pad16)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 5C85B125) (tstamp 5DC243D7) (at 49.55 131.9 90) (path /5DBDC3C0/5DD4D0D8) (fp_text reference R43 (at 0 -1.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 270 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 5 /3V3)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 204 "Net-(J6-Pad14)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 5C85B125) (tstamp 5DC243D1) (at 61.65 133.2 90) (path /5DBDC3C0/5DCCDB57) (fp_text reference R42 (at 0 -1.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 270 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 5 /3V3)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 190 "Net-(J5-Pad16)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 5C85B125) (tstamp 5DC243CB) (at 73.6 134.9) (path /5DBDC3C0/5DCCDB4D) (fp_text reference R41 (at 0 -1.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 270 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 5 /3V3)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 192 "Net-(J5-Pad14)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 5C85B125) (tstamp 5DC243C5) (at 84.5 133.15 90) (path /5DBDC3C0/5DC0273C) (fp_text reference R40 (at 0 -0.95 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 270 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 5 /3V3)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 180 "Net-(J4-Pad16)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 5C85B125) (tstamp 5DC243BF) (at 97.4 134.9) (path /5DBDC3C0/5DC02730) (fp_text reference R39 (at 2.35 0) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 270 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 5 /3V3)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 181 "Net-(J4-Pad14)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 5C85B125) (tstamp 5DC243B9) (at 108.9 131.9 90) (path /5DBDC3C0/5DBE89BC) (fp_text reference R38 (at 0 -0.95 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 270 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 177 /ETH0_LED2_P)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 178 "Net-(J3-Pad16)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 5C85B125) (tstamp 5DC243B3) (at 118.55 131.85 90) (path /5DBDC3C0/5DBE7BE6) (fp_text reference R37 (at -0.05 -0.95 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 270 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 176 /ETH0_LED1_P)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 179 "Net-(J3-Pad14)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC243AD) (at 42.15 120.4 270) (path /5DBDC3C0/5DD84612) (fp_text reference R36 (at 0 1.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 1K (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 128 /Ethernet/ETH3_MDIO)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC243A7) (at 40.65 127.25) (path /5DBDC3C0/5DD8463D) (fp_text reference R35 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 244 /Ethernet/ETH3_CLK_25MHZ)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 245 "Net-(R35-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC243A1) (at 51.75 126.25 180) (path /5DBDC3C0/5DD845AE) (fp_text reference R34 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 1K (at 0 3.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 247 /Ethernet/ETH3_LED1_N_1V8)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC2439B) (at 40.65 128.25) (path /5DBDC3C0/5DD8462F) (fp_text reference R33 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "12.1K 1%" (at 0 3.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 243 "Net-(R33-Pad2)")) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC24395) (at 40.75 124.75) (path /5DBDC3C0/5DD84620) (fp_text reference R32 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 10K (at 0 3.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 242 "Net-(R32-Pad2)")) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC2438F) (at 43.75 120.4 270) (path /5DBDC3C0/5DD84604) (fp_text reference R31 (at 0 1.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 241 "Net-(R31-Pad2)")) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 132 /Ethernet/ETH3_RX_CLK)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC24389) (at 44.75 120.400001 270) (path /5DBDC3C0/5DD845F8) (fp_text reference R30 (at 0 1.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 240 "Net-(R30-Pad2)")) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 136 /Ethernet/ETH3_RX_DV)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC24383) (at 45.25 118.6 270) (path /5DBDC3C0/5DD845EC) (fp_text reference R29 (at 0 1.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 239 "Net-(R29-Pad2)")) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 156 /Ethernet/ETH3_RXD0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC2437D) (at 45.75 120.399999 270) (path /5DBDC3C0/5DD845E0) (fp_text reference R28 (at 0 1.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 238 "Net-(R28-Pad2)")) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 155 /Ethernet/ETH3_RXD1)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC24377) (at 47.25 118.6 270) (path /5DBDC3C0/5DD845D4) (fp_text reference R27 (at 0 1.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 237 "Net-(R27-Pad2)")) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 140 /Ethernet/ETH3_RXD2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC24371) (at 47.75 120.45 270) (path /5DBDC3C0/5DD845C8) (fp_text reference R26 (at 0 1.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 236 "Net-(R26-Pad2)")) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 142 /Ethernet/ETH3_RXD3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC2436B) (at 51.75 127.25 180) (path /5DBDC3C0/5DD845A3) (fp_text reference R25 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 1K (at 0 3.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 246 /Ethernet/ETH3_LED2_N_1V8)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC24365) (at 65.2 120.45 270) (path /5DBDC3C0/5DCCDC6B) (fp_text reference R24 (at 0 1.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 1K (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 126 /Ethernet/ETH2_MDIO)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC2435F) (at 88.15 120.3 270) (path /5DBDC3C0/5DC3F30F) (fp_text reference R23 (at -2.6 -0.05 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 1K (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 157 /Ethernet/ETH1_MDIO)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC24359) (at 63.85 127.25) (path /5DBDC3C0/5DCCDCA2) (fp_text reference R22 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 234 /Ethernet/ETH2_CLK_25MHZ)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 235 "Net-(R22-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC24353) (at 86.9 127.25) (path /5DBDC3C0/5DC562FA) (fp_text reference R21 (at 0 -0.95) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 232 /Ethernet/ETH1_CLK_25MHZ)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 233 "Net-(R21-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 5C85B125) (tstamp 5DC2434D) (at 75.1 131.75 270) (path /5DBDC3C0/5DCCDBF9) (fp_text reference R20 (at 0 -1.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 1K (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 193 /Ethernet/ETH2_LED1_N)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC24347) (at 97.65 126.25 180) (path /5DBDC3C0/5DC1C40C) (fp_text reference R19 (at -2.7 0) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 1K (at 0 3.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 129 /Ethernet/ETH1_LED1_N)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC24341) (at 63.85 128.25) (path /5DBDC3C0/5DCCDC94) (fp_text reference R18 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "12.1K 1%" (at 0 3.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 231 "Net-(R18-Pad2)")) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC2433B) (at 63.85 124.75) (path /5DBDC3C0/5DCCDC79) (fp_text reference R17 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 10K (at 0 3.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 230 "Net-(R17-Pad2)")) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC24335) (at 66.75 120.45 270) (path /5DBDC3C0/5DCCDC5D) (fp_text reference R16 (at 0 1.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 229 "Net-(R16-Pad2)")) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 131 /Ethernet/ETH2_RX_CLK)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC2432F) (at 67.75 120.45 270) (path /5DBDC3C0/5DCCDC51) (fp_text reference R15 (at 0 1.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 228 "Net-(R15-Pad2)")) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 134 /Ethernet/ETH2_RX_DV)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC24329) (at 68.25 118.6 270) (path /5DBDC3C0/5DCCDC45) (fp_text reference R14 (at 0 1.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 227 "Net-(R14-Pad2)")) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 154 /Ethernet/ETH2_RXD0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC24323) (at 68.75 120.45 270) (path /5DBDC3C0/5DCCDC39) (fp_text reference R13 (at 0 1.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 226 "Net-(R13-Pad2)")) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 153 /Ethernet/ETH2_RXD1)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC2431D) (at 70.25 120.45 270) (path /5DBDC3C0/5DCCDC2D) (fp_text reference R12 (at 0 1.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 225 "Net-(R12-Pad2)")) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 152 /Ethernet/ETH2_RXD2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC24317) (at 70.75 118.6 270) (path /5DBDC3C0/5DCCDC21) (fp_text reference R11 (at 0 1.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 224 "Net-(R11-Pad2)")) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 151 /Ethernet/ETH2_RXD3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 5C85B125) (tstamp 5DC24311) (at 65.45 131.75 270) (path /5DBDC3C0/5DCCDBEE) (fp_text reference R10 (at 0 -1.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value 1K (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 191 /Ethernet/ETH2_LED2_N)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC2430B) (at 86.9 128.25) (path /5DBDC3C0/5DC51C19) (fp_text reference R9 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "12.1K 1%" (at 0 3.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 223 "Net-(R9-Pad2)")) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC24305) (at 86.9 124.75) (path /5DBDC3C0/5DC443F1) (fp_text reference R8 (at -2.1 0) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 10K (at 0 3.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 222 "Net-(R8-Pad2)")) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC242FF) (at 89.75 120.4 270) (path /5DBDC3C0/5DC3A339) (fp_text reference R7 (at -3.55 0 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 221 "Net-(R7-Pad2)")) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 166 /Ethernet/ETH1_RX_CLK)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC242F9) (at 90.75 120.4 270) (path /5DBDC3C0/5DC38EB6) (fp_text reference R6 (at -3.55 0 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 220 "Net-(R6-Pad2)")) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 120 /Ethernet/ETH1_RX_DV)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC242F3) (at 91.25 118.5 270) (path /5DBDC3C0/5DC37060) (fp_text reference R5 (at -3.15 0 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 219 "Net-(R5-Pad2)")) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 119 /Ethernet/ETH1_RXD0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC242ED) (at 91.75 120.4 270) (path /5DBDC3C0/5DC37054) (fp_text reference R4 (at -3.55 0 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 218 "Net-(R4-Pad2)")) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 133 /Ethernet/ETH1_RXD1)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC242E7) (at 93.25 120.4 270) (path /5DBDC3C0/5DC35CD2) (fp_text reference R3 (at -3.55 0 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 217 "Net-(R3-Pad2)")) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 138 /Ethernet/ETH1_RXD2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC242E1) (at 93.75 118.5 270) (path /5DBDC3C0/5DC33955) (fp_text reference R2 (at -3.15 0 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 216 "Net-(R2-Pad2)")) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 158 /Ethernet/ETH1_RXD3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 5C85B125) (tstamp 5DC242DB) (at 97.65 127.25 180) (path /5DBDC3C0/5DC1AC73) (fp_text reference R1 (at -2.35 0) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 1K (at 0 3.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 130 /Ethernet/ETH1_LED2_N)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC242CF) (at 41.6 131.45 180) (path /5DBDC3C0/5E114C5E) (fp_text reference L10 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "600R @ 100 MHz" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 35 /Ethernet/ETH3_A1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC242C9) (at 87.3 131.25 180) (path /5DBDC3C0/5E1471CC) (fp_text reference L9 (at 0.05 1.4) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "600R @ 100 MHz" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 34 /Ethernet/ETH1_A1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC242C3) (at 73.2 130.1) (path /5DBDC3C0/5E0CE2B2) (fp_text reference L8 (at 0.05 1.4) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "600R @ 100 MHz" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 33 /Ethernet/ETH2_A1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 5DC242BD) (at 35.5 143.4 270) (path /5DF7080A/5DFBDA0D) (fp_text reference L7 (at 0.2 2.1 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value BLM31KN271SH1L (at 0 3.7 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 39 "Net-(F1-Pad2)")) (pad 1 smd rect (at -1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 32 "/Power Supply/5V0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC242B7) (at 43.8 124.9) (path /5DBDC3C0/5DD846CE) (fp_text reference L6 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "600R @ 100 MHz" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 11 /Ethernet/ETH3_A1V2_PLL)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC242B1) (at 51.35 129.5) (path /5DBDC3C0/5DD84667) (fp_text reference L5 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "600R @ 100 MHz" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 /2V5)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 10 /Ethernet/ETH3_A2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC242AB) (at 64.9 126.05 180) (path /5DBDC3C0/5DCCDD36) (fp_text reference L4 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "600R @ 100 MHz" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 9 /Ethernet/ETH2_A1V2_PLL)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC242A5) (at 63.05 130 270) (path /5DBDC3C0/5DCCDCCD) (fp_text reference L3 (at 0.05 1.4 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "600R @ 100 MHz" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 8 /Ethernet/ETH2_A2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC2429F) (at 84.6 124.8 90) (path /5DBDC3C0/5DCB08C0) (fp_text reference L2 (at 0.05 1.4 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "600R @ 100 MHz" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 7 /Ethernet/ETH1_A1V2_PLL)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC24299) (at 98.35 131.25) (path /5DBDC3C0/5DC76753) (fp_text reference L1 (at -1.45 0.05) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "600R @ 100 MHz" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 6 /Ethernet/ETH1_A2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:CONN_CUI_PJ-058BH_HIPWR_BARREL_NOSLOT (layer F.Cu) (tedit 53E980CB) (tstamp 5DC24293) (at 27 150.5) (path /5DF7080A/5DFB2206) (fp_text reference K1 (at 8.5 -5.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value CONN_3_PWROUT (at -5.5 5.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -8 4.5) (end -8 -4.5) (layer F.SilkS) (width 0.2)) (fp_line (start -8 -4.5) (end 6.5 -4.5) (layer F.SilkS) (width 0.2)) (fp_line (start -8 4.5) (end 6.5 4.5) (layer F.SilkS) (width 0.2)) (fp_line (start 6.5 -4.5) (end 6.5 -2.5) (layer F.SilkS) (width 0.2)) (fp_line (start 6.5 2.5) (end 6.5 4.5) (layer F.SilkS) (width 0.2)) (pad 3 thru_hole circle (at 3.5 4.7) (size 3.5 3.5) (drill 3) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 1 thru_hole circle (at 6.5 0) (size 4 4) (drill 3.5) (layers *.Cu *.Mask F.SilkS) (net 40 "/Power Supply/5V0_UNFUSED")) (pad 2 thru_hole circle (at 0.5 0) (size 3.5 3.5) (drill 3) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad "" thru_hole circle (at -4 0) (size 3 3) (drill 2.2) (layers *.Cu *.Mask F.SilkS)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/conn_misc/dc_socket.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:TESTPOINT_SMT_KEYSTONE_5016 (layer F.Cu) (tedit 53C619BB) (tstamp 5DC24286) (at 80.5 126.5 90) (path /5DF7080A/5E287B2B) (fp_text reference J31 (at 0 3 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value TESTCLIP (at 0 4.6 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd rect (at 0 0 90) (size 4.7 3.43) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) ) (module azonenberg_pcb:TESTPOINT_SMT_KEYSTONE_5016 (layer F.Cu) (tedit 53C619BB) (tstamp 5DC24281) (at 59.5 122 90) (path /5DF7080A/5E281900) (fp_text reference J30 (at 0 3 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value TESTCLIP (at 0 4.6 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd rect (at 0 0 90) (size 4.7 3.43) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) ) (module azonenberg_pcb:TESTPOINT_SMT_KEYSTONE_5016 (layer F.Cu) (tedit 53C619BB) (tstamp 5DC2427C) (at 103.5 126.5 90) (path /5DF7080A/5E211E99) (fp_text reference J29 (at 0 3 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value TESTCLIP (at 0 4.6 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd rect (at 0 0 90) (size 4.7 3.43) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 5DC24277) (at 35.5 138.5) (path /5DF7080A/5E20BBB7) (fp_text reference J28 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value TESTPAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 32 "/Power Supply/5V0")) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 5DC2426D) (at 100.4 113.2) (path /5DF7080A/5E1FF834) (fp_text reference J26 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value TESTPAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 2 /2V5)) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 5DC24268) (at 42.15 118.45) (path /5DF7080A/5E1F95F7) (fp_text reference J25 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value TESTPAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 3 /1V8)) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 5DC24263) (at 77.25 130) (path /5DF7080A/5E1F8CEF) (fp_text reference J24 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value TESTPAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 4 /1V2)) ) (module azonenberg_pcb:CONN_HEADER_2.54MM_2x6_RA_PMOD_HOST (layer F.Cu) (tedit 5C397C94) (tstamp 5DC2425E) (at 27 119 270) (path /5E1F1FA5) (fp_text reference J23 (at 9 4 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PMOD_HOST (at -1.27 -3.81 90) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (fp_line (start 6.9 -2.7) (end 7.904987 -1.695013) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 -2.73) (end -7.92 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 -2.73) (end -7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 4.5) (end 7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 4.5) (end 7.84 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 3.27) (end 7.84 3.27) (layer F.SilkS) (width 0.15)) (pad 6 thru_hole circle (at -6.35 -1.27 270) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 5 thru_hole circle (at -3.81 -1.27 270) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 11 thru_hole circle (at -3.81 1.27 270) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 12 thru_hole circle (at -6.35 1.27 270) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 9 thru_hole circle (at 1.27 1.27 270) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 173 /LVDS_DQ2_N)) (pad 8 thru_hole circle (at 3.81 1.27 270) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 250 /LVDS_DQ6_P)) (pad 7 thru_hole circle (at 6.35 1.27 270) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 251 /LVDS_DQ6_N)) (pad 1 thru_hole circle (at 6.35 -1.27 270) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 249 /LVDS_DQ8_N)) (pad 2 thru_hole circle (at 3.81 -1.27 270) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 248 /LVDS_DQ8_P)) (pad 3 thru_hole circle (at 1.27 -1.27 270) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 175 /LVDS_DQ4_N)) (pad 10 thru_hole circle (at -1.27 1.27 270) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 172 /LVDS_DQ2_P)) (pad 4 thru_hole circle (at -1.27 -1.27 270) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 174 /LVDS_DQ4_P)) (model :walter:pin_strip/pin_socket_6x2-90.wrl (offset (xyz 0 -5 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 5DC24248) (at 33 135.3) (path /5DF7080A/5E1CC0BB) (fp_text reference J22 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value TESTPAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 214 "/Power Supply/1V2_PGOOD")) ) (module azonenberg_pcb:CONN_SMA_EDGE_SAMTEC_SMA_J_P_H_ST_EM1 (layer F.Cu) (tedit 59D72019) (tstamp 5DC24243) (at 19 69 270) (path /5E0AFD49) (fp_text reference J21 (at 3 -6 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SMA (at 0 1.6 90) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (pad 2 smd rect (at -2.825 -2.35 270) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 2 smd rect (at 2.825 -2.35 270) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at 0 -2.1 270) (size 1.27 4.2) (layers F.Cu F.Paste F.Mask) (net 169 /LVDS_DQ0_P)) (model :SAMTEC:SMA-J-P-H-ST-EM1.stp (offset (xyz 0 -1.49999997747226 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 -90 180)) ) ) (module azonenberg_pcb:CONN_SMA_EDGE_SAMTEC_SMA_J_P_H_ST_EM1 (layer F.Cu) (tedit 59D72019) (tstamp 5DC2423C) (at 19 81 270) (path /5E0AFD3C) (fp_text reference J20 (at 3 -6 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SMA (at 0 1.6 90) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (pad 2 smd rect (at -2.825 -2.35 270) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 2 smd rect (at 2.825 -2.35 270) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at 0 -2.1 270) (size 1.27 4.2) (layers F.Cu F.Paste F.Mask) (net 171 /LVDS_DQ0_N)) (model :SAMTEC:SMA-J-P-H-ST-EM1.stp (offset (xyz 0 -1.49999997747226 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 -90 180)) ) ) (module azonenberg_pcb:CONN_SMA_EDGE_SAMTEC_SMA_J_P_H_ST_EM1 (layer F.Cu) (tedit 59D72019) (tstamp 5DC24235) (at 19 93 270) (path /5E0AF274) (fp_text reference J19 (at 3 -6 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SMA (at 0 1.6 90) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (pad 2 smd rect (at -2.825 -2.35 270) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 2 smd rect (at 2.825 -2.35 270) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at 0 -2.1 270) (size 1.27 4.2) (layers F.Cu F.Paste F.Mask) (net 168 /LVDS_DQ1_P)) (model :SAMTEC:SMA-J-P-H-ST-EM1.stp (offset (xyz 0 -1.49999997747226 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 -90 180)) ) ) (module azonenberg_pcb:CONN_SMA_EDGE_SAMTEC_SMA_J_P_H_ST_EM1 (layer F.Cu) (tedit 59D72019) (tstamp 5DC2422E) (at 19 105 270) (path /5E0AF267) (fp_text reference J18 (at 3 -6 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SMA (at 0 1.6 90) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (pad 2 smd rect (at -2.825 -2.35 270) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 2 smd rect (at 2.825 -2.35 270) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at 0 -2.1 270) (size 1.27 4.2) (layers F.Cu F.Paste F.Mask) (net 170 /LVDS_DQ1_N)) (model :SAMTEC:SMA-J-P-H-ST-EM1.stp (offset (xyz 0 -1.49999997747226 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 -90 180)) ) ) (module azonenberg_pcb:CONN_SMA_EDGE_SAMTEC_SMA_J_P_H_ST_EM1 (layer F.Cu) (tedit 59D72019) (tstamp 5DC24227) (at 19 45 270) (path /5E0AB153) (fp_text reference J17 (at 3 -6 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SMA (at 0 1.6 90) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (pad 2 smd rect (at -2.825 -2.35 270) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 2 smd rect (at 2.825 -2.35 270) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at 0 -2.1 270) (size 1.27 4.2) (layers F.Cu F.Paste F.Mask) (net 141 /LVDS_CLK_N)) (model :SAMTEC:SMA-J-P-H-ST-EM1.stp (offset (xyz 0 -1.49999997747226 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 -90 180)) ) ) (module azonenberg_pcb:CONN_SMA_EDGE_SAMTEC_SMA_J_P_H_ST_EM1 (layer F.Cu) (tedit 59D72019) (tstamp 5DC24220) (at 19 57 270) (path /5E0A909B) (fp_text reference J16 (at 3 -6 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value SMA (at 0 1.6 90) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (pad 2 smd rect (at -2.825 -2.35 270) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 2 smd rect (at 2.825 -2.35 270) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at 0 -2.1 270) (size 1.27 4.2) (layers F.Cu F.Paste F.Mask) (net 139 /LVDS_CLK_P)) (model :SAMTEC:SMA-J-P-H-ST-EM1.stp (offset (xyz 0 -1.49999997747226 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 -90 180)) ) ) (module azonenberg_pcb:XILINX_JTAG_PTH_MOLEX_0878311420 (layer F.Cu) (tedit 53C52AB2) (tstamp 5DC24219) (at 130 144 90) (path /5E08CB0F) (fp_text reference J15 (at -7 -4 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value XILINX_JTAG (at 0 3.4 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 8.5 3) (end 2 3) (layer F.SilkS) (width 0.3)) (fp_line (start 8.5 -3) (end 8.5 3) (layer F.SilkS) (width 0.3)) (fp_line (start -2 3) (end -8.5 3) (layer F.SilkS) (width 0.3)) (fp_line (start -8.5 -3) (end -8.5 3) (layer F.SilkS) (width 0.3)) (fp_line (start 8.5 -3) (end -8.5 -3) (layer F.SilkS) (width 0.3)) (pad 14 thru_hole circle (at 6 -1 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (pad 13 thru_hole circle (at 6 1 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (pad 12 thru_hole circle (at 4 -1 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (pad 11 thru_hole circle (at 4 1 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 10 thru_hole circle (at 2 -1 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 42 /JTAG_TDI)) (pad 9 thru_hole circle (at 2 1 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 8 thru_hole circle (at 0 -1 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 53 /JTAG_TDO)) (pad 7 thru_hole circle (at 0 1 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 6 thru_hole circle (at -2 -1 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 51 /JTAG_TCK)) (pad 5 thru_hole circle (at -2 1 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 4 thru_hole circle (at -4 -1 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 44 /JTAG_TMS)) (pad 3 thru_hole circle (at -4 1 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 2 thru_hole circle (at -6 -1 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 1 thru_hole circle (at -6 1 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/conn_strip/vasch_strip_7x2.wrl (at (xyz 0 0 0)) (scale (xyz 0.78 0.78 0.78)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:CONN_HEADER_2.54MM_2x6_RA_PMOD_HOST (layer F.Cu) (tedit 5C397C94) (tstamp 5DC24202) (at 128 123.86 90) (path /5DF8FFFE/5E03D007) (fp_text reference J14 (at -9.14 -2 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PMOD_HOST (at -1.27 -3.81 90) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (fp_line (start 6.9 -2.7) (end 7.904987 -1.695013) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 -2.73) (end -7.92 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 -2.73) (end -7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 4.5) (end 7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 4.5) (end 7.84 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 3.27) (end 7.84 3.27) (layer F.SilkS) (width 0.15)) (pad 6 thru_hole circle (at -6.35 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 5 thru_hole circle (at -3.81 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 11 thru_hole circle (at -3.81 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 12 thru_hole circle (at -6.35 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 9 thru_hole circle (at 1.27 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 111 "/MCU PMODs/PE9")) (pad 8 thru_hole circle (at 3.81 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 107 "/MCU PMODs/PE12")) (pad 7 thru_hole circle (at 6.35 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 103 "/MCU PMODs/PD12")) (pad 1 thru_hole circle (at 6.35 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 105 "/MCU PMODs/PD11")) (pad 2 thru_hole circle (at 3.81 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 109 "/MCU PMODs/PE11")) (pad 3 thru_hole circle (at 1.27 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 113 "/MCU PMODs/PE10")) (pad 10 thru_hole circle (at -1.27 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 115 "/MCU PMODs/PE8")) (pad 4 thru_hole circle (at -1.27 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 117 "/MCU PMODs/PE7")) (model :walter:pin_strip/pin_socket_6x2-90.wrl (offset (xyz 0 -5 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:CONN_HEADER_2.54MM_2x6_RA_PMOD_HOST (layer F.Cu) (tedit 5C397C94) (tstamp 5DC241EC) (at 128 78.14 90) (path /5DF8FFFE/5E02A2A1) (fp_text reference J13 (at -8.86 -2 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PMOD_HOST (at -1.27 -3.81 90) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (fp_line (start 6.9 -2.7) (end 7.904987 -1.695013) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 -2.73) (end -7.92 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 -2.73) (end -7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 4.5) (end 7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 4.5) (end 7.84 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 3.27) (end 7.84 3.27) (layer F.SilkS) (width 0.15)) (pad 6 thru_hole circle (at -6.35 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 5 thru_hole circle (at -3.81 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 11 thru_hole circle (at -3.81 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 12 thru_hole circle (at -6.35 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 9 thru_hole circle (at 1.27 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 79 "/MCU PMODs/PD10")) (pad 8 thru_hole circle (at 3.81 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 41 "/MCU PMODs/PD4")) (pad 7 thru_hole circle (at 6.35 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 52 "/MCU PMODs/PB4")) (pad 1 thru_hole circle (at 6.35 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 43 "/MCU PMODs/PD5")) (pad 2 thru_hole circle (at 3.81 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 50 "/MCU PMODs/PD3")) (pad 3 thru_hole circle (at 1.27 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 81 "/MCU PMODs/PD15")) (pad 10 thru_hole circle (at -1.27 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 83 "/MCU PMODs/PD9")) (pad 4 thru_hole circle (at -1.27 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 85 "/MCU PMODs/PD8")) (model :walter:pin_strip/pin_socket_6x2-90.wrl (offset (xyz 0 -5 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:CONN_HEADER_2.54MM_2x6_RA_PMOD_HOST (layer F.Cu) (tedit 5C397C94) (tstamp 5DC241D6) (at 70.28 42 180) (path /5DF8FFFE/5E01CCF7) (fp_text reference J12 (at 6.28 -4) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PMOD_HOST (at -1.27 -3.81) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (fp_line (start 6.9 -2.7) (end 7.904987 -1.695013) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 -2.73) (end -7.92 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 -2.73) (end -7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 4.5) (end 7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 4.5) (end 7.84 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 3.27) (end 7.84 3.27) (layer F.SilkS) (width 0.15)) (pad 6 thru_hole circle (at -6.35 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 5 thru_hole circle (at -3.81 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 11 thru_hole circle (at -3.81 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 12 thru_hole circle (at -6.35 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 9 thru_hole circle (at 1.27 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 72 "/MCU PMODs/PB0")) (pad 8 thru_hole circle (at 3.81 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 80 "/MCU PMODs/PD7")) (pad 7 thru_hole circle (at 6.35 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 82 "/MCU PMODs/PD6")) (pad 1 thru_hole circle (at 6.35 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 96 "/MCU PMODs/PA11")) (pad 2 thru_hole circle (at 3.81 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 100 "/MCU PMODs/PA9")) (pad 3 thru_hole circle (at 1.27 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 98 "/MCU PMODs/PA10")) (pad 10 thru_hole circle (at -1.27 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 70 "/MCU PMODs/PB2")) (pad 4 thru_hole circle (at -1.27 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 94 "/MCU PMODs/PA12")) (model :walter:pin_strip/pin_socket_6x2-90.wrl (offset (xyz 0 -5 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:CONN_HEADER_2.54MM_2x6_RA_PMOD_HOST (layer F.Cu) (tedit 5C397C94) (tstamp 5DC241C0) (at 128 101 90) (path /5DF8FFFE/5E014DFF) (fp_text reference J11 (at -9 -2 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PMOD_HOST (at -1.27 -3.81 90) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (fp_line (start 6.9 -2.7) (end 7.904987 -1.695013) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 -2.73) (end -7.92 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 -2.73) (end -7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 4.5) (end 7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 4.5) (end 7.84 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 3.27) (end 7.84 3.27) (layer F.SilkS) (width 0.15)) (pad 6 thru_hole circle (at -6.35 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 5 thru_hole circle (at -3.81 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 11 thru_hole circle (at -3.81 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 12 thru_hole circle (at -6.35 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 9 thru_hole circle (at 1.27 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 95 "/MCU PMODs/PE13")) (pad 8 thru_hole circle (at 3.81 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 91 "/MCU PMODs/PB15")) (pad 7 thru_hole circle (at 6.35 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 87 "/MCU PMODs/PD14")) (pad 1 thru_hole circle (at 6.35 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 89 "/MCU PMODs/PB14")) (pad 2 thru_hole circle (at 3.81 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 93 "/MCU PMODs/PB10")) (pad 3 thru_hole circle (at 1.27 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 97 "/MCU PMODs/PD13")) (pad 10 thru_hole circle (at -1.27 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 99 "/MCU PMODs/PE14")) (pad 4 thru_hole circle (at -1.27 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 101 "/MCU PMODs/PE15")) (model :walter:pin_strip/pin_socket_6x2-90.wrl (offset (xyz 0 -5 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:CONN_HEADER_2.54MM_2x6_RA_PMOD_HOST (layer F.Cu) (tedit 5C397C94) (tstamp 5DC241AA) (at 128 55.28 90) (path /5DF8FFFE/5E0022DE) (fp_text reference J10 (at -8.72 -2 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PMOD_HOST (at -1.27 -3.81 90) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (fp_line (start 6.9 -2.7) (end 7.904987 -1.695013) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 -2.73) (end -7.92 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 -2.73) (end -7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 4.5) (end 7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 4.5) (end 7.84 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 3.27) (end 7.84 3.27) (layer F.SilkS) (width 0.15)) (pad 6 thru_hole circle (at -6.35 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 5 thru_hole circle (at -3.81 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 11 thru_hole circle (at -3.81 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 12 thru_hole circle (at -6.35 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 9 thru_hole circle (at 1.27 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 71 "/MCU PMODs/PE1")) (pad 8 thru_hole circle (at 3.81 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 58 "/MCU PMODs/PE3")) (pad 7 thru_hole circle (at 6.35 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 46 "/MCU PMODs/PE4")) (pad 1 thru_hole circle (at 6.35 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 48 "/MCU PMODs/PE5")) (pad 2 thru_hole circle (at 3.81 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 54 "/MCU PMODs/PE6")) (pad 3 thru_hole circle (at 1.27 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 69 "/MCU PMODs/PE2")) (pad 10 thru_hole circle (at -1.27 1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 56 "/MCU PMODs/PB5")) (pad 4 thru_hole circle (at -1.27 -1.27 90) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 67 "/MCU PMODs/PE0")) (model :walter:pin_strip/pin_socket_6x2-90.wrl (offset (xyz 0 -5 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:CONN_HEADER_2.54MM_2x6_RA_PMOD_HOST (layer F.Cu) (tedit 5C397C94) (tstamp 5DC24194) (at 116 42 180) (path /5DF8FFFE/5DFEFA21) (fp_text reference J9 (at 7 -4) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PMOD_HOST (at -1.27 -3.81) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (fp_line (start 6.9 -2.7) (end 7.904987 -1.695013) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 -2.73) (end -7.92 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 -2.73) (end -7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 4.5) (end 7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 4.5) (end 7.84 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 3.27) (end 7.84 3.27) (layer F.SilkS) (width 0.15)) (pad 6 thru_hole circle (at -6.35 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 5 thru_hole circle (at -3.81 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 11 thru_hole circle (at -3.81 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 12 thru_hole circle (at -6.35 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 9 thru_hole circle (at 1.27 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 73 "/MCU PMODs/PF1")) (pad 8 thru_hole circle (at 3.81 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 60 "/MCU PMODs/PF3")) (pad 7 thru_hole circle (at 6.35 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 61 "/MCU PMODs/PC0")) (pad 1 thru_hole circle (at 6.35 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 78 "/MCU PMODs/PA5")) (pad 2 thru_hole circle (at 3.81 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 62 "/MCU PMODs/PB1")) (pad 3 thru_hole circle (at 1.27 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 63 "/MCU PMODs/PF2")) (pad 10 thru_hole circle (at -1.27 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 75 "/MCU PMODs/PC13")) (pad 4 thru_hole circle (at -1.27 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 65 "/MCU PMODs/PF0")) (model :walter:pin_strip/pin_socket_6x2-90.wrl (offset (xyz 0 -5 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:CONN_HEADER_2.54MM_2x6_RA_PMOD_HOST (layer F.Cu) (tedit 5C397C94) (tstamp 5DC2417E) (at 93.14 42 180) (path /5DF8FFFE/5DFE64B6) (fp_text reference J8 (at 7.14 -4) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PMOD_HOST (at -1.27 -3.81) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (fp_line (start 6.9 -2.7) (end 7.904987 -1.695013) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 -2.73) (end -7.92 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 -2.73) (end -7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 4.5) (end 7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 4.5) (end 7.84 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 3.27) (end 7.84 3.27) (layer F.SilkS) (width 0.15)) (pad 6 thru_hole circle (at -6.35 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 5 thru_hole circle (at -3.81 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 11 thru_hole circle (at -3.81 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 12 thru_hole circle (at -6.35 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 9 thru_hole circle (at 1.27 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 66 "/MCU PMODs/PC3")) (pad 8 thru_hole circle (at 3.81 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 49 "/MCU PMODs/PF8")) (pad 7 thru_hole circle (at 6.35 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 55 "/MCU PMODs/PF7")) (pad 1 thru_hole circle (at 6.35 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 59 "/MCU PMODs/PC2")) (pad 2 thru_hole circle (at 3.81 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 47 "/MCU PMODs/PF6")) (pad 3 thru_hole circle (at 1.27 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 76 "/MCU PMODs/PF9")) (pad 10 thru_hole circle (at -1.27 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 64 "/MCU PMODs/PA0")) (pad 4 thru_hole circle (at -1.27 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 74 "/MCU PMODs/PA3")) (model :walter:pin_strip/pin_socket_6x2-90.wrl (offset (xyz 0 -5 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:CONN_HEADER_2.54MM_2x6_RA_PMOD_HOST (layer F.Cu) (tedit 5C397C94) (tstamp 5DC24168) (at 47.42 42 180) (path /5DF8FFFE/5DFD461A) (fp_text reference J7 (at 6.42 -4) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value PMOD_HOST (at -1.27 -3.81) (layer F.Fab) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (fp_line (start 6.9 -2.7) (end 7.904987 -1.695013) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 -2.73) (end -7.92 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 -2.73) (end -7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 4.5) (end 7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 4.5) (end 7.84 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 3.27) (end 7.84 3.27) (layer F.SilkS) (width 0.15)) (pad 6 thru_hole circle (at -6.35 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 5 thru_hole circle (at -3.81 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 11 thru_hole circle (at -3.81 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 12 thru_hole circle (at -6.35 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 /3V3)) (pad 9 thru_hole circle (at 1.27 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 88 "/MCU PMODs/PD1")) (pad 8 thru_hole circle (at 3.81 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS)) (pad 7 thru_hole circle (at 6.35 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS)) (pad 1 thru_hole circle (at 6.35 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 102 "/MCU PMODs/PA8")) (pad 2 thru_hole circle (at 3.81 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 92 "/MCU PMODs/PC10")) (pad 3 thru_hole circle (at 1.27 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 90 "/MCU PMODs/PD2")) (pad 10 thru_hole circle (at -1.27 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 84 "/MCU PMODs/PD0")) (pad 4 thru_hole circle (at -1.27 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 86 "/MCU PMODs/PC12")) (model :walter:pin_strip/pin_socket_6x2-90.wrl (offset (xyz 0 -5 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:CONN_BELFUSE_0826_1G1T_23_F (layer F.Cu) (tedit 54A5C6A3) (tstamp 5DC24152) (at 46 154 180) (path /5DBDC3C0/5DD4D0CE) (fp_text reference J6 (at 0 -7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 0826-1G1T-23-F (at 0 -6) (layer F.SilkS) hide (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_line (start -9 -11) (end -9 22) (layer F.SilkS) (width 0.15)) (fp_line (start -9 22) (end 9 22) (layer F.SilkS) (width 0.15)) (fp_line (start 9 22) (end 9 -11) (layer F.SilkS) (width 0.15)) (fp_line (start 9 -11) (end -9 -11) (layer F.SilkS) (width 0.15)) (pad 16 thru_hole circle (at 6.095 20.32 180) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 202 "Net-(J6-Pad16)")) (pad 15 thru_hole circle (at 3.555 20.32 180) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 203 /Ethernet/ETH3_LED2_N)) (pad 14 thru_hole circle (at -3.555 20.32 180) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 204 "Net-(J6-Pad14)")) (pad 13 thru_hole circle (at -6.095 20.32 180) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 205 /Ethernet/ETH3_LED1_N)) (pad 12 thru_hole circle (at 6.095 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 24 "Net-(C67-Pad1)")) (pad 11 thru_hole circle (at 4.065 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 206 /Ethernet/ETH3_1_P)) (pad 10 thru_hole circle (at 2.035 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 207 /Ethernet/ETH3_1_N)) (pad 9 thru_hole circle (at -2.035 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 208 /Ethernet/ETH3_4_N)) (pad 8 thru_hole circle (at -4.065 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 209 /Ethernet/ETH3_4_P)) (pad 7 thru_hole circle (at -6.095 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 27 "Net-(C70-Pad1)")) (pad 6 thru_hole circle (at 5.075 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 25 "Net-(C68-Pad1)")) (pad 5 thru_hole circle (at 3.045 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 210 /Ethernet/ETH3_2_N)) (pad 4 thru_hole circle (at 1.015 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 211 /Ethernet/ETH3_2_P)) (pad 3 thru_hole circle (at -1.015 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 212 /Ethernet/ETH3_3_P)) (pad 2 thru_hole circle (at -3.045 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 213 /Ethernet/ETH3_3_N)) (pad 1 thru_hole circle (at -5.075 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 26 "Net-(C69-Pad1)")) (pad 17 thru_hole circle (at -8.065 -3.18 180) (size 2 2) (drill 1.57) (layers *.Cu *.Mask F.SilkS) (net 31 "Net-(C74-Pad1)")) (pad 17 thru_hole circle (at 8.065 -3.18 180) (size 2 2) (drill 1.57) (layers *.Cu *.Mask F.SilkS) (net 31 "Net-(C74-Pad1)")) (pad "" np_thru_hole circle (at 6.35 0 180) (size 3.25 3.25) (drill 3.25) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at -6.35 0 180) (size 3.25 3.25) (drill 3.25) (layers *.Cu *.Mask F.SilkS)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/conn_pc/rj45-led-5-6605758-4.wrl (offset (xyz 0 -5.079999923706055 0)) (scale (xyz 1 1.5 1)) (rotate (xyz 0 0 180)) ) ) (module azonenberg_pcb:CONN_BELFUSE_0826_1G1T_23_F (layer F.Cu) (tedit 54A5C6A3) (tstamp 5DC24136) (at 69 154 180) (path /5DBDC3C0/5DCCDB43) (fp_text reference J5 (at 0 -7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 0826-1G1T-23-F (at 0 -6) (layer F.SilkS) hide (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_line (start -9 -11) (end -9 22) (layer F.SilkS) (width 0.15)) (fp_line (start -9 22) (end 9 22) (layer F.SilkS) (width 0.15)) (fp_line (start 9 22) (end 9 -11) (layer F.SilkS) (width 0.15)) (fp_line (start 9 -11) (end -9 -11) (layer F.SilkS) (width 0.15)) (pad 16 thru_hole circle (at 6.095 20.32 180) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 190 "Net-(J5-Pad16)")) (pad 15 thru_hole circle (at 3.555 20.32 180) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 191 /Ethernet/ETH2_LED2_N)) (pad 14 thru_hole circle (at -3.555 20.32 180) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 192 "Net-(J5-Pad14)")) (pad 13 thru_hole circle (at -6.095 20.32 180) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 193 /Ethernet/ETH2_LED1_N)) (pad 12 thru_hole circle (at 6.095 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 20 "Net-(C63-Pad1)")) (pad 11 thru_hole circle (at 4.065 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 194 /Ethernet/ETH2_1_P)) (pad 10 thru_hole circle (at 2.035 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 195 /Ethernet/ETH2_1_N)) (pad 9 thru_hole circle (at -2.035 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 196 /Ethernet/ETH2_4_N)) (pad 8 thru_hole circle (at -4.065 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 197 /Ethernet/ETH2_4_P)) (pad 7 thru_hole circle (at -6.095 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 23 "Net-(C66-Pad1)")) (pad 6 thru_hole circle (at 5.075 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 21 "Net-(C64-Pad1)")) (pad 5 thru_hole circle (at 3.045 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 198 /Ethernet/ETH2_2_N)) (pad 4 thru_hole circle (at 1.015 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 199 /Ethernet/ETH2_2_P)) (pad 3 thru_hole circle (at -1.015 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 200 /Ethernet/ETH2_3_P)) (pad 2 thru_hole circle (at -3.045 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 201 /Ethernet/ETH2_3_N)) (pad 1 thru_hole circle (at -5.075 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 22 "Net-(C65-Pad1)")) (pad 17 thru_hole circle (at -8.065 -3.18 180) (size 2 2) (drill 1.57) (layers *.Cu *.Mask F.SilkS) (net 30 "Net-(C73-Pad1)")) (pad 17 thru_hole circle (at 8.065 -3.18 180) (size 2 2) (drill 1.57) (layers *.Cu *.Mask F.SilkS) (net 30 "Net-(C73-Pad1)")) (pad "" np_thru_hole circle (at 6.35 0 180) (size 3.25 3.25) (drill 3.25) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at -6.35 0 180) (size 3.25 3.25) (drill 3.25) (layers *.Cu *.Mask F.SilkS)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/conn_pc/rj45-led-5-6605758-4.wrl (offset (xyz 0 -5.079999923706055 0)) (scale (xyz 1 1.5 1)) (rotate (xyz 0 0 180)) ) ) (module azonenberg_pcb:CONN_BELFUSE_0826_1G1T_23_F (layer F.Cu) (tedit 54A5C6A3) (tstamp 5DC2411A) (at 92 154 180) (path /5DBDC3C0/5DC02726) (fp_text reference J4 (at 0 -7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 0826-1G1T-23-F (at 0 -6) (layer F.SilkS) hide (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_line (start -9 -11) (end -9 22) (layer F.SilkS) (width 0.15)) (fp_line (start -9 22) (end 9 22) (layer F.SilkS) (width 0.15)) (fp_line (start 9 22) (end 9 -11) (layer F.SilkS) (width 0.15)) (fp_line (start 9 -11) (end -9 -11) (layer F.SilkS) (width 0.15)) (pad 16 thru_hole circle (at 6.095 20.32 180) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 180 "Net-(J4-Pad16)")) (pad 15 thru_hole circle (at 3.555 20.32 180) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 130 /Ethernet/ETH1_LED2_N)) (pad 14 thru_hole circle (at -3.555 20.32 180) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 181 "Net-(J4-Pad14)")) (pad 13 thru_hole circle (at -6.095 20.32 180) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 129 /Ethernet/ETH1_LED1_N)) (pad 12 thru_hole circle (at 6.095 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 16 "Net-(C59-Pad1)")) (pad 11 thru_hole circle (at 4.065 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 182 /Ethernet/ETH1_1_P)) (pad 10 thru_hole circle (at 2.035 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 183 /Ethernet/ETH1_1_N)) (pad 9 thru_hole circle (at -2.035 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 184 /Ethernet/ETH1_4_N)) (pad 8 thru_hole circle (at -4.065 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 185 /Ethernet/ETH1_4_P)) (pad 7 thru_hole circle (at -6.095 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 19 "Net-(C62-Pad1)")) (pad 6 thru_hole circle (at 5.075 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 17 "Net-(C60-Pad1)")) (pad 5 thru_hole circle (at 3.045 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 186 /Ethernet/ETH1_2_N)) (pad 4 thru_hole circle (at 1.015 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 187 /Ethernet/ETH1_2_P)) (pad 3 thru_hole circle (at -1.015 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 188 /Ethernet/ETH1_3_P)) (pad 2 thru_hole circle (at -3.045 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 189 /Ethernet/ETH1_3_N)) (pad 1 thru_hole circle (at -5.075 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 18 "Net-(C61-Pad1)")) (pad 17 thru_hole circle (at -8.065 -3.18 180) (size 2 2) (drill 1.57) (layers *.Cu *.Mask F.SilkS) (net 29 "Net-(C72-Pad1)")) (pad 17 thru_hole circle (at 8.065 -3.18 180) (size 2 2) (drill 1.57) (layers *.Cu *.Mask F.SilkS) (net 29 "Net-(C72-Pad1)")) (pad "" np_thru_hole circle (at 6.35 0 180) (size 3.25 3.25) (drill 3.25) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at -6.35 0 180) (size 3.25 3.25) (drill 3.25) (layers *.Cu *.Mask F.SilkS)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/conn_pc/rj45-led-5-6605758-4.wrl (offset (xyz 0 -5.079999923706055 0)) (scale (xyz 1 1.5 1)) (rotate (xyz 0 0 180)) ) ) (module azonenberg_pcb:CONN_BELFUSE_0826_1G1T_23_F (layer F.Cu) (tedit 54A5C6A3) (tstamp 5DC240FE) (at 115 154 180) (path /5DBDC3C0/5DBE6B00) (fp_text reference J3 (at 0 -7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 0826-1G1T-23-F (at 0 -6) (layer F.SilkS) hide (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_line (start -9 -11) (end -9 22) (layer F.SilkS) (width 0.15)) (fp_line (start -9 22) (end 9 22) (layer F.SilkS) (width 0.15)) (fp_line (start 9 22) (end 9 -11) (layer F.SilkS) (width 0.15)) (fp_line (start 9 -11) (end -9 -11) (layer F.SilkS) (width 0.15)) (pad 16 thru_hole circle (at 6.095 20.32 180) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 178 "Net-(J3-Pad16)")) (pad 15 thru_hole circle (at 3.555 20.32 180) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 14 thru_hole circle (at -3.555 20.32 180) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 179 "Net-(J3-Pad14)")) (pad 13 thru_hole circle (at -6.095 20.32 180) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 1 /GND)) (pad 12 thru_hole circle (at 6.095 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 12 "Net-(C55-Pad1)")) (pad 11 thru_hole circle (at 4.065 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 118 /Ethernet/ETH0_1_P)) (pad 10 thru_hole circle (at 2.035 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 116 /Ethernet/ETH0_1_N)) (pad 9 thru_hole circle (at -2.035 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 104 /Ethernet/ETH0_4_N)) (pad 8 thru_hole circle (at -4.065 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 106 /Ethernet/ETH0_4_P)) (pad 7 thru_hole circle (at -6.095 17.78 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 15 "Net-(C58-Pad1)")) (pad 6 thru_hole circle (at 5.075 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 13 "Net-(C56-Pad1)")) (pad 5 thru_hole circle (at 3.045 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 112 /Ethernet/ETH0_2_N)) (pad 4 thru_hole circle (at 1.015 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 114 /Ethernet/ETH0_2_P)) (pad 3 thru_hole circle (at -1.015 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 110 /Ethernet/ETH0_3_P)) (pad 2 thru_hole circle (at -3.045 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 108 /Ethernet/ETH0_3_N)) (pad 1 thru_hole circle (at -5.075 15.24 180) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 14 "Net-(C57-Pad1)")) (pad 17 thru_hole circle (at -8.065 -3.18 180) (size 2 2) (drill 1.57) (layers *.Cu *.Mask F.SilkS) (net 28 "Net-(C71-Pad1)")) (pad 17 thru_hole circle (at 8.065 -3.18 180) (size 2 2) (drill 1.57) (layers *.Cu *.Mask F.SilkS) (net 28 "Net-(C71-Pad1)")) (pad "" np_thru_hole circle (at 6.35 0 180) (size 3.25 3.25) (drill 3.25) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at -6.35 0 180) (size 3.25 3.25) (drill 3.25) (layers *.Cu *.Mask F.SilkS)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/conn_pc/rj45-led-5-6605758-4.wrl (offset (xyz 0 -5.079999923706055 0)) (scale (xyz 1 1.5 1)) (rotate (xyz 0 0 180)) ) ) (module azonenberg_pcb:CONN_SAMTEC_QSH-060-01-L-D-A (layer F.Cu) (tedit 5C384B9A) (tstamp 5DC2404D) (at 113 75 180) (path /5DFABED1) (fp_text reference J1 (at -6.5 0 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value CONN_INTEGRALSTICK_MCU_HOST (at 0 -21) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user 119 (at -4.8 17.2) (layer F.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_text user 120 (at 4.7 17.2) (layer F.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_text user 62 (at 4.6 2.8) (layer F.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_text user 61 (at -4.6 2.8) (layer F.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_line (start 4 19.753) (end 4 20.753) (layer F.SilkS) (width 0.15)) (fp_line (start 3 20.753) (end 4 19.753) (layer F.SilkS) (width 0.15)) (fp_line (start 4 -20.7) (end 4 -20.7) (layer F.SilkS) (width 0.1)) (fp_line (start 4 -19.7) (end 4 -20.7) (layer F.SilkS) (width 0.15)) (fp_line (start 3 -20.7) (end 4 -19.7) (layer F.SilkS) (width 0.15)) (fp_line (start -4 -20.75) (end 4 -20.75) (layer F.SilkS) (width 0.15)) (fp_line (start 4 20.753) (end -4 20.753) (layer F.SilkS) (width 0.15)) (fp_text user 1 (at -4.765 -17.3) (layer F.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_text user 2 (at 4.815 -17.3) (layer F.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_text user 60 (at 4.615 -2.7) (layer F.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (fp_text user 59 (at -4.565 -2.7) (layer F.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425))) ) (pad 65 smd rect (at -2.865 3.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 41 "/MCU PMODs/PD4")) (pad 66 smd rect (at 2.865 3.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 42 /JTAG_TDI)) (pad 73 smd rect (at -2.865 5.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 74 smd rect (at 2.865 5.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 67 smd rect (at -2.865 4.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 68 smd rect (at 2.865 4.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 69 smd rect (at -2.865 4.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 43 "/MCU PMODs/PD5")) (pad 70 smd rect (at 2.865 4.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 44 /JTAG_TMS)) (pad 120 smd rect (at 2.865 17.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 45 /FPGA_DONE)) (pad 128 smd rect (at 0 18.068 180) (size 0.64 2.54) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 125 smd rect (at 0 1.938 180) (size 0.64 2.54) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 79 smd rect (at -2.865 7.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 80 smd rect (at 2.865 7.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 91 smd rect (at -2.865 10.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 92 smd rect (at 2.865 10.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 93 smd rect (at -2.865 10.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 46 "/MCU PMODs/PE4")) (pad 94 smd rect (at 2.865 10.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 47 "/MCU PMODs/PF6")) (pad 119 smd rect (at -2.865 17.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask)) (pad 127 smd rect (at 0 13.194 180) (size 0.64 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 126 smd rect (at 0 6.844 180) (size 0.64 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 95 smd rect (at -2.865 11.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 48 "/MCU PMODs/PE5")) (pad 96 smd rect (at 2.865 11.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 49 "/MCU PMODs/PF8")) (pad 63 smd rect (at -2.865 3.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 50 "/MCU PMODs/PD3")) (pad 64 smd rect (at 2.865 3.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 51 /JTAG_TCK)) (pad 71 smd rect (at -2.865 5.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 52 "/MCU PMODs/PB4")) (pad 72 smd rect (at 2.865 5.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 53 /JTAG_TDO)) (pad 62 smd rect (at 2.865 2.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 89 smd rect (at -2.865 9.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 54 "/MCU PMODs/PE6")) (pad 90 smd rect (at 2.865 9.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 55 "/MCU PMODs/PF7")) (pad 75 smd rect (at -2.865 6.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 56 "/MCU PMODs/PB5")) (pad 76 smd rect (at 2.865 6.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 57 /FPGA_RST_N)) (pad 115 smd rect (at -2.865 16.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 116 smd rect (at 2.865 16.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 87 smd rect (at -2.865 9.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 58 "/MCU PMODs/PE3")) (pad 88 smd rect (at 2.865 9.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 59 "/MCU PMODs/PC2")) (pad 111 smd rect (at -2.865 15.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 60 "/MCU PMODs/PF3")) (pad 112 smd rect (at 2.865 15.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 61 "/MCU PMODs/PC0")) (pad 117 smd rect (at -2.865 16.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask)) (pad 118 smd rect (at 2.865 16.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 62 "/MCU PMODs/PB1")) (pad 61 smd rect (at -2.865 2.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 109 smd rect (at -2.865 14.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 110 smd rect (at 2.865 14.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 107 smd rect (at -2.865 14.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 63 "/MCU PMODs/PF2")) (pad 108 smd rect (at 2.865 14.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 64 "/MCU PMODs/PA0")) (pad 101 smd rect (at -2.865 12.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 65 "/MCU PMODs/PF0")) (pad 102 smd rect (at 2.865 12.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 66 "/MCU PMODs/PC3")) (pad 97 smd rect (at -2.865 11.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 98 smd rect (at 2.865 11.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 77 smd rect (at -2.865 6.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 67 "/MCU PMODs/PE0")) (pad 78 smd rect (at 2.865 6.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 68 /MCU_BOOT0)) (pad 103 smd rect (at -2.865 13.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 104 smd rect (at 2.865 13.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 83 smd rect (at -2.865 8.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 69 "/MCU PMODs/PE2")) (pad 84 smd rect (at 2.865 8.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 70 "/MCU PMODs/PB2")) (pad 81 smd rect (at -2.865 7.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 71 "/MCU PMODs/PE1")) (pad 82 smd rect (at 2.865 7.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 72 "/MCU PMODs/PB0")) (pad 105 smd rect (at -2.865 13.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 73 "/MCU PMODs/PF1")) (pad 106 smd rect (at 2.865 13.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 74 "/MCU PMODs/PA3")) (pad 85 smd rect (at -2.865 8.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 86 smd rect (at 2.865 8.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 99 smd rect (at -2.865 12.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 75 "/MCU PMODs/PC13")) (pad 100 smd rect (at 2.865 12.253 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 76 "/MCU PMODs/PF9")) (pad 113 smd rect (at -2.865 15.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 77 /MCU_RST_N)) (pad 114 smd rect (at 2.865 15.753 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 78 "/MCU PMODs/PA5")) (pad "" thru_hole circle (at 2.67 -20.065 180) (size 1.02 1.02) (drill 1.02) (layers *.Cu *.Mask F.SilkS)) (pad 59 smd rect (at -2.865 -2.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 79 "/MCU PMODs/PD10")) (pad 123 smd rect (at 0 -6.809 180) (size 0.64 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 122 smd rect (at 0 -13.159 180) (size 0.64 4.7) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 124 smd rect (at 0 -1.935 180) (size 0.64 2.54) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 121 smd rect (at 0 -18.065 180) (size 0.64 2.54) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad "" thru_hole circle (at 2.67 20.065 180) (size 1.02 1.02) (drill 1.02) (layers *.Cu *.Mask F.SilkS)) (pad 60 smd rect (at 2.865 -2.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 80 "/MCU PMODs/PD7")) (pad 57 smd rect (at -2.865 -3.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 81 "/MCU PMODs/PD15")) (pad 58 smd rect (at 2.865 -3.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 82 "/MCU PMODs/PD6")) (pad 55 smd rect (at -2.865 -3.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 56 smd rect (at 2.865 -3.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 53 smd rect (at -2.865 -4.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 83 "/MCU PMODs/PD9")) (pad 54 smd rect (at 2.865 -4.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 84 "/MCU PMODs/PD0")) (pad 51 smd rect (at -2.865 -4.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 85 "/MCU PMODs/PD8")) (pad 52 smd rect (at 2.865 -4.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 86 "/MCU PMODs/PC12")) (pad 49 smd rect (at -2.865 -5.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 50 smd rect (at 2.865 -5.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 47 smd rect (at -2.865 -5.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 87 "/MCU PMODs/PD14")) (pad 48 smd rect (at 2.865 -5.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 88 "/MCU PMODs/PD1")) (pad 45 smd rect (at -2.865 -6.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 89 "/MCU PMODs/PB14")) (pad 46 smd rect (at 2.865 -6.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 90 "/MCU PMODs/PD2")) (pad 43 smd rect (at -2.865 -6.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 44 smd rect (at 2.865 -6.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 41 smd rect (at -2.865 -7.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 91 "/MCU PMODs/PB15")) (pad 42 smd rect (at 2.865 -7.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 92 "/MCU PMODs/PC10")) (pad 39 smd rect (at -2.865 -7.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 93 "/MCU PMODs/PB10")) (pad 40 smd rect (at 2.865 -7.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 94 "/MCU PMODs/PA12")) (pad 37 smd rect (at -2.865 -8.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 38 smd rect (at 2.865 -8.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 35 smd rect (at -2.865 -8.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 95 "/MCU PMODs/PE13")) (pad 36 smd rect (at 2.865 -8.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 96 "/MCU PMODs/PA11")) (pad 33 smd rect (at -2.865 -9.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 97 "/MCU PMODs/PD13")) (pad 34 smd rect (at 2.865 -9.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 98 "/MCU PMODs/PA10")) (pad 31 smd rect (at -2.865 -9.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 32 smd rect (at 2.865 -9.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 29 smd rect (at -2.865 -10.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 99 "/MCU PMODs/PE14")) (pad 30 smd rect (at 2.865 -10.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 100 "/MCU PMODs/PA9")) (pad 27 smd rect (at -2.865 -10.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 101 "/MCU PMODs/PE15")) (pad 28 smd rect (at 2.865 -10.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 102 "/MCU PMODs/PA8")) (pad 25 smd rect (at -2.865 -11.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 26 smd rect (at 2.865 -11.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 23 smd rect (at -2.865 -11.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 103 "/MCU PMODs/PD12")) (pad 24 smd rect (at 2.865 -11.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 104 /Ethernet/ETH0_4_N)) (pad 21 smd rect (at -2.865 -12.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 105 "/MCU PMODs/PD11")) (pad 22 smd rect (at 2.865 -12.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 106 /Ethernet/ETH0_4_P)) (pad 19 smd rect (at -2.865 -12.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 20 smd rect (at 2.865 -12.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 17 smd rect (at -2.865 -13.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 107 "/MCU PMODs/PE12")) (pad 18 smd rect (at 2.865 -13.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 110 /Ethernet/ETH0_3_P)) (pad 15 smd rect (at -2.865 -13.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 109 "/MCU PMODs/PE11")) (pad 16 smd rect (at 2.865 -13.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 108 /Ethernet/ETH0_3_N)) (pad 13 smd rect (at -2.865 -14.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 14 smd rect (at 2.865 -14.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 11 smd rect (at -2.865 -14.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 111 "/MCU PMODs/PE9")) (pad 12 smd rect (at 2.865 -14.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 112 /Ethernet/ETH0_2_N)) (pad 9 smd rect (at -2.865 -15.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 113 "/MCU PMODs/PE10")) (pad 10 smd rect (at 2.865 -15.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 114 /Ethernet/ETH0_2_P)) (pad 7 smd rect (at -2.865 -15.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 8 smd rect (at 2.865 -15.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 5 smd rect (at -2.865 -16.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 115 "/MCU PMODs/PE8")) (pad 6 smd rect (at 2.865 -16.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 118 /Ethernet/ETH0_1_P)) (pad 3 smd rect (at -2.865 -16.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 117 "/MCU PMODs/PE7")) (pad 4 smd rect (at 2.865 -16.75 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 116 /Ethernet/ETH0_1_N)) (pad 1 smd rect (at -2.865 -17.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (pad 2 smd rect (at 2.865 -17.25 180) (size 2.27 0.279) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (model :share:Samtec/QSH-060-01-L-D-A.stp (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz -90 0 90)) ) ) (module azonenberg_pcb:EIA_0603_RES_NOSILK (layer F.Cu) (tedit 53C52A47) (tstamp 5DC23FB8) (at 35.5 147 90) (path /5DF7080A/5DFB7FB2) (fp_text reference F1 (at 0 1.6 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value 2A (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.775 0 90) (size 0.787 0.864) (layers F.Cu F.Paste F.Mask) (net 39 "Net-(F1-Pad2)")) (pad 1 smd rect (at -0.775 0 90) (size 0.787 0.864) (layers F.Cu F.Paste F.Mask) (net 40 "/Power Supply/5V0_UNFUSED")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 5DC23FB2) (at 106.3 42 270) (path /5E09FDEE) (fp_text reference D1 (at 0 -1 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value GREEN (at 0.05 2.95 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 38 "Net-(D1-Pad2)")) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer F.Cu) (tedit 54A4E4D1) (tstamp 5DC23FAB) (at 24.15 130.98507) (path /5DF7080A/5E1E2C69) (fp_text reference C88 (at 0.2 2.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "47 uF" (at 0 3.7) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 1.55 0.01493) (size 0.9 2.9) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -1.55 0.01493) (size 0.9 2.9) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer F.Cu) (tedit 54A4E4D1) (tstamp 5DC23FA5) (at 27.75 141.35) (path /5DF7080A/5E1D501F) (fp_text reference C87 (at 0.2 2.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "22 uF" (at 0 3.7) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 1.55 0.01493) (size 0.9 2.9) (layers F.Cu F.Paste F.Mask) (net 32 "/Power Supply/5V0")) (pad 1 smd rect (at -1.55 0.01493) (size 0.9 2.9) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 5DC23F9F) (at 31 132.75 90) (path /5DF7080A/5E1B1E93) (fp_text reference C86 (at 0 1.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 nF" (at 0 3 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 37 "Net-(C86-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC23F99) (at 30.65 139.5 90) (path /5DF7080A/5E19F32B) (fp_text reference C85 (at 0.05 1.4 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.1 uF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 36 "Net-(C85-Pad2)")) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC23F93) (at 44.75 130.65 270) (path /5DBDC3C0/5E114C83) (fp_text reference C84 (at 0.05 1.4 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 35 /Ethernet/ETH3_A1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC23F8D) (at 47.25 130.65 270) (path /5DBDC3C0/5E114C72) (fp_text reference C83 (at 0.05 1.4 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 35 /Ethernet/ETH3_A1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5DC23F87) (at 41.35 130.15 180) (path /5DBDC3C0/5E114C68) (fp_text reference C82 (at 0 -1.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 35 /Ethernet/ETH3_A1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC23F81) (at 93.25 130.65 270) (path /5DBDC3C0/5E1471F1) (fp_text reference C81 (at 0.05 1.4 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 34 /Ethernet/ETH1_A1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC23F7B) (at 90.75 130.6 270) (path /5DBDC3C0/5E1471E0) (fp_text reference C80 (at 0.05 1.4 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 34 /Ethernet/ETH1_A1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 5DC23F75) (at 87.05 130.15 180) (path /5DBDC3C0/5E1471D6) (fp_text reference C79 (at 2.75 -0.05) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 34 /Ethernet/ETH1_A1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC23F6F) (at 70.25 130.6 270) (path /5DBDC3C0/5E0E69C4) (fp_text reference C78 (at 0.05 1.4 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 33 /Ethernet/ETH2_A1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC23F69) (at 67.75 130.6 270) (path /5DBDC3C0/5E0CE2C6) (fp_text reference C77 (at 0.05 1.4 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 33 /Ethernet/ETH2_A1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 5DC23F63) (at 73.45 131.05) (path /5DBDC3C0/5E0CE2BC) (fp_text reference C76 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 33 /Ethernet/ETH2_A1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer B.Cu) (tedit 54A4E4D1) (tstamp 5DCBD4E5) (at 37.95 98.7) (path /5DF7080A/5DFC347C) (fp_text reference C75 (at 0.2 -2.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "47 uF" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 32 "/Power Supply/5V0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23F57) (at 56 156.7 90) (path /5DBDC3C0/5DD4D12A) (fp_text reference C74 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 31 "Net-(C74-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23F51) (at 79.8 156.65 90) (path /5DBDC3C0/5DCCDB9F) (fp_text reference C73 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 30 "Net-(C73-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23F4B) (at 102.85 156.7 90) (path /5DBDC3C0/5DC02786) (fp_text reference C72 (at -2.25 0 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 29 "Net-(C72-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23F45) (at 125.85 156.7 90) (path /5DBDC3C0/5DBEF9D9) (fp_text reference C71 (at -2 0 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 28 "Net-(C71-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23F3F) (at 53.8 136.2) (path /5DBDC3C0/5DD4D11B) (fp_text reference C70 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 27 "Net-(C70-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23F39) (at 52.75 138.75) (path /5DBDC3C0/5DD4D10C) (fp_text reference C69 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 26 "Net-(C69-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23F33) (at 39.2 138.75 180) (path /5DBDC3C0/5DD4D0FD) (fp_text reference C68 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 25 "Net-(C68-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23F2D) (at 38.25 136.2 180) (path /5DBDC3C0/5DD4D0F0) (fp_text reference C67 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 24 "Net-(C67-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23F27) (at 76.75 136.2) (path /5DBDC3C0/5DCCDB90) (fp_text reference C66 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 23 "Net-(C66-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23F21) (at 75.85 138.75) (path /5DBDC3C0/5DCCDB81) (fp_text reference C65 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 22 "Net-(C65-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23F1B) (at 62.15 138.75 180) (path /5DBDC3C0/5DCCDB72) (fp_text reference C64 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 21 "Net-(C64-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23F15) (at 61.25 136.2 180) (path /5DBDC3C0/5DCCDB65) (fp_text reference C63 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 20 "Net-(C63-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23F0F) (at 99.85 136.2) (path /5DBDC3C0/5DC02777) (fp_text reference C62 (at 0 1.05) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 19 "Net-(C62-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23F09) (at 98.85 138.75) (path /5DBDC3C0/5DC02768) (fp_text reference C61 (at 0 1.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 18 "Net-(C61-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23F03) (at 85.2 138.75 180) (path /5DBDC3C0/5DC02759) (fp_text reference C60 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 17 "Net-(C60-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23EFD) (at 84.2 136.2 180) (path /5DBDC3C0/5DC0274C) (fp_text reference C59 (at 0 0.85) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 16 "Net-(C59-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23EF7) (at 122.9 136.2) (path /5DBDC3C0/5DBEE7B1) (fp_text reference C58 (at 0 1.2) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 15 "Net-(C58-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23EF1) (at 121.9 138.75) (path /5DBDC3C0/5DBEDFEF) (fp_text reference C57 (at 2.45 0) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 14 "Net-(C57-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23EEB) (at 108.1 138.7 180) (path /5DBDC3C0/5DBECAA2) (fp_text reference C56 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 13 "Net-(C56-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23EE5) (at 107.1 136.2 180) (path /5DBDC3C0/5DBEBC13) (fp_text reference C55 (at 0 -0.95) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.1 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 12 "Net-(C55-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC23EDF) (at 38.2 129.3) (path /5DBDC3C0/5DD84652) (fp_text reference C54 (at 0.05 1.4) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23ED9) (at 43.65 123.2) (path /5DBDC3C0/5DD8473A) (fp_text reference C53 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23ED3) (at 47.65 123.2 270) (path /5DBDC3C0/5DD84730) (fp_text reference C52 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23ECD) (at 46.8 123.2 270) (path /5DBDC3C0/5DD84726) (fp_text reference C51 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23EC7) (at 49.45 123.8 180) (path /5DBDC3C0/5DD8471C) (fp_text reference C50 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC23EC1) (at 43.25 130.65 270) (path /5DBDC3C0/5DD84690) (fp_text reference C49 (at 0.05 1.4 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 10 /Ethernet/ETH3_A2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23EBB) (at 48.95 125.75 180) (path /5DBDC3C0/5DD84712) (fp_text reference C48 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23EB5) (at 43.8 125.7) (path /5DBDC3C0/5DD846E2) (fp_text reference C47 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 11 /Ethernet/ETH3_A1V2_PLL)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23EAF) (at 48.950001 126.75 180) (path /5DBDC3C0/5DD846BC) (fp_text reference C46 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC23EA9) (at 48.75 130.65 270) (path /5DBDC3C0/5DD84686) (fp_text reference C45 (at 0.05 1.4 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 10 /Ethernet/ETH3_A2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23EA3) (at 48.95 127.7 180) (path /5DBDC3C0/5DD84708) (fp_text reference C44 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5DC23E9D) (at 41.45 125.7 180) (path /5DBDC3C0/5DD846D8) (fp_text reference C43 (at 0 -1.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 11 /Ethernet/ETH3_A1V2_PLL)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23E97) (at 41.4 123.75 90) (path /5DBDC3C0/5DD846B2) (fp_text reference C42 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5DC23E91) (at 50.85 131.25 270) (path /5DBDC3C0/5DD8467C) (fp_text reference C41 (at 0 -1.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 10 /Ethernet/ETH3_A2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5DC23E8B) (at 44.95 128.2) (path /5DBDC3C0/5DD846FE) (fp_text reference C40 (at 0 -1.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5DC23E85) (at 41.35 128.65) (path /5DBDC3C0/5DD846EC) (fp_text reference C39 (at 0 -1.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 5DC23E7F) (at 40.25 122.75 90) (path /5DBDC3C0/5DD846A8) (fp_text reference C38 (at 0 1.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 3 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5DC23E79) (at 53.8 128.75 90) (path /5DBDC3C0/5DD84671) (fp_text reference C37 (at 0 -1.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC23E73) (at 61.25 129.25) (path /5DBDC3C0/5DCCDCB7) (fp_text reference C36 (at 0.05 1.4) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC23E6D) (at 84.9 128.95) (path /5DBDC3C0/5DC59EF4) (fp_text reference C35 (at -2.05 0) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23E67) (at 71.45 128.35 180) (path /5DBDC3C0/5DCCDDA2) (fp_text reference C34 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23E61) (at 89.65 123.15) (path /5DBDC3C0/5DCB8EB0) (fp_text reference C33 (at -1.95 0) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23E5B) (at 71.45 123.85 180) (path /5DBDC3C0/5DCCDD98) (fp_text reference C32 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23E55) (at 91.9 123.5 270) (path /5DBDC3C0/5DCB8EA6) (fp_text reference C31 (at -2.25 0.05 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23E4F) (at 68.7 123.15 270) (path /5DBDC3C0/5DCCDD8E) (fp_text reference C30 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23E49) (at 93.75 127.75 180) (path /5DBDC3C0/5DCB8E9C) (fp_text reference C29 (at 2.45 0) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23E43) (at 71.45 125.15 180) (path /5DBDC3C0/5DCCDD84) (fp_text reference C28 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC23E3D) (at 71.75 130.6 270) (path /5DBDC3C0/5DCCDCF6) (fp_text reference C27 (at 0.05 1.4 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 8 /Ethernet/ETH2_A2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23E37) (at 93.5 121.95 180) (path /5DBDC3C0/5DCB8A3D) (fp_text reference C26 (at -1.95 0) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC23E31) (at 89.25 130.6 270) (path /5DBDC3C0/5DC784E0) (fp_text reference C25 (at 0.1 0.95 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 6 /Ethernet/ETH1_A2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23E2B) (at 66.65 124.25) (path /5DBDC3C0/5DCCDD7A) (fp_text reference C24 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23E25) (at 66.75 125.6) (path /5DBDC3C0/5DCCDD4A) (fp_text reference C23 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 9 /Ethernet/ETH2_A1V2_PLL)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23E1F) (at 64.35 123.75 90) (path /5DBDC3C0/5DCCDD24) (fp_text reference C22 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 5 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC23E19) (at 66.25 130.6 270) (path /5DBDC3C0/5DCCDCEC) (fp_text reference C21 (at 0.05 1.4 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 8 /Ethernet/ETH2_A2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23E13) (at 94.4 123.85 180) (path /5DBDC3C0/5DCB87D9) (fp_text reference C20 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23E0D) (at 89.15 126.25) (path /5DBDC3C0/5DCB1BD1) (fp_text reference C19 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 7 /Ethernet/ETH1_A1V2_PLL)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23E07) (at 88.45 124.75) (path /5DBDC3C0/5DCAAA6D) (fp_text reference C18 (at 0.05 0.85) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 5 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5DC23E01) (at 94.75 130.75 270) (path /5DBDC3C0/5DC78238) (fp_text reference C17 (at 0 -0.95 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "0.47 uF" (at 0.05 3.1 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 6 /Ethernet/ETH1_A2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23DFB) (at 70.550001 122.05 180) (path /5DBDC3C0/5DCCDD70) (fp_text reference C16 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5DC23DF5) (at 64.6 127.4 180) (path /5DBDC3C0/5DCCDD40) (fp_text reference C15 (at 0 -1.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 9 /Ethernet/ETH2_A1V2_PLL)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23DEF) (at 72 126.75 180) (path /5DBDC3C0/5DCCDD1A) (fp_text reference C14 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 5 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 5DC23DE9) (at 64.1 130.25 270) (path /5DBDC3C0/5DCCDCE2) (fp_text reference C13 (at 0 1.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 8 /Ethernet/ETH2_A2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23DE3) (at 93.95 125.75 180) (path /5DBDC3C0/5DCB8508) (fp_text reference C12 (at -2.4 0.3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 5DC23DDD) (at 86.55 126.25 180) (path /5DBDC3C0/5DCB0EC7) (fp_text reference C11 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 7 /Ethernet/ETH1_A1V2_PLL)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5DC23DD7) (at 95 126.75 180) (path /5DBDC3C0/5DCAA66D) (fp_text reference C10 (at -2.85 0) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 5 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 5DC23DD1) (at 97.1 130.25 180) (path /5DBDC3C0/5DC77EDE) (fp_text reference C9 (at -1.95 0) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 6 /Ethernet/ETH1_A2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5DC23DCB) (at 62.35 126 180) (path /5DBDC3C0/5DCCDD66) (fp_text reference C8 (at 0 -1.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 5DC23DC5) (at 75 129.1) (path /5DBDC3C0/5DCCDD54) (fp_text reference C7 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5DC23DBF) (at 74.3 125) (path /5DBDC3C0/5DCCDD10) (fp_text reference C6 (at 0 -1.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 5 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 5DC23DB9) (at 60.9 130.5 180) (path /5DBDC3C0/5DCCDCD7) (fp_text reference C5 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5DC23DB3) (at 90.7 128.45) (path /5DBDC3C0/5DCB818E) (fp_text reference C4 (at 0 -1.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 5DC23DAD) (at 84.65 131.25 180) (path /5DBDC3C0/5DCB2180) (fp_text reference C3 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 4 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 5DC23DA7) (at 86.2 122.9 90) (path /5DBDC3C0/5DCAA237) (fp_text reference C2 (at 0 1.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 5 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 5DC23DA1) (at 100.2 130.5 90) (path /5DBDC3C0/5DC7745D) (fp_text reference C1 (at 2 0 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.125))) ) (fp_text value "4.7 uF" (at 0 3 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 1 /GND)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (gr_text 1V8 (at 40 118.5) (layer F.SilkS) (tstamp 5DCBE791) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text "Place UL mark\nand date code\nin this area" (at 110 103) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (gr_line (start 118 98) (end 101 98) (layer F.Fab) (width 0.15) (tstamp 5DCBDDEC)) (gr_line (start 118 108) (end 118 98) (layer F.Fab) (width 0.15)) (gr_line (start 101 108) (end 118 108) (layer F.Fab) (width 0.15)) (gr_line (start 101 98) (end 101 108) (layer F.Fab) (width 0.15)) (gr_text GND (at 103.5 123.25) (layer F.SilkS) (tstamp 5DCBD89B) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text GND (at 80.5 123.25) (layer F.SilkS) (tstamp 5DCBD899) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text GND (at 59.5 118.5) (layer F.SilkS) (tstamp 5DCBD894) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text 5V0 (at 35.65 136.05 90) (layer F.SilkS) (tstamp 5DCBD52C) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text 3V3 (at 102.2 111.2) (layer F.SilkS) (tstamp 5DCBA8CC) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text 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