(kicad_pcb (version 20171130) (host pcbnew "(6.0.0-rc1-dev-1178-g62e2fe8bb)") (general (thickness 1.6) (drawings 38) (tracks 11108) (zones 0) (modules 278) (nets 400) ) (page A4) (layers (0 F.Cu signal) (1 In1.Cu signal) (2 In2.Cu signal) (31 B.Cu signal) (32 B.Adhes user) (33 F.Adhes user) (34 B.Paste user) (35 F.Paste user) (36 B.SilkS user) (37 F.SilkS user) (38 B.Mask user) (39 F.Mask user) (40 Dwgs.User user) (41 Cmts.User user) (42 Eco1.User user) (43 Eco2.User user) (44 Edge.Cuts user) (45 Margin user) (46 B.CrtYd user) (47 F.CrtYd user) (48 B.Fab user) (49 F.Fab user) ) (setup (last_trace_width 0.1) (user_trace_width 0.1) (user_trace_width 0.125) (user_trace_width 0.165) (user_trace_width 0.175) (trace_clearance 0.099) (zone_clearance 0.15) (zone_45_only no) (trace_min 0.1) (via_size 0.46) (via_drill 0.25) (via_min_size 0.46) (via_min_drill 0.25) (user_via 0.46 0.25) (uvia_size 0.3) (uvia_drill 0.1) (uvias_allowed no) (uvia_min_size 0.2) (uvia_min_drill 0.1) (edge_width 0.05) (segment_width 0.125) (pcb_text_width 0.3) (pcb_text_size 1.5 1.5) (mod_edge_width 0.15) (mod_text_size 0.75 0.75) (mod_text_width 0.125) (pad_size 1.524 1.524) (pad_drill 0.762) (pad_to_mask_clearance 0.05) (solder_mask_min_width 0.05) (aux_axis_origin 0 0) (visible_elements FFFFFF7F) (pcbplotparams (layerselection 0x210fc_ffffffff) (usegerberextensions false) (usegerberattributes false) (usegerberadvancedattributes false) (creategerberjobfile false) (excludeedgelayer true) (linewidth 0.100000) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15.000000) (psnegative false) (psa4output false) (plotreference true) (plotvalue false) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 0) (scaleselection 1) (outputdirectory "output/")) ) (net 0 "") (net 1 /RAM/RAM1_DQ0) (net 2 /RAM/RAM0_DQ7) (net 3 /RAM/RAM0_DQ5) (net 4 /RAM/RAM0_DQ4) (net 5 /RAM/RAM0_DQ1) (net 6 /RAM/RAM1_DQ2) (net 7 /RAM/RAM1_DQS) (net 8 /RAM/RAM0_DQ6) (net 9 /RAM/RAM0_DQ3) (net 10 /RAM/RAM0_DQ2) (net 11 /RAM/RAM0_DQ0) (net 12 /RAM/RAM1_DQ1) (net 13 /RAM/RAM0_PSC_N) (net 14 /RAM/RAM0_PSC_P) (net 15 /RAM/RAM1_CS_N) (net 16 /RAM/RAM0_RST_N) (net 17 /RAM/RAM0_CS_N) (net 18 /RAM/RAM1_DQ4) (net 19 /RAM/RAM1_DQ6) (net 20 /RAM/RAM1_DQ7) (net 21 /RAM/RAM0_CK_N) (net 22 /RAM/RAM0_CK_P) (net 23 /RAM/RAM1_DQ5) (net 24 /RAM/RAM1_CK_N) (net 25 /RAM/RAM1_PSC_P) (net 26 /RAM/RAM0_DQS) (net 27 /RAM/RAM1_CK_P) (net 28 /RAM/RAM1_RST_N) (net 29 /RAM/RAM1_DQ3) (net 30 /RAM/RAM1_PSC_N) (net 31 /Ethernet/ETH_A_P) (net 32 /Ethernet/ETH_A_N) (net 33 /Ethernet/ETH_B_P) (net 34 /Ethernet/ETH_B_N) (net 35 /Ethernet/ETH_C_P) (net 36 /Ethernet/ETH_C_N) (net 37 /Ethernet/ETH_D_P) (net 38 /Ethernet/ETH_D_N) (net 39 /Ethernet/RGMII_RST_N) (net 40 /Ethernet/RGMII_MDIO) (net 41 /Ethernet/RGMII_TX_CLK) (net 42 /Ethernet/RGMII_TXD3) (net 43 /Ethernet/RGMII_TXD2) (net 44 /Ethernet/RGMII_TXD1) (net 45 /Ethernet/RGMII_TXD0) (net 46 /Ethernet/RGMII_MDC) (net 47 /Ethernet/RGMII_RX_CLK) (net 48 /Ethernet/RGMII_RX_DV) (net 49 /Ethernet/RGMII_RXD0) (net 50 /Ethernet/RGMII_RXD1) (net 51 /Ethernet/RGMII_RXD2) (net 52 /Ethernet/RGMII_RXD3) (net 53 /Ethernet/RGMII_TX_EN) (net 54 /MCU/QSPI_DQ3) (net 55 /MCU/QSPI_DQ0) (net 56 /MCU/QSPI_CS_N) (net 57 /MCU/QSPI_DQ1) (net 58 /MCU/QSPI_DQ2) (net 59 /MCU/DCMI_PIXCLK) (net 60 /MCU/DCMI_VSYNC) (net 61 /MCU/DCMI_HSYNC) (net 62 /MCU/RMII_REFCLK) (net 63 /MCU/RMII_TXD0) (net 64 /MCU/RMII_MDIO) (net 65 /MCU/RMII_MDC) (net 66 /MCU/RMII_CRS_DV) (net 67 /MCU/RMII_TXD1) (net 68 /MCU/RMII_RXD1) (net 69 /MCU/RMII_RXD0) (net 70 /MCU/RMII_TX_EN) (net 71 /MCU/DCMI_D2) (net 72 /MCU/DCMI_D1) (net 73 /MCU/DCMI_D7) (net 74 /MCU/DCMI_D0) (net 75 /MCU/DCMI_D6) (net 76 /MCU/DCMI_D5) (net 77 /MCU/DCMI_D4) (net 78 /MCU/DCMI_D3) (net 79 /RAM/GPIO_1V8_16) (net 80 /RAM/GPIO_1V8_17) (net 81 /RAM/GPIO_1V8_14) (net 82 /RAM/GPIO_1V8_15) (net 83 /RAM/GPIO_1V8_12) (net 84 /RAM/GPIO_1V8_13) (net 85 /RAM/GPIO_1V8_10) (net 86 /RAM/GPIO_1V8_11) (net 87 /RAM/GPIO_1V8_8) (net 88 /RAM/GPIO_1V8_9) (net 89 /RAM/GPIO_1V8_6) (net 90 /RAM/GPIO_1V8_7) (net 91 /RAM/GPIO_1V8_4) (net 92 /RAM/GPIO_1V8_5) (net 93 /RAM/GPIO_1V8_2) (net 94 /RAM/GPIO_1V8_3) (net 95 /RAM/GPIO_1V8_0) (net 96 /RAM/GPIO_1V8_1) (net 97 /FPGA/GPIO_2V5_1) (net 98 /FPGA/LVDS_DQ8_N) (net 99 /FPGA/GPIO_2V5_0) (net 100 /FPGA/LVDS_DQ8_P) (net 101 /FPGA/LVDS_DQ6_N) (net 102 /FPGA/LVDS_DQ7_N) (net 103 /FPGA/LVDS_DQ6_P) (net 104 /FPGA/LVDS_DQ7_P) (net 105 /FPGA/LVDS_DQ4_N) (net 106 /FPGA/LVDS_DQ5_N) (net 107 /FPGA/LVDS_DQ4_P) (net 108 /FPGA/LVDS_DQ5_P) (net 109 /FPGA/LVDS_DQ2_N) (net 110 /FPGA/LVDS_DQ3_N) (net 111 /FPGA/LVDS_DQ2_P) (net 112 /FPGA/LVDS_DQ3_P) (net 113 /FPGA/LVDS_DQ0_N) (net 114 /FPGA/LVDS_DQ1_N) (net 115 /FPGA/LVDS_DQ0_P) (net 116 /FPGA/LVDS_DQ1_P) (net 117 "/Power Supply/5V0") (net 118 /FPGA/IO_3V3_3) (net 119 /FPGA/IO_3V3_2) (net 120 /FPGA/IO_3V3_1) (net 121 /FPGA/IO_3V3_0) (net 122 /FPGA/IO_3V3_29) (net 123 /FPGA/IO_3V3_28) (net 124 /FPGA/IO_3V3_27) (net 125 /FPGA/IO_3V3_26) (net 126 /FPGA/IO_3V3_25) (net 127 /FPGA/IO_3V3_24) (net 128 /FPGA/IO_3V3_23) (net 129 /FPGA/IO_3V3_22) (net 130 /FPGA/IO_3V3_21) (net 131 /FPGA/IO_3V3_20) (net 132 /FPGA/IO_3V3_19) (net 133 /FPGA/IO_3V3_18) (net 134 /FPGA/IO_3V3_17) (net 135 /FPGA/IO_3V3_16) (net 136 /FPGA/IO_3V3_15) (net 137 /FPGA/IO_3V3_14) (net 138 /FPGA/IO_3V3_13) (net 139 /FPGA/IO_3V3_12) (net 140 /FPGA/IO_3V3_11) (net 141 /FPGA/IO_3V3_10) (net 142 /FPGA/IO_3V3_9) (net 143 /FPGA/IO_3V3_8) (net 144 /FPGA/IO_3V3_7) (net 145 /FPGA/IO_3V3_6) (net 146 /FPGA/IO_3V3_5) (net 147 /FPGA/IO_3V3_4) (net 148 /FPGA/CLK_3V3_1) (net 149 /FPGA/CLK_3V3_0) (net 150 /RAM/CLK_1V8_0) (net 151 /RAM/CLK_1V8_1) (net 152 "Net-(J2-Pad35)") (net 153 "Net-(J2-Pad36)") (net 154 "Net-(J2-Pad33)") (net 155 "Net-(J2-Pad34)") (net 156 "Net-(J2-Pad29)") (net 157 "Net-(J2-Pad30)") (net 158 "Net-(J2-Pad27)") (net 159 "Net-(J2-Pad28)") (net 160 "Net-(J2-Pad23)") (net 161 "Net-(J2-Pad21)") (net 162 "Net-(J2-Pad17)") (net 163 "Net-(J2-Pad15)") (net 164 "Net-(J2-Pad45)") (net 165 "Net-(J2-Pad46)") (net 166 "Net-(J2-Pad41)") (net 167 "Net-(J2-Pad42)") (net 168 "Net-(J2-Pad39)") (net 169 "Net-(J2-Pad40)") (net 170 "Net-(J2-Pad69)") (net 171 "Net-(J2-Pad65)") (net 172 "Net-(J2-Pad63)") (net 173 "Net-(J2-Pad59)") (net 174 "Net-(J2-Pad60)") (net 175 "Net-(J2-Pad57)") (net 176 "Net-(J2-Pad58)") (net 177 "Net-(J2-Pad53)") (net 178 "Net-(J2-Pad54)") (net 179 "Net-(J2-Pad51)") (net 180 "Net-(J2-Pad52)") (net 181 "Net-(J2-Pad47)") (net 182 "Net-(J2-Pad48)") (net 183 "Net-(J2-Pad94)") (net 184 "Net-(J2-Pad93)") (net 185 "Net-(J2-Pad90)") (net 186 "Net-(J2-Pad89)") (net 187 "Net-(J2-Pad88)") (net 188 "Net-(J2-Pad87)") (net 189 "Net-(J2-Pad84)") (net 190 "Net-(J2-Pad83)") (net 191 "Net-(J2-Pad82)") (net 192 "Net-(J2-Pad81)") (net 193 "Net-(J2-Pad77)") (net 194 "Net-(J2-Pad75)") (net 195 "Net-(J2-Pad71)") (net 196 "Net-(J2-Pad108)") (net 197 "Net-(J2-Pad107)") (net 198 "Net-(J2-Pad106)") (net 199 "Net-(J2-Pad105)") (net 200 "Net-(J2-Pad102)") (net 201 "Net-(J2-Pad101)") (net 202 "Net-(J2-Pad100)") (net 203 "Net-(J2-Pad99)") (net 204 "Net-(J2-Pad96)") (net 205 "Net-(J2-Pad95)") (net 206 /3V3) (net 207 /FPGA/IN_3V3_0_N) (net 208 /FPGA/IN_3V3_0_P) (net 209 /1V8) (net 210 /FPGA_DONE) (net 211 /MCU_RST_N) (net 212 /FPGA_RST_N) (net 213 /JTAG_TCK) (net 214 /MCU_TDO) (net 215 /FPGA_TDI) (net 216 /JTAG_TMS) (net 217 /MCU/CLK_32KHZ) (net 218 "Net-(C2-Pad1)") (net 219 "Net-(C1-Pad2)") (net 220 /FPGA_TDO) (net 221 /FPGA/I2C_SCL) (net 222 /FPGA/I2C_SDA) (net 223 /QSPI_CLK) (net 224 /ETH_LED2_N) (net 225 /FPGA/FPGA_INIT) (net 226 /ETH_LED1_N) (net 227 "Net-(R2-Pad2)") (net 228 /Ethernet/ETH_CLK_25MHZ) (net 229 /Ethernet/A1V2_PLL) (net 230 "Net-(R5-Pad2)") (net 231 /1V2) (net 232 /Ethernet/A2V5) (net 233 /Ethernet/A1V2) (net 234 /GND) (net 235 /2V5) (net 236 /1V0) (net 237 "Net-(D1-Pad2)") (net 238 "Net-(D1-Pad1)") (net 239 "Net-(D3-Pad2)") (net 240 "Net-(D3-Pad1)") (net 241 "Net-(D4-Pad2)") (net 242 "Net-(D4-Pad1)") (net 243 "Net-(D5-Pad2)") (net 244 "Net-(D5-Pad1)") (net 245 "Net-(D6-Pad2)") (net 246 "Net-(D6-Pad1)") (net 247 /MCU_BOOT0) (net 248 "/Power Supply/1V0_SW") (net 249 "/Power Supply/3V3_SW") (net 250 "/Power Supply/1V2_SW") (net 251 "/Power Supply/1V8_SW") (net 252 "/Power Supply/2V5_SW") (net 253 "Net-(R7-Pad1)") (net 254 "Net-(R21-Pad2)") (net 255 /MCU/MCU_CLK) (net 256 "Net-(R22-Pad1)") (net 257 "/Power Supply/PGOOD") (net 258 "Net-(R27-Pad2)") (net 259 /FPGA/FPGA_CLK_25MHZ) (net 260 /MCU/PUDC_B) (net 261 "/Power Supply/1V0_SENSE") (net 262 "/Power Supply/1V2_SENSE") (net 263 "/Power Supply/1V8_SENSE") (net 264 "/Power Supply/2V5_SENSE") (net 265 "/Power Supply/3V3_SENSE") (net 266 "/Power Supply/1V0_FB") (net 267 "/Power Supply/1V2_FB") (net 268 "/Power Supply/1V8_FB") (net 269 "/Power Supply/2V5_FB") (net 270 "/Power Supply/3V3_FB") (net 271 "/Power Supply/MCU_VBAT") (net 272 "Net-(D2-Pad1)") (net 273 "Net-(R50-Pad1)") (net 274 "Net-(R51-Pad1)") (net 275 "Net-(R52-Pad1)") (net 276 "Net-(R53-Pad2)") (net 277 "Net-(R54-Pad2)") (net 278 "Net-(R55-Pad1)") (net 279 "Net-(R56-Pad1)") (net 280 "Net-(R57-Pad1)") (net 281 "Net-(R58-Pad1)") (net 282 "Net-(R59-Pad1)") (net 283 /MCU/JTAG_TDO) (net 284 "Net-(R61-Pad1)") (net 285 /PSU_TEMP) (net 286 /MCU/SPI5_CS_N) (net 287 /MCU/UART6_TX) (net 288 /MCU/SPI5_MOSI) (net 289 /MCU/UART6_RX) (net 290 /MCU/SPI5_MISO) (net 291 /MCU/SPI5_SCK) (net 292 /FPGA/GPIO_LED2) (net 293 /FPGA/GPIO_LED0) (net 294 /FPGA/GPIO_LED1) (net 295 /FPGA/GPIO_LED3) (net 296 "Net-(R62-Pad2)") (net 297 "Net-(R63-Pad2)") (net 298 "Net-(R64-Pad2)") (net 299 "Net-(R65-Pad2)") (net 300 "Net-(R66-Pad2)") (net 301 "Net-(R67-Pad2)") (net 302 "Net-(J2-Pad114)") (net 303 "Net-(J2-Pad112)") (net 304 "Net-(J2-Pad3)") (net 305 "Net-(J2-Pad5)") (net 306 "Net-(J2-Pad9)") (net 307 "Net-(J2-Pad11)") (net 308 "Net-(J2-Pad118)") (net 309 "Net-(J2-Pad119)") (net 310 "Net-(J2-Pad111)") (net 311 "Net-(J2-Pad117)") (net 312 "Net-(U1-PadF1)") (net 313 "Net-(U1-PadH1)") (net 314 "Net-(U1-PadL1)") (net 315 "Net-(U1-PadC2)") (net 316 "Net-(U1-PadB3)") (net 317 "Net-(U1-PadC3)") (net 318 "Net-(U1-PadD3)") (net 319 "Net-(U1-PadE3)") (net 320 "Net-(U1-PadF3)") (net 321 "Net-(U1-PadG3)") (net 322 "Net-(U1-PadH3)") (net 323 "Net-(U1-PadC4)") (net 324 "Net-(U1-PadD4)") (net 325 "Net-(U1-PadE4)") (net 326 "Net-(U1-PadG4)") (net 327 "Net-(U1-PadH4)") (net 328 "Net-(U1-PadJ4)") (net 329 "Net-(U1-PadK4)") (net 330 "Net-(U1-PadC5)") (net 331 "Net-(U1-PadD5)") (net 332 "Net-(U1-PadC6)") (net 333 "Net-(U1-PadD6)") (net 334 "Net-(U1-PadM6)") (net 335 "Net-(U1-PadN6)") (net 336 "Net-(U1-PadP6)") (net 337 "Net-(U1-PadR6)") (net 338 "Net-(U1-PadB7)") (net 339 "Net-(U1-PadC7)") (net 340 "Net-(U1-PadD7)") (net 341 "Net-(U1-PadM7)") (net 342 "Net-(U1-PadN7)") (net 343 "Net-(U1-PadP7)") (net 344 "Net-(U1-PadR7)") (net 345 "Net-(U1-PadB8)") (net 346 "Net-(U1-PadC8)") (net 347 "Net-(U1-PadD8)") (net 348 "Net-(U1-PadM8)") (net 349 "Net-(U1-PadN8)") (net 350 "Net-(U1-PadB9)") (net 351 "Net-(U1-PadC9)") (net 352 "Net-(U1-PadM9)") (net 353 "Net-(U1-PadB10)") (net 354 "Net-(U1-PadD10)") (net 355 "Net-(U1-PadN11)") (net 356 "Net-(U1-PadE12)") (net 357 "Net-(U1-PadF12)") (net 358 "Net-(U1-PadG12)") (net 359 "Net-(U1-PadH12)") (net 360 "Net-(U1-PadJ12)") (net 361 "Net-(U1-PadK12)") (net 362 "Net-(U1-PadM12)") (net 363 "Net-(U1-PadN12)") (net 364 "Net-(U1-PadC13)") (net 365 "Net-(U1-PadD13)") (net 366 "Net-(U1-PadE13)") (net 367 "Net-(U1-PadF13)") (net 368 "Net-(U1-PadG13)") (net 369 "Net-(U1-PadH13)") (net 370 "Net-(U1-PadJ13)") (net 371 "Net-(U1-PadM13)") (net 372 "Net-(U1-PadC14)") (net 373 "Net-(U1-PadD14)") (net 374 "Net-(U1-PadE14)") (net 375 "Net-(U1-PadH14)") (net 376 "Net-(U1-PadJ14)") (net 377 "Net-(U1-PadM14)") (net 378 "Net-(U1-PadN14)") (net 379 "Net-(U1-PadP14)") (net 380 "Net-(U1-PadJ15)") (net 381 "Net-(U1-PadM15)") (net 382 "Net-(U1-PadN15)") (net 383 "Net-(U1-PadP15)") (net 384 "Net-(U2-PadJ7)") (net 385 "Net-(U2-PadH8)") (net 386 "Net-(U2-PadG14)") (net 387 "Net-(U2-PadG11)") (net 388 "Net-(U2-PadH11)") (net 389 "Net-(U2-PadG12)") (net 390 "Net-(U2-PadF12)") (net 391 "Net-(U2-PadD14)") (net 392 "Net-(U2-PadD11)") (net 393 "Net-(U2-PadC12)") (net 394 "Net-(U5-Pad47)") (net 395 "Net-(U5-Pad45)") (net 396 "Net-(U5-Pad43)") (net 397 "Net-(U5-Pad38)") (net 398 "Net-(U5-Pad13)") (net 399 "Net-(U10-Pad3)") (net_class Default "This is the default net class." (clearance 0.099) (trace_width 0.1) (via_dia 0.46) (via_drill 0.25) (uvia_dia 0.3) (uvia_drill 0.1) (diff_pair_width 0.165) (diff_pair_gap 0.1) (add_net /1V0) (add_net /1V2) (add_net /1V8) (add_net /2V5) (add_net /3V3) (add_net /ETH_LED1_N) (add_net /ETH_LED2_N) (add_net /Ethernet/A1V2) (add_net /Ethernet/A1V2_PLL) (add_net /Ethernet/A2V5) (add_net /Ethernet/ETH_A_N) (add_net /Ethernet/ETH_A_P) (add_net /Ethernet/ETH_B_N) (add_net /Ethernet/ETH_B_P) (add_net /Ethernet/ETH_CLK_25MHZ) (add_net /Ethernet/ETH_C_N) (add_net /Ethernet/ETH_C_P) (add_net /Ethernet/ETH_D_N) (add_net /Ethernet/ETH_D_P) (add_net /Ethernet/RGMII_MDC) (add_net /Ethernet/RGMII_MDIO) (add_net /Ethernet/RGMII_RST_N) (add_net /Ethernet/RGMII_RXD0) (add_net /Ethernet/RGMII_RXD1) (add_net /Ethernet/RGMII_RXD2) (add_net /Ethernet/RGMII_RXD3) (add_net /Ethernet/RGMII_RX_CLK) (add_net /Ethernet/RGMII_RX_DV) (add_net /Ethernet/RGMII_TXD0) (add_net /Ethernet/RGMII_TXD1) (add_net /Ethernet/RGMII_TXD2) (add_net /Ethernet/RGMII_TXD3) (add_net /Ethernet/RGMII_TX_CLK) (add_net /Ethernet/RGMII_TX_EN) (add_net /FPGA/CLK_3V3_0) (add_net /FPGA/CLK_3V3_1) (add_net /FPGA/FPGA_CLK_25MHZ) (add_net /FPGA/FPGA_INIT) (add_net /FPGA/GPIO_2V5_0) (add_net /FPGA/GPIO_2V5_1) (add_net /FPGA/GPIO_LED0) (add_net /FPGA/GPIO_LED1) (add_net /FPGA/GPIO_LED2) (add_net /FPGA/GPIO_LED3) (add_net /FPGA/I2C_SCL) (add_net /FPGA/I2C_SDA) (add_net /FPGA/IN_3V3_0_N) (add_net /FPGA/IN_3V3_0_P) (add_net /FPGA/IO_3V3_0) (add_net /FPGA/IO_3V3_1) (add_net /FPGA/IO_3V3_10) (add_net /FPGA/IO_3V3_11) (add_net /FPGA/IO_3V3_12) (add_net /FPGA/IO_3V3_13) (add_net /FPGA/IO_3V3_14) (add_net /FPGA/IO_3V3_15) (add_net /FPGA/IO_3V3_16) (add_net /FPGA/IO_3V3_17) (add_net /FPGA/IO_3V3_18) (add_net /FPGA/IO_3V3_19) (add_net /FPGA/IO_3V3_2) (add_net /FPGA/IO_3V3_20) (add_net /FPGA/IO_3V3_21) (add_net /FPGA/IO_3V3_22) (add_net /FPGA/IO_3V3_23) (add_net /FPGA/IO_3V3_24) (add_net /FPGA/IO_3V3_25) (add_net /FPGA/IO_3V3_26) (add_net /FPGA/IO_3V3_27) (add_net /FPGA/IO_3V3_28) (add_net /FPGA/IO_3V3_29) (add_net /FPGA/IO_3V3_3) (add_net /FPGA/IO_3V3_4) (add_net /FPGA/IO_3V3_5) (add_net /FPGA/IO_3V3_6) (add_net /FPGA/IO_3V3_7) (add_net /FPGA/IO_3V3_8) (add_net /FPGA/IO_3V3_9) (add_net /FPGA/LVDS_DQ0_N) (add_net /FPGA/LVDS_DQ0_P) (add_net /FPGA/LVDS_DQ1_N) (add_net /FPGA/LVDS_DQ1_P) (add_net /FPGA/LVDS_DQ2_N) (add_net /FPGA/LVDS_DQ2_P) (add_net /FPGA/LVDS_DQ3_N) (add_net /FPGA/LVDS_DQ3_P) (add_net /FPGA/LVDS_DQ4_N) (add_net /FPGA/LVDS_DQ4_P) (add_net /FPGA/LVDS_DQ5_N) (add_net /FPGA/LVDS_DQ5_P) (add_net /FPGA/LVDS_DQ6_N) (add_net /FPGA/LVDS_DQ6_P) (add_net /FPGA/LVDS_DQ7_N) (add_net /FPGA/LVDS_DQ7_P) (add_net /FPGA/LVDS_DQ8_N) (add_net /FPGA/LVDS_DQ8_P) (add_net /FPGA_DONE) (add_net /FPGA_RST_N) (add_net /FPGA_TDI) (add_net /FPGA_TDO) (add_net /GND) (add_net /JTAG_TCK) (add_net /JTAG_TMS) (add_net /MCU/CLK_32KHZ) (add_net /MCU/DCMI_D0) (add_net /MCU/DCMI_D1) (add_net /MCU/DCMI_D2) (add_net /MCU/DCMI_D3) (add_net /MCU/DCMI_D4) (add_net /MCU/DCMI_D5) (add_net /MCU/DCMI_D6) (add_net /MCU/DCMI_D7) (add_net /MCU/DCMI_HSYNC) (add_net /MCU/DCMI_PIXCLK) (add_net /MCU/DCMI_VSYNC) (add_net /MCU/JTAG_TDO) (add_net /MCU/MCU_CLK) (add_net /MCU/PUDC_B) (add_net /MCU/QSPI_CS_N) (add_net /MCU/QSPI_DQ0) (add_net /MCU/QSPI_DQ1) (add_net /MCU/QSPI_DQ2) (add_net /MCU/QSPI_DQ3) (add_net /MCU/RMII_CRS_DV) (add_net /MCU/RMII_MDC) (add_net /MCU/RMII_MDIO) (add_net /MCU/RMII_REFCLK) (add_net /MCU/RMII_RXD0) (add_net /MCU/RMII_RXD1) (add_net /MCU/RMII_TXD0) (add_net /MCU/RMII_TXD1) (add_net /MCU/RMII_TX_EN) (add_net /MCU/SPI5_CS_N) (add_net /MCU/SPI5_MISO) (add_net /MCU/SPI5_MOSI) (add_net /MCU/SPI5_SCK) (add_net /MCU/UART6_RX) (add_net /MCU/UART6_TX) (add_net /MCU_BOOT0) (add_net /MCU_RST_N) (add_net /MCU_TDO) (add_net /PSU_TEMP) (add_net "/Power Supply/1V0_FB") (add_net "/Power Supply/1V0_SENSE") (add_net "/Power Supply/1V0_SW") (add_net "/Power Supply/1V2_FB") (add_net "/Power Supply/1V2_SENSE") (add_net "/Power Supply/1V2_SW") (add_net "/Power Supply/1V8_FB") (add_net "/Power Supply/1V8_SENSE") (add_net "/Power Supply/1V8_SW") (add_net "/Power Supply/2V5_FB") (add_net "/Power Supply/2V5_SENSE") (add_net "/Power Supply/2V5_SW") (add_net "/Power Supply/3V3_FB") (add_net "/Power Supply/3V3_SENSE") (add_net "/Power Supply/3V3_SW") (add_net "/Power Supply/5V0") (add_net "/Power Supply/MCU_VBAT") (add_net "/Power Supply/PGOOD") (add_net /QSPI_CLK) (add_net /RAM/CLK_1V8_0) (add_net /RAM/CLK_1V8_1) (add_net /RAM/GPIO_1V8_0) (add_net /RAM/GPIO_1V8_1) (add_net /RAM/GPIO_1V8_10) (add_net /RAM/GPIO_1V8_11) (add_net /RAM/GPIO_1V8_12) (add_net /RAM/GPIO_1V8_13) (add_net /RAM/GPIO_1V8_14) (add_net /RAM/GPIO_1V8_15) (add_net /RAM/GPIO_1V8_16) (add_net /RAM/GPIO_1V8_17) (add_net /RAM/GPIO_1V8_2) (add_net /RAM/GPIO_1V8_3) (add_net /RAM/GPIO_1V8_4) (add_net /RAM/GPIO_1V8_5) (add_net /RAM/GPIO_1V8_6) (add_net /RAM/GPIO_1V8_7) (add_net /RAM/GPIO_1V8_8) (add_net /RAM/GPIO_1V8_9) (add_net /RAM/RAM0_CK_N) (add_net /RAM/RAM0_CK_P) (add_net /RAM/RAM0_CS_N) (add_net /RAM/RAM0_DQ0) (add_net /RAM/RAM0_DQ1) (add_net /RAM/RAM0_DQ2) (add_net /RAM/RAM0_DQ3) (add_net /RAM/RAM0_DQ4) (add_net /RAM/RAM0_DQ5) (add_net /RAM/RAM0_DQ6) (add_net /RAM/RAM0_DQ7) (add_net /RAM/RAM0_DQS) (add_net /RAM/RAM0_PSC_N) (add_net /RAM/RAM0_PSC_P) (add_net /RAM/RAM0_RST_N) (add_net /RAM/RAM1_CK_N) (add_net /RAM/RAM1_CK_P) (add_net /RAM/RAM1_CS_N) (add_net /RAM/RAM1_DQ0) (add_net /RAM/RAM1_DQ1) (add_net /RAM/RAM1_DQ2) (add_net /RAM/RAM1_DQ3) (add_net /RAM/RAM1_DQ4) (add_net /RAM/RAM1_DQ5) (add_net /RAM/RAM1_DQ6) (add_net /RAM/RAM1_DQ7) (add_net /RAM/RAM1_DQS) (add_net /RAM/RAM1_PSC_N) (add_net /RAM/RAM1_PSC_P) (add_net /RAM/RAM1_RST_N) (add_net "Net-(C1-Pad2)") (add_net "Net-(C2-Pad1)") (add_net "Net-(D1-Pad1)") (add_net "Net-(D1-Pad2)") (add_net "Net-(D2-Pad1)") (add_net "Net-(D3-Pad1)") (add_net "Net-(D3-Pad2)") (add_net "Net-(D4-Pad1)") (add_net "Net-(D4-Pad2)") (add_net "Net-(D5-Pad1)") (add_net "Net-(D5-Pad2)") (add_net "Net-(D6-Pad1)") (add_net "Net-(D6-Pad2)") (add_net "Net-(J2-Pad100)") (add_net "Net-(J2-Pad101)") (add_net "Net-(J2-Pad102)") (add_net "Net-(J2-Pad105)") (add_net "Net-(J2-Pad106)") (add_net "Net-(J2-Pad107)") (add_net "Net-(J2-Pad108)") (add_net "Net-(J2-Pad11)") (add_net "Net-(J2-Pad111)") (add_net "Net-(J2-Pad112)") (add_net "Net-(J2-Pad114)") (add_net "Net-(J2-Pad117)") (add_net "Net-(J2-Pad118)") (add_net "Net-(J2-Pad119)") (add_net "Net-(J2-Pad15)") (add_net "Net-(J2-Pad17)") (add_net "Net-(J2-Pad21)") (add_net "Net-(J2-Pad23)") (add_net "Net-(J2-Pad27)") (add_net "Net-(J2-Pad28)") (add_net "Net-(J2-Pad29)") (add_net "Net-(J2-Pad3)") (add_net "Net-(J2-Pad30)") (add_net "Net-(J2-Pad33)") (add_net "Net-(J2-Pad34)") (add_net "Net-(J2-Pad35)") (add_net "Net-(J2-Pad36)") (add_net "Net-(J2-Pad39)") (add_net "Net-(J2-Pad40)") (add_net "Net-(J2-Pad41)") (add_net "Net-(J2-Pad42)") (add_net "Net-(J2-Pad45)") (add_net "Net-(J2-Pad46)") (add_net "Net-(J2-Pad47)") (add_net "Net-(J2-Pad48)") (add_net "Net-(J2-Pad5)") (add_net "Net-(J2-Pad51)") (add_net "Net-(J2-Pad52)") (add_net "Net-(J2-Pad53)") (add_net "Net-(J2-Pad54)") (add_net "Net-(J2-Pad57)") (add_net "Net-(J2-Pad58)") (add_net "Net-(J2-Pad59)") (add_net "Net-(J2-Pad60)") (add_net "Net-(J2-Pad63)") (add_net "Net-(J2-Pad65)") (add_net "Net-(J2-Pad69)") (add_net "Net-(J2-Pad71)") (add_net "Net-(J2-Pad75)") (add_net "Net-(J2-Pad77)") (add_net "Net-(J2-Pad81)") (add_net "Net-(J2-Pad82)") (add_net "Net-(J2-Pad83)") (add_net "Net-(J2-Pad84)") (add_net "Net-(J2-Pad87)") (add_net "Net-(J2-Pad88)") (add_net "Net-(J2-Pad89)") (add_net "Net-(J2-Pad9)") (add_net "Net-(J2-Pad90)") (add_net "Net-(J2-Pad93)") (add_net "Net-(J2-Pad94)") (add_net "Net-(J2-Pad95)") (add_net "Net-(J2-Pad96)") (add_net "Net-(J2-Pad99)") (add_net "Net-(R2-Pad2)") (add_net "Net-(R21-Pad2)") (add_net "Net-(R22-Pad1)") (add_net "Net-(R27-Pad2)") (add_net "Net-(R5-Pad2)") (add_net "Net-(R50-Pad1)") (add_net "Net-(R51-Pad1)") (add_net "Net-(R52-Pad1)") (add_net "Net-(R53-Pad2)") (add_net "Net-(R54-Pad2)") (add_net "Net-(R55-Pad1)") (add_net "Net-(R56-Pad1)") (add_net "Net-(R57-Pad1)") (add_net "Net-(R58-Pad1)") (add_net "Net-(R59-Pad1)") (add_net "Net-(R61-Pad1)") (add_net "Net-(R62-Pad2)") (add_net "Net-(R63-Pad2)") (add_net "Net-(R64-Pad2)") (add_net "Net-(R65-Pad2)") (add_net "Net-(R66-Pad2)") (add_net "Net-(R67-Pad2)") (add_net "Net-(R7-Pad1)") (add_net "Net-(U1-PadB10)") (add_net "Net-(U1-PadB3)") (add_net "Net-(U1-PadB7)") (add_net "Net-(U1-PadB8)") (add_net "Net-(U1-PadB9)") (add_net "Net-(U1-PadC13)") (add_net "Net-(U1-PadC14)") (add_net "Net-(U1-PadC2)") (add_net "Net-(U1-PadC3)") (add_net "Net-(U1-PadC4)") (add_net "Net-(U1-PadC5)") (add_net "Net-(U1-PadC6)") (add_net "Net-(U1-PadC7)") (add_net "Net-(U1-PadC8)") (add_net "Net-(U1-PadC9)") (add_net "Net-(U1-PadD10)") (add_net "Net-(U1-PadD13)") (add_net "Net-(U1-PadD14)") (add_net "Net-(U1-PadD3)") (add_net "Net-(U1-PadD4)") (add_net "Net-(U1-PadD5)") (add_net "Net-(U1-PadD6)") (add_net "Net-(U1-PadD7)") (add_net "Net-(U1-PadD8)") (add_net "Net-(U1-PadE12)") (add_net "Net-(U1-PadE13)") (add_net "Net-(U1-PadE14)") (add_net "Net-(U1-PadE3)") (add_net "Net-(U1-PadE4)") (add_net "Net-(U1-PadF1)") (add_net "Net-(U1-PadF12)") (add_net "Net-(U1-PadF13)") (add_net "Net-(U1-PadF3)") (add_net "Net-(U1-PadG12)") (add_net "Net-(U1-PadG13)") (add_net "Net-(U1-PadG3)") (add_net "Net-(U1-PadG4)") (add_net "Net-(U1-PadH1)") (add_net "Net-(U1-PadH12)") (add_net "Net-(U1-PadH13)") (add_net "Net-(U1-PadH14)") (add_net "Net-(U1-PadH3)") (add_net "Net-(U1-PadH4)") (add_net "Net-(U1-PadJ12)") (add_net "Net-(U1-PadJ13)") (add_net "Net-(U1-PadJ14)") (add_net "Net-(U1-PadJ15)") (add_net "Net-(U1-PadJ4)") (add_net "Net-(U1-PadK12)") (add_net "Net-(U1-PadK4)") (add_net "Net-(U1-PadL1)") (add_net "Net-(U1-PadM12)") (add_net "Net-(U1-PadM13)") (add_net "Net-(U1-PadM14)") (add_net "Net-(U1-PadM15)") (add_net "Net-(U1-PadM6)") (add_net "Net-(U1-PadM7)") (add_net "Net-(U1-PadM8)") (add_net "Net-(U1-PadM9)") (add_net "Net-(U1-PadN11)") (add_net "Net-(U1-PadN12)") (add_net "Net-(U1-PadN14)") (add_net "Net-(U1-PadN15)") (add_net "Net-(U1-PadN6)") (add_net "Net-(U1-PadN7)") (add_net "Net-(U1-PadN8)") (add_net "Net-(U1-PadP14)") (add_net "Net-(U1-PadP15)") (add_net "Net-(U1-PadP6)") (add_net "Net-(U1-PadP7)") (add_net "Net-(U1-PadR6)") (add_net "Net-(U1-PadR7)") (add_net "Net-(U10-Pad3)") (add_net "Net-(U2-PadC12)") (add_net "Net-(U2-PadD11)") (add_net "Net-(U2-PadD14)") (add_net "Net-(U2-PadF12)") (add_net "Net-(U2-PadG11)") (add_net "Net-(U2-PadG12)") (add_net "Net-(U2-PadG14)") (add_net "Net-(U2-PadH11)") (add_net "Net-(U2-PadH8)") (add_net "Net-(U2-PadJ7)") (add_net "Net-(U5-Pad13)") (add_net "Net-(U5-Pad38)") (add_net "Net-(U5-Pad43)") (add_net "Net-(U5-Pad45)") (add_net "Net-(U5-Pad47)") ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5C054732) (at 48.55 23.95) (path /5B6B702C/5C09A189) (fp_text reference C150 (at -0.05 -1.35) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5C0521C4) (at 47.6 29.9) (path /5B6B702C/5C08E6D3) (fp_text reference C149 (at 1.9 -0.8) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.125)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5C04E6B3) (at 47.875 37.75) (path /5B6B702C/5C079069) (fp_text reference C148 (at 2.375 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5C04E6AD) (at 62.7 29.9 180) (path /5B6B702C/5C078B6E) (fp_text reference C147 (at -2.7 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5C04E6A7) (at 62.925 35.4 180) (path /5B6B702C/5C0711F3) (fp_text reference C146 (at 2.975 0.3 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5C04E6A1) (at 63.5 24.1 180) (path /5B6B702C/5C06A03D) (fp_text reference C145 (at -2.3 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:TESTPOINT_BARETRACE_328UM (layer F.Cu) (tedit 590FD06D) (tstamp 5C0244CC) (at 63.5 61.7) (path /5C04B243) (solder_mask_margin 0.05) (fp_text reference TP19 (at 0 3.25) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTPAD (at 0 1.75) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd rect (at 0 0) (size 0.328 1) (layers F.Cu F.Mask) (net 234 /GND)) ) (module azonenberg_pcb:TESTPOINT_BARETRACE_328UM (layer F.Cu) (tedit 590FD06D) (tstamp 5C05BC64) (at 80.05 49.15 90) (path /5C03F491) (solder_mask_margin 0.05) (fp_text reference TP18 (at 0 3.25 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTPAD (at 0 1.75 90) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd rect (at 0 0 90) (size 0.328 1) (layers F.Cu F.Mask) (net 234 /GND)) ) (module azonenberg_pcb:TESTPOINT_BARETRACE_328UM (layer F.Cu) (tedit 590FD06D) (tstamp 5C01E7AC) (at 110.1 66.1 90) (path /5C027F8E) (solder_mask_margin 0.05) (fp_text reference TP17 (at 0 3.25 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTPAD (at 0 1.75 90) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd rect (at 0 0 90) (size 0.328 1) (layers F.Cu F.Mask) (net 234 /GND)) ) (module azonenberg_pcb:TESTPOINT_BARETRACE_328UM (layer F.Cu) (tedit 590FD06D) (tstamp 5C01C2C7) (at 67.225 61.8 90) (path /5C01FB32) (solder_mask_margin 0.05) (fp_text reference TP16 (at 0 3.25 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTPAD (at 0 1.75 90) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd rect (at 0 0 90) (size 0.328 1) (layers F.Cu F.Mask) (net 234 /GND)) ) (module azonenberg_pcb:TESTPOINT_BARETRACE_328UM (layer F.Cu) (tedit 590FD06D) (tstamp 5C01979F) (at 63.8 67.95 90) (path /5C01BAEF) (solder_mask_margin 0.05) (fp_text reference TP15 (at 0 3.25 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTPAD (at 0 1.75 90) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd rect (at 0 0 90) (size 0.328 1) (layers F.Cu F.Mask) (net 234 /GND)) ) (module azonenberg_pcb:TESTPOINT_BARETRACE_328UM (layer F.Cu) (tedit 590FD06D) (tstamp 5C01730D) (at 44.95 24.65) (path /5C017C13) (solder_mask_margin 0.05) (fp_text reference TP14 (at 0 3.25) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTPAD (at 0 1.75) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd rect (at 0 0) (size 0.328 1) (layers F.Cu F.Mask) (net 234 /GND)) ) (module azonenberg_pcb:TESTPOINT_BARETRACE_328UM (layer F.Cu) (tedit 590FD06D) (tstamp 5C011B34) (at 88.6 68.25 90) (path /5C011C4C) (solder_mask_margin 0.05) (fp_text reference TP13 (at 0 3.25 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTPAD (at 0 1.75 90) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd rect (at 0 0 90) (size 0.328 1) (layers F.Cu F.Mask) (net 234 /GND)) ) (module azonenberg_pcb:TESTPOINT_BARETRACE_328UM (layer F.Cu) (tedit 590FD06D) (tstamp 5C00FBAF) (at 89.95 70.55 270) (path /5C00F507) (solder_mask_margin 0.05) (fp_text reference TP12 (at 1.1 0.125 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTPAD (at 0 1.75 270) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd rect (at 0 0 270) (size 0.328 1) (layers F.Cu F.Mask) (net 234 /GND)) ) (module azonenberg_pcb:FIDUCIAL_1MM (layer F.Cu) (tedit 53D60D63) (tstamp 5C06A4B4) (at 103 19) (fp_text reference FIDUCIAL_1MM (at 0 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value VAL** (at 0.1 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad "" smd circle (at 0 0) (size 1 1) (layers F.Cu F.Mask) (solder_mask_margin 1) (clearance 1)) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 5BFC596C) (at 90.7 31.2) (path /5B6B7005/5C11F6A8) (fp_text reference TP11 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTPAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 271 "/Power Supply/MCU_VBAT")) ) (module azonenberg_pcb:BGA_216_13x13_DEPOP3x3_0.8MM (layer F.Cu) (tedit 5B6A1513) (tstamp 5BF49540) (at 92 52 270) (path /5B6B7005/5B6DDE7E) (fp_text reference U1 (at -7 2.3) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value STM32F777NIH6‎ (at 0 7.5 270) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start -5.6 -6.4) (end -6.4 -5.6) (layer F.SilkS) (width 0.15)) (fp_line (start -6.4 -5.6) (end -6.4 6.4) (layer F.SilkS) (width 0.15)) (fp_line (start -6.4 6.4) (end 6.4 6.4) (layer F.SilkS) (width 0.15)) (fp_line (start 6.4 6.4) (end 6.4 -6.4) (layer F.SilkS) (width 0.15)) (fp_line (start 6.4 -6.4) (end -5.6 -6.4) (layer F.SilkS) (width 0.15)) (pad A1 smd circle (at -5.6 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 184 "Net-(J2-Pad93)")) (pad B1 smd circle (at -5.6 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 205 "Net-(J2-Pad95)")) (pad C1 smd circle (at -5.6 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 271 "/Power Supply/MCU_VBAT")) (pad D1 smd circle (at -5.6 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 203 "Net-(J2-Pad99)")) (pad E1 smd circle (at -5.6 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 217 /MCU/CLK_32KHZ)) (pad F1 smd circle (at -5.6 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 312 "Net-(U1-PadF1)")) (pad G1 smd circle (at -5.6 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 255 /MCU/MCU_CLK)) (pad H1 smd circle (at -5.6 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 313 "Net-(U1-PadH1)")) (pad J1 smd circle (at -5.6 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 211 /MCU_RST_N)) (pad K1 smd circle (at -5.6 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 185 "Net-(J2-Pad90)")) (pad L1 smd circle (at -5.6 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 314 "Net-(U1-PadL1)")) (pad M1 smd circle (at -5.6 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad N1 smd circle (at -5.6 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad P1 smd circle (at -5.6 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad R1 smd circle (at -5.6 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad A2 smd circle (at -4.8 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 188 "Net-(J2-Pad87)")) (pad B2 smd circle (at -4.8 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 186 "Net-(J2-Pad89)")) (pad C2 smd circle (at -4.8 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 315 "Net-(U1-PadC2)")) (pad D2 smd circle (at -4.8 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 201 "Net-(J2-Pad101)")) (pad E2 smd circle (at -4.8 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 199 "Net-(J2-Pad105)")) (pad F2 smd circle (at -4.8 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad G2 smd circle (at -4.8 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 197 "Net-(J2-Pad107)")) (pad H2 smd circle (at -4.8 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 310 "Net-(J2-Pad111)")) (pad J2 smd circle (at -4.8 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 311 "Net-(J2-Pad117)")) (pad K2 smd circle (at -4.8 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 183 "Net-(J2-Pad94)")) (pad L2 smd circle (at -4.8 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 202 "Net-(J2-Pad100)")) (pad M2 smd circle (at -4.8 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 303 "Net-(J2-Pad112)")) (pad N2 smd circle (at -4.8 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 62 /MCU/RMII_REFCLK)) (pad P2 smd circle (at -4.8 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 64 /MCU/RMII_MDIO)) (pad R2 smd circle (at -4.8 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 198 "Net-(J2-Pad106)")) (pad A3 smd circle (at -4 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 190 "Net-(J2-Pad83)")) (pad B3 smd circle (at -4 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 316 "Net-(U1-PadB3)")) (pad C3 smd circle (at -4 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 317 "Net-(U1-PadC3)")) (pad D3 smd circle (at -4 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 318 "Net-(U1-PadD3)")) (pad E3 smd circle (at -4 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 319 "Net-(U1-PadE3)")) (pad F3 smd circle (at -4 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 320 "Net-(U1-PadF3)")) (pad G3 smd circle (at -4 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 321 "Net-(U1-PadG3)")) (pad H3 smd circle (at -4 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 322 "Net-(U1-PadH3)")) (pad J3 smd circle (at -4 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 286 /MCU/SPI5_CS_N)) (pad K3 smd circle (at -4 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 309 "Net-(J2-Pad119)")) (pad L3 smd circle (at -4 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 204 "Net-(J2-Pad96)")) (pad M3 smd circle (at -4 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 65 /MCU/RMII_MDC)) (pad N3 smd circle (at -4 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 196 "Net-(J2-Pad108)")) (pad P3 smd circle (at -4 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 59 /MCU/DCMI_PIXCLK)) (pad R3 smd circle (at -4 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 66 /MCU/RMII_CRS_DV)) (pad A4 smd circle (at -3.2 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 287 /MCU/UART6_TX)) (pad B4 smd circle (at -3.2 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 73 /MCU/DCMI_D7)) (pad C4 smd circle (at -3.2 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 323 "Net-(U1-PadC4)")) (pad D4 smd circle (at -3.2 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 324 "Net-(U1-PadD4)")) (pad E4 smd circle (at -3.2 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 325 "Net-(U1-PadE4)")) (pad F4 smd circle (at -3.2 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad G4 smd circle (at -3.2 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 326 "Net-(U1-PadG4)")) (pad H4 smd circle (at -3.2 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 327 "Net-(U1-PadH4)")) (pad J4 smd circle (at -3.2 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 328 "Net-(U1-PadJ4)")) (pad K4 smd circle (at -3.2 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 329 "Net-(U1-PadK4)")) (pad L4 smd circle (at -3.2 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 200 "Net-(J2-Pad102)")) (pad M4 smd circle (at -3.2 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 187 "Net-(J2-Pad88)")) (pad N4 smd circle (at -3.2 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 61 /MCU/DCMI_HSYNC)) (pad P4 smd circle (at -3.2 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 302 "Net-(J2-Pad114)")) (pad R4 smd circle (at -3.2 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 308 "Net-(J2-Pad118)")) (pad A5 smd circle (at -2.4 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 192 "Net-(J2-Pad81)")) (pad B5 smd circle (at -2.4 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 60 /MCU/DCMI_VSYNC)) (pad C5 smd circle (at -2.4 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 330 "Net-(U1-PadC5)")) (pad D5 smd circle (at -2.4 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 331 "Net-(U1-PadD5)")) (pad E5 smd circle (at -2.4 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad F5 smd circle (at -2.4 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad G5 smd circle (at -2.4 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad H5 smd circle (at -2.4 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad J5 smd circle (at -2.4 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad K5 smd circle (at -2.4 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad L5 smd circle (at -2.4 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad M5 smd circle (at -2.4 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 189 "Net-(J2-Pad84)")) (pad N5 smd circle (at -2.4 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 69 /MCU/RMII_RXD0)) (pad P5 smd circle (at -2.4 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 68 /MCU/RMII_RXD1)) (pad R5 smd circle (at -2.4 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 191 "Net-(J2-Pad82)")) (pad A6 smd circle (at -1.6 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 193 "Net-(J2-Pad77)")) (pad B6 smd circle (at -1.6 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 76 /MCU/DCMI_D5)) (pad C6 smd circle (at -1.6 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 332 "Net-(U1-PadC6)")) (pad D6 smd circle (at -1.6 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 333 "Net-(U1-PadD6)")) (pad E6 smd circle (at -1.6 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 247 /MCU_BOOT0)) (pad F6 smd circle (at -1.6 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad G6 smd circle (at -1.6 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad H6 smd circle (at -1.6 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad J6 smd circle (at -1.6 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad K6 smd circle (at -1.6 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad L6 smd circle (at -1.6 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad M6 smd circle (at -1.6 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 334 "Net-(U1-PadM6)")) (pad N6 smd circle (at -1.6 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 335 "Net-(U1-PadN6)")) (pad P6 smd circle (at -1.6 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 336 "Net-(U1-PadP6)")) (pad R6 smd circle (at -1.6 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 337 "Net-(U1-PadR6)")) (pad A7 smd circle (at -0.8 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 75 /MCU/DCMI_D6)) (pad B7 smd circle (at -0.8 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 338 "Net-(U1-PadB7)")) (pad C7 smd circle (at -0.8 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 339 "Net-(U1-PadC7)")) (pad D7 smd circle (at -0.8 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 340 "Net-(U1-PadD7)")) (pad E7 smd circle (at -0.8 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad F7 smd circle (at -0.8 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad K7 smd circle (at -0.8 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad L7 smd circle (at -0.8 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad M7 smd circle (at -0.8 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 341 "Net-(U1-PadM7)")) (pad N7 smd circle (at -0.8 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 342 "Net-(U1-PadN7)")) (pad P7 smd circle (at -0.8 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 343 "Net-(U1-PadP7)")) (pad R7 smd circle (at -0.8 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 344 "Net-(U1-PadR7)")) (pad A8 smd circle (at 0 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 194 "Net-(J2-Pad75)")) (pad B8 smd circle (at 0 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 345 "Net-(U1-PadB8)")) (pad C8 smd circle (at 0 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 346 "Net-(U1-PadC8)")) (pad D8 smd circle (at 0 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 347 "Net-(U1-PadD8)")) (pad E8 smd circle (at 0 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad F8 smd circle (at 0 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad K8 smd circle (at 0 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad L8 smd circle (at 0 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad M8 smd circle (at 0 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 348 "Net-(U1-PadM8)")) (pad N8 smd circle (at 0 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 349 "Net-(U1-PadN8)")) (pad P8 smd circle (at 0 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 288 /MCU/SPI5_MOSI)) (pad R8 smd circle (at 0 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 304 "Net-(J2-Pad3)")) (pad A9 smd circle (at 0.8 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 195 "Net-(J2-Pad71)")) (pad B9 smd circle (at 0.8 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 350 "Net-(U1-PadB9)")) (pad C9 smd circle (at 0.8 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 351 "Net-(U1-PadC9)")) (pad D9 smd circle (at 0.8 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 289 /MCU/UART6_RX)) (pad E9 smd circle (at 0.8 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad F9 smd circle (at 0.8 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad K9 smd circle (at 0.8 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad L9 smd circle (at 0.8 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad M9 smd circle (at 0.8 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 352 "Net-(U1-PadM9)")) (pad N9 smd circle (at 0.8 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 305 "Net-(J2-Pad5)")) (pad P9 smd circle (at 0.8 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 307 "Net-(J2-Pad11)")) (pad R9 smd circle (at 0.8 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 306 "Net-(J2-Pad9)")) (pad A10 smd circle (at 1.6 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 283 /MCU/JTAG_TDO)) (pad B10 smd circle (at 1.6 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 353 "Net-(U1-PadB10)")) (pad C10 smd circle (at 1.6 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 170 "Net-(J2-Pad69)")) (pad D10 smd circle (at 1.6 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 354 "Net-(U1-PadD10)")) (pad E10 smd circle (at 1.6 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad F10 smd circle (at 1.6 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad G10 smd circle (at 1.6 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad H10 smd circle (at 1.6 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad J10 smd circle (at 1.6 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad K10 smd circle (at 1.6 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad L10 smd circle (at 1.6 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad M10 smd circle (at 1.6 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 160 "Net-(J2-Pad23)")) (pad N10 smd circle (at 1.6 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 161 "Net-(J2-Pad21)")) (pad P10 smd circle (at 1.6 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 163 "Net-(J2-Pad15)")) (pad R10 smd circle (at 1.6 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 162 "Net-(J2-Pad17)")) (pad A11 smd circle (at 2.4 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 174 "Net-(J2-Pad60)")) (pad B11 smd circle (at 2.4 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 176 "Net-(J2-Pad58)")) (pad C11 smd circle (at 2.4 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 172 "Net-(J2-Pad63)")) (pad D11 smd circle (at 2.4 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 171 "Net-(J2-Pad65)")) (pad E11 smd circle (at 2.4 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 218 "Net-(C2-Pad1)")) (pad F11 smd circle (at 2.4 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad G11 smd circle (at 2.4 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad H11 smd circle (at 2.4 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad J11 smd circle (at 2.4 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad K11 smd circle (at 2.4 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad L11 smd circle (at 2.4 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 219 "Net-(C1-Pad2)")) (pad M11 smd circle (at 2.4 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 154 "Net-(J2-Pad33)")) (pad N11 smd circle (at 2.4 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 355 "Net-(U1-PadN11)")) (pad P11 smd circle (at 2.4 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 156 "Net-(J2-Pad29)")) (pad R11 smd circle (at 2.4 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 158 "Net-(J2-Pad27)")) (pad A12 smd circle (at 3.2 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 180 "Net-(J2-Pad52)")) (pad B12 smd circle (at 3.2 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 178 "Net-(J2-Pad54)")) (pad C12 smd circle (at 3.2 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 182 "Net-(J2-Pad48)")) (pad D12 smd circle (at 3.2 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 165 "Net-(J2-Pad46)")) (pad E12 smd circle (at 3.2 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 356 "Net-(U1-PadE12)")) (pad F12 smd circle (at 3.2 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 357 "Net-(U1-PadF12)")) (pad G12 smd circle (at 3.2 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 358 "Net-(U1-PadG12)")) (pad H12 smd circle (at 3.2 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 359 "Net-(U1-PadH12)")) (pad J12 smd circle (at 3.2 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 360 "Net-(U1-PadJ12)")) (pad K12 smd circle (at 3.2 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 361 "Net-(U1-PadK12)")) (pad L12 smd circle (at 3.2 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 181 "Net-(J2-Pad47)")) (pad M12 smd circle (at 3.2 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 362 "Net-(U1-PadM12)")) (pad N12 smd circle (at 3.2 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 363 "Net-(U1-PadN12)")) (pad P12 smd circle (at 3.2 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 168 "Net-(J2-Pad39)")) (pad R12 smd circle (at 3.2 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 152 "Net-(J2-Pad35)")) (pad A13 smd circle (at 4 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 220 /FPGA_TDO)) (pad B13 smd circle (at 4 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 77 /MCU/DCMI_D4)) (pad C13 smd circle (at 4 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 364 "Net-(U1-PadC13)")) (pad D13 smd circle (at 4 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 365 "Net-(U1-PadD13)")) (pad E13 smd circle (at 4 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 366 "Net-(U1-PadE13)")) (pad F13 smd circle (at 4 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 367 "Net-(U1-PadF13)")) (pad G13 smd circle (at 4 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 368 "Net-(U1-PadG13)")) (pad H13 smd circle (at 4 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 369 "Net-(U1-PadH13)")) (pad J13 smd circle (at 4 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 370 "Net-(U1-PadJ13)")) (pad K13 smd circle (at 4 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 175 "Net-(J2-Pad57)")) (pad L13 smd circle (at 4 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 63 /MCU/RMII_TXD0)) (pad M13 smd circle (at 4 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 371 "Net-(U1-PadM13)")) (pad N13 smd circle (at 4 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 290 /MCU/SPI5_MISO)) (pad P13 smd circle (at 4 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 291 /MCU/SPI5_SCK)) (pad R13 smd circle (at 4 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 70 /MCU/RMII_TX_EN)) (pad A14 smd circle (at 4.8 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 213 /JTAG_TCK)) (pad B14 smd circle (at 4.8 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 167 "Net-(J2-Pad42)")) (pad C14 smd circle (at 4.8 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 372 "Net-(U1-PadC14)")) (pad D14 smd circle (at 4.8 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 373 "Net-(U1-PadD14)")) (pad E14 smd circle (at 4.8 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 374 "Net-(U1-PadE14)")) (pad F14 smd circle (at 4.8 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 78 /MCU/DCMI_D3)) (pad G14 smd circle (at 4.8 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 71 /MCU/DCMI_D2)) (pad H14 smd circle (at 4.8 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 375 "Net-(U1-PadH14)")) (pad J14 smd circle (at 4.8 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 376 "Net-(U1-PadJ14)")) (pad K14 smd circle (at 4.8 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 67 /MCU/RMII_TXD1)) (pad L14 smd circle (at 4.8 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 177 "Net-(J2-Pad53)")) (pad M14 smd circle (at 4.8 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 377 "Net-(U1-PadM14)")) (pad N14 smd circle (at 4.8 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 378 "Net-(U1-PadN14)")) (pad P14 smd circle (at 4.8 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 379 "Net-(U1-PadP14)")) (pad R14 smd circle (at 4.8 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 164 "Net-(J2-Pad45)")) (pad A15 smd circle (at 5.6 -5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 216 /JTAG_TMS)) (pad B15 smd circle (at 5.6 -4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 169 "Net-(J2-Pad40)")) (pad C15 smd circle (at 5.6 -4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 153 "Net-(J2-Pad36)")) (pad D15 smd circle (at 5.6 -3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 155 "Net-(J2-Pad34)")) (pad E15 smd circle (at 5.6 -2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 157 "Net-(J2-Pad30)")) (pad F15 smd circle (at 5.6 -1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 159 "Net-(J2-Pad28)")) (pad G15 smd circle (at 5.6 -0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 72 /MCU/DCMI_D1)) (pad H15 smd circle (at 5.6 0 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 74 /MCU/DCMI_D0)) (pad J15 smd circle (at 5.6 0.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 380 "Net-(U1-PadJ15)")) (pad K15 smd circle (at 5.6 1.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 173 "Net-(J2-Pad59)")) (pad L15 smd circle (at 5.6 2.4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 179 "Net-(J2-Pad51)")) (pad M15 smd circle (at 5.6 3.2 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 381 "Net-(U1-PadM15)")) (pad N15 smd circle (at 5.6 4 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 382 "Net-(U1-PadN15)")) (pad P15 smd circle (at 5.6 4.8 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 383 "Net-(U1-PadP15)")) (pad R15 smd circle (at 5.6 5.6 270) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 166 "Net-(J2-Pad41)")) ) (module azonenberg_pcb:CONN_SAMTEC_QTH-060-01-L-D-A (layer B.Cu) (tedit 54A511A1) (tstamp 5B6E1475) (at 38 43 180) (path /5B6B7005/5B8A9FBF) (fp_text reference J1 (at -9.2 0.7 -90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value CONN_INTEGRALSTICK_FPGA_DEVICE (at 0 21 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text user 1 (at -4.3 -17.3 180) (layer B.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425)) (justify mirror)) ) (fp_text user 2 (at 4.5 -17.3 180) (layer B.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425)) (justify mirror)) ) (fp_text user 60 (at 4.7 -2.7 180) (layer B.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425)) (justify mirror)) ) (fp_text user 59 (at -4.5 -2.7 180) (layer B.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425)) (justify mirror)) ) (fp_text user 61 (at -4.5 2.7 180) (layer B.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425)) (justify mirror)) ) (fp_text user 62 (at 4.7 2.7 180) (layer B.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425)) (justify mirror)) ) (fp_text user 119 (at -4.7 17.3 180) (layer B.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425)) (justify mirror)) ) (fp_text user 120 (at 5 17.3 180) (layer B.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425)) (justify mirror)) ) (fp_line (start 3 2) (end 3 -2) (layer B.SilkS) (width 0.15)) (fp_line (start -3 2) (end -3 -2) (layer B.SilkS) (width 0.15)) (fp_line (start 1 -20) (end -3 -20) (layer B.SilkS) (width 0.15)) (fp_line (start 3 -18) (end 1 -20) (layer B.SilkS) (width 0.15)) (fp_line (start 1 20) (end -3 20) (layer B.SilkS) (width 0.15)) (fp_line (start 1 20) (end 3 18) (layer B.SilkS) (width 0.15)) (fp_line (start -3 18) (end -3 20) (layer B.SilkS) (width 0.15)) (pad 120 smd rect (at 3 17.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 122 /FPGA/IO_3V3_29)) (pad 119 smd rect (at -3 17.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 123 /FPGA/IO_3V3_28)) (pad 118 smd rect (at 3 16.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 117 smd rect (at -3 16.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 116 smd rect (at 3 16.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 124 /FPGA/IO_3V3_27)) (pad 115 smd rect (at -3 16.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 125 /FPGA/IO_3V3_26)) (pad 114 smd rect (at 3 15.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 126 /FPGA/IO_3V3_25)) (pad 113 smd rect (at -3 15.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 127 /FPGA/IO_3V3_24)) (pad 112 smd rect (at 3 15.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 111 smd rect (at -3 15.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 110 smd rect (at 3 14.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 128 /FPGA/IO_3V3_23)) (pad 109 smd rect (at -3 14.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 208 /FPGA/IN_3V3_0_P)) (pad 108 smd rect (at 3 14.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 129 /FPGA/IO_3V3_22)) (pad 107 smd rect (at -3 14.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 207 /FPGA/IN_3V3_0_N)) (pad 106 smd rect (at 3 13.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 105 smd rect (at -3 13.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 104 smd rect (at 3 13.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 130 /FPGA/IO_3V3_21)) (pad 103 smd rect (at -3 13.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 131 /FPGA/IO_3V3_20)) (pad 102 smd rect (at 3 12.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 132 /FPGA/IO_3V3_19)) (pad 101 smd rect (at -3 12.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 133 /FPGA/IO_3V3_18)) (pad 100 smd rect (at 3 12.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 99 smd rect (at -3 12.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 98 smd rect (at 3 11.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 134 /FPGA/IO_3V3_17)) (pad 97 smd rect (at -3 11.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 135 /FPGA/IO_3V3_16)) (pad 96 smd rect (at 3 11.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 136 /FPGA/IO_3V3_15)) (pad 95 smd rect (at -3 11.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 137 /FPGA/IO_3V3_14)) (pad 94 smd rect (at 3 10.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 93 smd rect (at -3 10.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 92 smd rect (at 3 10.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 138 /FPGA/IO_3V3_13)) (pad 91 smd rect (at -3 10.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 139 /FPGA/IO_3V3_12)) (pad 90 smd rect (at 3 9.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 140 /FPGA/IO_3V3_11)) (pad 89 smd rect (at -3 9.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 141 /FPGA/IO_3V3_10)) (pad 88 smd rect (at 3 9.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 87 smd rect (at -3 9.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 86 smd rect (at 3 8.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 142 /FPGA/IO_3V3_9)) (pad 85 smd rect (at -3 8.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 143 /FPGA/IO_3V3_8)) (pad 84 smd rect (at 3 8.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 144 /FPGA/IO_3V3_7)) (pad 83 smd rect (at -3 8.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 145 /FPGA/IO_3V3_6)) (pad 82 smd rect (at 3 7.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 81 smd rect (at -3 7.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 80 smd rect (at 3 7.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 146 /FPGA/IO_3V3_5)) (pad 79 smd rect (at -3 7.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 147 /FPGA/IO_3V3_4)) (pad 78 smd rect (at 3 6.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 118 /FPGA/IO_3V3_3)) (pad 77 smd rect (at -3 6.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 119 /FPGA/IO_3V3_2)) (pad 76 smd rect (at 3 6.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 75 smd rect (at -3 6.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 74 smd rect (at 3 5.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 120 /FPGA/IO_3V3_1)) (pad 73 smd rect (at -3 5.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 121 /FPGA/IO_3V3_0)) (pad 72 smd rect (at 3 5.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 148 /FPGA/CLK_3V3_1)) (pad 71 smd rect (at -3 5.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 149 /FPGA/CLK_3V3_0)) (pad 70 smd rect (at 3 4.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 69 smd rect (at -3 4.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 68 smd rect (at 3 4.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 95 /RAM/GPIO_1V8_0)) (pad 67 smd rect (at -3 4.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 96 /RAM/GPIO_1V8_1)) (pad 66 smd rect (at 3 3.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 93 /RAM/GPIO_1V8_2)) (pad 65 smd rect (at -3 3.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 94 /RAM/GPIO_1V8_3)) (pad 64 smd rect (at 3 3.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (pad 63 smd rect (at -3 3.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (pad 62 smd rect (at 3 2.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 91 /RAM/GPIO_1V8_4)) (pad 61 smd rect (at -3 2.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 92 /RAM/GPIO_1V8_5)) (pad 59 smd rect (at -3 -2.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 90 /RAM/GPIO_1V8_7)) (pad 60 smd rect (at 3 -2.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 89 /RAM/GPIO_1V8_6)) (pad 57 smd rect (at -3 -3.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (pad 58 smd rect (at 3 -3.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (pad 55 smd rect (at -3 -3.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 88 /RAM/GPIO_1V8_9)) (pad 56 smd rect (at 3 -3.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 87 /RAM/GPIO_1V8_8)) (pad 53 smd rect (at -3 -4.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 86 /RAM/GPIO_1V8_11)) (pad 54 smd rect (at 3 -4.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 85 /RAM/GPIO_1V8_10)) (pad 51 smd rect (at -3 -4.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (pad 52 smd rect (at 3 -4.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (pad 49 smd rect (at -3 -5.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 84 /RAM/GPIO_1V8_13)) (pad 50 smd rect (at 3 -5.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 83 /RAM/GPIO_1V8_12)) (pad 47 smd rect (at -3 -5.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 82 /RAM/GPIO_1V8_15)) (pad 48 smd rect (at 3 -5.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 81 /RAM/GPIO_1V8_14)) (pad 45 smd rect (at -3 -6.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (pad 46 smd rect (at 3 -6.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (pad 43 smd rect (at -3 -6.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 150 /RAM/CLK_1V8_0)) (pad 44 smd rect (at 3 -6.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 79 /RAM/GPIO_1V8_16)) (pad 41 smd rect (at -3 -7.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 151 /RAM/CLK_1V8_1)) (pad 42 smd rect (at 3 -7.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 80 /RAM/GPIO_1V8_17)) (pad 39 smd rect (at -3 -7.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (pad 40 smd rect (at 3 -7.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (pad 37 smd rect (at -3 -8.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (pad 38 smd rect (at 3 -8.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (pad 35 smd rect (at -3 -8.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 116 /FPGA/LVDS_DQ1_P)) (pad 36 smd rect (at 3 -8.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 115 /FPGA/LVDS_DQ0_P)) (pad 33 smd rect (at -3 -9.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 114 /FPGA/LVDS_DQ1_N)) (pad 34 smd rect (at 3 -9.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 113 /FPGA/LVDS_DQ0_N)) (pad 31 smd rect (at -3 -9.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (pad 32 smd rect (at 3 -9.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (pad 29 smd rect (at -3 -10.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 112 /FPGA/LVDS_DQ3_P)) (pad 30 smd rect (at 3 -10.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 111 /FPGA/LVDS_DQ2_P)) (pad 27 smd rect (at -3 -10.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 110 /FPGA/LVDS_DQ3_N)) (pad 28 smd rect (at 3 -10.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 109 /FPGA/LVDS_DQ2_N)) (pad 25 smd rect (at -3 -11.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (pad 26 smd rect (at 3 -11.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (pad 23 smd rect (at -3 -11.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 108 /FPGA/LVDS_DQ5_P)) (pad 24 smd rect (at 3 -11.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 107 /FPGA/LVDS_DQ4_P)) (pad 21 smd rect (at -3 -12.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 106 /FPGA/LVDS_DQ5_N)) (pad 22 smd rect (at 3 -12.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 105 /FPGA/LVDS_DQ4_N)) (pad 19 smd rect (at -3 -12.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (pad 20 smd rect (at 3 -12.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (pad 17 smd rect (at -3 -13.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 104 /FPGA/LVDS_DQ7_P)) (pad 18 smd rect (at 3 -13.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 103 /FPGA/LVDS_DQ6_P)) (pad 15 smd rect (at -3 -13.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 102 /FPGA/LVDS_DQ7_N)) (pad 16 smd rect (at 3 -13.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 101 /FPGA/LVDS_DQ6_N)) (pad 13 smd rect (at -3 -14.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (pad 14 smd rect (at 3 -14.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (pad 11 smd rect (at -3 -14.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 99 /FPGA/GPIO_2V5_0)) (pad 12 smd rect (at 3 -14.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 100 /FPGA/LVDS_DQ8_P)) (pad 9 smd rect (at -3 -15.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 97 /FPGA/GPIO_2V5_1)) (pad 10 smd rect (at 3 -15.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 98 /FPGA/LVDS_DQ8_N)) (pad 7 smd rect (at -3 -15.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (pad 8 smd rect (at 3 -15.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (pad 5 smd rect (at -3 -16.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 117 "/Power Supply/5V0")) (pad 6 smd rect (at 3 -16.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 117 "/Power Supply/5V0")) (pad 3 smd rect (at -3 -16.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 117 "/Power Supply/5V0")) (pad 4 smd rect (at 3 -16.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 117 "/Power Supply/5V0")) (pad 1 smd rect (at -3 -17.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 117 "/Power Supply/5V0")) (pad "" thru_hole circle (at -2.03 -19.24 180) (size 1.02 1.02) (drill 1.02) (layers *.Cu *.Mask B.SilkS)) (pad "" thru_hole circle (at -2.03 19.24 180) (size 1.02 1.02) (drill 1.02) (layers *.Cu *.Mask B.SilkS)) (pad 125 smd rect (at 0 1.57 180) (size 0.64 2.54) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 128 smd rect (at 0 18.46 180) (size 0.64 2.54) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 124 smd rect (at 0 -1.57 180) (size 0.64 2.54) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 121 smd rect (at 0 -18.46 180) (size 0.64 2.54) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 126 smd rect (at 0 6.841 180) (size 0.64 4.7) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 123 smd rect (at 0 -6.841 180) (size 0.64 4.7) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 122 smd rect (at 0 -13.191 180) (size 0.64 4.7) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 127 smd rect (at 0 13.191 180) (size 0.64 4.7) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 2 smd rect (at 3 -17.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 117 "/Power Supply/5V0")) (model /nfs4/home/azonenberg/kicad-libs/imported-models/Samtec-QTH-060-01-L-D-exported.wrl (at (xyz 0 0 0)) (scale (xyz 0.3937 0.3937 0.3937)) (rotate (xyz -90 0 90)) ) (model /media/azonenberg/cc4942c0-3dce-4209-a419-7ec41c9cafcd/datasheets/Samtec/3d/QTH-060-01-L-D-A-TR.stp (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz -90 0 90)) ) (model /media/azonenberg/cc4942c0-3dce-4209-a419-7ec41c9cafcd/datasheets/Samtec/3d/QSH-060-01-L-D-A-TR.stp (offset (xyz 0 0 5)) (scale (xyz 1 1 1)) (rotate (xyz -90 180 -90)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF3CD9F) (at 62.8 56.1) (path /5B6B702C/5BFC76E4) (fp_text reference C144 (at 0.05 -1.4) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:BGA_256_17x17_FULLARRAY_1MM_0.4MM_FTG256 (layer F.Cu) (tedit 5BE7EC03) (tstamp 5BF05148) (at 64 43) (path /5B6B7005/5B6B763A) (fp_text reference U2 (at -7 -10) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value XC7A50T-1FTG256C (at 0 10) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start -9 -9) (end -9 9) (layer F.SilkS) (width 0.15)) (fp_line (start -9 9) (end 9 9) (layer F.SilkS) (width 0.15)) (fp_line (start 9 9) (end 9 -9) (layer F.SilkS) (width 0.15)) (fp_line (start 9 -9) (end -9 -9) (layer F.SilkS) (width 0.15)) (fp_line (start -9 -9) (end -8 -9) (layer F.SilkS) (width 0.15)) (fp_line (start -8 -9) (end -9 -8) (layer F.SilkS) (width 0.15)) (pad T3 smd circle (at -5.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 102 /FPGA/LVDS_DQ7_N)) (pad R2 smd circle (at -6.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 103 /FPGA/LVDS_DQ6_P)) (pad R1 smd circle (at -7.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 101 /FPGA/LVDS_DQ6_N)) (pad T2 smd circle (at -6.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 98 /FPGA/LVDS_DQ8_N)) (pad T1 smd circle (at -7.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 235 /2V5)) (pad R3 smd circle (at -5.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 100 /FPGA/LVDS_DQ8_P)) (pad K4 smd circle (at -4.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad J5 smd circle (at -3.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 80 /RAM/GPIO_1V8_17)) (pad J4 smd circle (at -4.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 81 /RAM/GPIO_1V8_14)) (pad L5 smd circle (at -3.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 97 /FPGA/GPIO_2V5_1)) (pad L4 smd circle (at -4.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 116 /FPGA/LVDS_DQ1_P)) (pad K5 smd circle (at -3.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 88 /RAM/GPIO_1V8_9)) (pad T4 smd circle (at -4.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 104 /FPGA/LVDS_DQ7_P)) (pad R5 smd circle (at -3.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 46 /Ethernet/RGMII_MDC)) (pad T5 smd circle (at -3.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 40 /Ethernet/RGMII_MDIO)) (pad R4 smd circle (at -4.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 235 /2V5)) (pad K3 smd circle (at -5.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 91 /RAM/GPIO_1V8_4)) (pad J1 smd circle (at -7.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 93 /RAM/GPIO_1V8_2)) (pad J2 smd circle (at -6.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad J3 smd circle (at -5.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 95 /RAM/GPIO_1V8_0)) (pad K1 smd circle (at -7.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 86 /RAM/GPIO_1V8_11)) (pad K2 smd circle (at -6.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 90 /RAM/GPIO_1V8_7)) (pad P5 smd circle (at -3.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 99 /FPGA/GPIO_2V5_0)) (pad N4 smd circle (at -4.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 110 /FPGA/LVDS_DQ3_N)) (pad P4 smd circle (at -4.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 108 /FPGA/LVDS_DQ5_P)) (pad N5 smd circle (at -3.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad M4 smd circle (at -4.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 114 /FPGA/LVDS_DQ1_N)) (pad M5 smd circle (at -3.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 112 /FPGA/LVDS_DQ3_P)) (pad M2 smd circle (at -6.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 115 /FPGA/LVDS_DQ0_P)) (pad L3 smd circle (at -5.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 84 /RAM/GPIO_1V8_13)) (pad M1 smd circle (at -7.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 113 /FPGA/LVDS_DQ0_N)) (pad L2 smd circle (at -6.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 82 /RAM/GPIO_1V8_15)) (pad L1 smd circle (at -7.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad M3 smd circle (at -5.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 235 /2V5)) (pad N1 smd circle (at -7.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 107 /FPGA/LVDS_DQ4_P)) (pad P1 smd circle (at -7.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 105 /FPGA/LVDS_DQ4_N)) (pad N3 smd circle (at -5.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 111 /FPGA/LVDS_DQ2_P)) (pad P3 smd circle (at -5.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 106 /FPGA/LVDS_DQ5_N)) (pad N2 smd circle (at -6.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 109 /FPGA/LVDS_DQ2_N)) (pad P2 smd circle (at -6.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad T6 smd circle (at -2.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad R6 smd circle (at -2.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 39 /Ethernet/RGMII_RST_N)) (pad R7 smd circle (at -1.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 51 /Ethernet/RGMII_RXD2)) (pad T7 smd circle (at -1.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 50 /Ethernet/RGMII_RXD1)) (pad R8 smd circle (at -0.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 52 /Ethernet/RGMII_RXD3)) (pad T8 smd circle (at -0.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 53 /Ethernet/RGMII_TX_EN)) (pad J7 smd circle (at -1.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 384 "Net-(U2-PadJ7)")) (pad J8 smd circle (at -0.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad K7 smd circle (at -1.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad J6 smd circle (at -2.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 236 /1V0)) (pad K6 smd circle (at -2.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad K8 smd circle (at -0.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad L6 smd circle (at -2.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad P6 smd circle (at -2.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 48 /Ethernet/RGMII_RX_DV)) (pad P8 smd circle (at -0.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 41 /Ethernet/RGMII_TX_CLK)) (pad P7 smd circle (at -1.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad N6 smd circle (at -2.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 49 /Ethernet/RGMII_RXD0)) (pad M6 smd circle (at -2.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 75 /MCU/DCMI_D6)) (pad N7 smd circle (at -1.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 215 /FPGA_TDI)) (pad N8 smd circle (at -0.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 284 "Net-(R61-Pad1)")) (pad T9 smd circle (at 0.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 43 /Ethernet/RGMII_TXD2)) (pad R9 smd circle (at 0.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad P9 smd circle (at 0.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 42 /Ethernet/RGMII_TXD3)) (pad T10 smd circle (at 1.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 44 /Ethernet/RGMII_TXD1)) (pad R10 smd circle (at 1.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 45 /Ethernet/RGMII_TXD0)) (pad P10 smd circle (at 1.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 290 /MCU/SPI5_MISO)) (pad M10 smd circle (at 1.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad P11 smd circle (at 2.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 224 /ETH_LED2_N)) (pad R11 smd circle (at 2.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 226 /ETH_LED1_N)) (pad N11 smd circle (at 2.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 47 /Ethernet/RGMII_RX_CLK)) (pad N10 smd circle (at 1.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad M11 smd circle (at 2.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad T11 smd circle (at 2.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad L9 smd circle (at 0.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 212 /FPGA_RST_N)) (pad M9 smd circle (at 0.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad N9 smd circle (at 0.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 287 /MCU/UART6_TX)) (pad L8 smd circle (at -0.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 236 /1V0)) (pad M8 smd circle (at -0.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad M7 smd circle (at -1.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 216 /JTAG_TMS)) (pad L7 smd circle (at -1.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 213 /JTAG_TCK)) (pad J11 smd circle (at 2.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad J10 smd circle (at 1.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad L10 smd circle (at 1.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad K9 smd circle (at 0.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 236 /1V0)) (pad L11 smd circle (at 2.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad J9 smd circle (at 0.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad K11 smd circle (at 2.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad K10 smd circle (at 1.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 225 /FPGA/FPGA_INIT)) (pad L16 smd circle (at 7.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad L15 smd circle (at 6.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 260 /MCU/PUDC_B)) (pad N15 smd circle (at 6.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad M15 smd circle (at 6.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 70 /MCU/RMII_TX_EN)) (pad M16 smd circle (at 7.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 291 /MCU/SPI5_SCK)) (pad N16 smd circle (at 7.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 286 /MCU/SPI5_CS_N)) (pad N13 smd circle (at 4.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 256 "Net-(R22-Pad1)")) (pad N14 smd circle (at 5.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 65 /MCU/RMII_MDC)) (pad M14 smd circle (at 5.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 73 /MCU/DCMI_D7)) (pad N12 smd circle (at 3.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 77 /MCU/DCMI_D4)) (pad M13 smd circle (at 4.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad M12 smd circle (at 3.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 288 /MCU/SPI5_MOSI)) (pad J12 smd circle (at 3.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad L12 smd circle (at 3.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 282 "Net-(R59-Pad1)")) (pad K13 smd circle (at 4.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 64 /MCU/RMII_MDIO)) (pad L13 smd circle (at 4.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 289 /MCU/UART6_RX)) (pad K12 smd circle (at 3.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 62 /MCU/RMII_REFCLK)) (pad J13 smd circle (at 4.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 278 "Net-(R55-Pad1)")) (pad P12 smd circle (at 3.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad T12 smd circle (at 3.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 60 /MCU/DCMI_VSYNC)) (pad T14 smd circle (at 5.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 74 /MCU/DCMI_D0)) (pad P13 smd circle (at 4.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 71 /MCU/DCMI_D2)) (pad T13 smd circle (at 4.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 78 /MCU/DCMI_D3)) (pad R12 smd circle (at 3.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 76 /MCU/DCMI_D5)) (pad R13 smd circle (at 4.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 72 /MCU/DCMI_D1)) (pad J15 smd circle (at 6.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 293 /FPGA/GPIO_LED0)) (pad J16 smd circle (at 7.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 294 /FPGA/GPIO_LED1)) (pad K15 smd circle (at 6.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 280 "Net-(R57-Pad1)")) (pad K14 smd circle (at 5.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad L14 smd circle (at 5.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 59 /MCU/DCMI_PIXCLK)) (pad K16 smd circle (at 7.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 281 "Net-(R58-Pad1)")) (pad J14 smd circle (at 5.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 279 "Net-(R56-Pad1)")) (pad T16 smd circle (at 7.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad P14 smd circle (at 5.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 66 /MCU/RMII_CRS_DV)) (pad P15 smd circle (at 6.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 63 /MCU/RMII_TXD0)) (pad R14 smd circle (at 5.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad P16 smd circle (at 7.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 61 /MCU/DCMI_HSYNC)) (pad R15 smd circle (at 6.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 68 /MCU/RMII_RXD1)) (pad T15 smd circle (at 6.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 67 /MCU/RMII_TXD1)) (pad R16 smd circle (at 7.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 69 /MCU/RMII_RXD0)) (pad H3 smd circle (at -5.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 92 /RAM/GPIO_1V8_5)) (pad G3 smd circle (at -5.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad H4 smd circle (at -4.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 85 /RAM/GPIO_1V8_10)) (pad G4 smd circle (at -4.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 28 /RAM/RAM1_RST_N)) (pad H9 smd circle (at 0.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 236 /1V0)) (pad H8 smd circle (at -0.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 385 "Net-(U2-PadH8)")) (pad G7 smd circle (at -1.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad G9 smd circle (at 0.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad G8 smd circle (at -0.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad H7 smd circle (at -1.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad H2 smd circle (at -6.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 96 /RAM/GPIO_1V8_1)) (pad G1 smd circle (at -7.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 /RAM/RAM1_CK_N)) (pad H1 smd circle (at -7.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 94 /RAM/GPIO_1V8_3)) (pad F1 smd circle (at -7.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad G2 smd circle (at -6.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 27 /RAM/RAM1_CK_P)) (pad F2 smd circle (at -6.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 20 /RAM/RAM1_DQ7)) (pad E1 smd circle (at -7.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 12 /RAM/RAM1_DQ1)) (pad E2 smd circle (at -6.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 7 /RAM/RAM1_DQS)) (pad H6 smd circle (at -2.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad H5 smd circle (at -3.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 79 /RAM/GPIO_1V8_16)) (pad G5 smd circle (at -3.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 83 /RAM/GPIO_1V8_12)) (pad F6 smd circle (at -2.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad F5 smd circle (at -3.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 150 /RAM/CLK_1V8_0)) (pad E5 smd circle (at -3.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 89 /RAM/GPIO_1V8_6)) (pad E6 smd circle (at -2.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 87 /RAM/GPIO_1V8_8)) (pad G6 smd circle (at -2.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 236 /1V0)) (pad F3 smd circle (at -5.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 19 /RAM/RAM1_DQ6)) (pad E4 smd circle (at -4.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad F4 smd circle (at -4.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 15 /RAM/RAM1_CS_N)) (pad E3 smd circle (at -5.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 6 /RAM/RAM1_DQ2)) (pad E7 smd circle (at -1.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad F7 smd circle (at -1.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 236 /1V0)) (pad F8 smd circle (at -0.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad E9 smd circle (at 0.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad E8 smd circle (at -0.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 273 "Net-(R50-Pad1)")) (pad F9 smd circle (at 0.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 236 /1V0)) (pad H16 smd circle (at 7.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 221 /FPGA/I2C_SCL)) (pad G15 smd circle (at 6.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 122 /FPGA/IO_3V3_29)) (pad H15 smd circle (at 6.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad G16 smd circle (at 7.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 124 /FPGA/IO_3V3_27)) (pad F16 smd circle (at 7.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad H12 smd circle (at 3.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 295 /FPGA/GPIO_LED3)) (pad H13 smd circle (at 4.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 292 /FPGA/GPIO_LED2)) (pad G13 smd circle (at 4.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad F13 smd circle (at 4.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 126 /FPGA/IO_3V3_25)) (pad G14 smd circle (at 5.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 386 "Net-(U2-PadG14)")) (pad H14 smd circle (at 5.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 222 /FPGA/I2C_SDA)) (pad F14 smd circle (at 5.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 128 /FPGA/IO_3V3_23)) (pad H10 smd circle (at 1.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 210 /FPGA_DONE)) (pad G10 smd circle (at 1.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad G11 smd circle (at 2.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 387 "Net-(U2-PadG11)")) (pad F10 smd circle (at 1.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad H11 smd circle (at 2.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 388 "Net-(U2-PadH11)")) (pad F11 smd circle (at 2.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 236 /1V0)) (pad E11 smd circle (at 2.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 148 /FPGA/CLK_3V3_1)) (pad E10 smd circle (at 1.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 236 /1V0)) (pad F15 smd circle (at 6.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 129 /FPGA/IO_3V3_22)) (pad E15 smd circle (at 6.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 132 /FPGA/IO_3V3_19)) (pad E16 smd circle (at 7.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 130 /FPGA/IO_3V3_21)) (pad E14 smd circle (at 5.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad G12 smd circle (at 3.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 389 "Net-(U2-PadG12)")) (pad F12 smd circle (at 3.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 390 "Net-(U2-PadF12)")) (pad E12 smd circle (at 3.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 259 /FPGA/FPGA_CLK_25MHZ)) (pad E13 smd circle (at 4.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 134 /FPGA/IO_3V3_17)) (pad D16 smd circle (at 7.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 136 /FPGA/IO_3V3_15)) (pad D15 smd circle (at 6.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 138 /FPGA/IO_3V3_13)) (pad D14 smd circle (at 5.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 391 "Net-(U2-PadD14)")) (pad D13 smd circle (at 4.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 208 /FPGA/IN_3V3_0_P)) (pad D12 smd circle (at 3.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad D11 smd circle (at 2.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 392 "Net-(U2-PadD11)")) (pad D10 smd circle (at 1.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 119 /FPGA/IO_3V3_2)) (pad D9 smd circle (at 0.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 121 /FPGA/IO_3V3_0)) (pad D8 smd circle (at -0.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 120 /FPGA/IO_3V3_1)) (pad D7 smd circle (at -1.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad D6 smd circle (at -2.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 3 /RAM/RAM0_DQ5)) (pad D5 smd circle (at -3.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 16 /RAM/RAM0_RST_N)) (pad D4 smd circle (at -4.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 151 /RAM/CLK_1V8_1)) (pad D3 smd circle (at -5.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 1 /RAM/RAM1_DQ0)) (pad D2 smd circle (at -6.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad D1 smd circle (at -7.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 23 /RAM/RAM1_DQ5)) (pad C16 smd circle (at 7.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 142 /FPGA/IO_3V3_9)) (pad C15 smd circle (at 6.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad C14 smd circle (at 5.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 140 /FPGA/IO_3V3_11)) (pad C13 smd circle (at 4.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 207 /FPGA/IN_3V3_0_N)) (pad C12 smd circle (at 3.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 393 "Net-(U2-PadC12)")) (pad C11 smd circle (at 2.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 149 /FPGA/CLK_3V3_0)) (pad C10 smd circle (at 1.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad C9 smd circle (at 0.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 137 /FPGA/IO_3V3_14)) (pad C8 smd circle (at -0.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 285 /PSU_TEMP)) (pad C7 smd circle (at -1.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 14 /RAM/RAM0_PSC_P)) (pad C6 smd circle (at -2.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 13 /RAM/RAM0_PSC_N)) (pad C5 smd circle (at -3.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad C4 smd circle (at -4.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 2 /RAM/RAM0_DQ7)) (pad C3 smd circle (at -5.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 29 /RAM/RAM1_DQ3)) (pad C2 smd circle (at -6.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 18 /RAM/RAM1_DQ4)) (pad C1 smd circle (at -7.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 25 /RAM/RAM1_PSC_P)) (pad B16 smd circle (at 7.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 144 /FPGA/IO_3V3_7)) (pad B15 smd circle (at 6.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 118 /FPGA/IO_3V3_3)) (pad B14 smd circle (at 5.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 123 /FPGA/IO_3V3_28)) (pad B13 smd circle (at 4.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad B12 smd circle (at 3.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 133 /FPGA/IO_3V3_18)) (pad B11 smd circle (at 2.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 135 /FPGA/IO_3V3_16)) (pad B10 smd circle (at 1.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 141 /FPGA/IO_3V3_10)) (pad B9 smd circle (at 0.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 143 /FPGA/IO_3V3_8)) (pad B8 smd circle (at -0.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad B7 smd circle (at -1.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 4 /RAM/RAM0_DQ4)) (pad B6 smd circle (at -2.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 9 /RAM/RAM0_DQ3)) (pad B5 smd circle (at -3.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 26 /RAM/RAM0_DQS)) (pad B4 smd circle (at -4.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 8 /RAM/RAM0_DQ6)) (pad B3 smd circle (at -5.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad B2 smd circle (at -6.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 22 /RAM/RAM0_CK_P)) (pad B1 smd circle (at -7.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 30 /RAM/RAM1_PSC_N)) (pad A16 smd circle (at 7.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad A15 smd circle (at 6.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 146 /FPGA/IO_3V3_5)) (pad A14 smd circle (at 5.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 125 /FPGA/IO_3V3_26)) (pad A13 smd circle (at 4.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 127 /FPGA/IO_3V3_24)) (pad A12 smd circle (at 3.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 131 /FPGA/IO_3V3_20)) (pad A11 smd circle (at 2.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad A10 smd circle (at 1.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 139 /FPGA/IO_3V3_12)) (pad A9 smd circle (at 0.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 145 /FPGA/IO_3V3_6)) (pad A8 smd circle (at -0.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 147 /FPGA/IO_3V3_4)) (pad A7 smd circle (at -1.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 10 /RAM/RAM0_DQ2)) (pad A6 smd circle (at -2.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad A5 smd circle (at -3.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 11 /RAM/RAM0_DQ0)) (pad A4 smd circle (at -4.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 5 /RAM/RAM0_DQ1)) (pad A3 smd circle (at -5.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 17 /RAM/RAM0_CS_N)) (pad A2 smd circle (at -6.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 21 /RAM/RAM0_CK_N)) (pad A1 smd circle (at -7.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_bga/lbga256.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:QFN_48_0.5MM_7x7MM (layer F.Cu) (tedit 54AFB938) (tstamp 5BFDDC0D) (at 73.75 65.75 180) (path /5B6B700F/5B80E0B7) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U5 (at 4.75 3.25 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value KSZ9031RN (at 0.4 5.75 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start -3 -3.75) (end -3.75 -3) (layer F.SilkS) (width 0.15)) (fp_line (start 3.75 3.75) (end 3 3.75) (layer F.SilkS) (width 0.15)) (fp_line (start 3.75 3) (end 3.75 3.75) (layer F.SilkS) (width 0.15)) (fp_line (start -3.75 3.75) (end -3 3.75) (layer F.SilkS) (width 0.15)) (fp_line (start -3.75 3) (end -3.75 3.75) (layer F.SilkS) (width 0.15)) (fp_line (start 3.75 -3.75) (end 3.75 -3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 -3.75) (end 3.75 -3.75) (layer F.SilkS) (width 0.15)) (fp_line (start -3.75 -3.75) (end -3.75 -3) (layer F.SilkS) (width 0.15)) (fp_line (start -3 -3.75) (end -3.75 -3.75) (layer F.SilkS) (width 0.15)) (pad 48 smd rect (at -2.75 -3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 227 "Net-(R2-Pad2)")) (pad 47 smd rect (at -2.25 -3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 394 "Net-(U5-Pad47)")) (pad 46 smd rect (at -1.75 -3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 228 /Ethernet/ETH_CLK_25MHZ)) (pad 45 smd rect (at -1.25 -3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 395 "Net-(U5-Pad45)")) (pad 44 smd rect (at -0.75 -3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 229 /Ethernet/A1V2_PLL)) (pad 43 smd rect (at -0.25 -3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 396 "Net-(U5-Pad43)")) (pad 42 smd rect (at 0.25 -3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 39 /Ethernet/RGMII_RST_N)) (pad 41 smd rect (at 0.75 -3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 230 "Net-(R5-Pad2)")) (pad 40 smd rect (at 1.25 -3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad 39 smd rect (at 1.75 -3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 231 /1V2)) (pad 38 smd rect (at 2.25 -3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 397 "Net-(U5-Pad38)")) (pad 37 smd rect (at 2.75 -3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 40 /Ethernet/RGMII_MDIO)) (pad 24 smd rect (at 2.75 3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 41 /Ethernet/RGMII_TX_CLK)) (pad 23 smd rect (at 2.25 3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 231 /1V2)) (pad 22 smd rect (at 1.75 3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 42 /Ethernet/RGMII_TXD3)) (pad 21 smd rect (at 1.25 3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 43 /Ethernet/RGMII_TXD2)) (pad 20 smd rect (at 0.75 3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 44 /Ethernet/RGMII_TXD1)) (pad 19 smd rect (at 0.25 3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 45 /Ethernet/RGMII_TXD0)) (pad 18 smd rect (at -0.25 3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 231 /1V2)) (pad 17 smd rect (at -0.75 3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 226 /ETH_LED1_N)) (pad 16 smd rect (at -1.25 3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad 15 smd rect (at -1.75 3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 224 /ETH_LED2_N)) (pad 14 smd rect (at -2.25 3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 231 /1V2)) (pad 13 smd rect (at -2.75 3.4 180) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 398 "Net-(U5-Pad13)")) (pad 1 smd rect (at -3.4 -2.75 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 232 /Ethernet/A2V5)) (pad 2 smd rect (at -3.4 -2.25 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 31 /Ethernet/ETH_A_P)) (pad 3 smd rect (at -3.4 -1.75 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 32 /Ethernet/ETH_A_N)) (pad 4 smd rect (at -3.4 -1.25 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 233 /Ethernet/A1V2)) (pad 5 smd rect (at -3.4 -0.75 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 33 /Ethernet/ETH_B_P)) (pad 6 smd rect (at -3.4 -0.25 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 34 /Ethernet/ETH_B_N)) (pad 7 smd rect (at -3.4 0.25 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 35 /Ethernet/ETH_C_P)) (pad 8 smd rect (at -3.4 0.75 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 36 /Ethernet/ETH_C_N)) (pad 9 smd rect (at -3.4 1.25 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 233 /Ethernet/A1V2)) (pad 10 smd rect (at -3.4 1.75 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 37 /Ethernet/ETH_D_P)) (pad 11 smd rect (at -3.4 2.25 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 38 /Ethernet/ETH_D_N)) (pad 12 smd rect (at -3.4 2.75 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 232 /Ethernet/A2V5)) (pad 36 smd rect (at 3.4 -2.75 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 46 /Ethernet/RGMII_MDC)) (pad 35 smd rect (at 3.4 -2.25 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 301 "Net-(R67-Pad2)")) (pad 34 smd rect (at 3.4 -1.75 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad 33 smd rect (at 3.4 -1.25 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 300 "Net-(R66-Pad2)")) (pad 32 smd rect (at 3.4 -0.75 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 299 "Net-(R65-Pad2)")) (pad 31 smd rect (at 3.4 -0.25 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 298 "Net-(R64-Pad2)")) (pad 30 smd rect (at 3.4 0.25 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 231 /1V2)) (pad 28 smd rect (at 3.4 1.25 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 297 "Net-(R63-Pad2)")) (pad 29 smd rect (at 3.4 0.75 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 27 smd rect (at 3.4 1.75 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 296 "Net-(R62-Pad2)")) (pad 26 smd rect (at 3.4 2.25 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 231 /1V2)) (pad 25 smd rect (at 3.4 2.75 270) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask) (net 53 /Ethernet/RGMII_TX_EN)) (pad PAD smd rect (at 0 0 180) (size 3 3) (layers F.Cu F.Mask) (net 234 /GND)) (pad PAD smd rect (at -1 -1 180) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at 0 -1 180) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at 1 -1 180) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at 1 0 180) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at 0 0 180) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at -1 0 180) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at -1 1 180) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at 0 1 180) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at 1 1 180) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/lfcsp-48.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BFDDB72) (at 68.25 68) (path /5B6B700F/5C472F18) (fp_text reference R67 (at -6 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 301 "Net-(R67-Pad2)")) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 47 /Ethernet/RGMII_RX_CLK)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BFDDB81) (at 68.25 67) (path /5B6B700F/5C472B4C) (fp_text reference R66 (at -6 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 300 "Net-(R66-Pad2)")) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 48 /Ethernet/RGMII_RX_DV)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BFDDB90) (at 65.5 66.5) (path /5B6B700F/5C4727BD) (fp_text reference R65 (at -5.3 -0.1) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 299 "Net-(R65-Pad2)")) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 49 /Ethernet/RGMII_RXD0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BFDDB9F) (at 68.25 66) (path /5B6B700F/5C472432) (fp_text reference R64 (at -6 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 298 "Net-(R64-Pad2)")) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 50 /Ethernet/RGMII_RXD1)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BFDDBAE) (at 68.25 64.5) (path /5B6B700F/5C471F48) (fp_text reference R63 (at -6 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 297 "Net-(R63-Pad2)")) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 51 /Ethernet/RGMII_RXD2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BFDDBBD) (at 65.5 64) (path /5B6B700F/5C46B5A3) (fp_text reference R62 (at -5.75 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 296 "Net-(R62-Pad2)")) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 52 /Ethernet/RGMII_RXD3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BFCB39D) (at 43.125 54.25) (path /5B6B702C/5C3E0A0B) (fp_text reference C143 (at 3.075 -0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BFCB397) (at 43.125 55.75) (path /5B6B702C/5C3E05B4) (fp_text reference C142 (at 3.175 0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BFC8FC2) (at 43.125 57.25) (path /5B6B702C/5C3D7AE6) (fp_text reference C141 (at 2.775 0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BFC8FBC) (at 43.15 58.75) (path /5B6B702C/5C3D7589) (fp_text reference C140 (at 2.85 0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BFC6C03) (at 33 58.75 180) (path /5B6B702C/5C3CF2B1) (fp_text reference C139 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BFC6BFD) (at 33 57.25 180) (path /5B6B702C/5C3CEED6) (fp_text reference C138 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BFC4836) (at 33 52.75 180) (path /5B6B702C/5C3C776E) (fp_text reference C137 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BFC4830) (at 32.975 54.25 180) (path /5B6B702C/5C3C73D2) (fp_text reference C136 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BFC482A) (at 32.975001 55.75 180) (path /5B6B702C/5C3BE3B1) (fp_text reference C135 (at -0.025 -1.425 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF8E555) (at 33 47.75 180) (path /5B6B702C/5C094F88) (fp_text reference C134 (at 0 0 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF8E54F) (at 33 46.25 180) (path /5B6B702C/5C091F15) (fp_text reference C133 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF8E549) (at 33 50.75 180) (path /5B6B702C/5C091F07) (fp_text reference C132 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF8E543) (at 33 49.25 180) (path /5B6B702C/5C091EF9) (fp_text reference C131 (at 0.05 0 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF14F25) (at 33.25 21.15 270) (path /5B6B702C/5BFDC11E) (fp_text reference C130 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF12C61) (at 39.6 21.15) (path /5B6B702C/5BFD65D8) (fp_text reference C129 (at 2.8 -0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF109C5) (at 43.2 23.8) (path /5B6B702C/5BFD0553) (fp_text reference C128 (at 0.5 -0.9) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF0ECC9) (at 43.2 32.25) (path /5B6B702C/5BFC52AC) (fp_text reference C127 (at 2.7 0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF0ECEE) (at 43.2 33.75) (path /5B6B702C/5BFC4BF1) (fp_text reference C126 (at 2.7 -0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF0D759) (at 43.2 30.75) (path /5B6B702C/5BFC4780) (fp_text reference C125 (at 2.8 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF0D753) (at 43.2 38.25) (path /5B6B702C/5BFC4329) (fp_text reference C124 (at 3 0.35) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF0D74D) (at 43.2 36.75) (path /5B6B702C/5BFC3D49) (fp_text reference C123 (at 3.4 0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF0D747) (at 43.2 29.2) (path /5B6B702C/5BFC390F) (fp_text reference C122 (at 2.8 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF0D741) (at 43.2 35.25) (path /5B6B702C/5BFC3321) (fp_text reference C121 (at 2.6 0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF0D73B) (at 43.2 27.75) (path /5B6B702C/5BFC6B38) (fp_text reference C120 (at 2.8 0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF0D735) (at 43.2 26.25) (path /5B6B702C/5BFC1C0D) (fp_text reference C119 (at 2.9 0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:BGA_24_6x8_DEPOP1_1MM (layer F.Cu) (tedit 590FCF9D) (tstamp 5BEAF9A8) (at 51 25) (path /5B6B703A/5B80CFD7) (fp_text reference U4 (at -4.4 -3.9) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value S27KS0641 (at 0 -6) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start 3.5 -4.5) (end 3.5 4.5) (layer F.SilkS) (width 0.1)) (fp_line (start -3 -4.5) (end 3.5 -4.5) (layer F.SilkS) (width 0.1)) (fp_line (start -3.5 -4) (end -3 -4.5) (layer F.SilkS) (width 0.1)) (fp_line (start -3.5 4.5) (end -3.5 -4) (layer F.SilkS) (width 0.1)) (fp_line (start 3.5 4.5) (end -3.5 4.5) (layer F.SilkS) (width 0.1)) (pad E5 smd circle (at 2 2) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad E4 smd circle (at 1 2) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad E3 smd circle (at 0 2) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 23 /RAM/RAM1_DQ5)) (pad E2 smd circle (at -1 2) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 19 /RAM/RAM1_DQ6)) (pad E1 smd circle (at -2 2) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 20 /RAM/RAM1_DQ7)) (pad D5 smd circle (at 2 1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 18 /RAM/RAM1_DQ4)) (pad D4 smd circle (at 1 1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 29 /RAM/RAM1_DQ3)) (pad D3 smd circle (at 0 1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 1 /RAM/RAM1_DQ0)) (pad D2 smd circle (at -1 1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 12 /RAM/RAM1_DQ1)) (pad D1 smd circle (at -2 1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad C5 smd circle (at 2 0) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 30 /RAM/RAM1_PSC_N)) (pad C4 smd circle (at 1 0) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 6 /RAM/RAM1_DQ2)) (pad C3 smd circle (at 0 0) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 7 /RAM/RAM1_DQS)) (pad C2 smd circle (at -1 0) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad C1 smd circle (at -2 0) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad B5 smd circle (at 2 -1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 25 /RAM/RAM1_PSC_P)) (pad B4 smd circle (at 1 -1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad B3 smd circle (at 0 -1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad B2 smd circle (at -1 -1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 27 /RAM/RAM1_CK_P)) (pad B1 smd circle (at -2 -1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 24 /RAM/RAM1_CK_N)) (pad A5 smd circle (at 2 -2) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad A4 smd circle (at 1 -2) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 28 /RAM/RAM1_RST_N)) (pad A3 smd circle (at 0 -2) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 15 /RAM/RAM1_CS_N)) (pad A2 smd circle (at -1 -2) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (model :WALTER:smd_bga/tfbga48.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:BGA_24_6x8_DEPOP1_1MM (layer F.Cu) (tedit 590FCF9D) (tstamp 5B6CFED7) (at 61 25) (path /5B6B703A/5B804D11) (fp_text reference U3 (at -4.3 -4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value S27KS0641 (at 0 -6) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start 3.5 4.5) (end -3.5 4.5) (layer F.SilkS) (width 0.1)) (fp_line (start -3.5 4.5) (end -3.5 -4) (layer F.SilkS) (width 0.1)) (fp_line (start -3.5 -4) (end -3 -4.5) (layer F.SilkS) (width 0.1)) (fp_line (start -3 -4.5) (end 3.5 -4.5) (layer F.SilkS) (width 0.1)) (fp_line (start 3.5 -4.5) (end 3.5 4.5) (layer F.SilkS) (width 0.1)) (pad A2 smd circle (at -1 -2) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad A3 smd circle (at 0 -2) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 17 /RAM/RAM0_CS_N)) (pad A4 smd circle (at 1 -2) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 16 /RAM/RAM0_RST_N)) (pad A5 smd circle (at 2 -2) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad B1 smd circle (at -2 -1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 21 /RAM/RAM0_CK_N)) (pad B2 smd circle (at -1 -1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 22 /RAM/RAM0_CK_P)) (pad B3 smd circle (at 0 -1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad B4 smd circle (at 1 -1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad B5 smd circle (at 2 -1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 14 /RAM/RAM0_PSC_P)) (pad C1 smd circle (at -2 0) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad C2 smd circle (at -1 0) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad C3 smd circle (at 0 0) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 26 /RAM/RAM0_DQS)) (pad C4 smd circle (at 1 0) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 10 /RAM/RAM0_DQ2)) (pad C5 smd circle (at 2 0) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 13 /RAM/RAM0_PSC_N)) (pad D1 smd circle (at -2 1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad D2 smd circle (at -1 1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 5 /RAM/RAM0_DQ1)) (pad D3 smd circle (at 0 1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 11 /RAM/RAM0_DQ0)) (pad D4 smd circle (at 1 1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 9 /RAM/RAM0_DQ3)) (pad D5 smd circle (at 2 1) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 4 /RAM/RAM0_DQ4)) (pad E1 smd circle (at -2 2) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 2 /RAM/RAM0_DQ7)) (pad E2 smd circle (at -1 2) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 8 /RAM/RAM0_DQ6)) (pad E3 smd circle (at 0 2) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 3 /RAM/RAM0_DQ5)) (pad E4 smd circle (at 1 2) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad E5 smd circle (at 2 2) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (model :WALTER:smd_bga/tfbga48.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5BEF91BF) (at 74.5 45.5) (path /5B6B7044/5C76D1A0) (fp_text reference R28 (at 0.05 1.4) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 0 (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 260 /MCU/PUDC_B)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF15F4A) (at 54.7 48.7) (path /5B6B7005/5BF920D0/5BE997C1) (fp_text reference C104 (at -2.9 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:OSCILLATOR_1.6x1.2 (layer B.Cu) (tedit 5BE68696) (tstamp 5BF366F6) (at 80.3 37.4 270) (path /5B6B702C/5C012681) (fp_text reference U12 (at 0 -1.5 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value DSC6001HI2A-025.0000‎ (at 0 -4.5 270) (layer B.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_line (start -1 -0.8) (end -0.7 -0.8) (layer B.SilkS) (width 0.15)) (fp_line (start -1 -0.5) (end -1 -0.8) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.56 -0.375 270) (size 0.43 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 2 smd rect (at 0.6 -0.375 270) (size 0.35 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 3 smd rect (at 0.6 0.375 270) (size 0.35 0.5) (layers B.Cu B.Paste B.Mask) (net 258 "Net-(R27-Pad2)")) (pad 4 smd rect (at -0.6 0.375 270) (size 0.35 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) ) (module azonenberg_pcb:OSCILLATOR_2.0x1.6 (layer F.Cu) (tedit 57414D01) (tstamp 5BE6E9ED) (at 90.1 38.3 270) (path /5B6B7044/5D305E88) (fp_text reference U10 (at -0.1 2.1 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value DSC6083MI2A-032K768 (at 3.5 -0.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_circle (center 1.6 -1.385515) (end 1.6 -1.2) (layer F.SilkS) (width 0.2)) (pad 2 smd rect (at -0.75 -0.6 270) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 1 smd rect (at 0.75 -0.6 270) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) (net 254 "Net-(R21-Pad2)")) (pad 4 smd rect (at 0.75 0.6 270) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad 3 smd rect (at -0.75 0.6 270) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) (net 399 "Net-(U10-Pad3)")) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_qfn/dfn8-2x3.wrl (at (xyz 0 0 0)) (scale (xyz 0.9 0.9 0.8)) (rotate (xyz 0 0 -90)) ) ) (module azonenberg_pcb:DFN_8_0.5MM_2x3MM (layer F.Cu) (tedit 53C55214) (tstamp 5BE6E9E4) (at 72.15 23.5) (path /5B6B702C/5BE26C1D) (fp_text reference U9 (at 2.3 0 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value AT24MAC402-UDFN (at 0 4.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start -1.6 -1.1) (end -1.2 -1.1) (layer F.SilkS) (width 0.15)) (fp_line (start -1.6 1.1) (end -1.2 1.1) (layer F.SilkS) (width 0.15)) (fp_line (start -1.6 -1.1) (end -1.6 1.1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.6 1.1) (end 1.2 1.1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.6 -1.1) (end 1.6 1.1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.2 -1.1) (end 1.6 -1.1) (layer F.SilkS) (width 0.15)) (fp_line (start -1.2 1.1) (end -1.6 0.7) (layer F.SilkS) (width 0.15)) (pad 8 smd rect (at -0.75 -0.95) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad 7 smd rect (at -0.25 -0.95) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad 6 smd rect (at 0.25 -0.95) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 221 /FPGA/I2C_SCL)) (pad 5 smd rect (at 0.75 -0.95) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 222 /FPGA/I2C_SDA)) (pad 4 smd rect (at 0.75 0.95) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 3 smd rect (at 0.25 0.95) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 2 smd rect (at -0.25 0.95) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0.95) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad PAD smd rect (at 0 0) (size 2.2 0.61) (layers F.Cu F.Paste F.Mask)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn8.wrl (at (xyz 0 0 0)) (scale (xyz 1 0.75 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:OSCILLATOR_1.6x1.2 (layer F.Cu) (tedit 5BE68696) (tstamp 5BE6E9D0) (at 73.2 74) (path /5B6B700F/5BE9535D) (fp_text reference U8 (at -2.1 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value DSC6001HI2A-025.0000 (at 0 4.5) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start -1 0.8) (end -0.7 0.8) (layer F.SilkS) (width 0.15)) (fp_line (start -1 0.5) (end -1 0.8) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.56 0.375) (size 0.43 0.5) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad 2 smd rect (at 0.6 0.375) (size 0.35 0.5) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 3 smd rect (at 0.6 -0.375) (size 0.35 0.5) (layers F.Cu F.Paste F.Mask) (net 253 "Net-(R7-Pad1)")) (pad 4 smd rect (at -0.6 -0.375) (size 0.35 0.5) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5BE6DE56) (at 74.5 70.8 270) (path /5B6B700F/5BED2D60) (fp_text reference FB3 (at -0.2 -2.9 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value "600R @ 100 MHz" (at 0.05 3.1 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 231 /1V2)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 229 /Ethernet/A1V2_PLL)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BEF846C) (at 78.4 64.5) (path /5B6B700F/5BECB23A) (fp_text reference FB2 (at 0 -0.8) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "600R @ 100 MHz" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 231 /1V2)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 233 /Ethernet/A1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5BE6DE4A) (at 79.8 70.3) (path /5B6B700F/5BEB1353) (fp_text reference FB1 (at 2.4 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value "600R @ 100 MHz" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 235 /2V5)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 232 /Ethernet/A2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:SOD882 (layer F.Cu) (tedit 5BE684D4) (tstamp 5BE6DE14) (at 93.4 30) (path /5B6B7005/5D1CE534) (fp_text reference D2 (at 0.1 1.025) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value CTS520,L3F‎ (at 0 2.25) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start -0.75 -0.25) (end -0.75 0.25) (layer F.SilkS) (width 0.15)) (pad 2 smd rect (at 0.325 0) (size 0.35 0.6) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad 1 smd rect (at -0.325 0) (size 0.35 0.6) (layers F.Cu F.Paste F.Mask) (net 272 "Net-(D2-Pad1)")) ) (module azonenberg_pcb:CAP_SEIKO_CPH3225A (layer F.Cu) (tedit 5BE683D8) (tstamp 5BE6DB31) (at 93.1 33.3) (path /5B6B7005/5D0C7C66) (fp_text reference C46 (at 2.5 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value CPH3225A-2K (at 0 3.35) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start -2.5 -0.25) (end -2.5 0.25) (layer F.SilkS) (width 0.15)) (fp_line (start -2.25 0) (end -2.75 0) (layer F.SilkS) (width 0.15)) (fp_line (start -2 -1.4) (end 2 -1.4) (layer F.SilkS) (width 0.15)) (fp_line (start -2 1.4) (end 2 1.4) (layer F.SilkS) (width 0.15)) (fp_line (start 2 -1.4) (end 2 1.4) (layer F.SilkS) (width 0.15)) (fp_line (start -2 -1.4) (end -2 1.4) (layer F.SilkS) (width 0.15)) (pad 2 smd rect (at 1.1 0) (size 1.4 1.4) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 1 smd rect (at -1.1 0) (size 1.4 1.4) (layers F.Cu F.Paste F.Mask) (net 271 "/Power Supply/MCU_VBAT")) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 5BE5909A) (at 80.7 35.1) (path /5D403FC0) (fp_text reference TP10 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTPAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 206 /3V3)) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 5BE59095) (at 53.6 56.9) (path /5D402358) (fp_text reference TP9 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTPAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 235 /2V5)) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 5BE59090) (at 33.2 65.9) (path /5D4007A9) (fp_text reference TP8 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTPAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 209 /1V8)) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 5BE5908B) (at 75.9 75.1) (path /5D3FEB71) (fp_text reference TP7 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTPAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 231 /1V2)) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 5BE59086) (at 64.5 60) (path /5D3FE87E) (fp_text reference TP6 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTPAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 236 /1V0)) ) (module azonenberg_pcb:TESTPOINT_SMT_KEYSTONE_5016 (layer F.Cu) (tedit 53C619BB) (tstamp 5BE59081) (at 81.7 74.3) (path /5D3FCCF4) (fp_text reference TP5 (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTCLIP (at 0 4.6) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd rect (at 0 0) (size 4.7 3.43) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) ) (module azonenberg_pcb:TESTPOINT_SMT_KEYSTONE_5016 (layer F.Cu) (tedit 53C619BB) (tstamp 5BE5907C) (at 81.3 32 90) (path /5D3FC56A) (fp_text reference TP4 (at 0 3 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTCLIP (at 0 4.6 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd rect (at 0 0 90) (size 4.7 3.43) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 5BE59077) (at 65.8 75.3) (path /5B6B7005/5C1FEFFC) (fp_text reference TP3 (at -1.7 0) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTPAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 285 /PSU_TEMP)) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 5BE59072) (at 41.6 62.1) (path /5B6B7005/5C1887D2) (fp_text reference TP2 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTPAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 257 "/Power Supply/PGOOD")) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 53C661B2) (tstamp 5BE5906D) (at 83.85 46.6) (path /5B6B702C/5BF366F5) (fp_text reference TP1 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value TESTPAD (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 225 /FPGA/FPGA_INIT)) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BE59068) (at 63.3 49.8 270) (path /5B6B702C/5D3F599B) (fp_text reference R61 (at 0 0.8 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 220 /FPGA_TDO)) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 284 "Net-(R61-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BE59062) (at 100.95 53.6 180) (path /5D3F25B1) (fp_text reference R60 (at 0 -0.8 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 283 /MCU/JTAG_TDO)) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 214 /MCU_TDO)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BE5905C) (at 79.25 46.4) (path /5B6B7044/5D3E7347) (fp_text reference R59 (at 2.55 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 56 /MCU/QSPI_CS_N)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 282 "Net-(R59-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BEF9218) (at 79.2 45.5) (path /5B6B7044/5D3D3C3B) (fp_text reference R58 (at 2.6 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 54 /MCU/QSPI_DQ3)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 281 "Net-(R58-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BEF9245) (at 79.2 44.6) (path /5B6B7044/5D3D390E) (fp_text reference R57 (at 2.6 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 58 /MCU/QSPI_DQ2)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 280 "Net-(R57-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BE5904A) (at 79.2 43.7) (path /5B6B7044/5D3D36A5) (fp_text reference R56 (at 2.6 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 57 /MCU/QSPI_DQ1)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 279 "Net-(R56-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BE59044) (at 79.2 42.8) (path /5B6B7044/5D3D3279) (fp_text reference R55 (at 2.6 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 55 /MCU/QSPI_DQ0)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 278 "Net-(R55-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BE5903E) (at 86.9 20.4 90) (path /5B6B7044/5D3687A9) (fp_text reference R54 (at -2.1 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 277 "Net-(R54-Pad2)")) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 55 /MCU/QSPI_DQ0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BE59038) (at 84.4 20.4 90) (path /5B6B7044/5D3680F9) (fp_text reference R53 (at -2 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 276 "Net-(R53-Pad2)")) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 54 /MCU/QSPI_DQ3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BE59032) (at 85.6 28 270) (path /5B6B7044/5D368B11) (fp_text reference R52 (at 2.1 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 58 /MCU/QSPI_DQ2)) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 275 "Net-(R52-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BE5902C) (at 84.4 28 270) (path /5B6B7044/5D379C82) (fp_text reference R51 (at 2.1 -0.1 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 57 /MCU/QSPI_DQ1)) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 274 "Net-(R51-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BF0B987) (at 68.5 40.55) (path /5B6B702C/5D36315D) (fp_text reference R50 (at 2.05 0.2) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 223 /QSPI_CLK)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 273 "Net-(R50-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BE59020) (at 79.95 20.603 270) (path /5B6B702C/5D2D4F02) (fp_text reference R49 (at 0 5.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 470 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 245 "Net-(D6-Pad2)")) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BE5901A) (at 78.55 20.6 270) (path /5B6B702C/5D2D4EE3) (fp_text reference R48 (at 0 5.1 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 470 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 243 "Net-(D5-Pad2)")) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BE59014) (at 77.15 20.6 270) (path /5B6B702C/5D2CF81D) (fp_text reference R47 (at 0 4.8 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 470 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 241 "Net-(D4-Pad2)")) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BE5900E) (at 75.65 20.6 270) (path /5B6B702C/5D2CDD46) (fp_text reference R46 (at 0 4.3 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 470 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 239 "Net-(D3-Pad2)")) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BE59008) (at 92 30.6 270) (path /5B6B7005/5D0C77C0) (fp_text reference R45 (at -2.2 0 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 330 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 271 "/Power Supply/MCU_VBAT")) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 272 "Net-(D2-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BE59002) (at 100.1 51.4 270) (path /5B6B7005/5CFC62C6) (fp_text reference R44 (at 0 -0.95 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 10K (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 247 /MCU_BOOT0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BEF8EA0) (at 46.8 67.5 180) (path /5B6B7005/5CAB9761) (fp_text reference R43 (at -2.1 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 324K (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 270 "/Power Supply/3V3_FB")) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BEF8E91) (at 36.8 62.2 180) (path /5B6B7005/5CA6A03D) (fp_text reference R42 (at 0.7 -1 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 475K (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 269 "/Power Supply/2V5_FB")) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BF3EA83) (at 43.9 70.047 270) (path /5B6B7005/5CA6A018) (fp_text reference R41 (at 0.003 1.15 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 649K (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 268 "/Power Supply/1V8_FB")) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BEF8E73) (at 69.1 73.2) (path /5B6B7005/5C9CF968) (fp_text reference R40 (at -2.2 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 464K (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 267 "/Power Supply/1V2_FB")) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BEF8E64) (at 56.147 61.1 180) (path /5B6B7005/5C979796) (fp_text reference R39 (at -2.053 -0.05 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 1.02M (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 266 "/Power Supply/1V0_FB")) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BF2A220) (at 45.9 69 270) (path /5B6B7005/5CAB976E) (fp_text reference R38 (at 2.1 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 1.02M (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 265 "/Power Supply/3V3_SENSE")) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 270 "/Power Supply/3V3_FB")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BF2A211) (at 36.8 61.3) (path /5B6B7005/5CA6A04A) (fp_text reference R37 (at -0.6 -0.8) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 1.02M (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 264 "/Power Supply/2V5_SENSE")) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 269 "/Power Supply/2V5_FB")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BF2A202) (at 41 70.1 180) (path /5B6B7005/5CA6A025) (fp_text reference R36 (at 2.2 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 806K (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 263 "/Power Supply/1V8_SENSE")) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 268 "/Power Supply/1V8_FB")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BEF8E28) (at 69.1 74.2 180) (path /5B6B7005/5C9CF975) (fp_text reference R35 (at 2.2 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 232K (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 262 "/Power Supply/1V2_SENSE")) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 267 "/Power Supply/1V2_FB")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BF2A1F3) (at 56.15 60.2) (path /5B6B7005/5C979787) (fp_text reference R34 (at -2.1 0.1) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 255K (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 261 "/Power Supply/1V0_SENSE")) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 266 "/Power Supply/1V0_FB")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BF2A1E4) (at 115.8 28 90) (path /5B6B7005/5CAB9754) (fp_text reference R33 (at 0 0.9 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 0 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 265 "/Power Supply/3V3_SENSE")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BEF8DFB) (at 38.6 50.8) (path /5B6B7005/5CA6A030) (fp_text reference R32 (at 2.3 -0.3) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 0 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 235 /2V5)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 264 "/Power Supply/2V5_SENSE")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BF2A1D5) (at 35 42.55 90) (path /5B6B7005/5CA6A00B) (fp_text reference R31 (at -0.1 0.95 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 0 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 263 "/Power Supply/1V8_SENSE")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BEF8DDD) (at 75.3 73.9) (path /5B6B7005/5C9CF95B) (fp_text reference R30 (at 2.4 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 0 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 231 /1V2)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 262 "/Power Supply/1V2_SENSE")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BEF8DCE) (at 60.7 52.4 90) (path /5B6B7005/5C97977B) (fp_text reference R29 (at 0 -1 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 0 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 261 "/Power Supply/1V0_SENSE")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BF366E3) (at 79.3 39) (path /5B6B702C/5C01268E) (fp_text reference R27 (at 0 0.9) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 258 "Net-(R27-Pad2)")) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 259 /FPGA/FPGA_CLK_25MHZ)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BE58F96) (at 48.5 64.9 270) (path /5B6B7005/5C14D062) (fp_text reference R26 (at 0 -0.95 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 1K (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 257 "/Power Supply/PGOOD")) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BE58F90) (at 86.8 31.7) (path /5B6B7044/5BE30D73) (fp_text reference R25 (at 0 -0.8) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 4.7k (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 58 /MCU/QSPI_DQ2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BF36849) (at 87 24) (path /5B6B7044/5BE3081E) (fp_text reference R24 (at 2.5 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 4.7k (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 54 /MCU/QSPI_DQ3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BE58F84) (at 82.5 27.4 180) (path /5B6B7044/5BE30144) (fp_text reference R23 (at 0 -0.9 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 4.7k (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 56 /MCU/QSPI_CS_N)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BE58F7E) (at 76.1 49.65) (path /5B6B7044/5BEE00F4) (fp_text reference R22 (at 0.15 -0.85) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 33 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 255 /MCU/MCU_CLK)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 256 "Net-(R22-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BE58F78) (at 93.2 39.1 180) (path /5B6B7044/5BE8C504) (fp_text reference R21 (at 0 -0.9 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 33 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 254 "Net-(R21-Pad2)")) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 217 /MCU/CLK_32KHZ)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BE58F72) (at 80.8 59.2 90) (path /5B6B702C/5BF2F8A1) (fp_text reference R20 (at 0 1 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 4.7k (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 212 /FPGA_RST_N)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BE58F6C) (at 81.95 46.6) (path /5B6B702C/5BF31E19) (fp_text reference R19 (at -2.1 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 4.7k (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 225 /FPGA/FPGA_INIT)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BE58F66) (at 85 43.3 180) (path /5B6B702C/5BF3423D) (fp_text reference R18 (at -2.1 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 1K (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 210 /FPGA_DONE)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BE58F60) (at 83.7 37.75 90) (path /5B6B702C/5BF2B413) (fp_text reference R17 (at 0 -0.8 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 470 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 237 "Net-(D1-Pad2)")) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BE80160) (at 68.65 37.6 90) (path /5B6B702C/5BE2B445) (fp_text reference R16 (at 2 0.35 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 100 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 207 /FPGA/IN_3V3_0_N)) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 208 /FPGA/IN_3V3_0_P)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BE58F54) (at 73.35 20.1 270) (path /5B6B702C/5BE27A32) (fp_text reference R15 (at 0 -1.45 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 4.7k (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 222 /FPGA/I2C_SDA)) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BE58F4E) (at 72.25 20.1 270) (path /5B6B702C/5BE27700) (fp_text reference R14 (at 0 1.3 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 4.7k (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 221 /FPGA/I2C_SCL)) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BFDDD34) (at 68.25 68) (path /5B6B700F/5BEA9236) (fp_text reference R13 (at -5.75 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 10K (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 47 /Ethernet/RGMII_RX_CLK)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BFDDD25) (at 68.25 67) (path /5B6B700F/5BE8FFE9) (fp_text reference R12 (at -5.75 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 10K (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 48 /Ethernet/RGMII_RX_DV)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BFDDD16) (at 65.5 66.5) (path /5B6B700F/5BE812B3) (fp_text reference R11 (at -0.7 0.9) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 10K (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 49 /Ethernet/RGMII_RXD0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BFDDD07) (at 68.25 66) (path /5B6B700F/5BE812A7) (fp_text reference R10 (at -5.75 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 10K (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 50 /Ethernet/RGMII_RXD1)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BFDDCF8) (at 68.25 64.5) (path /5B6B700F/5BE7F839) (fp_text reference R9 (at -5.5 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 10K (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 51 /Ethernet/RGMII_RXD2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 5BFDDCE9) (at 65.5 64) (path /5B6B700F/5BE7DCD1) (fp_text reference R8 (at 0 -0.9) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value 10K (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 52 /Ethernet/RGMII_RXD3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BE58F24) (at 74.4 72.7) (path /5B6B700F/5BE95C4B) (fp_text reference R7 (at 1.7 0.2) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 33 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 228 /Ethernet/ETH_CLK_25MHZ)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 253 "Net-(R7-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BEF843A) (at 71 71.25 270) (path /5B6B700F/5BEF5A2A) (fp_text reference R6 (at -0.05 1.8 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 1K (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 40 /Ethernet/RGMII_MDIO)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BEF842B) (at 73 71.25 90) (path /5B6B700F/5BE79581) (fp_text reference R5 (at 0.05 -2.8 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 10K (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 230 "Net-(R5-Pad2)")) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BFDDCBC) (at 74.5 59.8 90) (path /5B6B700F/5BE384DC) (fp_text reference R4 (at 0 -0.8 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 1K (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 226 /ETH_LED1_N)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BFDDCAD) (at 75.5 59.8 270) (path /5B6B700F/5BE39B3C) (fp_text reference R3 (at 0 -1 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 1K (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 224 /ETH_LED2_N)) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BFDDC9E) (at 76.5 71.25 90) (path /5B6B700F/5BE73F11) (fp_text reference R2 (at 0.05 1.8 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value "12.1K 1%" (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 227 "Net-(R2-Pad2)")) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 5BE58F00) (at 114.2 27.25) (path /5B6B7005/5C1392F7) (fp_text reference R1 (at 0 -0.85) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value 10K (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 211 /MCU_RST_N)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:DFN_6_0.65MM_2x2MM_GDS (layer F.Cu) (tedit 58C5FA5C) (tstamp 5BE58EFA) (at 79.35 26.4) (path /5B6B702C/5D2D4ED9) (solder_mask_margin 0.05) (solder_paste_ratio -0.15) (attr smd) (fp_text reference Q3 (at 1.7 0 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value SSM6N58NU (at 0 2.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start 1.1 -1.3) (end -1.1 -1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 1.3) (end 1.1 -1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 1.3) (end 1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 -1.3) (end -1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 1) (end -0.8 1.3) (layer F.SilkS) (width 0.15)) (pad D1 smd rect (at -0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 244 "Net-(D5-Pad1)")) (pad D2 smd rect (at 0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 246 "Net-(D6-Pad1)")) (pad D1 smd rect (at -0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 244 "Net-(D5-Pad1)")) (pad G2 smd rect (at 0 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 295 /FPGA/GPIO_LED3)) (pad S2 smd rect (at 0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad D2 smd rect (at 0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 246 "Net-(D6-Pad1)")) (pad G1 smd rect (at 0 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 292 /FPGA/GPIO_LED2)) (pad S1 smd rect (at -0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn8.wrl (at (xyz 0 0 0)) (scale (xyz 0.75 0.75 0.75)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:DFN_6_0.65MM_2x2MM_GDS (layer F.Cu) (tedit 58C5FA5C) (tstamp 5BE58EE9) (at 76.35 26.4) (path /5B6B702C/5D2CD0DE) (solder_mask_margin 0.05) (solder_paste_ratio -0.15) (attr smd) (fp_text reference Q2 (at -1.7 0 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value SSM6N58NU (at 0 2.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start 1.1 -1.3) (end -1.1 -1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 1.3) (end 1.1 -1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 1.3) (end 1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 -1.3) (end -1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 1) (end -0.8 1.3) (layer F.SilkS) (width 0.15)) (pad D1 smd rect (at -0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 240 "Net-(D3-Pad1)")) (pad D2 smd rect (at 0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 242 "Net-(D4-Pad1)")) (pad D1 smd rect (at -0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 240 "Net-(D3-Pad1)")) (pad G2 smd rect (at 0 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 294 /FPGA/GPIO_LED1)) (pad S2 smd rect (at 0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad D2 smd rect (at 0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 242 "Net-(D4-Pad1)")) (pad G1 smd rect (at 0 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 293 /FPGA/GPIO_LED0)) (pad S1 smd rect (at -0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn8.wrl (at (xyz 0 0 0)) (scale (xyz 0.75 0.75 0.75)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:DFN_6_0.65MM_2x2MM_GDS (layer F.Cu) (tedit 58C5FA5C) (tstamp 5BE58ED8) (at 85.6 41.15) (path /5B6B702C/5BF27F1F) (solder_mask_margin 0.05) (solder_paste_ratio -0.15) (attr smd) (fp_text reference Q1 (at 1.9 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value SSM6N58NU (at 0 2.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start 1.1 -1.3) (end -1.1 -1.3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.1 1.3) (end 1.1 -1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 1.3) (end 1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 -1.3) (end -1.1 1.3) (layer F.SilkS) (width 0.15)) (fp_line (start -1.1 1) (end -0.8 1.3) (layer F.SilkS) (width 0.15)) (pad D1 smd rect (at -0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask) (net 238 "Net-(D1-Pad1)")) (pad D2 smd rect (at 0.475 0) (size 0.65 0.9) (layers F.Cu F.Paste F.Mask)) (pad D1 smd rect (at -0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 238 "Net-(D1-Pad1)")) (pad G2 smd rect (at 0 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad S2 smd rect (at 0.65 -0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad D2 smd rect (at 0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask)) (pad G1 smd rect (at 0 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 210 /FPGA_DONE)) (pad S1 smd rect (at -0.65 0.86) (size 0.3 0.3) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn8.wrl (at (xyz 0 0 0)) (scale (xyz 0.75 0.75 0.75)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:INDUCTOR_YUDEN_NRS5030 (layer F.Cu) (tedit 56A54495) (tstamp 5BF277ED) (at 40.5 72.5) (path /5B6B7005/5C43EA75) (fp_text reference L5 (at -3.75 2.45) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value NRS5030T2R2NMGJ (at 0 6.45) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start -3 -3) (end 3 -3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 -3) (end 3 3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 3) (end -3 3) (layer F.SilkS) (width 0.15)) (fp_line (start -3 3) (end -3 -3) (layer F.SilkS) (width 0.15)) (pad 2 smd rect (at 1.8 0) (size 1.5 4) (layers F.Cu F.Paste F.Mask) (net 252 "/Power Supply/2V5_SW")) (pad 1 smd rect (at -1.8 0) (size 1.5 4) (layers F.Cu F.Paste F.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_inductors/inductor_smd_6.5x4.8mm.wrl (at (xyz 0 0 0)) (scale (xyz 0.9 0.9 0.9)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:INDUCTOR_YUDEN_NRS5030 (layer F.Cu) (tedit 56A54495) (tstamp 5BE58EBD) (at 40.5 66.25) (path /5B6B7005/5C4806D9) (fp_text reference L4 (at -3.75 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value NRS5030T2R2NMGJ (at 0 6.45) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start -3 -3) (end 3 -3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 -3) (end 3 3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 3) (end -3 3) (layer F.SilkS) (width 0.15)) (fp_line (start -3 3) (end -3 -3) (layer F.SilkS) (width 0.15)) (pad 2 smd rect (at 1.8 0) (size 1.5 4) (layers F.Cu F.Paste F.Mask) (net 251 "/Power Supply/1V8_SW")) (pad 1 smd rect (at -1.8 0) (size 1.5 4) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_inductors/inductor_smd_6.5x4.8mm.wrl (at (xyz 0 0 0)) (scale (xyz 0.9 0.9 0.9)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:INDUCTOR_YUDEN_NRS5030 (layer F.Cu) (tedit 56A54495) (tstamp 5BF29F07) (at 54.85 65.1 180) (path /5B6B7005/5C4C3320) (fp_text reference L3 (at -3.75 2.6 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value NRS5030T2R2NMGJ (at 0 6.45 180) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start -3 -3) (end 3 -3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 -3) (end 3 3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 3) (end -3 3) (layer F.SilkS) (width 0.15)) (fp_line (start -3 3) (end -3 -3) (layer F.SilkS) (width 0.15)) (pad 2 smd rect (at 1.8 0 180) (size 1.5 4) (layers F.Cu F.Paste F.Mask) (net 250 "/Power Supply/1V2_SW")) (pad 1 smd rect (at -1.8 0 180) (size 1.5 4) (layers F.Cu F.Paste F.Mask) (net 231 /1V2)) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_inductors/inductor_smd_6.5x4.8mm.wrl (at (xyz 0 0 0)) (scale (xyz 0.9 0.9 0.9)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:INDUCTOR_YUDEN_NR6028 (layer F.Cu) (tedit 53C52B56) (tstamp 5BF2A162) (at 48.25 63.25 180) (path /5B6B7005/5C50A8D8) (fp_text reference L2 (at -0.1 3.45 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value NR6028T2R2N (at 0 6.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 2.35 0 180) (size 1.6 5.7) (layers F.Cu F.Paste F.Mask) (net 249 "/Power Supply/3V3_SW")) (pad 1 smd rect (at -2.35 0 180) (size 1.6 5.7) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_inductors/inductor_smd_8x5mm.wrl (at (xyz 0 0 0)) (scale (xyz 0.75 0.75 0.5)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:INDUCTOR_TDK_SPM6530 (layer F.Cu) (tedit 54A5BECD) (tstamp 5BF2A060) (at 56.25 72.25 180) (path /5B6B7005/5C30695B) (fp_text reference L1 (at -5.5 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value SPM6530T-2R2M (at 5 3.25 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start -3.75 -2.25) (end -3.75 -3.5) (layer F.SilkS) (width 0.15)) (fp_line (start -3.75 -3.5) (end -2.5 -3.5) (layer F.SilkS) (width 0.15)) (fp_line (start 3.75 -2.25) (end 3.75 -3.5) (layer F.SilkS) (width 0.15)) (fp_line (start 3.75 -3.5) (end 2.5 -3.5) (layer F.SilkS) (width 0.15)) (fp_line (start -3.75 2.25) (end -3.75 3.5) (layer F.SilkS) (width 0.15)) (fp_line (start -3.75 3.5) (end -2.5 3.5) (layer F.SilkS) (width 0.15)) (fp_line (start 3.75 2.25) (end 3.75 3.5) (layer F.SilkS) (width 0.15)) (fp_line (start 3.75 3.5) (end 2.5 3.5) (layer F.SilkS) (width 0.15)) (pad 2 smd rect (at 3.7 0 180) (size 1.85 3.4) (layers F.Cu F.Paste F.Mask) (net 248 "/Power Supply/1V0_SW")) (pad 1 smd rect (at -3.7 0 180) (size 1.85 3.4) (layers F.Cu F.Paste F.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_inductors/inductor_smd_6.5x4.8mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 0.5)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 5BE58C45) (at 79.95 23.2 90) (path /5B6B702C/5D2D4F0C) (fp_text reference D6 (at 0 -5.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value GREEN (at 0.05 2.95 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 245 "Net-(D6-Pad2)")) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 246 "Net-(D6-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 5BE58C3E) (at 78.55 23.2 90) (path /5B6B702C/5D2D4EED) (fp_text reference D5 (at 0 -5.1 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value GREEN (at 0.05 2.95 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 243 "Net-(D5-Pad2)")) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 244 "Net-(D5-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 5BEB2843) (at 77.15 23.2 90) (path /5B6B702C/5D2CF827) (fp_text reference D4 (at 0 -4.8 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value GREEN (at 0.05 2.95 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 241 "Net-(D4-Pad2)")) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 242 "Net-(D4-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 5BE58C30) (at 75.65 23.2 90) (path /5B6B702C/5D2CEDB6) (fp_text reference D3 (at 0 -4.3 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value GREEN (at 0.05 2.95 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 239 "Net-(D3-Pad2)")) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 240 "Net-(D3-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 53C52A72) (tstamp 5BE58C29) (at 84.95 37.9 90) (path /5B6B702C/5BF295E2) (fp_text reference D1 (at 0 1 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value GREEN (at 0.05 2.95 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 237 "Net-(D1-Pad2)")) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 238 "Net-(D1-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BE58C22) (at 94.65 58.1 45) (path /5B6B7005/5C5888E2/5D2E7FF4) (fp_text reference C118 (at -0.035355 1.025305 45) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 45) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 45) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0 45) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer B.Cu) (tedit 54A4E4D1) (tstamp 5C089D56) (at 45.85 61.35) (path /5B6B7005/5CCA6E51) (fp_text reference C117 (at 0.15 2.45) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "47 uF" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 117 "/Power Supply/5V0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer B.Cu) (tedit 54A4E4D1) (tstamp 5BF92179) (at 59.65 70.5 180) (path /5B6B7005/5CEF45AD) (fp_text reference C116 (at -3.95 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "100 uF" (at 0 -3.7 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 1.55 -0.01493 180) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -1.55 -0.01493 180) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 5BF9216A) (at 42.25 74 180) (path /5B6B7005/5CBB6441) (fp_text reference C115 (at 3.95 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "10 uF" (at 0 -3.7 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 1.55 -0.01493 180) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -1.55 -0.01493 180) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 117 "/Power Supply/5V0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer B.Cu) (tedit 54A4E4D1) (tstamp 5BF9215B) (at 52.15 61.35) (path /5B6B7005/5CE9FEAC) (fp_text reference C114 (at 0.2 -2.1) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "47 uF" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 5BF9214C) (at 42.25 72.05 180) (path /5B6B7005/5CB672E9) (fp_text reference C113 (at 4 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "10 uF" (at 0 -3.7 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 1.55 -0.01493 180) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -1.55 -0.01493 180) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 117 "/Power Supply/5V0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 5BF9213D) (at 56.7 66.75 180) (path /5B6B7005/5CE4BF3E) (fp_text reference C112 (at -0.1 1.4 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "22 uF" (at 0 -3.7 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 1.55 -0.01493 180) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -1.55 -0.01493 180) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 231 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 5BF9212E) (at 53.8 69.1) (path /5B6B7005/5CB66EA6) (fp_text reference C111 (at -3.4 0.2) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "10 uF" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 117 "/Power Supply/5V0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 5BF9211F) (at 38.45 65.4) (path /5B6B7005/5CDF7C69) (fp_text reference C110 (at -3.55 -0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "22 uF" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 5BF33D00) (at 42.75 67.95 180) (path /5B6B7005/5CB668F5) (fp_text reference C109 (at 4.15 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "22 uF" (at 0 -3.7 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 1.55 -0.01493 180) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -1.55 -0.01493 180) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 117 "/Power Supply/5V0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 5BF92101) (at 36.1 71.05 90) (path /5B6B7005/5CD4FCEA) (fp_text reference C108 (at 0 -1.6 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value "22 uF" (at 0 3.7 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 1.55 0.01493 90) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 1 smd rect (at -1.55 0.01493 90) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer B.Cu) (tedit 54A4E4D1) (tstamp 5BF920F2) (at 53.8 71.8) (path /5B6B7005/5CB13E13) (fp_text reference C107 (at 0.05 2.15) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "47 uF" (at 0 -3.7) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -1.55 -0.01493) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 117 "/Power Supply/5V0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5BF366D4) (at 80.7 37.4 270) (path /5B6B702C/5C012696) (fp_text reference C106 (at 0 -0.9 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value "0.47 uF" (at 0.05 3.1 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58BD4) (at 62.75 36.1) (path /5B6B7005/5BF920D0/5BEA80AC) (fp_text reference C105 (at -2.9 0.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58BC8) (at 70 41.5 180) (path /5B6B7005/5BF920D0/5BE91028) (fp_text reference C103 (at -3.1 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58BC2) (at 67 48.5) (path /5B6B7005/5BF920D0/5BE8D8F7) (fp_text reference C102 (at 2.4 0.1) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58BBC) (at 67 46.5) (path /5B6B7005/5BF920D0/5BE8178F) (fp_text reference C101 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58BB6) (at 59 38.5 180) (path /5B6B7005/5BF920D0/5BEA80A2) (fp_text reference C100 (at 2.5 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58BB0) (at 57 45.5 180) (path /5B6B7005/5BF920D0/5BE997B7) (fp_text reference C99 (at 0.5 0.8 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58BAA) (at 71 39.8) (path /5B6B7005/5BF920D0/5BE9101E) (fp_text reference C98 (at 2.2 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58BA4) (at 70 47.5) (path /5B6B7005/5BF920D0/5BE8D456) (fp_text reference C97 (at 1.6 -0.7) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58B9E) (at 62 40.5 180) (path /5B6B7005/5BF920D0/5BE8136F) (fp_text reference C96 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF7F594) (at 62 38.5 180) (path /5B6B7005/5BF920D0/5BEA8098) (fp_text reference C95 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58B92) (at 60.7 50.45) (path /5B6B7005/5BF920D0/5BE997AD) (fp_text reference C94 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE91C4C) (at 57.500001 35.5 180) (path /5B6B7005/5BF920D0/5BEA808E) (fp_text reference C93 (at 2.400001 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58B86) (at 56.5 49 90) (path /5B6B7005/5BF920D0/5BE997A3) (fp_text reference C92 (at 2 -0.2 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE922D1) (at 67.5 35.5 180) (path /5B6B7005/5BF920D0/5BE91014) (fp_text reference C91 (at 2.2 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58B7A) (at 65.5 50.5 180) (path /5B6B7005/5BF920D0/5BE8D0C3) (fp_text reference C90 (at -2.1 -0.1 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58B74) (at 66.5 41.55) (path /5B6B7005/5BF920D0/5BE80EA0) (fp_text reference C89 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BE58B6E) (at 57.1 41.1) (path /5B6B7005/5BF920D0/5BEA8084) (fp_text reference C88 (at -2.3 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 5BF92A4F) (at 55.9 53.4 45) (path /5B6B7005/5BF920D0/5BE99799) (fp_text reference C87 (at 0 1.5 45) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value "4.7 uF" (at 0 3 45) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.75 0 45) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0 45) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58B62) (at 71.5 36 270) (path /5B6B7005/5BF920D0/5BE9100A) (fp_text reference C86 (at -0.6 0.8 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58B5C) (at 70.5 50.5) (path /5B6B7005/5BF920D0/5BE8CA3A) (fp_text reference C85 (at -0.3 0.9) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BE58B56) (at 66.8 43.2) (path /5B6B7005/5BF920D0/5BE807D0) (fp_text reference C84 (at 3.4 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58B50) (at 63.8 43.7 225) (path /5B6B7005/5BF920D0/5BE7B683) (fp_text reference C83 (at 0.05 0.34 225) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 225) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.499999 0 225) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.499999 0 225) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BE58B4A) (at 50.2 34.35) (path /5B6B7005/5BF920D0/5BEA807A) (fp_text reference C82 (at 0 -1.05) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BE58B44) (at 53.6 50.625) (path /5B6B7005/5BF920D0/5BE9978F) (fp_text reference C81 (at -2.7 -0.025) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BE58B3E) (at 75.6 37.1 90) (path /5B6B7005/5BF920D0/5BE91000) (fp_text reference C80 (at 0 -0.8 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BF366C5) (at 72.5 54.4) (path /5B6B7005/5BF920D0/5BE8C476) (fp_text reference C79 (at 0 1) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BE58B32) (at 53 44.2 180) (path /5B6B7005/5BF920D0/5BE80214) (fp_text reference C78 (at 0 1 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF0B6E0) (at 65 43 270) (path /5B6B7005/5BF920D0/5BE7A1C7) (fp_text reference C77 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 5BE58B26) (at 32.9 41.4 270) (path /5B6B7005/5BF920D0/5BEA8070) (fp_text reference C76 (at -3.9 0 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value "47 uF" (at 0 3.7 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 1 smd rect (at -1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 5BF37332) (at 34 61 270) (path /5B6B7005/5BF920D0/5BE99091) (fp_text reference C75 (at 0 1.4 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value "47 uF" (at 0 3.7 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 1 smd rect (at -1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BF366B6) (at 75.2 29.4 270) (path /5B6B7005/5BF920D0/5BE90FF6) (fp_text reference C74 (at 0 -1 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BF366A7) (at 70.75 37.8 180) (path /5B6B7005/5BF920D0/5BE8BCB4) (fp_text reference C73 (at -2.55 -0.1 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 5BE58B0E) (at 75 57.3 180) (path /5B6B7005/5BF920D0/5BE8609A) (fp_text reference C72 (at -3.35 0.05 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value "100 uF" (at 0 3.7 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 1.55 0.01493 180) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 1 smd rect (at -1.55 0.01493 180) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 5BF3ACEE) (at 33 47 270) (path /5B6B7005/5BF920D0/5BE7F902) (fp_text reference C71 (at 3.2 0 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value "47 uF" (at 0 3.7 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 1 smd rect (at -1.55 0.01493 270) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58B02) (at 64.5 40.5 270) (path /5B6B7005/5BF920D0/5BE6AE91) (fp_text reference C70 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE81E52) (at 63.5 45.5 90) (path /5B6B7005/5BF920D0/5BE6A541) (fp_text reference C69 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF05407) (at 65.5 38.5 180) (path /5B6B7005/5BF920D0/5BE6CCF8) (fp_text reference C68 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF05456) (at 60.5 44 270) (path /5B6B7005/5BF920D0/5BE6787A) (fp_text reference C67 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58AEA) (at 67 39.5 180) (path /5B6B7005/5BF920D0/5BE6C789) (fp_text reference C66 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58AE4) (at 66 45.5) (path /5B6B7005/5BF920D0/5BE6721C) (fp_text reference C65 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58ADE) (at 60.55 41.5 270) (path /5B6B7005/5BF920D0/5BE6C417) (fp_text reference C64 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58AD8) (at 61 39.5 180) (path /5B6B7005/5BF920D0/5BE66D60) (fp_text reference C63 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 5BE58AD2) (at 56.5 57.75 90) (path /5B6B7005/5BF920D0/5BE6C0B7) (fp_text reference C62 (at 0.5 -1 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value "4.7 uF" (at 0 3 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BE58ACC) (at 58.1 58) (path /5B6B7005/5BF920D0/5BE6675D) (fp_text reference C61 (at -2.25 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BF0E403) (at 60.4 55.6 90) (path /5B6B7005/5BF920D0/5BE6BCF0) (fp_text reference C60 (at -0.8 1 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BE58AC0) (at 58.6 56 90) (path /5B6B7005/5BF920D0/5BE6623F) (fp_text reference C59 (at 0 -0.9 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BF91D59) (at 62.6 42.5 90) (path /5B6B7005/5BF920D0/5BE6B830) (fp_text reference C58 (at 0 -1.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BE58AB4) (at 60.3 59.9 270) (path /5B6B7005/5BF920D0/5BE658AA) (fp_text reference C57 (at 2.8 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1210_CAP_NOSILK (layer B.Cu) (tedit 54A4E4D1) (tstamp 5BE58AAE) (at 63.75 60 90) (path /5B6B7005/5BF920D0/5BE632F0) (fp_text reference C56 (at 0 2.35 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "330 uF" (at 0 -3.7 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 1.55 -0.01493 90) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -1.55 -0.01493 90) (size 0.9 2.9) (layers B.Cu B.Paste B.Mask) (net 236 /1V0)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF24B07) (at 52.5 27) (path /5B6B703A/5BF8748F) (fp_text reference C55 (at 0 1.4) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5C04CCD3) (at 49 25.5 90) (path /5B6B703A/5BF7FC5D) (fp_text reference C54 (at -1.9 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A9C) (at 59 25.5 90) (path /5B6B703A/5BF87485) (fp_text reference C53 (at 0 -1.1 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A96) (at 51.5 24 180) (path /5B6B703A/5BF7F82E) (fp_text reference C52 (at 0 -0.9 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A90) (at 61.5 24 180) (path /5B6B703A/5BF8747B) (fp_text reference C51 (at 0 0.95 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A8A) (at 62.5 27) (path /5B6B703A/5BF7F429) (fp_text reference C50 (at 0 1.1) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BE58A84) (at 54.9 23.7) (path /5B6B703A/5BF87471) (fp_text reference C49 (at 0 -0.9) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BF15EF4) (at 58.6 23.7) (path /5B6B703A/5BF7E63E) (fp_text reference C48 (at 0 -1) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 209 /1V8)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A78) (at 82.6 19.9 180) (path /5B6B7044/5BE5C411) (fp_text reference C47 (at 0 -0.9 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A72) (at 89.3 38.5 90) (path /5B6B7044/5BE9C244) (fp_text reference C45 (at 1.9 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A6C) (at 72.4 21.75) (path /5B6B702C/5BE26D62) (fp_text reference C44 (at 0 -0.8) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A66) (at 72 70.5 270) (path /5B6B700F/5BE9B481) (fp_text reference C43 (at 0 0.8 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A60) (at 72.5 68 90) (path /5B6B700F/5BEE295B) (fp_text reference C42 (at 0 0.9 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 231 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A5A) (at 70.4 64) (path /5B6B700F/5BEE27E8) (fp_text reference C41 (at -1.9 -0.3) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 231 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A54) (at 76.2 65 180) (path /5B6B700F/5BECB269) (fp_text reference C40 (at -0.1 -0.8 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 233 /Ethernet/A1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5BE58A4E) (at 78.8 68.5) (path /5B6B700F/5BEBBEA1) (fp_text reference C39 (at 2.3 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value "0.47 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 232 /Ethernet/A2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A48) (at 72 63.4 270) (path /5B6B700F/5BEE2567) (fp_text reference C38 (at -2 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 231 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A42) (at 75 69.2 90) (path /5B6B700F/5BED3494) (fp_text reference C37 (at 0.2 0.9 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 229 /Ethernet/A1V2_PLL)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A3C) (at 76.2 66.5 180) (path /5B6B700F/5BECB25F) (fp_text reference C36 (at -1 -1.2 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 233 /Ethernet/A1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer F.Cu) (tedit 53C529C4) (tstamp 5BE58A36) (at 78.8 63) (path /5B6B700F/5BEBBA9C) (fp_text reference C35 (at 2.4 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value "0.47 uF" (at 0.05 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask) (net 232 /Ethernet/A2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A30) (at 71.9 65.6) (path /5B6B700F/5BEE232E) (fp_text reference C34 (at -0.5 -0.7) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 231 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A2A) (at 70.8 67.5) (path /5B6B700F/5BEC373B) (fp_text reference C33 (at 0 -0.8) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BE58A24) (at 75 71.45 270) (path /5B6B700F/5BED315F) (fp_text reference C32 (at 2.25 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 229 /Ethernet/A1V2_PLL)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BE58A1E) (at 78.65 65.7) (path /5B6B700F/5BECB252) (fp_text reference C31 (at 2.65 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 233 /Ethernet/A1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 5BE58A18) (at 79.5 69.4) (path /5B6B700F/5BEB484E) (fp_text reference C30 (at 2.7 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 232 /Ethernet/A2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A12) (at 75.5 63.4 270) (path /5B6B700F/5BEE1F33) (fp_text reference C29 (at -1.8 -0.1 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 231 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A0C) (at 74.7 62.8 270) (path /5B6B700F/5BEC330A) (fp_text reference C28 (at -2.3 0.1 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58A06) (at 73.5 63.4 270) (path /5B6B700F/5BEE1B70) (fp_text reference C27 (at -2 -0.1 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 231 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BE58A00) (at 81.1 64.5) (path /5B6B700F/5BECB246) (fp_text reference C26 (at 2.5 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 231 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 5BE589FA) (at 78.3 60.7) (path /5B6B700F/5BEC2E7F) (fp_text reference C25 (at 2.4 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 5BE589F4) (at 80.4 71.4 180) (path /5B6B700F/5BEB1A0B) (fp_text reference C24 (at -2.7 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value "4.7 uF" (at 0 3 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 235 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE589EE) (at 94.5 46.3 270) (path /5B6B7005/5C5888E2/5BE86964) (fp_text reference C23 (at -1.9 -0.6 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF6A30D) (at 92 52.4) (path /5B6B7005/5C5888E2/5BE84B00) (fp_text reference C22 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE589E2) (at 94 50.8 180) (path /5B6B7005/5C5888E2/5BE84354) (fp_text reference C21 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE589DC) (at 90 51.6) (path /5B6B7005/5C5888E2/5BE8695A) (fp_text reference C20 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE589D6) (at 95.3 49.7) (path /5B6B7005/5C5888E2/5BE84AF6) (fp_text reference C19 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE589D0) (at 92 51.4) (path /5B6B7005/5C5888E2/5BE84055) (fp_text reference C18 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE589CA) (at 91.6 50 270) (path /5B6B7005/5C5888E2/5BE86950) (fp_text reference C17 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE589C4) (at 94.3 53.7 90) (path /5B6B7005/5C5888E2/5BE84AEC) (fp_text reference C16 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE589BE) (at 88.3 50.8 180) (path /5B6B7005/5C5888E2/5BE83D68) (fp_text reference C15 (at 1.2 0.8 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF67D8E) (at 92.4 54 90) (path /5B6B7005/5C5888E2/5BE86946) (fp_text reference C14 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF67FC6) (at 94 51.6 180) (path /5B6B7005/5C5888E2/5BE84AE2) (fp_text reference C13 (at 0.05 -1.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF67CF4) (at 90 52.4) (path /5B6B7005/5C5888E2/5BE83A33) (fp_text reference C12 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE589A6) (at 94 52.4 180) (path /5B6B7005/5C5888E2/5BEFEC1A) (fp_text reference C11 (at 0.05 -0.4 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE589A0) (at 94.5 48.6) (path /5B6B7005/5C5888E2/5BE8693C) (fp_text reference C10 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE5899A) (at 92.4 50 270) (path /5B6B7005/5C5888E2/5BE84AD8) (fp_text reference C9 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF67D26) (at 90 53.2) (path /5B6B7005/5C5888E2/5BE836FE) (fp_text reference C8 (at 0.05 -1.4) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE5898E) (at 93.2 49.2 270) (path /5B6B7005/5C5888E2/5BEFE987) (fp_text reference C7 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF67DCC) (at 93.2 54 90) (path /5B6B7005/5C5888E2/5BE86932) (fp_text reference C6 (at 0.3 0 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BE58982) (at 90.8 50 270) (path /5B6B7005/5C5888E2/5BE84ACE) (fp_text reference C5 (at 0.05 -1.4 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 5BF67D59) (at 91.6 54 90) (path /5B6B7005/5C5888E2/5BE817EF) (fp_text reference C4 (at 0.05 -1.4 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BE58976) (at 92.25 45.35 90) (path /5B6B7005/5C5888E2/5BE80936) (fp_text reference C3 (at 0 -0.95 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BE58970) (at 95.5 54 90) (path /5B6B7005/5BF6EA24) (fp_text reference C2 (at 0 1.2 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "2.2 uF" (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 218 "Net-(C2-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 5BE5896A) (at 87.9 54.8) (path /5B6B7005/5BF38454) (fp_text reference C1 (at -2 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value "2.2 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 219 "Net-(C1-Pad2)")) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:CONN_SAMTEC_QTH-060-01-L-D-A (layer B.Cu) (tedit 54A511A1) (tstamp 5B7ACF43) (at 111 43 180) (path /5BA274E9) (fp_text reference J2 (at -9.2 0.7 -90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value CONN_INTEGRALSTICK_MCU_DEVICE (at 0 21 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text user 1 (at -4.3 -17.3 180) (layer B.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425)) (justify mirror)) ) (fp_text user 2 (at 4.5 -17.3 180) (layer B.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425)) (justify mirror)) ) (fp_text user 60 (at 4.7 -2.7 180) (layer B.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425)) (justify mirror)) ) (fp_text user 59 (at -4.5 -2.7 180) (layer B.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425)) (justify mirror)) ) (fp_text user 61 (at -4.5 2.7 180) (layer B.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425)) (justify mirror)) ) (fp_text user 62 (at 4.7 2.7 180) (layer B.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425)) (justify mirror)) ) (fp_text user 119 (at -4.7 17.3 180) (layer B.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425)) (justify mirror)) ) (fp_text user 120 (at 5 17.3 180) (layer B.SilkS) (effects (font (size 0.508 0.457) (thickness 0.11425)) (justify mirror)) ) (fp_line (start 3 2) (end 3 -2) (layer B.SilkS) (width 0.15)) (fp_line (start -3 2) (end -3 -2) (layer B.SilkS) (width 0.15)) (fp_line (start 1 -20) (end -3 -20) (layer B.SilkS) (width 0.15)) (fp_line (start 3 -18) (end 1 -20) (layer B.SilkS) (width 0.15)) (fp_line (start 1 20) (end -3 20) (layer B.SilkS) (width 0.15)) (fp_line (start 1 20) (end 3 18) (layer B.SilkS) (width 0.15)) (fp_line (start -3 18) (end -3 20) (layer B.SilkS) (width 0.15)) (pad 120 smd rect (at 3 17.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 210 /FPGA_DONE)) (pad 119 smd rect (at -3 17.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 309 "Net-(J2-Pad119)")) (pad 118 smd rect (at 3 16.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 308 "Net-(J2-Pad118)")) (pad 117 smd rect (at -3 16.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 311 "Net-(J2-Pad117)")) (pad 116 smd rect (at 3 16.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 115 smd rect (at -3 16.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 114 smd rect (at 3 15.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 302 "Net-(J2-Pad114)")) (pad 113 smd rect (at -3 15.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 211 /MCU_RST_N)) (pad 112 smd rect (at 3 15.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 303 "Net-(J2-Pad112)")) (pad 111 smd rect (at -3 15.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 310 "Net-(J2-Pad111)")) (pad 110 smd rect (at 3 14.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 109 smd rect (at -3 14.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 108 smd rect (at 3 14.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 196 "Net-(J2-Pad108)")) (pad 107 smd rect (at -3 14.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 197 "Net-(J2-Pad107)")) (pad 106 smd rect (at 3 13.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 198 "Net-(J2-Pad106)")) (pad 105 smd rect (at -3 13.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 199 "Net-(J2-Pad105)")) (pad 104 smd rect (at 3 13.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 103 smd rect (at -3 13.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 102 smd rect (at 3 12.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 200 "Net-(J2-Pad102)")) (pad 101 smd rect (at -3 12.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 201 "Net-(J2-Pad101)")) (pad 100 smd rect (at 3 12.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 202 "Net-(J2-Pad100)")) (pad 99 smd rect (at -3 12.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 203 "Net-(J2-Pad99)")) (pad 98 smd rect (at 3 11.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 97 smd rect (at -3 11.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 96 smd rect (at 3 11.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 204 "Net-(J2-Pad96)")) (pad 95 smd rect (at -3 11.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 205 "Net-(J2-Pad95)")) (pad 94 smd rect (at 3 10.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 183 "Net-(J2-Pad94)")) (pad 93 smd rect (at -3 10.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 184 "Net-(J2-Pad93)")) (pad 92 smd rect (at 3 10.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 91 smd rect (at -3 10.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 90 smd rect (at 3 9.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 185 "Net-(J2-Pad90)")) (pad 89 smd rect (at -3 9.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 186 "Net-(J2-Pad89)")) (pad 88 smd rect (at 3 9.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 187 "Net-(J2-Pad88)")) (pad 87 smd rect (at -3 9.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 188 "Net-(J2-Pad87)")) (pad 86 smd rect (at 3 8.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 85 smd rect (at -3 8.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 84 smd rect (at 3 8.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 189 "Net-(J2-Pad84)")) (pad 83 smd rect (at -3 8.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 190 "Net-(J2-Pad83)")) (pad 82 smd rect (at 3 7.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 191 "Net-(J2-Pad82)")) (pad 81 smd rect (at -3 7.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 192 "Net-(J2-Pad81)")) (pad 80 smd rect (at 3 7.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 79 smd rect (at -3 7.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 78 smd rect (at 3 6.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 247 /MCU_BOOT0)) (pad 77 smd rect (at -3 6.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 193 "Net-(J2-Pad77)")) (pad 76 smd rect (at 3 6.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 212 /FPGA_RST_N)) (pad 75 smd rect (at -3 6.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 194 "Net-(J2-Pad75)")) (pad 74 smd rect (at 3 5.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 73 smd rect (at -3 5.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 72 smd rect (at 3 5.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 214 /MCU_TDO)) (pad 71 smd rect (at -3 5.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 195 "Net-(J2-Pad71)")) (pad 70 smd rect (at 3 4.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 216 /JTAG_TMS)) (pad 69 smd rect (at -3 4.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 170 "Net-(J2-Pad69)")) (pad 68 smd rect (at 3 4.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 67 smd rect (at -3 4.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 66 smd rect (at 3 3.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 215 /FPGA_TDI)) (pad 65 smd rect (at -3 3.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 171 "Net-(J2-Pad65)")) (pad 64 smd rect (at 3 3.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 213 /JTAG_TCK)) (pad 63 smd rect (at -3 3.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 172 "Net-(J2-Pad63)")) (pad 62 smd rect (at 3 2.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 61 smd rect (at -3 2.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 59 smd rect (at -3 -2.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 173 "Net-(J2-Pad59)")) (pad 60 smd rect (at 3 -2.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 174 "Net-(J2-Pad60)")) (pad 57 smd rect (at -3 -3.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 175 "Net-(J2-Pad57)")) (pad 58 smd rect (at 3 -3.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 176 "Net-(J2-Pad58)")) (pad 55 smd rect (at -3 -3.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 56 smd rect (at 3 -3.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 53 smd rect (at -3 -4.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 177 "Net-(J2-Pad53)")) (pad 54 smd rect (at 3 -4.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 178 "Net-(J2-Pad54)")) (pad 51 smd rect (at -3 -4.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 179 "Net-(J2-Pad51)")) (pad 52 smd rect (at 3 -4.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 180 "Net-(J2-Pad52)")) (pad 49 smd rect (at -3 -5.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 50 smd rect (at 3 -5.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 47 smd rect (at -3 -5.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 181 "Net-(J2-Pad47)")) (pad 48 smd rect (at 3 -5.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 182 "Net-(J2-Pad48)")) (pad 45 smd rect (at -3 -6.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 164 "Net-(J2-Pad45)")) (pad 46 smd rect (at 3 -6.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 165 "Net-(J2-Pad46)")) (pad 43 smd rect (at -3 -6.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 44 smd rect (at 3 -6.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 41 smd rect (at -3 -7.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 166 "Net-(J2-Pad41)")) (pad 42 smd rect (at 3 -7.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 167 "Net-(J2-Pad42)")) (pad 39 smd rect (at -3 -7.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 168 "Net-(J2-Pad39)")) (pad 40 smd rect (at 3 -7.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 169 "Net-(J2-Pad40)")) (pad 37 smd rect (at -3 -8.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 38 smd rect (at 3 -8.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 35 smd rect (at -3 -8.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 152 "Net-(J2-Pad35)")) (pad 36 smd rect (at 3 -8.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 153 "Net-(J2-Pad36)")) (pad 33 smd rect (at -3 -9.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 154 "Net-(J2-Pad33)")) (pad 34 smd rect (at 3 -9.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 155 "Net-(J2-Pad34)")) (pad 31 smd rect (at -3 -9.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 32 smd rect (at 3 -9.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 29 smd rect (at -3 -10.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 156 "Net-(J2-Pad29)")) (pad 30 smd rect (at 3 -10.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 157 "Net-(J2-Pad30)")) (pad 27 smd rect (at -3 -10.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 158 "Net-(J2-Pad27)")) (pad 28 smd rect (at 3 -10.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 159 "Net-(J2-Pad28)")) (pad 25 smd rect (at -3 -11.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 26 smd rect (at 3 -11.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 23 smd rect (at -3 -11.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 160 "Net-(J2-Pad23)")) (pad 24 smd rect (at 3 -11.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 38 /Ethernet/ETH_D_N)) (pad 21 smd rect (at -3 -12.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 161 "Net-(J2-Pad21)")) (pad 22 smd rect (at 3 -12.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 37 /Ethernet/ETH_D_P)) (pad 19 smd rect (at -3 -12.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 20 smd rect (at 3 -12.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 17 smd rect (at -3 -13.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 162 "Net-(J2-Pad17)")) (pad 18 smd rect (at 3 -13.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 36 /Ethernet/ETH_C_N)) (pad 15 smd rect (at -3 -13.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 163 "Net-(J2-Pad15)")) (pad 16 smd rect (at 3 -13.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 35 /Ethernet/ETH_C_P)) (pad 13 smd rect (at -3 -14.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 14 smd rect (at 3 -14.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 11 smd rect (at -3 -14.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 307 "Net-(J2-Pad11)")) (pad 12 smd rect (at 3 -14.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 34 /Ethernet/ETH_B_N)) (pad 9 smd rect (at -3 -15.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 306 "Net-(J2-Pad9)")) (pad 10 smd rect (at 3 -15.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 33 /Ethernet/ETH_B_P)) (pad 7 smd rect (at -3 -15.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad 8 smd rect (at 3 -15.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 5 smd rect (at -3 -16.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 305 "Net-(J2-Pad5)")) (pad 6 smd rect (at 3 -16.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 32 /Ethernet/ETH_A_N)) (pad 3 smd rect (at -3 -16.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 304 "Net-(J2-Pad3)")) (pad 4 smd rect (at 3 -16.75 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 31 /Ethernet/ETH_A_P)) (pad 1 smd rect (at -3 -17.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 206 /3V3)) (pad "" thru_hole circle (at -2.03 -19.24 180) (size 1.02 1.02) (drill 1.02) (layers *.Cu *.Mask B.SilkS)) (pad "" thru_hole circle (at -2.03 19.24 180) (size 1.02 1.02) (drill 1.02) (layers *.Cu *.Mask B.SilkS)) (pad 125 smd rect (at 0 1.57 180) (size 0.64 2.54) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 128 smd rect (at 0 18.46 180) (size 0.64 2.54) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 124 smd rect (at 0 -1.57 180) (size 0.64 2.54) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 121 smd rect (at 0 -18.46 180) (size 0.64 2.54) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 126 smd rect (at 0 6.841 180) (size 0.64 4.7) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 123 smd rect (at 0 -6.841 180) (size 0.64 4.7) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 122 smd rect (at 0 -13.191 180) (size 0.64 4.7) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 127 smd rect (at 0 13.191 180) (size 0.64 4.7) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (pad 2 smd rect (at 3 -17.25 180) (size 1.45 0.305) (layers B.Cu B.Paste B.Mask) (net 234 /GND)) (model /nfs4/home/azonenberg/kicad-libs/imported-models/Samtec-QTH-060-01-L-D-exported.wrl (at (xyz 0 0 0)) (scale (xyz 0.3937 0.3937 0.3937)) (rotate (xyz -90 0 90)) ) ) (module azonenberg_pcb:QFN_38_0.5MM_5x7MM (layer F.Cu) (tedit 54AFBC03) (tstamp 5BF2B740) (at 48 70.75 90) (path /5B6B7005/5B82803D) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U7 (at -4.5 -2 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value LTC3374-QFN (at 0.3 4.9 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start 3.5 -2.5) (end 3 -2.5) (layer F.SilkS) (width 0.15)) (fp_line (start 3.5 -2) (end 3.5 -2.5) (layer F.SilkS) (width 0.15)) (fp_line (start 3.5 2.5) (end 3.5 2) (layer F.SilkS) (width 0.15)) (fp_line (start 3 2.5) (end 3.5 2.5) (layer F.SilkS) (width 0.15)) (fp_line (start -3 2.5) (end -3.5 2) (layer F.SilkS) (width 0.15)) (fp_line (start -3.5 2.5) (end -3 2.5) (layer F.SilkS) (width 0.15)) (fp_line (start -3.5 2) (end -3.5 2.5) (layer F.SilkS) (width 0.15)) (fp_line (start -3.5 -2.5) (end -3.5 -2) (layer F.SilkS) (width 0.15)) (fp_line (start -3 -2.5) (end -3.5 -2.5) (layer F.SilkS) (width 0.15)) (pad 31 smd rect (at -2.75 -2.4 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 269 "/Power Supply/2V5_FB")) (pad 30 smd rect (at -2.25 -2.4 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad 29 smd rect (at -1.75 -2.4 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 252 "/Power Supply/2V5_SW")) (pad 28 smd rect (at -1.25 -2.4 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 251 "/Power Supply/1V8_SW")) (pad 27 smd rect (at -0.75 -2.4 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad 26 smd rect (at -0.25 -2.4 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 268 "/Power Supply/1V8_FB")) (pad 25 smd rect (at 0.25 -2.4 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad 24 smd rect (at 0.75 -2.4 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad 23 smd rect (at 1.25 -2.4 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 249 "/Power Supply/3V3_SW")) (pad 22 smd rect (at 1.75 -2.4 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 249 "/Power Supply/3V3_SW")) (pad 21 smd rect (at 2.25 -2.4 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad 20 smd rect (at 2.75 -2.4 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 270 "/Power Supply/3V3_FB")) (pad 19 smd rect (at 3.4 -1.5 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad 18 smd rect (at 3.4 -1 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 17 smd rect (at 3.4 -0.5 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad 16 smd rect (at 3.4 0 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 15 smd rect (at 3.4 0.5 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 257 "/Power Supply/PGOOD")) (pad 14 smd rect (at 3.4 1 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 13 smd rect (at 3.4 1.5 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad 12 smd rect (at 2.75 2.4 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 267 "/Power Supply/1V2_FB")) (pad 11 smd rect (at 2.25 2.4 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad 10 smd rect (at 1.75 2.4 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 250 "/Power Supply/1V2_SW")) (pad 9 smd rect (at 1.25 2.4 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 248 "/Power Supply/1V0_SW")) (pad 8 smd rect (at 0.75 2.4 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad 7 smd rect (at 0.25 2.4 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad 6 smd rect (at -0.25 2.4 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad 5 smd rect (at -0.75 2.4 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad 4 smd rect (at -1.25 2.4 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 248 "/Power Supply/1V0_SW")) (pad 3 smd rect (at -1.75 2.4 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 248 "/Power Supply/1V0_SW")) (pad 2 smd rect (at -2.25 2.4 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad 1 smd rect (at -2.75 2.4 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 266 "/Power Supply/1V0_FB")) (pad 38 smd rect (at -3.4 1.5) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad 37 smd rect (at -3.4 1) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad 36 smd rect (at -3.4 0.5) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 285 /PSU_TEMP)) (pad 35 smd rect (at -3.4 0) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad 34 smd rect (at -3.4 -0.5) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad 33 smd rect (at -3.4 -1) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad 32 smd rect (at -3.4 -1.5) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask) (net 117 "/Power Supply/5V0")) (pad PAD smd rect (at 0 0 90) (size 5.15 3.15) (layers F.Cu F.Mask) (net 234 /GND)) (pad PAD smd rect (at -2 -1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at -1 -1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at 0 -1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at 1 -1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at 2 -1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at 2 0 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at 2 1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at 1 1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at 0 1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at -1 1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at -2 1 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at -2 0 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at -1 0 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at 0 0 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (pad PAD smd rect (at 1 0 90) (size 0.75 0.75) (layers F.Cu F.Paste) (net 234 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/s-pvqfn-n40.wrl (at (xyz 0 0 0)) (scale (xyz 1.1 0.8 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:DFN_8_1.27MM_6x5MM (layer F.Cu) (tedit 54AFB9A1) (tstamp 5BF3662A) (at 85 23) (path /5B6B7044/5B830EB3) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U6 (at -3.5 2.5 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value S25FL064LABNFI011‎ (at 0 5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_line (start 3 -3) (end 3 -2.5) (layer F.SilkS) (width 0.15)) (fp_line (start 2.5 -3) (end 3 -3) (layer F.SilkS) (width 0.15)) (fp_line (start 3 3) (end 3 2.5) (layer F.SilkS) (width 0.15)) (fp_line (start 2.5 3) (end 3 3) (layer F.SilkS) (width 0.15)) (fp_line (start -2.5 3) (end -3 2.5) (layer F.SilkS) (width 0.15)) (fp_line (start -3 3) (end -2.5 3) (layer F.SilkS) (width 0.15)) (fp_line (start -3 2.5) (end -3 3) (layer F.SilkS) (width 0.15)) (fp_line (start -3 -3) (end -3 -2.5) (layer F.SilkS) (width 0.15)) (fp_line (start -2.5 -3) (end -3 -3) (layer F.SilkS) (width 0.15)) (pad 8 smd rect (at -1.905 -3) (size 0.4 0.8) (layers F.Cu F.Paste F.Mask) (net 206 /3V3)) (pad 7 smd rect (at -0.635 -3) (size 0.4 0.8) (layers F.Cu F.Paste F.Mask) (net 276 "Net-(R53-Pad2)")) (pad 6 smd rect (at 0.635 -3) (size 0.4 0.8) (layers F.Cu F.Paste F.Mask) (net 223 /QSPI_CLK)) (pad 5 smd rect (at 1.905 -3) (size 0.4 0.8) (layers F.Cu F.Paste F.Mask) (net 277 "Net-(R54-Pad2)")) (pad 1 smd rect (at -1.905 3) (size 0.4 0.8) (layers F.Cu F.Paste F.Mask) (net 56 /MCU/QSPI_CS_N)) (pad 2 smd rect (at -0.635 3) (size 0.4 0.8) (layers F.Cu F.Paste F.Mask) (net 274 "Net-(R51-Pad1)")) (pad 3 smd rect (at 0.635 3) (size 0.4 0.8) (layers F.Cu F.Paste F.Mask) (net 275 "Net-(R52-Pad1)")) (pad 4 smd rect (at 1.905 3) (size 0.4 0.8) (layers F.Cu F.Paste F.Mask) (net 234 /GND)) (pad PAD smd rect (at 0 0) (size 4 3.4) (layers F.Cu F.Mask)) (pad PAD smd rect (at -1.5 -1.25) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at -0.75 -1.25) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at 0 -1.25) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at 0.75 -1.25) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at 1.5 -1.25) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at 1.5 -0.5) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at 0.75 -0.5) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at 0 -0.5) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at -0.75 -0.5) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at -1.5 -0.5) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at -1.5 0.25) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at -0.75 0.25) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at 0 0.25) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at 0.75 0.25) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at 1.5 0.25) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at 1.5 1) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at 0.75 1) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at 0 1) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at -0.75 1) (size 0.5 0.5) (layers F.Cu F.Paste)) (pad PAD smd rect (at -1.5 1) (size 0.5 0.5) (layers F.Cu F.Paste)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/dfn-s-8.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:FIDUCIAL_1MM (layer F.Cu) (tedit 53D60D63) (tstamp 5C06A46C) (at 116 75.5) (fp_text reference FIDUCIAL_1MM (at 0 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value VAL** (at 0.1 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad "" smd circle (at 0 0) (size 1 1) (layers F.Cu F.Mask) (solder_mask_margin 1) (clearance 1)) ) (module azonenberg_pcb:FIDUCIAL_1MM (layer F.Cu) (tedit 53D60D63) (tstamp 5C06A4E9) (at 32.8 75.2) (fp_text reference FIDUCIAL_1MM (at 0 2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value VAL** (at 0.1 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad "" smd circle (at 0 0) (size 1 1) (layers F.Cu F.Mask) (solder_mask_margin 1) (clearance 1)) ) (module azonenberg_pcb:LONGTHING-1200DPI locked (layer F.Cu) (tedit 54B4A826) (tstamp 5C00D421) (at 101.4 30.45) (fp_text reference G*** (at 3 -2) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value LOGO (at 5 0) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_poly (pts (xy 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1.12522 -1.9939) (xy 1.11506 -1.97104) (xy 1.10744 -1.95834) (xy 1.09728 -1.94818) (xy 1.08458 -1.93802) (xy 1.0668 -1.92532) (xy 1.05918 -1.91262) (xy 1.05918 -1.89738) (xy 1.05918 -1.89484) (xy 1.06426 -1.89484) (xy 1.06934 -1.89992) (xy 1.08204 -1.91008) (xy 1.09982 -1.92532) (xy 1.12268 -1.95072) (xy 1.12522 -1.95072) (xy 1.14046 -1.97104) (xy 1.16586 -1.9939) (xy 1.1938 -2.02438) (xy 1.22682 -2.0574) (xy 1.25984 -2.09296) (xy 1.2954 -2.12852) (xy 1.33096 -2.16408) (xy 1.36652 -2.19964) (xy 1.40208 -2.2352) (xy 1.4351 -2.27076) (xy 1.46812 -2.30378) (xy 1.49606 -2.33426) (xy 1.52146 -2.35712) (xy 1.53924 -2.37744) (xy 1.5748 -2.41554) (xy 1.60782 -2.44856) (xy 1.63576 -2.47904) (xy 1.65862 -2.49936) (xy 1.6764 -2.51714) (xy 1.68656 -2.52476) (xy 1.6891 -2.5273) (xy 1.69672 -2.52476) (xy 1.70688 -2.5146) (xy 1.71958 -2.5019) (xy 1.73228 -2.48666) (xy 1.74498 -2.47396) (xy 1.75514 -2.46126) (xy 1.75768 -2.45618)) (layer F.SilkS) (width 0.00254)) (fp_poly (pts (xy 1.50368 2.47142) (xy 0 2.47142) (xy -1.50368 2.47142) (xy -1.50368 2.09296) (xy -1.50368 1.71704) (xy 0 1.71704) (xy 1.50368 1.71704) (xy 1.50368 2.09296) (xy 1.50368 2.47142)) (layer F.SilkS) (width 0.00254)) ) (module azonenberg_pcb:FIDUCIAL_1MM (layer B.Cu) (tedit 53D60D63) (tstamp 5C00DFD8) (at 92.5 19) (fp_text reference FIDUCIAL_1MM (at 0 -2) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value VAL** (at 0.1 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad "" smd circle (at 0 0) (size 1 1) (layers B.Cu B.Mask) (solder_mask_margin 1) (clearance 1)) ) (module azonenberg_pcb:FIDUCIAL_1MM (layer B.Cu) (tedit 53D60D63) (tstamp 5C00DFE9) (at 116 75.5) (fp_text reference FIDUCIAL_1MM (at 0 -2) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value VAL** (at 0.1 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad "" smd circle (at 0 0) (size 1 1) (layers B.Cu B.Mask) (solder_mask_margin 1) (clearance 1)) ) (module azonenberg_pcb:FIDUCIAL_1MM (layer B.Cu) (tedit 53D60D63) (tstamp 5C00DFFA) (at 32.5 70) (fp_text reference FIDUCIAL_1MM (at 0 -2) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (fp_text value VAL** (at 0.1 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1)) (justify mirror)) ) (pad "" smd circle (at 0 0) (size 1 1) (layers B.Cu B.Mask) (solder_mask_margin 1) (clearance 1)) ) (module azonenberg_pcb:SERIALNUM_MOLEX_0916580020 (layer F.Cu) (tedit 5C00E08C) (tstamp 5C025B9A) (at 97.5 19.5 180) (fp_text reference REF** (at 0 1.8 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value SERIALNUM_MOLEX_0916580020 (at 0 3.1 180) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (pad 1 smd rect (at 0 0 180) (size 2.95 1.95) (layers F.Cu F.Paste F.Mask)) ) (module azonenberg_pcb:LOGO_ESD_SENSITIVE_7MM (layer F.Cu) (tedit 53C512AF) (tstamp 5C030B38) (at 99 41.5) (fp_text reference G*** (at 5.8 -1.6) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_text value LOGO (at 6.5 0.6) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.1))) ) (fp_poly (pts (xy 1.002318 -0.911945) (xy 0.994146 -0.880338) (xy 0.97231 -0.85808) (xy 0.963955 -0.852033) (xy 0.779357 -0.755843) (xy 0.512536 -0.668496) (xy 0.162689 -0.589755) (xy -0.059518 -0.550973) (xy -0.328941 -0.505634) (xy -0.52946 -0.465548) (xy -0.676241 -0.425929) (xy -0.78445 -0.381994) (xy -0.869252 -0.328956) (xy -0.931333 -0.275908) (xy -1.037167 -0.176202) (xy -1.198642 -0.259844) (xy -1.294345 -0.318899) (xy -1.344526 -0.368748) (xy -1.346808 -0.381983) (xy -1.320591 -0.434184) (xy -1.258904 -0.546518) (xy -1.167932 -0.708308) (xy -1.053857 -0.908879) (xy -0.922863 -1.137554) (xy -0.781133 -1.383658) (xy -0.634851 -1.636513) (xy -0.4902 -1.885444) (xy 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