(kicad_pcb (version 20170123) (host pcbnew "(2017-07-19 revision 242c47f)-master") (general (thickness 1.6) (drawings 16) (tracks 1321) (zones 0) (modules 83) (nets 174) ) (page A4) (layers (0 F.Cu signal) (1 In1.Cu signal) (2 In2.Cu signal) (31 B.Cu signal) (32 B.Adhes user) (33 F.Adhes user) (34 B.Paste user) (35 F.Paste user) (36 B.SilkS user) (37 F.SilkS user) (38 B.Mask user) (39 F.Mask user) (40 Dwgs.User user) (41 Cmts.User user) (42 Eco1.User user) (43 Eco2.User user) (44 Edge.Cuts user) (45 Margin user) (46 B.CrtYd user) (47 F.CrtYd user) (48 B.Fab user) (49 F.Fab user) ) (setup (last_trace_width 0.125) (user_trace_width 0.125) (user_trace_width 0.175) (user_trace_width 0.25) (trace_clearance 0.125) (zone_clearance 0.175) (zone_45_only no) (trace_min 0.125) (segment_width 0.2) (edge_width 0.15) (via_size 0.55) (via_drill 0.3) (via_min_size 0.5) (via_min_drill 0.3) (user_via 0.55 0.3) (uvia_size 0.3) (uvia_drill 0.1) (uvias_allowed no) (uvia_min_size 0.2) (uvia_min_drill 0.1) (pcb_text_width 0.3) (pcb_text_size 1.5 1.5) (mod_edge_width 0.15) (mod_text_size 0.75 0.75) (mod_text_width 0.15) (pad_size 1.524 1.524) (pad_drill 0.762) (pad_to_mask_clearance 0.05) (aux_axis_origin 0 0) (visible_elements FFFDFF7F) (pcbplotparams (layerselection 0x010fc_ffffffff) (usegerberextensions true) (excludeedgelayer true) (linewidth 0.100000) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 0) (scaleselection 1) (outputdirectory output/)) ) (net 0 "") (net 1 "Net-(J1-Pad1)") (net 2 /2V5) (net 3 /GND) (net 4 "/FPGA Support/JTAG_TMS") (net 5 "/FPGA Support/JTAG_TCK") (net 6 "/FPGA Support/JTAG_TDO") (net 7 "/FPGA Support/JTAG_TDI") (net 8 "Net-(J1-Pad12)") (net 9 "Net-(J1-Pad13)") (net 10 "Net-(J1-Pad14)") (net 11 /PHY/VREF_1V5) (net 12 /3V3) (net 13 /1V2) (net 14 /PHY/VREF_1V8) (net 15 /Boot/Config/FLASH_CS_N) (net 16 "Net-(R24-Pad1)") (net 17 "Net-(R25-Pad1)") (net 18 "Net-(R27-Pad2)") (net 19 /Boot/Config/FLASH_SCK) (net 20 "Net-(R26-Pad2)") (net 21 "Net-(U2-Pad11)") (net 22 "/Power Supply/5V0") (net 23 "Net-(U2-Pad9)") (net 24 "Net-(U2-Pad7)") (net 25 "Net-(U2-Pad4)") (net 26 "Net-(U2-Pad14)") (net 27 "Net-(U2-Pad13)") (net 28 "Net-(R28-Pad2)") (net 29 "Net-(D1-Pad2)") (net 30 /PHY/RX_N) (net 31 "Net-(R34-Pad2)") (net 32 "Net-(R37-Pad1)") (net 33 /PHY/TX_P) (net 34 "Net-(R38-Pad2)") (net 35 /PHY/TX_N) (net 36 /PHY/RX_TAP) (net 37 "/FPGA Support/FPGA_DONE") (net 38 "/FPGA Support/PROG_B_N") (net 39 "Net-(R3-Pad2)") (net 40 /PHY/RX_P) (net 41 /PHY/TX_P_B) (net 42 /PHY/TX_N_B) (net 43 /PHY/TX_P_A) (net 44 /PHY/TX_N_A) (net 45 /PHY/LED1_N) (net 46 "Net-(J2-Pad17)") (net 47 "Net-(R33-Pad1)") (net 48 /PHY/LED2_N) (net 49 /PHY/TX_TAP) (net 50 "Net-(R19-Pad2)") (net 51 "Net-(R20-Pad2)") (net 52 "Net-(R21-Pad2)") (net 53 "Net-(R22-Pad2)") (net 54 /Boot/Config/FLASH_DQ1) (net 55 /Boot/Config/FLASH_DQ2) (net 56 /Boot/Config/FLASH_DQ3) (net 57 /Boot/Config/FLASH_DQ0) (net 58 /Boot/Config/CLK_100MHZ) (net 59 /PHY/GPIO7) (net 60 /PHY/GPIO6) (net 61 /PHY/GPIO5) (net 62 /PHY/GPIO3) (net 63 /PHY/GPIO1) (net 64 /PHY/GPIO0) (net 65 /PHY/GPIO2) (net 66 /PHY/GPIO4) (net 67 /PHY/GPIO8) (net 68 /PHY/GPIO9) (net 69 "Net-(K1-Pad3)") (net 70 "Net-(J2-Pad7)") (net 71 "Net-(J2-Pad8)") (net 72 "Net-(J2-Pad9)") (net 73 /PHY/LED1_P) (net 74 /PHY/LED2_P) (net 75 "Net-(U1-PadC10)") (net 76 "Net-(U1-PadD9)") (net 77 "Net-(U1-PadD11)") (net 78 "Net-(U1-PadD12)") (net 79 "Net-(U1-PadE10)") (net 80 "Net-(U1-PadE11)") (net 81 "Net-(U1-PadF10)") (net 82 "Net-(U1-PadF9)") (net 83 "Net-(U1-PadE8)") (net 84 "Net-(U1-PadF7)") (net 85 "Net-(U1-PadE7)") (net 86 "Net-(U1-PadE6)") (net 87 "Net-(U1-PadM12)") (net 88 "Net-(U1-PadL11)") (net 89 "Net-(U1-PadL10)") (net 90 "Net-(U1-PadL7)") (net 91 "Net-(U1-PadM7)") (net 92 "Net-(U1-PadL8)") (net 93 "Net-(U1-PadN9)") (net 94 "Net-(U1-PadM11)") (net 95 "Net-(U1-PadP11)") (net 96 "Net-(U1-PadM10)") (net 97 "Net-(U1-PadP9)") (net 98 "Net-(U1-PadR9)") (net 99 "Net-(U1-PadT9)") (net 100 "Net-(U1-PadN8)") (net 101 "Net-(U1-PadM6)") (net 102 "Net-(U1-PadN6)") (net 103 "Net-(U1-PadP7)") (net 104 "Net-(U1-PadP8)") (net 105 "Net-(U1-PadP6)") (net 106 "Net-(U1-PadT8)") (net 107 "Net-(U1-PadT7)") (net 108 "Net-(U1-PadR7)") (net 109 "Net-(U1-PadT6)") (net 110 "Net-(U1-PadN5)") (net 111 "Net-(U1-PadP4)") (net 112 "Net-(U1-PadP5)") (net 113 "Net-(U1-PadT5)") (net 114 "Net-(U1-PadR5)") (net 115 "Net-(U1-PadT4)") (net 116 "Net-(J2-Pad1)") (net 117 "Net-(J2-Pad2)") (net 118 "Net-(J2-Pad3)") (net 119 "Net-(U1-PadD5)") (net 120 "Net-(U1-PadA2)") (net 121 "Net-(U1-PadA3)") (net 122 "Net-(U1-PadA6)") (net 123 "Net-(U1-PadA12)") (net 124 "Net-(U1-PadA13)") (net 125 "Net-(U1-PadA14)") (net 126 "Net-(U1-PadB1)") (net 127 "Net-(U1-PadB2)") (net 128 "Net-(U1-PadB3)") (net 129 "Net-(U1-PadB6)") (net 130 "Net-(U1-PadB12)") (net 131 "Net-(U1-PadB14)") (net 132 "Net-(U1-PadC1)") (net 133 "Net-(U1-PadC2)") (net 134 "Net-(U1-PadC3)") (net 135 "Net-(U1-PadC9)") (net 136 "Net-(U1-PadC11)") (net 137 "Net-(U1-PadC13)") (net 138 "Net-(U1-PadD1)") (net 139 "Net-(U1-PadD3)") (net 140 "Net-(U1-PadE3)") (net 141 "Net-(U1-PadF4)") (net 142 "Net-(U1-PadE4)") (net 143 "Net-(U1-PadF3)") (net 144 "Net-(U1-PadG6)") (net 145 "Net-(U1-PadF5)") (net 146 "Net-(U1-PadF6)") (net 147 "Net-(U1-PadG5)") (net 148 "Net-(U1-PadH5)") (net 149 "Net-(U1-PadE2)") (net 150 "Net-(U1-PadE1)") (net 151 "Net-(U1-PadF2)") (net 152 "Net-(U1-PadF1)") (net 153 "Net-(U1-PadH1)") (net 154 "Net-(U1-PadG1)") (net 155 "Net-(U1-PadH2)") (net 156 "Net-(U1-PadH4)") (net 157 "Net-(U1-PadG3)") (net 158 "Net-(U1-PadH3)") (net 159 "Net-(U1-PadK6)") (net 160 "Net-(U1-PadJ6)") (net 161 "Net-(U1-PadN3)") (net 162 "Net-(U1-PadM3)") (net 163 "Net-(U1-PadL3)") (net 164 "Net-(U1-PadM5)") (net 165 "Net-(U1-PadM4)") (net 166 "Net-(U1-PadN4)") (net 167 "Net-(U1-PadJ3)") (net 168 "Net-(U1-PadJ1)") (net 169 "Net-(U1-PadK3)") (net 170 "Net-(U1-PadK5)") (net 171 "Net-(U1-PadL4)") (net 172 "Net-(U1-PadL5)") (net 173 "Net-(U1-PadJ4)") (net_class Default "This is the default net class." (clearance 0.125) (trace_width 0.125) (via_dia 0.55) (via_drill 0.3) (uvia_dia 0.3) (uvia_drill 0.1) (diff_pair_gap 0.25) (diff_pair_width 0.245) (add_net /1V2) (add_net /2V5) (add_net /3V3) (add_net /Boot/Config/CLK_100MHZ) (add_net /Boot/Config/FLASH_CS_N) (add_net /Boot/Config/FLASH_DQ0) (add_net /Boot/Config/FLASH_DQ1) (add_net /Boot/Config/FLASH_DQ2) (add_net /Boot/Config/FLASH_DQ3) (add_net /Boot/Config/FLASH_SCK) (add_net "/FPGA Support/FPGA_DONE") (add_net "/FPGA Support/JTAG_TCK") (add_net "/FPGA Support/JTAG_TDI") (add_net "/FPGA Support/JTAG_TDO") (add_net "/FPGA Support/JTAG_TMS") (add_net "/FPGA Support/PROG_B_N") (add_net /GND) (add_net /PHY/GPIO0) (add_net /PHY/GPIO1) (add_net /PHY/GPIO2) (add_net /PHY/GPIO3) (add_net /PHY/GPIO4) (add_net /PHY/GPIO5) (add_net /PHY/GPIO6) (add_net /PHY/GPIO7) (add_net /PHY/GPIO8) (add_net /PHY/GPIO9) (add_net /PHY/LED1_N) (add_net /PHY/LED1_P) (add_net /PHY/LED2_N) (add_net /PHY/LED2_P) (add_net /PHY/RX_N) (add_net /PHY/RX_P) (add_net /PHY/RX_TAP) (add_net /PHY/TX_N) (add_net /PHY/TX_N_A) (add_net /PHY/TX_N_B) (add_net /PHY/TX_P) (add_net /PHY/TX_P_A) (add_net /PHY/TX_P_B) (add_net /PHY/TX_TAP) (add_net /PHY/VREF_1V5) (add_net /PHY/VREF_1V8) (add_net "/Power Supply/5V0") (add_net "Net-(D1-Pad2)") (add_net "Net-(J1-Pad1)") (add_net "Net-(J1-Pad12)") (add_net "Net-(J1-Pad13)") (add_net "Net-(J1-Pad14)") (add_net "Net-(J2-Pad1)") (add_net "Net-(J2-Pad17)") (add_net "Net-(J2-Pad2)") (add_net "Net-(J2-Pad3)") (add_net "Net-(J2-Pad7)") (add_net "Net-(J2-Pad8)") (add_net "Net-(J2-Pad9)") (add_net "Net-(K1-Pad3)") (add_net "Net-(R19-Pad2)") (add_net "Net-(R20-Pad2)") (add_net "Net-(R21-Pad2)") (add_net "Net-(R22-Pad2)") (add_net "Net-(R24-Pad1)") (add_net "Net-(R25-Pad1)") (add_net "Net-(R26-Pad2)") (add_net "Net-(R27-Pad2)") (add_net "Net-(R28-Pad2)") (add_net "Net-(R3-Pad2)") (add_net "Net-(R33-Pad1)") (add_net "Net-(R34-Pad2)") (add_net "Net-(R37-Pad1)") (add_net "Net-(R38-Pad2)") (add_net "Net-(U1-PadA12)") (add_net "Net-(U1-PadA13)") (add_net "Net-(U1-PadA14)") (add_net "Net-(U1-PadA2)") (add_net "Net-(U1-PadA3)") (add_net "Net-(U1-PadA6)") (add_net "Net-(U1-PadB1)") (add_net "Net-(U1-PadB12)") (add_net "Net-(U1-PadB14)") (add_net "Net-(U1-PadB2)") (add_net "Net-(U1-PadB3)") (add_net "Net-(U1-PadB6)") (add_net "Net-(U1-PadC1)") (add_net "Net-(U1-PadC10)") (add_net "Net-(U1-PadC11)") (add_net "Net-(U1-PadC13)") (add_net "Net-(U1-PadC2)") (add_net "Net-(U1-PadC3)") (add_net "Net-(U1-PadC9)") (add_net "Net-(U1-PadD1)") (add_net "Net-(U1-PadD11)") (add_net "Net-(U1-PadD12)") (add_net "Net-(U1-PadD3)") (add_net "Net-(U1-PadD5)") (add_net "Net-(U1-PadD9)") (add_net "Net-(U1-PadE1)") (add_net "Net-(U1-PadE10)") (add_net "Net-(U1-PadE11)") (add_net "Net-(U1-PadE2)") (add_net "Net-(U1-PadE3)") (add_net "Net-(U1-PadE4)") (add_net "Net-(U1-PadE6)") (add_net "Net-(U1-PadE7)") (add_net "Net-(U1-PadE8)") (add_net "Net-(U1-PadF1)") (add_net "Net-(U1-PadF10)") (add_net "Net-(U1-PadF2)") (add_net "Net-(U1-PadF3)") (add_net "Net-(U1-PadF4)") (add_net "Net-(U1-PadF5)") (add_net "Net-(U1-PadF6)") (add_net "Net-(U1-PadF7)") (add_net "Net-(U1-PadF9)") (add_net "Net-(U1-PadG1)") (add_net "Net-(U1-PadG3)") (add_net "Net-(U1-PadG5)") (add_net "Net-(U1-PadG6)") (add_net "Net-(U1-PadH1)") (add_net "Net-(U1-PadH2)") (add_net "Net-(U1-PadH3)") (add_net "Net-(U1-PadH4)") (add_net "Net-(U1-PadH5)") (add_net "Net-(U1-PadJ1)") (add_net "Net-(U1-PadJ3)") (add_net "Net-(U1-PadJ4)") (add_net "Net-(U1-PadJ6)") (add_net "Net-(U1-PadK3)") (add_net "Net-(U1-PadK5)") (add_net "Net-(U1-PadK6)") (add_net "Net-(U1-PadL10)") (add_net "Net-(U1-PadL11)") (add_net "Net-(U1-PadL3)") (add_net "Net-(U1-PadL4)") (add_net "Net-(U1-PadL5)") (add_net "Net-(U1-PadL7)") (add_net "Net-(U1-PadL8)") (add_net "Net-(U1-PadM10)") (add_net "Net-(U1-PadM11)") (add_net "Net-(U1-PadM12)") (add_net "Net-(U1-PadM3)") (add_net "Net-(U1-PadM4)") (add_net "Net-(U1-PadM5)") (add_net "Net-(U1-PadM6)") (add_net "Net-(U1-PadM7)") (add_net "Net-(U1-PadN3)") (add_net "Net-(U1-PadN4)") (add_net "Net-(U1-PadN5)") (add_net "Net-(U1-PadN6)") (add_net "Net-(U1-PadN8)") (add_net "Net-(U1-PadN9)") (add_net "Net-(U1-PadP11)") (add_net "Net-(U1-PadP4)") (add_net "Net-(U1-PadP5)") (add_net "Net-(U1-PadP6)") (add_net "Net-(U1-PadP7)") (add_net "Net-(U1-PadP8)") (add_net "Net-(U1-PadP9)") (add_net "Net-(U1-PadR5)") (add_net "Net-(U1-PadR7)") (add_net "Net-(U1-PadR9)") (add_net "Net-(U1-PadT4)") (add_net "Net-(U1-PadT5)") (add_net "Net-(U1-PadT6)") (add_net "Net-(U1-PadT7)") (add_net "Net-(U1-PadT8)") (add_net "Net-(U1-PadT9)") (add_net "Net-(U2-Pad11)") (add_net "Net-(U2-Pad13)") (add_net "Net-(U2-Pad14)") (add_net "Net-(U2-Pad4)") (add_net "Net-(U2-Pad7)") (add_net "Net-(U2-Pad9)") ) (module azonenberg_pcb:CONN_SMA_EDGE_SAMTEC_SMA_J_P_H_ST_EM1 (layer F.Cu) (tedit 59D72019) (tstamp 59CDDE1F) (at 142.7 61.75) (path /59CABCD8/59CDB853) (fp_text reference TP4 (at 0 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value SMA (at 0 1.6) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 2 smd rect (at -2.825 -2.35) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad 2 smd rect (at 2.825 -2.35) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad 1 smd rect (at 0 -2.1) (size 1.27 4.2) (layers F.Cu F.Paste F.Mask) (net 47 "Net-(R33-Pad1)")) (model :SAMTEC:SMA-J-P-H-ST-EM1.stp (at (xyz 0 -0.05905511811023623 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 -90 180)) ) ) (module azonenberg_pcb:CONN_SMA_EDGE_SAMTEC_SMA_J_P_H_ST_EM1 (layer F.Cu) (tedit 59D72019) (tstamp 59CDDE18) (at 131.7 34.15 180) (path /59CABCD8/59CDD419) (fp_text reference TP6 (at 0 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value SMA (at 0 1.6 180) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 2 smd rect (at -2.825 -2.35 180) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad 2 smd rect (at 2.825 -2.35 180) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad 1 smd rect (at 0 -2.1 180) (size 1.27 4.2) (layers F.Cu F.Paste F.Mask) (net 34 "Net-(R38-Pad2)")) (model :SAMTEC:SMA-J-P-H-ST-EM1.stp (at (xyz 0 -0.05905511811023623 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 -90 180)) ) ) (module azonenberg_pcb:CONN_SMA_EDGE_SAMTEC_SMA_J_P_H_ST_EM1 (layer F.Cu) (tedit 59D72019) (tstamp 59CDDE0A) (at 131.7 61.75) (path /59CABCD8/59CDCD2A) (fp_text reference TP1 (at 0 3.1) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value SMA (at 0 1.6) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 2 smd rect (at -2.825 -2.35) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad 2 smd rect (at 2.825 -2.35) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad 1 smd rect (at 0 -2.1) (size 1.27 4.2) (layers F.Cu F.Paste F.Mask) (net 32 "Net-(R37-Pad1)")) (model :SAMTEC:SMA-J-P-H-ST-EM1.stp (at (xyz 0 -0.05905511811023623 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 -90 180)) ) ) (module azonenberg_pcb:CONN_SMA_EDGE_SAMTEC_SMA_J_P_H_ST_EM1 (layer F.Cu) (tedit 59D72019) (tstamp 59CDDE03) (at 142.7 34.15 180) (path /59CABCD8/59CDC427) (fp_text reference TP5 (at 0 3.1 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value SMA (at 0 1.6 180) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 2 smd rect (at -2.825 -2.35 180) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad 2 smd rect (at 2.825 -2.35 180) (size 1.35 4.7) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad 1 smd rect (at 0 -2.1 180) (size 1.27 4.2) (layers F.Cu F.Paste F.Mask) (net 31 "Net-(R34-Pad2)")) (model :SAMTEC:SMA-J-P-H-ST-EM1.stp (at (xyz 0 -0.05905511811023623 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 -90 180)) ) ) (module azonenberg_pcb:LONGTHING-1200DPI locked (layer F.Cu) (tedit 54B4A826) (tstamp 59D0C41E) (at 142.9 45.4) (fp_text reference G*** (at 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-1.97866 1.05918) (xy -1.9685 1.05918) (xy -1.96596 1.05918) (xy -1.9558 1.05664) (xy -1.94818 1.0541) (xy -1.94818 1.0541) (xy -1.94564 1.04902) (xy -1.93802 1.04902) (xy -1.9304 1.04648) (xy -1.92786 1.0414) (xy -1.92532 1.03632) (xy -1.91516 1.03378) (xy -1.90754 1.03124) (xy -1.905 1.0287) (xy -1.89992 1.02362) (xy -1.89484 1.02362) (xy -1.88468 1.02108) (xy -1.88468 1.01854) (xy -1.8796 1.01346) (xy -1.87452 1.01346) (xy -1.86944 1.01346) (xy -1.8669 1.016) (xy -1.86436 1.02362) (xy -1.86436 1.03378) (xy -1.86436 1.05156) (xy -1.86436 1.07696) (xy -1.86436 1.08712) (xy -1.86436 1.08712)) (layer F.SilkS) (width 0.00254)) (fp_poly (pts (xy 0.16764 0.99822) (xy 0.16764 1.02616) (xy 0.16764 1.04394) (xy 0.1651 1.05664) (xy 0.16256 1.05918) (xy 0.16002 1.06426) (xy 0.16002 1.07442) (xy 0.16002 1.0795) (xy 0.15748 1.0922) (xy 0.15494 1.09728) (xy 0.15494 1.09982) (xy 0.14986 1.10236) (xy 0.14986 1.11252) (xy 0.14732 1.12014) (xy 0.14478 1.12268) (xy 0.1397 1.12776) (xy 0.1397 1.1303) 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0.8128) (xy 0.0889 0.81788) (xy 0.09652 0.8255) (xy 0.1016 0.82804) (xy 0.10922 0.83312) (xy 0.10922 0.83312) (xy 0.11176 0.84074) (xy 0.12192 0.8509) (xy 0.12954 0.85852) (xy 0.1397 0.87122) (xy 0.14732 0.88138) (xy 0.14986 0.88646) (xy 0.1524 0.89154) (xy 0.15494 0.89408) (xy 0.15748 0.89916) (xy 0.15748 0.90932) (xy 0.16002 0.91694) (xy 0.16002 0.92964) (xy 0.16256 0.93726) (xy 0.16256 0.9398) (xy 0.1651 0.94234) (xy 0.16764 0.95758) (xy 0.16764 0.9779) (xy 0.16764 0.99822) (xy 0.16764 0.99822)) (layer F.SilkS) (width 0.00254)) ) (module w_logo:Logo_silk_polarity_center_5x1.4mm locked (layer F.Cu) (tedit 0) (tstamp 59D09995) (at 82.8 53.8) (descr "Polarity logo, positive center, 5x1.4mm") (fp_text reference G*** (at -0.9 0.6) (layer F.SilkS) hide (effects (font (size 0.0889 0.0889) (thickness 0.01778))) ) (fp_text value LOGO (at 1 0.6) (layer F.SilkS) hide (effects (font (size 0.0889 0.0889) (thickness 0.01778))) ) (fp_arc (start 0 0) (end -0.65 0) (angle 90) (layer F.SilkS) (width 0.15)) (fp_arc (start 0 0) (end 0 0.65) (angle 90) (layer F.SilkS) (width 0.15)) (fp_line (start -0.65 0) (end -1.2 0) (layer F.SilkS) (width 0.15)) (fp_circle (center -1.85 0) (end -1.2 0) (layer F.SilkS) (width 0.15)) (fp_circle (center 1.85 0) (end 2.5 0) (layer F.SilkS) (width 0.15)) (fp_line (start 1.2 0) (end 0.3 0) (layer F.SilkS) (width 0.15)) (fp_circle (center 0 0) (end -0.1 0) (layer F.SilkS) (width 0.3)) (fp_circle (center 0 0) (end -0.2 0) (layer F.SilkS) (width 0.3)) (fp_arc (start 0 0) (end -0.55 -0.35) (angle 90) (layer F.SilkS) (width 0.15)) (fp_arc (start 0 0) (end 0.35 0.55) (angle 90) (layer F.SilkS) (width 0.15)) (fp_line (start -2.2 0) (end -1.5 0) (layer F.SilkS) (width 0.15)) (fp_line (start 1.5 0) (end 2.2 0) (layer F.SilkS) (width 0.15)) (fp_line (start 1.85 0.35) (end 1.85 -0.35) (layer F.SilkS) (width 0.15)) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 59CDE083) (at 124.3 44.3) (path /59CABCD8/59CDC388) (fp_text reference C27 (at 0.3 -0.9) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 14 /PHY/VREF_1V8)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 59CDE07D) (at 127 45.3) (path /59CABCD8/59CDC564) (fp_text reference C28 (at 2.5 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 11 /PHY/VREF_1V5)) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:BGA_256_17x17_FULLARRAY_1MM (layer F.Cu) (tedit 59CDAF9E) (tstamp 59CDDF8B) (at 117 47 270) (path /59CABCCC/59CAC15D) (fp_text reference U1 (at -7 -10 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value XC6SLX25-2FTG256C (at 0 10 270) (layer F.Fab) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_line (start -8 -9) (end -9 -8) (layer F.SilkS) (width 0.15)) (fp_line (start -9 -9) (end -8 -9) (layer F.SilkS) (width 0.15)) (fp_line (start 9 -9) (end -9 -9) (layer F.SilkS) (width 0.15)) (fp_line (start 9 9) (end 9 -9) (layer F.SilkS) (width 0.15)) (fp_line (start -9 9) (end 9 9) (layer F.SilkS) (width 0.15)) (fp_line (start -9 -9) (end -9 9) (layer F.SilkS) (width 0.15)) (pad A1 smd circle (at -7.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad A2 smd circle (at -6.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 120 "Net-(U1-PadA2)")) (pad A3 smd circle (at -5.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 121 "Net-(U1-PadA3)")) (pad A4 smd circle (at -4.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 42 /PHY/TX_N_B)) (pad A5 smd circle (at -3.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 44 /PHY/TX_N_A)) (pad A6 smd circle (at -2.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 122 "Net-(U1-PadA6)")) (pad A7 smd circle (at -1.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 14 /PHY/VREF_1V8)) (pad A8 smd circle (at -0.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 11 /PHY/VREF_1V5)) (pad A9 smd circle (at 0.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 41 /PHY/TX_P_B)) (pad A10 smd circle (at 1.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 43 /PHY/TX_P_A)) (pad A11 smd circle (at 2.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 74 /PHY/LED2_P)) (pad A12 smd circle (at 3.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 123 "Net-(U1-PadA12)")) (pad A13 smd circle (at 4.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 124 "Net-(U1-PadA13)")) (pad A14 smd circle (at 5.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 125 "Net-(U1-PadA14)")) (pad A15 smd circle (at 6.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 4 "/FPGA Support/JTAG_TMS")) (pad A16 smd circle (at 7.5 -7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad B1 smd circle (at -7.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 126 "Net-(U1-PadB1)")) (pad B2 smd circle (at -6.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 127 "Net-(U1-PadB2)")) (pad B3 smd circle (at -5.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 128 "Net-(U1-PadB3)")) (pad B4 smd circle (at -4.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad B5 smd circle (at -3.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 44 /PHY/TX_N_A)) (pad B6 smd circle (at -2.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 129 "Net-(U1-PadB6)")) (pad B7 smd circle (at -1.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad B8 smd circle (at -0.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 40 /PHY/RX_P)) (pad B9 smd circle (at 0.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad B10 smd circle (at 1.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 43 /PHY/TX_P_A)) (pad B11 smd circle (at 2.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad B12 smd circle (at 3.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 130 "Net-(U1-PadB12)")) (pad B13 smd circle (at 4.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad B14 smd circle (at 5.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 131 "Net-(U1-PadB14)")) (pad B15 smd circle (at 6.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad B16 smd circle (at 7.5 -6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C1 smd circle (at -7.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 132 "Net-(U1-PadC1)")) (pad C2 smd circle (at -6.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 133 "Net-(U1-PadC2)")) (pad C3 smd circle (at -5.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 134 "Net-(U1-PadC3)")) (pad C4 smd circle (at -4.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 39 "Net-(R3-Pad2)")) (pad C5 smd circle (at -3.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 73 /PHY/LED1_P)) (pad C6 smd circle (at -2.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 11 /PHY/VREF_1V5)) (pad C7 smd circle (at -1.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 30 /PHY/RX_N)) (pad C8 smd circle (at -0.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 14 /PHY/VREF_1V8)) (pad C9 smd circle (at 0.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 135 "Net-(U1-PadC9)")) (pad C10 smd circle (at 1.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 75 "Net-(U1-PadC10)")) (pad C11 smd circle (at 2.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 136 "Net-(U1-PadC11)")) (pad C12 smd circle (at 3.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 7 "/FPGA Support/JTAG_TDI")) (pad C13 smd circle (at 4.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 137 "Net-(U1-PadC13)")) (pad C14 smd circle (at 5.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 5 "/FPGA Support/JTAG_TCK")) (pad C15 smd circle (at 6.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad C16 smd circle (at 7.5 -5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D1 smd circle (at -7.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 138 "Net-(U1-PadD1)")) (pad D2 smd circle (at -6.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad D3 smd circle (at -5.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 139 "Net-(U1-PadD3)")) (pad D4 smd circle (at -4.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad D5 smd circle (at -3.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 119 "Net-(U1-PadD5)")) (pad D6 smd circle (at -2.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 30 /PHY/RX_N)) (pad D7 smd circle (at -1.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad D8 smd circle (at -0.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 40 /PHY/RX_P)) (pad D9 smd circle (at 0.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 76 "Net-(U1-PadD9)")) (pad D10 smd circle (at 1.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad D11 smd circle (at 2.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 77 "Net-(U1-PadD11)")) (pad D12 smd circle (at 3.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 78 "Net-(U1-PadD12)")) (pad D13 smd circle (at 4.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad D14 smd circle (at 5.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad D15 smd circle (at 6.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad D16 smd circle (at 7.5 -4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E13 smd circle (at 4.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E12 smd circle (at 3.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F12 smd circle (at 3.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad G12 smd circle (at 3.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E14 smd circle (at 5.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 6 "/FPGA Support/JTAG_TDO")) (pad E16 smd circle (at 7.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E15 smd circle (at 6.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F15 smd circle (at 6.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad E10 smd circle (at 1.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 79 "Net-(U1-PadE10)")) (pad E11 smd circle (at 2.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 80 "Net-(U1-PadE11)")) (pad F11 smd circle (at 2.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad H11 smd circle (at 2.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F10 smd circle (at 1.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 81 "Net-(U1-PadF10)")) (pad G11 smd circle (at 2.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad G10 smd circle (at 1.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad H10 smd circle (at 1.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 13 /1V2)) (pad F14 smd circle (at 5.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad H14 smd circle (at 5.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad G14 smd circle (at 5.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F13 smd circle (at 4.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad G13 smd circle (at 4.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad H13 smd circle (at 4.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad H12 smd circle (at 3.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad F16 smd circle (at 7.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad G16 smd circle (at 7.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad H15 smd circle (at 6.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad G15 smd circle (at 6.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad H16 smd circle (at 7.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad F9 smd circle (at 0.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 82 "Net-(U1-PadF9)")) (pad E8 smd circle (at -0.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 83 "Net-(U1-PadE8)")) (pad E9 smd circle (at 0.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad F8 smd circle (at -0.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad F7 smd circle (at -1.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 84 "Net-(U1-PadF7)")) (pad E7 smd circle (at -1.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 85 "Net-(U1-PadE7)")) (pad E3 smd circle (at -5.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 140 "Net-(U1-PadE3)")) (pad F4 smd circle (at -4.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 141 "Net-(U1-PadF4)")) (pad E4 smd circle (at -4.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 142 "Net-(U1-PadE4)")) (pad F3 smd circle (at -5.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 143 "Net-(U1-PadF3)")) (pad G6 smd circle (at -2.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 144 "Net-(U1-PadG6)")) (pad E6 smd circle (at -2.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 86 "Net-(U1-PadE6)")) (pad E5 smd circle (at -3.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad F5 smd circle (at -3.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 145 "Net-(U1-PadF5)")) (pad F6 smd circle (at -2.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 146 "Net-(U1-PadF6)")) (pad G5 smd circle (at -3.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 147 "Net-(U1-PadG5)")) (pad H5 smd circle (at -3.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 148 "Net-(U1-PadH5)")) (pad H6 smd circle (at -2.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad E2 smd circle (at -6.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 149 "Net-(U1-PadE2)")) (pad E1 smd circle (at -7.5 -3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 150 "Net-(U1-PadE1)")) (pad F2 smd circle (at -6.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 151 "Net-(U1-PadF2)")) (pad G2 smd circle (at -6.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad F1 smd circle (at -7.5 -2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 152 "Net-(U1-PadF1)")) (pad H1 smd circle (at -7.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 153 "Net-(U1-PadH1)")) (pad G1 smd circle (at -7.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 154 "Net-(U1-PadG1)")) (pad H2 smd circle (at -6.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 155 "Net-(U1-PadH2)")) (pad H7 smd circle (at -1.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad G8 smd circle (at -0.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad G9 smd circle (at 0.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 13 /1V2)) (pad G7 smd circle (at -1.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 13 /1V2)) (pad H8 smd circle (at -0.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 13 /1V2)) (pad H9 smd circle (at 0.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad G4 smd circle (at -4.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad H4 smd circle (at -4.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 156 "Net-(U1-PadH4)")) (pad G3 smd circle (at -5.5 -1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 157 "Net-(U1-PadG3)")) (pad H3 smd circle (at -5.5 -0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 158 "Net-(U1-PadH3)")) (pad R16 smd circle (at 7.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad T15 smd circle (at 6.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad R15 smd circle (at 6.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad P16 smd circle (at 7.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad R14 smd circle (at 5.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad P15 smd circle (at 6.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad P14 smd circle (at 5.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad T16 smd circle (at 7.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad J14 smd circle (at 5.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad K16 smd circle (at 7.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad L14 smd circle (at 5.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad K14 smd circle (at 5.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad K15 smd circle (at 6.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad J16 smd circle (at 7.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad J15 smd circle (at 6.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad R13 smd circle (at 4.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad R12 smd circle (at 3.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad T13 smd circle (at 4.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad P13 smd circle (at 4.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 37 "/FPGA Support/FPGA_DONE")) (pad T14 smd circle (at 5.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad T12 smd circle (at 3.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad P12 smd circle (at 3.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 56 /Boot/Config/FLASH_DQ3)) (pad J13 smd circle (at 4.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad K12 smd circle (at 3.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad L13 smd circle (at 4.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad K13 smd circle (at 4.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad L12 smd circle (at 3.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad J12 smd circle (at 3.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad M12 smd circle (at 3.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 87 "Net-(U1-PadM12)")) (pad M13 smd circle (at 4.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad N12 smd circle (at 3.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 55 /Boot/Config/FLASH_DQ2)) (pad M14 smd circle (at 5.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad N14 smd circle (at 5.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad N13 smd circle (at 4.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad N16 smd circle (at 7.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad M16 smd circle (at 7.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad M15 smd circle (at 6.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad N15 smd circle (at 6.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad L15 smd circle (at 6.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad L16 smd circle (at 7.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad K10 smd circle (at 1.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 13 /1V2)) (pad K11 smd circle (at 2.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad J9 smd circle (at 0.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 13 /1V2)) (pad L11 smd circle (at 2.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 88 "Net-(U1-PadL11)")) (pad K9 smd circle (at 0.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad L10 smd circle (at 1.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 89 "Net-(U1-PadL10)")) (pad J10 smd circle (at 1.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad J11 smd circle (at 2.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask)) (pad L7 smd circle (at -1.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 90 "Net-(U1-PadL7)")) (pad M7 smd circle (at -1.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 91 "Net-(U1-PadM7)")) (pad M8 smd circle (at -0.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad L8 smd circle (at -0.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 92 "Net-(U1-PadL8)")) (pad N9 smd circle (at 0.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 93 "Net-(U1-PadN9)")) (pad M9 smd circle (at 0.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 58 /Boot/Config/CLK_100MHZ)) (pad L9 smd circle (at 0.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad T11 smd circle (at 2.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 51 "Net-(R20-Pad2)")) (pad M11 smd circle (at 2.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 94 "Net-(U1-PadM11)")) (pad N10 smd circle (at 1.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad N11 smd circle (at 2.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 52 "Net-(R21-Pad2)")) (pad R11 smd circle (at 2.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 50 "Net-(R19-Pad2)")) (pad P11 smd circle (at 2.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 95 "Net-(U1-PadP11)")) (pad M10 smd circle (at 1.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 96 "Net-(U1-PadM10)")) (pad P10 smd circle (at 1.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 54 /Boot/Config/FLASH_DQ1)) (pad R10 smd circle (at 1.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad T10 smd circle (at 1.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 57 /Boot/Config/FLASH_DQ0)) (pad P9 smd circle (at 0.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 97 "Net-(U1-PadP9)")) (pad R9 smd circle (at 0.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 98 "Net-(U1-PadR9)")) (pad T9 smd circle (at 0.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 99 "Net-(U1-PadT9)")) (pad N8 smd circle (at -0.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 100 "Net-(U1-PadN8)")) (pad N7 smd circle (at -1.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad M6 smd circle (at -2.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 101 "Net-(U1-PadM6)")) (pad N6 smd circle (at -2.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 102 "Net-(U1-PadN6)")) (pad P7 smd circle (at -1.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 103 "Net-(U1-PadP7)")) (pad P8 smd circle (at -0.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 104 "Net-(U1-PadP8)")) (pad P6 smd circle (at -2.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 105 "Net-(U1-PadP6)")) (pad L6 smd circle (at -2.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad K8 smd circle (at -0.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 13 /1V2)) (pad K6 smd circle (at -2.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 159 "Net-(U1-PadK6)")) (pad J6 smd circle (at -2.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 160 "Net-(U1-PadJ6)")) (pad K7 smd circle (at -1.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad J8 smd circle (at -0.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad J7 smd circle (at -1.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 13 /1V2)) (pad T8 smd circle (at -0.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 106 "Net-(U1-PadT8)")) (pad R8 smd circle (at -0.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad T7 smd circle (at -1.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 107 "Net-(U1-PadT7)")) (pad R7 smd circle (at -1.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 108 "Net-(U1-PadR7)")) (pad R6 smd circle (at -2.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad T6 smd circle (at -2.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 109 "Net-(U1-PadT6)")) (pad P2 smd circle (at -6.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 59 /PHY/GPIO7)) (pad N2 smd circle (at -6.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad P3 smd circle (at -5.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad N3 smd circle (at -5.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 161 "Net-(U1-PadN3)")) (pad P1 smd circle (at -7.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 60 /PHY/GPIO6)) (pad N1 smd circle (at -7.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 61 /PHY/GPIO5)) (pad M3 smd circle (at -5.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 162 "Net-(U1-PadM3)")) (pad L1 smd circle (at -7.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 65 /PHY/GPIO2)) (pad L2 smd circle (at -6.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad M1 smd circle (at -7.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 62 /PHY/GPIO3)) (pad L3 smd circle (at -5.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 163 "Net-(U1-PadL3)")) (pad M2 smd circle (at -6.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 66 /PHY/GPIO4)) (pad M5 smd circle (at -3.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 164 "Net-(U1-PadM5)")) (pad M4 smd circle (at -4.5 3.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 165 "Net-(U1-PadM4)")) (pad N5 smd circle (at -3.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 110 "Net-(U1-PadN5)")) (pad P4 smd circle (at -4.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 111 "Net-(U1-PadP4)")) (pad N4 smd circle (at -4.5 4.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 166 "Net-(U1-PadN4)")) (pad P5 smd circle (at -3.5 5.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 112 "Net-(U1-PadP5)")) (pad K2 smd circle (at -6.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 63 /PHY/GPIO1)) (pad K1 smd circle (at -7.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 64 /PHY/GPIO0)) (pad J3 smd circle (at -5.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 167 "Net-(U1-PadJ3)")) (pad J2 smd circle (at -6.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad J1 smd circle (at -7.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 168 "Net-(U1-PadJ1)")) (pad K3 smd circle (at -5.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 169 "Net-(U1-PadK3)")) (pad R4 smd circle (at -4.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad T5 smd circle (at -3.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 113 "Net-(U1-PadT5)")) (pad R5 smd circle (at -3.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 114 "Net-(U1-PadR5)")) (pad T4 smd circle (at -4.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 115 "Net-(U1-PadT4)")) (pad K5 smd circle (at -3.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 170 "Net-(U1-PadK5)")) (pad L4 smd circle (at -4.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 171 "Net-(U1-PadL4)")) (pad L5 smd circle (at -3.5 2.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 172 "Net-(U1-PadL5)")) (pad J4 smd circle (at -4.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 173 "Net-(U1-PadJ4)")) (pad J5 smd circle (at -3.5 0.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad K4 smd circle (at -4.5 1.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad R3 smd circle (at -5.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 53 "Net-(R22-Pad2)")) (pad T1 smd circle (at -7.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad T2 smd circle (at -6.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 38 "/FPGA Support/PROG_B_N")) (pad R1 smd circle (at -7.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 67 /PHY/GPIO8)) (pad R2 smd circle (at -6.5 6.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 68 /PHY/GPIO9)) (pad T3 smd circle (at -5.5 7.5 270) (size 0.53 0.53) (layers F.Cu F.Paste F.Mask) (net 15 /Boot/Config/FLASH_CS_N)) (model /nfs4/home/azonenberg/code/3rdparty/kicad_libs/modules/packages3d/walter/smd_bga/lbga256.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:CONN_BELFUSE_0826_1G1T_23_F (layer F.Cu) (tedit 59CD9A3B) (tstamp 59CDDE65) (at 172.1 48.65 270) (path /59CABCD8/59CAC92C) (fp_text reference J2 (at 0 -7 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value BEL_FUSE_0826-1G1T-23-F (at 0 -6 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_line (start 9 -11) (end -9 -11) (layer F.SilkS) (width 0.15)) (fp_line (start 9 22) (end 9 -11) (layer F.SilkS) (width 0.15)) (fp_line (start -9 22) (end 9 22) (layer F.SilkS) (width 0.15)) (fp_line (start -9 -11) (end -9 22) (layer F.SilkS) (width 0.15)) (pad "" np_thru_hole circle (at -6.35 0 270) (size 3.25 3.25) (drill 3.25) (layers *.Cu *.Mask F.SilkS)) (pad "" np_thru_hole circle (at 6.35 0 270) (size 3.25 3.25) (drill 3.25) (layers *.Cu *.Mask F.SilkS)) (pad 17 thru_hole circle (at 8.065 -3.18 270) (size 2 2) (drill 1.57) (layers *.Cu *.Mask F.SilkS) (net 46 "Net-(J2-Pad17)")) (pad 17 thru_hole circle (at -8.065 -3.18 270) (size 2 2) (drill 1.57) (layers *.Cu *.Mask F.SilkS) (net 46 "Net-(J2-Pad17)")) (pad 1 thru_hole circle (at -5.075 15.24 270) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 116 "Net-(J2-Pad1)")) (pad 2 thru_hole circle (at -3.045 15.24 270) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 117 "Net-(J2-Pad2)")) (pad 3 thru_hole circle (at -1.015 15.24 270) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 118 "Net-(J2-Pad3)")) (pad 4 thru_hole circle (at 1.015 15.24 270) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 40 /PHY/RX_P)) (pad 5 thru_hole circle (at 3.045 15.24 270) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 30 /PHY/RX_N)) (pad 6 thru_hole circle (at 5.075 15.24 270) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 36 /PHY/RX_TAP)) (pad 7 thru_hole circle (at -6.095 17.78 270) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 70 "Net-(J2-Pad7)")) (pad 8 thru_hole circle (at -4.065 17.78 270) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 71 "Net-(J2-Pad8)")) (pad 9 thru_hole circle (at -2.035 17.78 270) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 72 "Net-(J2-Pad9)")) (pad 10 thru_hole circle (at 2.035 17.78 270) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 35 /PHY/TX_N)) (pad 11 thru_hole circle (at 4.065 17.78 270) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 33 /PHY/TX_P)) (pad 12 thru_hole circle (at 6.095 17.78 270) (size 1.25 1.25) (drill 0.89) (layers *.Cu *.Mask F.SilkS) (net 49 /PHY/TX_TAP)) (pad 13 thru_hole circle (at -6.095 20.32 270) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 45 /PHY/LED1_N)) (pad 14 thru_hole circle (at -3.555 20.32 270) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 73 /PHY/LED1_P)) (pad 15 thru_hole circle (at 3.555 20.32 270) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 48 /PHY/LED2_N)) (pad 16 thru_hole circle (at 6.095 20.32 270) (size 1.4 1.4) (drill 1.14) (layers *.Cu *.Mask F.SilkS) (net 74 /PHY/LED2_P)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/conn_pc/rj45-led-5-6605758-4.wrl (at (xyz 0 -0.2 0)) (scale (xyz 1 1.5 1)) (rotate (xyz 0 0 180)) ) ) (module azonenberg_pcb:CONN_CUI_PJ-058BH_HIPWR_BARREL_NOSLOT (layer F.Cu) (tedit 59CDB504) (tstamp 59CDDE49) (at 86 48) (path /59CABCE0/59CD2A85) (fp_text reference K1 (at 8.5 -5.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value CONN_3_PWROUT (at -5.5 5.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_line (start 6.5 2.5) (end 6.5 4.5) (layer F.SilkS) (width 0.2)) (fp_line (start 6.5 -4.5) (end 6.5 -2.5) (layer F.SilkS) (width 0.2)) (fp_line (start -8 4.5) (end 6.5 4.5) (layer F.SilkS) (width 0.2)) (fp_line (start -8 -4.5) (end 6.5 -4.5) (layer F.SilkS) (width 0.2)) (fp_line (start -8 4.5) (end -8 -4.5) (layer F.SilkS) (width 0.2)) (pad "" thru_hole circle (at -4 0) (size 3 3) (drill 2.2) (layers *.Cu *.Mask F.SilkS)) (pad 2 thru_hole circle (at 0.5 0) (size 3.5 3.5) (drill 3) (layers *.Cu *.Mask F.SilkS) (net 3 /GND)) (pad 1 thru_hole circle (at 6.5 0) (size 4 4) (drill 3.5) (layers *.Cu *.Mask F.SilkS) (net 22 "/Power Supply/5V0")) (pad 3 thru_hole circle (at 3.5 4.7) (size 3.5 3.5) (drill 3) (layers *.Cu *.Mask F.SilkS) (net 69 "Net-(K1-Pad3)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/conn_misc/dc_socket.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 90)) ) ) (module azonenberg_pcb:CONN_HEADER_2.54MM_2x6_RA (layer F.Cu) (tedit 59CDB4DF) (tstamp 59CDDE3C) (at 97.5 38.5 180) (path /59CABCD8/59CE22B9) (fp_text reference P1 (at -5.08 7.27 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value CONN_01X12 (at -1.27 -3.81 180) (layer F.Fab) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_line (start -7.92 3.27) (end 7.84 3.27) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 4.5) (end 7.84 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 4.5) (end 7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 -2.73) (end -7.92 -2.73) (layer F.SilkS) (width 0.15)) (fp_line (start -7.92 -2.73) (end -7.92 4.5) (layer F.SilkS) (width 0.15)) (fp_line (start 7.92 2.27) (end 6.92 3.27) (layer F.SilkS) (width 0.15)) (pad 8 thru_hole circle (at -1.27 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 59 /PHY/GPIO7)) (pad 7 thru_hole circle (at -1.27 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 60 /PHY/GPIO6)) (pad 6 thru_hole circle (at 1.27 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 61 /PHY/GPIO5)) (pad 4 thru_hole circle (at 3.81 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 62 /PHY/GPIO3)) (pad 2 thru_hole circle (at 6.35 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 63 /PHY/GPIO1)) (pad 1 thru_hole circle (at 6.35 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 64 /PHY/GPIO0)) (pad 3 thru_hole circle (at 3.81 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 65 /PHY/GPIO2)) (pad 5 thru_hole circle (at 1.27 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 66 /PHY/GPIO4)) (pad 11 thru_hole circle (at -6.35 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 12 /3V3)) (pad 9 thru_hole circle (at -3.81 1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 67 /PHY/GPIO8)) (pad 10 thru_hole circle (at -3.81 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 68 /PHY/GPIO9)) (pad 12 thru_hole circle (at -6.35 -1.27 180) (size 1.524 1.524) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/pin_strip/pin_strip_6x2-90.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 59CDDDFC) (at 110 47.999999 270) (path /59CABCE0/59CD7F5F) (fp_text reference C22 (at 1.400001 -0.9 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 59CDDDF6) (at 80.7 39.5 270) (path /59CCF577/59CD065F) (fp_text reference C2 (at 2 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value DNP (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 59CDDDF0) (at 120.5 49 90) (path /59CABCE0/59CD875E) (fp_text reference C15 (at -0.2 0.8 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 59CDDDEA) (at 119.5 46.5 180) (path /59CABCE0/59CD87EE) (fp_text reference C18 (at -1.9 0.3 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 2 /2V5)) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 59CDDDE4) (at 151.8 57.2 180) (path /59CABCE0/59CD7E9B) (fp_text reference C20 (at 0.05 -1 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 59CDDDDE) (at 160.4 56.8) (path /59CABCE0/59CD7EFF) (fp_text reference C21 (at 2.2 0.1) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 59CDDDD8) (at 115.5 42.5) (path /59CABCE0/59CD7FA1) (fp_text reference C23 (at -1.8 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 59CDDDD2) (at 118.499999 51.5 180) (path /59CABCE0/59CD7FF7) (fp_text reference C24 (at -2.000001 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 59CDDDCC) (at 124 48.999999 270) (path /59CABCE0/59CD803F) (fp_text reference C25 (at -0.699999 -0.9 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 59CDDDC6) (at 118.5 47.4 180) (path /59CABCE0/59CD8C67) (fp_text reference C16 (at -2 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 13 /1V2)) (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 59CDDDC0) (at 122 41 270) (path /59CABCE0/59CD8089) (fp_text reference C26 (at 0 0.8 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_CAP_NOSILK (layer B.Cu) (tedit 53C529C4) (tstamp 59CDDDBA) (at 103.6 54) (path /59CCF577/59CD093F) (fp_text reference C1 (at 0 0.8) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "0.47 uF" (at 0.05 -3.1) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (pad 2 smd rect (at 0.5 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 59CDDD9C) (at 106.4 52.5 90) (path /59CCF577/59CD0D66) (fp_text reference R28 (at -2.4 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value 33 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 28 "Net-(R28-Pad2)")) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 58 /Boot/Config/CLK_100MHZ)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDD96) (at 84.2 36.8 90) (path /59CCF577/59CD12EE) (fp_text reference R27 (at -2.3 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value DNP (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 57 /Boot/Config/FLASH_DQ0)) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 18 "Net-(R27-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDD90) (at 83.2 39.4 90) (path /59CCF577/59CD1235) (fp_text reference R26 (at -2.1 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value DNP (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 20 "Net-(R26-Pad2)")) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 56 /Boot/Config/FLASH_DQ3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDD8A) (at 85.4 38 270) (path /59CCF577/59CD0591) (fp_text reference R25 (at 2.4 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value DNP (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 17 "Net-(R25-Pad1)")) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 55 /Boot/Config/FLASH_DQ2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDD84) (at 87.9 39.3 270) (path /59CCF577/59CD047D) (fp_text reference R24 (at -2.3 -0.1 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value DNP (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 54 /Boot/Config/FLASH_DQ1)) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 16 "Net-(R24-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDD7E) (at 86.9 40.6 270) (path /59CCF577/59CD0544) (fp_text reference R23 (at -2.1 -0.1 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value DNP (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 15 /Boot/Config/FLASH_CS_N)) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDD78) (at 109.4 41.7) (path /59CCF577/59CD16FD) (fp_text reference R22 (at -2.3 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value 4.7k (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 53 "Net-(R22-Pad2)")) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDD72) (at 113.1 50 180) (path /59CCF577/59CCFDFD) (fp_text reference R21 (at 0.1 0.9 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value 0 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 52 "Net-(R21-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 59CDDD6C) (at 105.8 48.7 270) (path /59CCF577/59CD01A5) (fp_text reference R20 (at 2.1 -0.2 270) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value 0 (at 0 3.5 270) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 51 "Net-(R20-Pad2)")) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDD66) (at 107.8 50) (path /59CCF577/59CD14FE) (fp_text reference R19 (at 0.9 1) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value DNP (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 19 /Boot/Config/FLASH_SCK)) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 50 "Net-(R19-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDD60) (at 154.3 57.2 90) (path /59CABCD8/59CB4294) (fp_text reference R17 (at -2.2 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value 1k (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 49 /PHY/TX_TAP)) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDD5A) (at 155.7 57.2 270) (path /59CABCD8/59CB42C4) (fp_text reference R18 (at 2.2 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value 1k (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 49 /PHY/TX_TAP)) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDD54) (at 148.1 52.15 180) (path /59CABCD8/59CCA011) (fp_text reference R12 (at 2.2 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value 470 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 48 /PHY/LED2_N)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDD48) (at 143.3 47.45) (path /59CABCD8/59CDB85B) (fp_text reference R33 (at 2.2 0) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value 953 (at 0 -3.5) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 40 /PHY/RX_P)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 47 "Net-(R33-Pad1)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDD42) (at 173.897 49.8 180) (path /59CABCD8/59CC624C) (fp_text reference R14 (at 0 -1.5 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value 0 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 46 "Net-(J2-Pad17)")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDD3C) (at 148.1 42.65 180) (path /59CABCD8/59CCA227) (fp_text reference R13 (at 2.2 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value 470 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 45 /PHY/LED1_N)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDD36) (at 161.1 54.65 270) (path /59CABCD8/59CB419E) (fp_text reference R16 (at -2.5 0 270) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value 1k (at 0 -3.5 270) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 36 /PHY/RX_TAP)) (pad 2 smd rect (at 0.597 0 270) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 59CDDD30) (at 135.8 45.2) (path /59CABCD8/59CC84BA) (fp_text reference R11 (at 0.3 3) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value 2.26k (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 11 /PHY/VREF_1V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 59CDDD2A) (at 135.8 44.1 180) (path /59CABCD8/59CC8559) (fp_text reference R10 (at -0.3 -3.1 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value 470 (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 14 /PHY/VREF_1V8)) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 11 /PHY/VREF_1V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 59CDDD24) (at 135.8 43 180) (path /59CABCD8/59CC839A) (fp_text reference R9 (at 0 -3.2 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value 2.26k (at 0 3.5 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 14 /PHY/VREF_1V8)) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 59CDDD1E) (at 128.7 46.55 90) (path /59CABCD8/59CB7CAC) (fp_text reference R8 (at 2.1 0.1 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value 115 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 35 /PHY/TX_N)) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 44 /PHY/TX_N_A)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 59CDDD18) (at 130.2 49.45 90) (path /59CABCD8/59CB47F1) (fp_text reference R7 (at -2 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value 115 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 33 /PHY/TX_P)) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 43 /PHY/TX_P_A)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 59CDDD12) (at 130.2 46.55 90) (path /59CABCD8/59CC3B97) (fp_text reference R6 (at 2.1 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value 16 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 35 /PHY/TX_N)) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 42 /PHY/TX_N_B)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 59CDDD0C) (at 128.7 49.45 90) (path /59CABCD8/59CC3ADE) (fp_text reference R5 (at -2 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value 16 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 33 /PHY/TX_P)) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 41 /PHY/TX_P_B)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDD06) (at 125 46.3 90) (path /59CABCD8/59CC7521) (fp_text reference R4 (at 0 1 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value 100 (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 40 /PHY/RX_P)) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 30 /PHY/RX_N)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDD00) (at 123.7 41.3 180) (path /59CABCD8/59CC6B3F) (fp_text reference R3 (at -1.9 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value 1k (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 39 "Net-(R3-Pad2)")) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDCFA) (at 107.6 40 180) (path /59CABCCC/59CCC6A5) (fp_text reference R2 (at 0 0.9 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value 1k (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 38 "/FPGA Support/PROG_B_N")) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 2 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 59CDDCF4) (at 111.1 57.4) (path /59CABCCC/59CCC2EC) (fp_text reference R1 (at -1.9 0) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value 470 (at 0 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 2 smd rect (at 0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 29 "Net-(D1-Pad2)")) (pad 1 smd rect (at -0.597 0) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 37 "/FPGA Support/FPGA_DONE")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDCEE) (at 159.6 54.65 90) (path /59CABCD8/59CB410F) (fp_text reference R15 (at 2.5 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value 1k (at 0 -3.5 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 36 /PHY/RX_TAP)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 59CDDCE8) (at 131.7 46.55 90) (path /59CABCD8/59CDD421) (fp_text reference R38 (at 2.45 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value 953 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 34 "Net-(R38-Pad2)")) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 35 /PHY/TX_N)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer F.Cu) (tedit 53C529D9) (tstamp 59CDDCE2) (at 131.7 49.45 90) (path /59CABCD8/59CDCD31) (fp_text reference R37 (at -2.2 0 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value 953 (at 0 3.5 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 1 smd rect (at -0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 32 "Net-(R37-Pad1)")) (pad 2 smd rect (at 0.597 0 90) (size 0.635 0.61) (layers F.Cu F.Paste F.Mask) (net 33 /PHY/TX_P)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0402_RES_NOSILK (layer B.Cu) (tedit 53C529D9) (tstamp 59CDDCD6) (at 143.3 45.35 180) (path /59CABCD8/59CDC42F) (fp_text reference R34 (at -2.3 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value 953 (at 0 -3.5 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 30 /PHY/RX_N)) (pad 2 smd rect (at 0.597 0 180) (size 0.635 0.61) (layers B.Cu B.Paste B.Mask) (net 31 "Net-(R34-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_resistors/r_0402.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 59CDDCD0) (at 105.7 47.5 90) (path /59CABCE0/59CD2F8F) (fp_text reference C5 (at -2.1 0.1 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 59CDDCCA) (at 117.6 54) (path /59CABCE0/59CD7E2A) (fp_text reference C19 (at 0 1.1) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 59CDDCC4) (at 112.7 53 90) (path /59CABCE0/59CD7DEE) (fp_text reference C17 (at -2.3 0 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 59CDDCBE) (at 116.7 47 90) (path /59CABCE0/59CD8C07) (fp_text reference C13 (at -2.4 0.2 90) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 13 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 59CDDCB8) (at 99.95 44.4) (path /59CABCE0/59CD33C7) (fp_text reference C3 (at 2.55 0.1) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value "4.7 uF" (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 22 "/Power Supply/5V0")) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 59CDDCB2) (at 99.6 52.4 180) (path /59CABCE0/59CD320F) (fp_text reference C4 (at 2.7 0 180) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value "4.7 uF" (at 0 3 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 22 "/Power Supply/5V0")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 59CDDCAC) (at 106.3 43.6 90) (path /59CABCE0/59CD3040) (fp_text reference C6 (at 0 -1.1 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value "4.7 uF" (at 0 3 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer F.Cu) (tedit 53C52A1B) (tstamp 59CDDCA6) (at 104.1 46.9 90) (path /59CABCE0/59CD306A) (fp_text reference C7 (at 0.1 1.1 90) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value "4.7 uF" (at 0 3 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 13 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 59CDDCA0) (at 117.5 40) (path /59CABCE0/59CD7D20) (fp_text reference C11 (at 0 -1) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (pad 2 smd rect (at 0.75 0) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 59CDDC9A) (at 119.5 43 180) (path /59CABCE0/59CD870E) (fp_text reference C12 (at -0.5 -1 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 2 /2V5)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_CAP_NOSILK (layer B.Cu) (tedit 53C52A1B) (tstamp 59CDDC94) (at 125.75 39.8 180) (path /59CABCE0/59CD7DA4) (fp_text reference C14 (at -2.45 0 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "4.7 uF" (at 0 -3 180) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 12 /3V3)) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_0603_LED (layer F.Cu) (tedit 59CDB8D6) (tstamp 59CDDC8E) (at 114.2 57.4 180) (path /59CABCCC/59CCC401) (fp_text reference D1 (at 0 1.4 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value GREEN (at 0.05 2.95 180) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_line (start -1.5 -0.6) (end -1.5 0.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (net 29 "Net-(D1-Pad2)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_leds/led_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 59CDDC87) (at 101.1 42.8) (path /59CABCE0/59CD86C2) (fp_text reference C9 (at -3.1 -0.3) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value "100 uF" (at 0 3.7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 1 smd rect (at -1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad 2 smd rect (at 1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer B.Cu) (tedit 53C61E7C) (tstamp 59CDDC81) (at 108.5 46.8 90) (path /59CABCE0/59CD8BA9) (fp_text reference C10 (at 1.6 2 180) (layer B.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (fp_text value "100 uF" (at 0 -3.7 90) (layer B.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15)) (justify mirror)) ) (pad 2 smd rect (at 1.55 -0.01493 90) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 3 /GND)) (pad 1 smd rect (at -1.55 -0.01493 90) (size 0.9 1.6) (layers B.Cu B.Paste B.Mask) (net 13 /1V2)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:EIA_1206_CAP_NOSILK (layer F.Cu) (tedit 53C61E7C) (tstamp 59CDDC7B) (at 118.2 36) (path /59CABCE0/59CD7977) (fp_text reference C8 (at 0 -1.4) (layer F.SilkS) (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value "100 uF" (at 0 3.7) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 1 smd rect (at -1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad 2 smd rect (at 1.55 0.01493) (size 0.9 1.6) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_cap/c_1206.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:OSCILLATOR_3.2x2.5 (layer F.Cu) (tedit 59CDB61A) (tstamp 59CDDC75) (at 103.4 52.7) (path /59CCF577/59CD082F) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U4 (at 0.25 2.75) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value "100 MHz" (at 0.25 3.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_circle (center -2.25 1.75) (end -2.25 1.5) (layer F.SilkS) (width 0.15)) (pad 4 smd rect (at -1.27 -0.825) (size 1.2 1) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad 3 smd rect (at 1.27 -0.825) (size 1.2 1) (layers F.Cu F.Paste F.Mask) (net 28 "Net-(R28-Pad2)")) (pad 2 smd rect (at 1.27 0.825) (size 1.2 1) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad 1 smd rect (at -1.27 0.825) (size 1.2 1) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/crystal/crystal_smd_5x3.2mm.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:QFN_16_0.5MM_3x3MM (layer F.Cu) (tedit 59CDB538) (tstamp 59CDDC6C) (at 100.75 48.5) (path /59CABCE0/59CAC42E) (solder_mask_margin 0.05) (solder_paste_ratio -0.1) (fp_text reference U2 (at 0 2.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value ADP322ACPZ-145-R7 (at 0.25 3.25) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_line (start -1.75 1.25) (end -1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 1.75) (end -1.75 1.25) (layer F.SilkS) (width 0.15)) (fp_line (start -1.25 1.75) (end -1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.75) (end 1.25 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 1.25) (end 1.75 1.75) (layer F.SilkS) (width 0.15)) (fp_line (start 1.75 -1.75) (end 1.75 -1.25) (layer F.SilkS) (width 0.15)) (fp_line (start 1.25 -1.75) (end 1.75 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.75) (end -1.25 -1.75) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -1.25) (end -1.75 -1.75) (layer F.SilkS) (width 0.15)) (pad 12 smd rect (at -0.75 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad 11 smd rect (at -0.25 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 21 "Net-(U2-Pad11)")) (pad 10 smd rect (at 0.25 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 22 "/Power Supply/5V0")) (pad 9 smd rect (at 0.75 -1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 23 "Net-(U2-Pad9)")) (pad 8 smd rect (at 1.5 -0.75 270) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 13 /1V2)) (pad 7 smd rect (at 1.5 -0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 24 "Net-(U2-Pad7)")) (pad 6 smd rect (at 1.5 0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 2 /2V5)) (pad 5 smd rect (at 1.5 0.75 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (pad 4 smd rect (at 0.75 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 25 "Net-(U2-Pad4)")) (pad 3 smd rect (at 0.25 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 22 "/Power Supply/5V0")) (pad 2 smd rect (at -0.25 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 22 "/Power Supply/5V0")) (pad 1 smd rect (at -0.75 1.5) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 22 "/Power Supply/5V0")) (pad 16 smd rect (at -1.5 0.75 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 22 "/Power Supply/5V0")) (pad 15 smd rect (at -1.5 0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 22 "/Power Supply/5V0")) (pad 14 smd rect (at -1.5 -0.25 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 26 "Net-(U2-Pad14)")) (pad 13 smd rect (at -1.5 -0.75 90) (size 0.25 0.8) (layers F.Cu F.Paste F.Mask) (net 27 "Net-(U2-Pad13)")) (pad PAD smd rect (at 0 0) (size 1.25 1.25) (layers F.Cu F.Mask) (net 3 /GND)) (pad PAD smd rect (at -0.25 -0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 3 /GND)) (pad PAD smd rect (at 0.25 -0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 3 /GND)) (pad PAD smd rect (at 0.25 0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 3 /GND)) (pad PAD smd rect (at -0.25 0.25) (size 0.5 0.5) (layers F.Cu F.Paste) (net 3 /GND)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_qfn/qfn-16.wrl (at (xyz 0 0 0)) (scale (xyz 0.6 0.6 0.6)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:SOIC_8_3.9MM (layer F.Cu) (tedit 59CDB5D7) (tstamp 59CDDC4A) (at 84.4 38.1 90) (path /59CCF577/59CCFD83) (fp_text reference U3 (at -0.15 -5.23 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value DNP (at 0.08 -0.23 90) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_line (start -2.5 1) (end -1.5 2) (layer F.SilkS) (width 0.2)) (fp_line (start 2.5 -2) (end -2.5 -2) (layer F.SilkS) (width 0.2)) (fp_line (start 2.5 2) (end 2.5 -2) (layer F.SilkS) (width 0.2)) (fp_line (start -2.5 2) (end 2.5 2) (layer F.SilkS) (width 0.2)) (fp_line (start -2.5 -2) (end -2.5 2) (layer F.SilkS) (width 0.2)) (pad 1 smd rect (at -1.905 3 90) (size 0.65 1.7) (layers F.Cu F.Paste F.Mask) (net 15 /Boot/Config/FLASH_CS_N)) (pad 2 smd rect (at -0.635 3 90) (size 0.65 1.7) (layers F.Cu F.Paste F.Mask) (net 16 "Net-(R24-Pad1)")) (pad 3 smd rect (at 0.635 3 90) (size 0.65 1.7) (layers F.Cu F.Paste F.Mask) (net 17 "Net-(R25-Pad1)")) (pad 4 smd rect (at 1.905 3 90) (size 0.65 1.7) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) (pad 5 smd rect (at 1.905 -3 90) (size 0.65 1.7) (layers F.Cu F.Paste F.Mask) (net 18 "Net-(R27-Pad2)")) (pad 6 smd rect (at 0.635 -3 90) (size 0.65 1.7) (layers F.Cu F.Paste F.Mask) (net 19 /Boot/Config/FLASH_SCK)) (pad 7 smd rect (at -0.635 -3 90) (size 0.65 1.7) (layers F.Cu F.Paste F.Mask) (net 20 "Net-(R26-Pad2)")) (pad 8 smd rect (at -1.905 -3 90) (size 0.65 1.7) (layers F.Cu F.Paste F.Mask) (net 12 /3V3)) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/smd_dil/so-8.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 59CDB39D) (tstamp 59CDDC39) (at 133.9 43) (path /59CABCD8/59CE0AC9) (fp_text reference TP7 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value CONN_01X01 (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 14 /PHY/VREF_1V8)) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 59D04A0D) (tstamp 59CDDC34) (at 106.8 47.8) (path /59CABCE0/59CDF520) (fp_text reference TP12 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value CONN_01X01 (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 13 /1V2)) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 59D049F5) (tstamp 59CDDC2F) (at 104.4 44.4) (path /59CABCE0/59CDF4D2) (fp_text reference TP11 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value CONN_01X01 (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 2 /2V5)) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 59D04A03) (tstamp 59CDDC2A) (at 99.7 53.5) (path /59CABCE0/59CDF1F3) (fp_text reference TP10 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value CONN_01X01 (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 12 /3V3)) ) (module azonenberg_pcb:TESTPOINT_SMT_0.5MM (layer F.Cu) (tedit 59CDB395) (tstamp 59CDDC25) (at 133.9 45.2) (path /59CABCD8/59CE0A57) (fp_text reference TP8 (at 0 1.5) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value CONN_01X01 (at 0.1 2.9) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 1 smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask) (net 11 /PHY/VREF_1V5)) ) (module azonenberg_pcb:TESTPOINT_SMT_KEYSTONE_5016 (layer F.Cu) (tedit 59CDB290) (tstamp 59CDDC20) (at 136.6 54) (path /59CABCD8/59CDECA5) (fp_text reference TP9 (at 0 3) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value CONN_01X01 (at 0 4.6) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (pad 1 smd rect (at 0 0) (size 4.7 3.43) (layers F.Cu F.Paste F.Mask) (net 3 /GND)) ) (module azonenberg_pcb:XILINX_JTAG_PTH_MOLEX_0878311420 (layer F.Cu) (tedit 59CDB4E2) (tstamp 59CDDC1B) (at 96.5 58.5) (path /59CABCCC/59CCBFC0) (fp_text reference J1 (at 0 -4) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_text value XILINX_JTAG (at 0 3.4) (layer F.SilkS) hide (effects (font (size 0.75 0.75) (thickness 0.15))) ) (fp_line (start 8.5 -3) (end -8.5 -3) (layer F.SilkS) (width 0.3)) (fp_line (start -8.5 -3) (end -8.5 3) (layer F.SilkS) (width 0.3)) (fp_line (start -2 3) (end -8.5 3) (layer F.SilkS) (width 0.3)) (fp_line (start 8.5 -3) (end 8.5 3) (layer F.SilkS) (width 0.3)) (fp_line (start 8.5 3) (end 2 3) (layer F.SilkS) (width 0.3)) (pad 1 thru_hole circle (at -6 1) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 1 "Net-(J1-Pad1)")) (pad 2 thru_hole circle (at -6 -1) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 2 /2V5)) (pad 3 thru_hole circle (at -4 1) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 3 /GND)) (pad 4 thru_hole circle (at -4 -1) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 4 "/FPGA Support/JTAG_TMS")) (pad 5 thru_hole circle (at -2 1) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 3 /GND)) (pad 6 thru_hole circle (at -2 -1) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 5 "/FPGA Support/JTAG_TCK")) (pad 7 thru_hole circle (at 0 1) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 3 /GND)) (pad 8 thru_hole circle (at 0 -1) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 6 "/FPGA Support/JTAG_TDO")) (pad 9 thru_hole circle (at 2 1) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 3 /GND)) (pad 10 thru_hole circle (at 2 -1) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 7 "/FPGA Support/JTAG_TDI")) (pad 11 thru_hole circle (at 4 1) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 3 /GND)) (pad 12 thru_hole circle (at 4 -1) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 8 "Net-(J1-Pad12)")) (pad 13 thru_hole circle (at 6 1) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 9 "Net-(J1-Pad13)")) (pad 14 thru_hole circle (at 6 -1) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS) (net 10 "Net-(J1-Pad14)")) (model /nfs4/home/azonenberg/kicad-libs/3rdparty/walter/conn_strip/vasch_strip_7x2.wrl (at (xyz 0 0 0)) (scale (xyz 0.78 0.78 0.78)) (rotate (xyz 0 0 0)) ) ) (gr_text "5V DC" (at 82.4 55.7) (layer F.SilkS) (tstamp 59D09997) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text "TRAGICLASER 10/100 Characterization Board\nA. Zonenberg / 2017-10-08 / v0.1a" (at 147.7 35.8) (layer F.SilkS) (tstamp 59D094FD) (effects (font (size 1 1) (thickness 0.15)) (justify left)) ) (gr_text "FPGA\nDONE" (at 114.2 59.6) (layer F.SilkS) (tstamp 59CDE871) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text JTAG (at 96.5 54.5) (layer F.SilkS) (tstamp 59CDE4F8) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text GPIO (at 91 42) (layer F.SilkS) (tstamp 59CDE4ED) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text 1v8 (at 134.2 41.3 90) (layer F.SilkS) (tstamp 59CDE440) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text 1v5 (at 133.8 46.9 90) (layer F.SilkS) (tstamp 59CDE43A) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text GND (at 136.6 51.4) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (gr_line (start 78 33.5) (end 183 33.5) (layer Edge.Cuts) (width 0.15)) (gr_line (start 78 62) (end 78 33.5) (layer Edge.Cuts) (width 0.15)) (gr_line (start 183 62) (end 78 62) (layer Edge.Cuts) (width 0.15)) (gr_line (start 183 33.5) (end 183 62) (layer Edge.Cuts) (width 0.15)) (gr_text RX_N (at 143.8 40.1 180) (layer F.SilkS) (tstamp 59CE686F) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (gr_text TX_N (at 130.6 40 180) (layer F.SilkS) (tstamp 59CE6866) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (gr_text RX_P (at 144 55.6) (layer F.SilkS) (tstamp 59CE6861) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (gr_text TX_P (at 130.5 55.7) (layer F.SilkS) (effects (font (size 1.5 1.5) (thickness 0.15))) ) (segment (start 103.7 48.8) (end 103 48.8) (width 0.125) (layer In2.Cu) (net 2)) (segment (start 102 43.825001) (end 102 48.6) (width 0.125) (layer In2.Cu) (net 2)) (segment (start 102.2 48.8) (end 103 48.8) (width 0.125) (layer In2.Cu) (net 2)) (segment (start 102 48.6) (end 102.2 48.8) (width 0.125) (layer In2.Cu) (net 2)) (segment (start 102 43.825001) (end 102.7 43.825001) (width 0.125) (layer In2.Cu) (net 2)) (segment (start 100.925001 43.825001) (end 102 43.825001) (width 0.125) (layer In2.Cu) (net 2)) (segment (start 106.9 44.4) (end 109.715498 44.4) (width 0.125) (layer In2.Cu) (net 2)) (segment (start 109.715498 44.4) (end 110.815498 45.5) (width 0.125) (layer In2.Cu) (net 2)) (segment (start 110.815498 45.5) (end 113.75 45.5) (width 0.125) (layer In2.Cu) (net 2)) (segment (start 113.75 45.5) (end 114.000001 45.249999) (width 0.125) (layer In2.Cu) (net 2)) (segment (start 114.000001 45.249999) (end 114.000001 43.938436) (width 0.125) (layer In2.Cu) (net 2)) (segment (start 102.7 43.825001) (end 105.025001 43.825001) (width 0.125) (layer In2.Cu) (net 2)) (segment (start 100.4625 43.3625) (end 100.925001 43.825001) (width 0.125) (layer In2.Cu) (net 2)) (segment (start 105.025001 43.825001) (end 105.325001 44.125001) (width 0.125) (layer In2.Cu) (net 2)) (segment (start 105.325001 44.125001) (end 105.6 44.4) (width 0.125) (layer In2.Cu) (net 2)) (segment (start 100.4625 43.3625) (end 100.09757 43.3625) (width 0.125) (layer F.Cu) (net 2)) (segment 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