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    (no_connects 0)
    (area 135.071 82.789999 149.001 112.790001)
    (thickness 1.6)
    (drawings 8)
    (tracks 24)
    (zones 0)
    (modules 3)
    (nets 5)
  )

  (page A4)
  (layers
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    (33 F.Adhes user)
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    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )

  (setup
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    (user_trace_width 0.3)
    (user_trace_width 0.4)
    (user_trace_width 0.5)
    (trace_clearance 0)
    (zone_clearance 0.32)
    (zone_45_only yes)
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    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.7 1.7)
    (pad_drill 1)
    (pad_to_mask_clearance 0)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x00030_80000001)
      (usegerberextensions false)
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      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
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      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )

  (net 0 "")
  (net 1 +3V3)
  (net 2 GND)
  (net 3 /SDA)
  (net 4 /SCL)

  (net_class Default "This is the default net class."
    (clearance 0)
    (trace_width 0.25)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net +3V3)
    (add_net /SCL)
    (add_net /SDA)
    (add_net GND)
  )

  (module Pin_Headers:Pin_Header_Straight_1x04_Pitch2.54mm (layer F.Cu) (tedit 58D296F5) (tstamp 58D288CC)
    (at 145.796 97.79 270)
    (descr "Through hole straight pin header, 1x04, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x04 2.54mm single row")
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    (fp_text value Pin_Header_Straight_1x04_Pitch2.54mm (at 0 9.95 270) (layer F.Fab) hide
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    (fp_line (start -1.27 8.89) (end 1.27 8.89) (layer F.Fab) (width 0.1))
    (fp_line (start 1.27 8.89) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
    (fp_line (start 1.27 -1.27) (end -1.27 -1.27) (layer F.Fab) (width 0.1))
    (fp_line (start -1.33 1.27) (end -1.33 8.95) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.33 8.95) (end 1.33 8.95) (layer F.SilkS) (width 0.12))
    (fp_line (start 1.33 8.95) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
    (fp_line (start 1.33 1.27) (end -1.33 1.27) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.8 -1.8) (end -1.8 9.4) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.8 9.4) (end 1.8 9.4) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.8 9.4) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
    (fp_text user %R (at 0 -2.33 270) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 +3V3))
    (pad 2 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 2 GND))
    (pad 3 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 /SCL))
    (pad 4 thru_hole oval (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 /SDA))
    (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x04_Pitch2.54mm.wrl
      (at (xyz 0 -0.15 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )

  (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 58D2A53B) (tstamp 58D28762)
    (at 143.002 105.791 90)
    (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0603")
    (path /58D27C8C)
    (attr smd)
    (fp_text reference C1 (at -0.127 2.032 90) (layer F.SilkS) hide
      (effects (font (size 1 1) (thickness 0.15)))
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    (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
    (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
    (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
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    (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 1 +3V3))
    (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (model Capacitors_SMD.3dshapes/C_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module bme280:bme280 (layer F.Cu) (tedit 58D2A56F) (tstamp 58D2876E)
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    (path /58D278F7)
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      (net 4 /SCL))
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      (net 1 +3V3))
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      (net 2 GND))
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