(kicad_pcb (version 4) (host pcbnew 4.0.1-stable) (general (links 159) (no_connects 0) (area 67.31 74.1 280.760001 191.8) (thickness 1.6) (drawings 64) (tracks 1129) (zones 0) (modules 39) (nets 87) ) (page A4) (layers (0 F.Cu signal) (31 B.Cu signal) (32 B.Adhes user) (33 F.Adhes user) (34 B.Paste user) (35 F.Paste user) (36 B.SilkS user) (37 F.SilkS user) (38 B.Mask user) (39 F.Mask user) (40 Dwgs.User user) (41 Cmts.User user) (42 Eco1.User user) (43 Eco2.User user) (44 Edge.Cuts user) (45 Margin user) (46 B.CrtYd user) (47 F.CrtYd user) (48 B.Fab user hide) (49 F.Fab user hide) ) (setup (last_trace_width 0.1524) (user_trace_width 0.254) (trace_clearance 0.149606) (zone_clearance 0.254) (zone_45_only no) (trace_min 0.1524) (segment_width 0.2) (edge_width 0.15) (via_size 0.6858) (via_drill 0.3302) (via_min_size 0.6858) (via_min_drill 0.3302) (uvia_size 0.3) (uvia_drill 0.1) (uvias_allowed no) (uvia_min_size 0.2) (uvia_min_drill 0.1) (pcb_text_width 0.3) (pcb_text_size 1.5 1.5) (mod_edge_width 0.15) (mod_text_size 1 1) (mod_text_width 0.15) (pad_size 1.524 1.524) (pad_drill 0) (pad_to_mask_clearance 0.0762) (aux_axis_origin 0 0) (visible_elements FFFFFF7F) (pcbplotparams (layerselection 0x00030_00000000) (usegerberextensions true) (excludeedgelayer true) (linewidth 0.100000) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 0) (scaleselection 1) (outputdirectory gerber)) ) (net 0 "") (net 1 /ExpansionPort/HEIGHT_1) (net 2 /ExpansionPort/HEIGHT_2) (net 3 /ExpansionPort/NEW_HEIGHT_4) (net 4 /ExpansionPort/HEIGHT_4) (net 5 "Net-(PORT_IC1-Pad7)") (net 6 /ExpansionPort/NEW_HEIGHT_1) (net 7 /ExpansionPort/NEW_HEIGHT_2) (net 8 +5V) (net 9 "Net-(D1-Pad2)") (net 10 /S.Port) (net 11 /ExpansionPort/BATT_DIV) (net 12 "Net-(P1-Pad3)") (net 13 "Net-(P2-Pad2)") (net 14 "Net-(P2-Pad11)") (net 15 /nRC_RX) (net 16 +3V3) (net 17 /ExpansionPort/i2c_SDA) (net 18 /ExpansionPort/i2c_SCL) (net 19 /ExpansionPort/SPI1_MOSI) (net 20 /ExpansionPort/UART1_RX) (net 21 /ExpansionPort/TIMG1_CH1) (net 22 /ExpansionPort/TIM1) (net 23 /ExpansionPort/SPI1_MISO) (net 24 /ExpansionPort/SPI1_SCK) (net 25 /ExpansionPort/SPI1_NSS) (net 26 /ExpansionPort/SPI2_MOSI) (net 27 /ExpansionPort/SPI2_MISO) (net 28 /ExpansionPort/SPI2_SCK) (net 29 /ExpansionPort/SPI2_NSS) (net 30 /ExpansionPort/SPI3_MOSI) (net 31 /ExpansionPort/SPI3_MISO) (net 32 /ExpansionPort/SPI3_SCK) (net 33 /ExpansionPort/SPI3_NSS) (net 34 /ExpansionPort/CAN_LO) (net 35 /ExpansionPort/CAN_HI) (net 36 /ExpansionPort/RESET) (net 37 /ExpansionPort/BOOT) (net 38 /ExpansionPort/SDMMC1_CMD) (net 39 /ExpansionPort/SDMMC1_CK) (net 40 /ExpansionPort/SDMMC1_D3) (net 41 /ExpansionPort/SDMMC1_D2) (net 42 /ExpansionPort/SDMMC1_D1) (net 43 /ExpansionPort/SDMMC1_D0) (net 44 /ExpansionPort/ADC2) (net 45 /ExpansionPort/ADC1) (net 46 /ExpansionPort/TIMG2_CH4) (net 47 /ExpansionPort/TIMG2_CH3) (net 48 /ExpansionPort/TIMG2_CH2) (net 49 /ExpansionPort/TIMG2_CH1) (net 50 /ExpansionPort/TIMG1_CH4) (net 51 /ExpansionPort/TIMG1_CH3) (net 52 /ExpansionPort/TIMG1_CH2) (net 53 /ExpansionPort/TIM2) (net 54 /ExpansionPort/TIM3) (net 55 /ExpansionPort/TIM4) (net 56 /ExpansionPort/GPIO1) (net 57 /ExpansionPort/GPIO2) (net 58 /ExpansionPort/GPIO3) (net 59 /ExpansionPort/GPIO4) (net 60 /ExpansionPort/GPIO5) (net 61 /ExpansionPort/GPIO6) (net 62 /ExpansionPort/3V3_0.3A_E) (net 63 /ExpansionPort/UART8_TX) (net 64 /ExpansionPort/UART8_RX) (net 65 /ExpansionPort/UART7_TX) (net 66 /ExpansionPort/UART7_RX) (net 67 /ExpansionPort/UART6_TX) (net 68 /ExpansionPort/UART6_RX) (net 69 /ExpansionPort/UART5_TX) (net 70 /ExpansionPort/UART5_RX) (net 71 /ExpansionPort/UART4_TX) (net 72 /ExpansionPort/UART4_RX) (net 73 /ExpansionPort/UART3_TX) (net 74 /ExpansionPort/UART3_RX) (net 75 /ExpansionPort/UART2_TX) (net 76 /ExpansionPort/UART2_RX) (net 77 /ExpansionPort/UART1_TX) (net 78 "Net-(PORT_OUT1-Pad28)") (net 79 "Net-(PORT_OUT1-Pad27)") (net 80 "Net-(PORT_OUT1-Pad26)") (net 81 "Net-(PORT_OUT1-Pad25)") (net 82 "Net-(P2-Pad12)") (net 83 "Net-(P3-Pad1)") (net 84 "Net-(PORT_OUT1-Pad10)") (net 85 GND) (net 86 "Net-(U1-Pad6)") (net_class Default "This is the default net class." (clearance 0.149606) (trace_width 0.1524) (via_dia 0.6858) (via_drill 0.3302) (uvia_dia 0.3) (uvia_drill 0.1) (add_net +3V3) (add_net +5V) (add_net /ExpansionPort/3V3_0.3A_E) (add_net /ExpansionPort/ADC1) (add_net /ExpansionPort/ADC2) (add_net /ExpansionPort/BATT_DIV) (add_net /ExpansionPort/BOOT) (add_net /ExpansionPort/CAN_HI) (add_net /ExpansionPort/CAN_LO) (add_net /ExpansionPort/GPIO1) (add_net /ExpansionPort/GPIO2) (add_net /ExpansionPort/GPIO3) (add_net /ExpansionPort/GPIO4) (add_net /ExpansionPort/GPIO5) (add_net /ExpansionPort/GPIO6) (add_net /ExpansionPort/HEIGHT_1) (add_net /ExpansionPort/HEIGHT_2) (add_net /ExpansionPort/HEIGHT_4) (add_net /ExpansionPort/NEW_HEIGHT_1) (add_net /ExpansionPort/NEW_HEIGHT_2) (add_net /ExpansionPort/NEW_HEIGHT_4) (add_net /ExpansionPort/RESET) (add_net /ExpansionPort/SDMMC1_CK) (add_net /ExpansionPort/SDMMC1_CMD) (add_net /ExpansionPort/SDMMC1_D0) (add_net /ExpansionPort/SDMMC1_D1) (add_net /ExpansionPort/SDMMC1_D2) (add_net /ExpansionPort/SDMMC1_D3) (add_net /ExpansionPort/SPI1_MISO) (add_net /ExpansionPort/SPI1_MOSI) (add_net /ExpansionPort/SPI1_NSS) (add_net /ExpansionPort/SPI1_SCK) (add_net /ExpansionPort/SPI2_MISO) (add_net /ExpansionPort/SPI2_MOSI) (add_net /ExpansionPort/SPI2_NSS) (add_net /ExpansionPort/SPI2_SCK) (add_net /ExpansionPort/SPI3_MISO) (add_net /ExpansionPort/SPI3_MOSI) (add_net /ExpansionPort/SPI3_NSS) (add_net /ExpansionPort/SPI3_SCK) (add_net /ExpansionPort/TIM1) (add_net /ExpansionPort/TIM2) (add_net /ExpansionPort/TIM3) (add_net /ExpansionPort/TIM4) (add_net /ExpansionPort/TIMG1_CH1) (add_net /ExpansionPort/TIMG1_CH2) (add_net /ExpansionPort/TIMG1_CH3) (add_net /ExpansionPort/TIMG1_CH4) (add_net /ExpansionPort/TIMG2_CH1) (add_net /ExpansionPort/TIMG2_CH2) (add_net /ExpansionPort/TIMG2_CH3) (add_net /ExpansionPort/TIMG2_CH4) (add_net /ExpansionPort/UART1_RX) (add_net /ExpansionPort/UART1_TX) (add_net /ExpansionPort/UART2_RX) (add_net /ExpansionPort/UART2_TX) (add_net /ExpansionPort/UART3_RX) (add_net /ExpansionPort/UART3_TX) (add_net /ExpansionPort/UART4_RX) (add_net /ExpansionPort/UART4_TX) (add_net /ExpansionPort/UART5_RX) (add_net /ExpansionPort/UART5_TX) (add_net /ExpansionPort/UART6_RX) (add_net /ExpansionPort/UART6_TX) (add_net /ExpansionPort/UART7_RX) (add_net /ExpansionPort/UART7_TX) (add_net /ExpansionPort/UART8_RX) (add_net /ExpansionPort/UART8_TX) (add_net /ExpansionPort/i2c_SCL) (add_net /ExpansionPort/i2c_SDA) (add_net /S.Port) (add_net /nRC_RX) (add_net GND) (add_net "Net-(D1-Pad2)") (add_net "Net-(P1-Pad3)") (add_net "Net-(P2-Pad11)") (add_net "Net-(P2-Pad12)") (add_net "Net-(P2-Pad2)") (add_net "Net-(P3-Pad1)") (add_net "Net-(PORT_IC1-Pad7)") (add_net "Net-(PORT_OUT1-Pad10)") (add_net "Net-(PORT_OUT1-Pad25)") (add_net "Net-(PORT_OUT1-Pad26)") (add_net "Net-(PORT_OUT1-Pad27)") (add_net "Net-(PORT_OUT1-Pad28)") (add_net "Net-(U1-Pad6)") ) (module macrofab:Fiducial (layer B.Cu) (tedit 56DF2E6A) (tstamp 56DF311A) (at 131.44 120.7) (fp_text reference F4 (at 1.96 -0.02) (layer B.SilkS) (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_text value 1mm (at 0 0.5) (layer B.Fab) (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad "" smd circle (at 0 0) (size 1 1) (layers B.Cu B.Paste B.Mask) (solder_mask_margin 0.5) (solder_paste_margin_ratio -0.5) (clearance 0.5)) ) (module macrofab:Fiducial (layer B.Cu) (tedit 56DF2E59) (tstamp 56DF310D) (at 131.35 95.38) (fp_text reference F5 (at 1.96 -0.02) (layer B.SilkS) (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_text value 1mm (at 0 0.5) (layer B.Fab) (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad "" smd circle (at 0 0) (size 1 1) (layers B.Cu B.Paste B.Mask) (solder_mask_margin 0.5) (solder_paste_margin_ratio -0.5) (clearance 0.5)) ) (module macrofab:Fiducial (layer B.Cu) (tedit 56DF2E2E) (tstamp 56DF30FA) (at 164.66 95.24) (fp_text reference F6 (at 0.02 1.71) (layer B.SilkS) (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_text value 1mm (at 0 0.5) (layer B.Fab) (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad "" smd circle (at 0 0) (size 1 1) (layers B.Cu B.Paste B.Mask) (solder_mask_margin 0.5) (solder_paste_margin_ratio -0.5) (clearance 0.5)) ) (module macrofab:Fiducial (layer F.Cu) (tedit 56DF2DFC) (tstamp 56DF30E6) (at 160.69 91.25) (fp_text reference F3 (at -1.83 0) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 1mm (at 0 -0.5) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad "" smd circle (at 0 0) (size 1 1) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.5) (solder_paste_margin_ratio -0.5) (clearance 0.5)) ) (module macrofab:Fiducial (layer F.Cu) (tedit 56DF2DEA) (tstamp 56DF30DB) (at 131.35 95.38) (fp_text reference F2 (at 1.96 0.02) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 1mm (at 0 -0.5) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad "" smd circle (at 0 0) (size 1 1) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.5) (solder_paste_margin_ratio -0.5) (clearance 0.5)) ) (module hirose-df40:DF40-80pin-Header (layer B.Cu) (tedit 56B41E3E) (tstamp 56BAE954) (at 159.65 108) (path /564009DE/56401367) (fp_text reference PORT_IN1 (at 0.07 -10.37) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_text value CKD_SANDWICH (at -2.99 0.72 270) (layer B.Fab) (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_line (start -0.925 -8.76) (end 0.925 -8.76) (layer B.SilkS) (width 0.15)) (fp_line (start -0.925 8.76) (end 0.925 8.76) (layer B.SilkS) (width 0.15)) (fp_line (start 0 7.8) (end 0 -7.8) (layer B.SilkS) (width 0.15)) (pad 80 smd rect (at 1.355 7.8) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 19 /ExpansionPort/SPI1_MOSI)) (pad 40 smd rect (at -1.355 7.8) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 20 /ExpansionPort/UART1_RX)) (pad 41 smd rect (at 1.355 -7.8) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 21 /ExpansionPort/TIMG1_CH1)) (pad 1 smd rect (at -1.355 -7.8) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 22 /ExpansionPort/TIM1)) (pad 79 smd rect (at 1.355 7.4) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 23 /ExpansionPort/SPI1_MISO)) (pad 78 smd rect (at 1.355 7) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 24 /ExpansionPort/SPI1_SCK)) (pad 77 smd rect (at 1.355 6.6) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 25 /ExpansionPort/SPI1_NSS)) (pad 76 smd rect (at 1.355 6.2) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 26 /ExpansionPort/SPI2_MOSI)) (pad 75 smd rect (at 1.355 5.8) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 27 /ExpansionPort/SPI2_MISO)) (pad 74 smd rect (at 1.355 5.4) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 28 /ExpansionPort/SPI2_SCK)) (pad 73 smd rect (at 1.355 5) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 29 /ExpansionPort/SPI2_NSS)) (pad 72 smd rect (at 1.355 4.6) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 30 /ExpansionPort/SPI3_MOSI)) (pad 71 smd rect (at 1.355 4.2) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 31 /ExpansionPort/SPI3_MISO)) (pad 70 smd rect (at 1.355 3.8) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 32 /ExpansionPort/SPI3_SCK)) (pad 69 smd rect (at 1.355 3.4) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 33 /ExpansionPort/SPI3_NSS)) (pad 68 smd rect (at 1.355 3) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 34 /ExpansionPort/CAN_LO)) (pad 67 smd rect (at 1.355 2.6) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 35 /ExpansionPort/CAN_HI)) (pad 66 smd rect (at 1.355 2.2) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 36 /ExpansionPort/RESET)) (pad 65 smd rect (at 1.355 1.8) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 37 /ExpansionPort/BOOT)) (pad 64 smd rect (at 1.355 1.4) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 85 GND)) (pad 63 smd rect (at 1.355 1) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 85 GND)) (pad 62 smd rect (at 1.355 0.6) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 85 GND)) (pad 61 smd rect (at 1.355 0.2) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 85 GND)) (pad 60 smd rect (at 1.355 -0.2) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 85 GND)) (pad 59 smd rect (at 1.355 -0.6) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 85 GND)) (pad 58 smd rect (at 1.355 -1) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 85 GND)) (pad 57 smd rect (at 1.355 -1.4) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 85 GND)) (pad 56 smd rect (at 1.355 -1.8) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 38 /ExpansionPort/SDMMC1_CMD)) (pad 55 smd rect (at 1.355 -2.2) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 39 /ExpansionPort/SDMMC1_CK)) (pad 54 smd rect (at 1.355 -2.6) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 40 /ExpansionPort/SDMMC1_D3)) (pad 53 smd rect (at 1.355 -3) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 41 /ExpansionPort/SDMMC1_D2)) (pad 52 smd rect (at 1.355 -3.4) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 42 /ExpansionPort/SDMMC1_D1)) (pad 51 smd rect (at 1.355 -3.8) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 43 /ExpansionPort/SDMMC1_D0)) (pad 50 smd rect (at 1.355 -4.2) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 44 /ExpansionPort/ADC2)) (pad 49 smd rect (at 1.355 -4.6) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 45 /ExpansionPort/ADC1)) (pad 48 smd rect (at 1.355 -5) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 46 /ExpansionPort/TIMG2_CH4)) (pad 47 smd rect (at 1.355 -5.4) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 47 /ExpansionPort/TIMG2_CH3)) (pad 46 smd rect (at 1.355 -5.8) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 48 /ExpansionPort/TIMG2_CH2)) (pad 45 smd rect (at 1.355 -6.2) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 49 /ExpansionPort/TIMG2_CH1)) (pad 44 smd rect (at 1.355 -6.6) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 50 /ExpansionPort/TIMG1_CH4)) (pad 43 smd rect (at 1.355 -7) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 51 /ExpansionPort/TIMG1_CH3)) (pad 42 smd rect (at 1.355 -7.4) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 52 /ExpansionPort/TIMG1_CH2)) (pad 41 smd rect (at 1.355 -8.2) (size 0.66 0.35) (drill (offset 0 -0.075)) (layers B.Cu B.Paste B.Mask) (net 21 /ExpansionPort/TIMG1_CH1)) (pad 1 smd rect (at -1.355 -8.2) (size 0.66 0.35) (drill (offset 0 -0.075)) (layers B.Cu B.Paste B.Mask) (net 22 /ExpansionPort/TIM1)) (pad 80 smd rect (at 1.355 8.2) (size 0.66 0.35) (drill (offset 0 0.075)) (layers B.Cu B.Paste B.Mask) (net 19 /ExpansionPort/SPI1_MOSI)) (pad 40 smd rect (at -1.355 8.2) (size 0.66 0.35) (drill (offset 0 0.075)) (layers B.Cu B.Paste B.Mask) (net 20 /ExpansionPort/UART1_RX)) (pad 2 smd rect (at -1.355 -7.4) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 53 /ExpansionPort/TIM2)) (pad 3 smd rect (at -1.355 -7) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 54 /ExpansionPort/TIM3)) (pad 4 smd rect (at -1.355 -6.6) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 55 /ExpansionPort/TIM4)) (pad 5 smd rect (at -1.355 -6.2) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 56 /ExpansionPort/GPIO1)) (pad 6 smd rect (at -1.355 -5.8) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 57 /ExpansionPort/GPIO2)) (pad 7 smd rect (at -1.355 -5.4) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 58 /ExpansionPort/GPIO3)) (pad 8 smd rect (at -1.355 -5) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 59 /ExpansionPort/GPIO4)) (pad 9 smd rect (at -1.355 -4.6) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 60 /ExpansionPort/GPIO5)) (pad 10 smd rect (at -1.355 -4.2) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 61 /ExpansionPort/GPIO6)) (pad 11 smd rect (at -1.355 -3.8) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 17 /ExpansionPort/i2c_SDA)) (pad 12 smd rect (at -1.355 -3.4) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 18 /ExpansionPort/i2c_SCL)) (pad 13 smd rect (at -1.355 -3) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 4 /ExpansionPort/HEIGHT_4)) (pad 14 smd rect (at -1.355 -2.6) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 2 /ExpansionPort/HEIGHT_2)) (pad 15 smd rect (at -1.355 -2.2) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 1 /ExpansionPort/HEIGHT_1)) (pad 16 smd rect (at -1.355 -1.8) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 16 +3V3)) (pad 17 smd rect (at -1.355 -1.4) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 62 /ExpansionPort/3V3_0.3A_E)) (pad 18 smd rect (at -1.355 -1) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 11 /ExpansionPort/BATT_DIV)) (pad 19 smd rect (at -1.355 -0.6) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 8 +5V)) (pad 20 smd rect (at -1.355 -0.2) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 8 +5V)) (pad 21 smd rect (at -1.355 0.2) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 8 +5V)) (pad 22 smd rect (at -1.355 0.6) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 8 +5V)) (pad 23 smd rect (at -1.355 1) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 8 +5V)) (pad 24 smd rect (at -1.355 1.4) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 8 +5V)) (pad 25 smd rect (at -1.355 1.8) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 63 /ExpansionPort/UART8_TX)) (pad 26 smd rect (at -1.355 2.2) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 64 /ExpansionPort/UART8_RX)) (pad 27 smd rect (at -1.355 2.6) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 65 /ExpansionPort/UART7_TX)) (pad 28 smd rect (at -1.355 3) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 66 /ExpansionPort/UART7_RX)) (pad 29 smd rect (at -1.355 3.4) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 67 /ExpansionPort/UART6_TX)) (pad 30 smd rect (at -1.355 3.8) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 68 /ExpansionPort/UART6_RX)) (pad 31 smd rect (at -1.355 4.2) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 69 /ExpansionPort/UART5_TX)) (pad 32 smd rect (at -1.355 4.6) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 70 /ExpansionPort/UART5_RX)) (pad 33 smd rect (at -1.355 5) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 71 /ExpansionPort/UART4_TX)) (pad 34 smd rect (at -1.355 5.4) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 72 /ExpansionPort/UART4_RX)) (pad 35 smd rect (at -1.355 5.8) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 73 /ExpansionPort/UART3_TX)) (pad 36 smd rect (at -1.355 6.2) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 74 /ExpansionPort/UART3_RX)) (pad 37 smd rect (at -1.355 6.6) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 75 /ExpansionPort/UART2_TX)) (pad 38 smd rect (at -1.355 7) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 76 /ExpansionPort/UART2_RX)) (pad 39 smd rect (at -1.355 7.4) (size 0.66 0.23) (layers B.Cu B.Paste B.Mask) (net 77 /ExpansionPort/UART1_TX)) ) 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0.203811) (xy -2.659673 0.218272) (xy -2.641695 0.234518) (xy -2.621931 0.25231) (xy -2.600643 0.27141) (xy -2.578094 0.291581) (xy -2.560562 0.307223) (xy -2.405743 0.445206) (xy -2.395884 0.472442) (xy -2.376454 0.520493) (xy -2.353656 0.566369) (xy -2.32721 0.610487) (xy -2.296838 0.653264) (xy -2.262261 0.695117) (xy -2.223199 0.736464) (xy -2.211961 0.747485) (xy -2.165802 0.78875) (xy -2.116025 0.826931) (xy -2.062811 0.861936) (xy -2.006341 0.893676) (xy -1.946797 0.922059) (xy -1.884361 0.946996) (xy -1.819215 0.968395) (xy -1.75154 0.986165) (xy -1.719943 0.993028) (xy -1.689499 0.99895) (xy -1.662261 1.003593) (xy -1.636814 1.007112) (xy -1.611744 1.009665) (xy -1.585636 1.011408) (xy -1.557075 1.012499) (xy -1.540933 1.012857) (xy -1.508864 1.013147) (xy -1.480436 1.012729)) (layer B.Mask) (width 0.01)) ) (module Mounting_Holes:MountingHole_3mm locked (layer F.Cu) (tedit 5640F1E2) (tstamp 5637D813) (at 163.25 123.25) (descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,") (tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,") (fp_text reference REF** (at 0 -4.0005) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value MountingHole_3mm (at 1.00076 5.00126) (layer F.Fab) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_circle (center 0 0) (end 3 0) (layer Cmts.User) (width 0.381)) (pad 1 thru_hole circle (at 0 0) (size 3 3) (drill 3) (layers)) ) (module Mounting_Holes:MountingHole_3mm locked (layer F.Cu) (tedit 5640F1DE) (tstamp 5637D80D) (at 132.75 123.25) (descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,") (tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,") (fp_text reference REF** (at 0 -4.0005) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value MountingHole_3mm (at 1.00076 5.00126) (layer F.Fab) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_circle (center 0 0) (end 3 0) (layer Cmts.User) (width 0.381)) (pad 1 thru_hole circle (at 0 0) (size 3 3) (drill 3) (layers)) ) (module Mounting_Holes:MountingHole_3mm locked (layer F.Cu) (tedit 5640F1E9) (tstamp 5637D807) (at 132.75 92.75) (descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,") (tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,") (fp_text reference REF** (at 0 -4.0005) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value MountingHole_3mm (at 1.00076 5.00126) (layer F.Fab) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_circle (center 0 0) (end 3 0) (layer Cmts.User) (width 0.381)) (pad 1 thru_hole circle (at 0 0) (size 3 3) (drill 3) (layers)) ) (module Mounting_Holes:MountingHole_3mm locked (layer F.Cu) (tedit 5640F1EF) (tstamp 56251307) (at 163.25 92.75) (descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,") (tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,") (fp_text reference REF** (at 0 -4.0005) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value MountingHole_3mm (at 1.00076 5.00126) (layer F.Fab) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_circle (center 0 0) (end 3 0) (layer Cmts.User) (width 0.381)) (pad 1 thru_hole circle (at 0 0) (size 3 3) (drill 3) (layers)) ) (module Housings_SOT-23_SOT-143_TSOT-6:SC-70-6_Handsoldering (layer F.Cu) (tedit 56414E77) (tstamp 56461034) (at 157.13096 93.59976 90) (descr "SC-70-6, Handsoldering,") (tags "SC-70-6, Handsoldering,") (path /564009DE/564017F8) (attr smd) (fp_text reference PORT_ANDOR1 (at -0.02032 -3.98018 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value SN74LVC1G0832 (at -0.23876 4.11988 90) (layer F.Fab) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -1.3208 1.97866) (end -1.3208 2.54762) (layer F.SilkS) (width 0.15)) (fp_line (start -1.3208 2.54762) (end -0.90932 2.54762) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.65024 1.33096 90) (size 0.39878 1.50114) (layers F.Cu F.Paste F.Mask) (net 1 /ExpansionPort/HEIGHT_1)) (pad 2 smd rect (at 0 1.33096 90) (size 0.39878 1.50114) (layers F.Cu F.Paste F.Mask) (net 85 GND)) (pad 3 smd rect (at 0.65024 1.33096 90) (size 0.39878 1.50114) (layers F.Cu F.Paste F.Mask) (net 2 /ExpansionPort/HEIGHT_2)) (pad 4 smd rect (at 0.65024 -1.33096 90) (size 0.39878 1.50114) (layers F.Cu F.Paste F.Mask) (net 3 /ExpansionPort/NEW_HEIGHT_4)) (pad 5 smd rect (at 0 -1.33096 90) (size 0.39878 1.50114) (layers F.Cu F.Paste F.Mask) (net 16 +3V3)) (pad 6 smd rect (at -0.65024 -1.33096 90) (size 0.39878 1.50114) (layers F.Cu F.Paste F.Mask) (net 4 /ExpansionPort/HEIGHT_4)) (model Housings_SOT-23_SOT-143_TSOT-6.3dshapes/SC-70-6_Handsoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_SMD:C_0603_HandSoldering (layer B.Cu) (tedit 56414ECE) (tstamp 56461040) (at 157.2 95.9) (descr "Capacitor SMD 0603, hand soldering") (tags "capacitor 0603") (path /564009DE/564029BB) (attr smd) (fp_text reference PORT_C1 (at 0 1.9) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_text value 0.1uF (at 0 -1.9) (layer B.Fab) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer B.CrtYd) (width 0.05)) (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer B.CrtYd) (width 0.05)) (fp_line (start -1.85 0.75) (end -1.85 -0.75) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.85 0.75) (end 1.85 -0.75) (layer B.CrtYd) (width 0.05)) (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15)) (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 0) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) (net 16 +3V3)) (pad 2 smd rect (at 0.95 0) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) (net 85 GND)) (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Housings_DFN_QFN:DFN-8-1EP_3x2mm_Pitch0.5mm (layer B.Cu) (tedit 56414E71) (tstamp 56461056) (at 157.2625 93.6125 180) (descr "8-Lead Plastic Dual Flat, No Lead Package (MC) - 2x3x0.9 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf)") (tags "DFN 0.5") (path /564009DE/564013BD) (attr smd) (fp_text reference PORT_IC1 (at 0 2.05 180) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_text value AT24CS02-MAHM (at 0 -2.05 180) (layer B.Fab) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_line (start -2.1 1.3) (end -2.1 -1.3) (layer B.CrtYd) (width 0.05)) (fp_line (start 2.1 1.3) (end 2.1 -1.3) (layer B.CrtYd) (width 0.05)) (fp_line (start -2.1 1.3) (end 2.1 1.3) (layer B.CrtYd) (width 0.05)) (fp_line (start -2.1 -1.3) (end 2.1 -1.3) (layer B.CrtYd) (width 0.05)) (fp_line (start -1.075 -1.125) (end 1.075 -1.125) (layer B.SilkS) (width 0.15)) (fp_line (start -1.9 1.125) (end 1.075 1.125) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.45 0.75 180) (size 0.75 0.3) (layers B.Cu B.Paste B.Mask) (net 1 /ExpansionPort/HEIGHT_1)) (pad 2 smd rect (at -1.45 0.25 180) (size 0.75 0.3) (layers B.Cu B.Paste B.Mask) (net 2 /ExpansionPort/HEIGHT_2)) (pad 3 smd rect (at -1.45 -0.25 180) (size 0.75 0.3) (layers B.Cu B.Paste B.Mask) (net 4 /ExpansionPort/HEIGHT_4)) (pad 4 smd rect (at -1.45 -0.75 180) (size 0.75 0.3) (layers B.Cu B.Paste B.Mask) (net 85 GND)) (pad 5 smd rect (at 1.45 -0.75 180) (size 0.75 0.3) (layers B.Cu B.Paste B.Mask) (net 17 /ExpansionPort/i2c_SDA)) (pad 6 smd rect (at 1.45 -0.25 180) (size 0.75 0.3) (layers B.Cu B.Paste B.Mask) (net 18 /ExpansionPort/i2c_SCL)) (pad 7 smd rect (at 1.45 0.25 180) (size 0.75 0.3) (layers B.Cu B.Paste B.Mask) (net 5 "Net-(PORT_IC1-Pad7)")) (pad 8 smd rect (at 1.45 0.75 180) (size 0.75 0.3) (layers B.Cu B.Paste B.Mask) (net 16 +3V3)) (pad 9 smd rect (at 0.4375 -0.3625 180) (size 0.875 0.725) (layers B.Cu B.Paste B.Mask) (solder_paste_margin_ratio -0.2)) (pad 9 smd rect (at 0.4375 0.3625 180) (size 0.875 0.725) (layers B.Cu B.Paste B.Mask) (solder_paste_margin_ratio -0.2)) (pad 9 smd rect (at -0.4375 -0.3625 180) (size 0.875 0.725) (layers B.Cu B.Paste B.Mask) (solder_paste_margin_ratio -0.2)) (pad 9 smd rect (at -0.4375 0.3625 180) (size 0.875 0.725) (layers B.Cu B.Paste B.Mask) (solder_paste_margin_ratio -0.2)) (model Housings_DFN_QFN.3dshapes/DFN-8-1EP_3x2mm_Pitch0.5mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Housings_SOT-23_SOT-143_TSOT-6:SC-70-6_Handsoldering (layer F.Cu) (tedit 56414E7E) (tstamp 56461062) (at 162.96904 97.59976 90) (descr "SC-70-6, Handsoldering,") (tags "SC-70-6, Handsoldering,") (path /564009DE/56401612) (attr smd) (fp_text reference PORT_INV1 (at -0.02032 -3.98018 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value SN74LVC1G58 (at -0.23876 4.11988 90) (layer F.Fab) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -1.3208 1.97866) (end -1.3208 2.54762) (layer F.SilkS) (width 0.15)) (fp_line (start -1.3208 2.54762) (end -0.90932 2.54762) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.65024 1.33096 90) (size 0.39878 1.50114) (layers F.Cu F.Paste F.Mask) (net 1 /ExpansionPort/HEIGHT_1)) (pad 2 smd rect (at 0 1.33096 90) (size 0.39878 1.50114) (layers F.Cu F.Paste F.Mask) (net 85 GND)) (pad 3 smd rect (at 0.65024 1.33096 90) (size 0.39878 1.50114) (layers F.Cu F.Paste F.Mask) (net 85 GND)) (pad 4 smd rect (at 0.65024 -1.33096 90) (size 0.39878 1.50114) (layers F.Cu F.Paste F.Mask) (net 6 /ExpansionPort/NEW_HEIGHT_1)) (pad 5 smd rect (at 0 -1.33096 90) (size 0.39878 1.50114) (layers F.Cu F.Paste F.Mask) (net 16 +3V3)) (pad 6 smd rect (at -0.65024 -1.33096 90) (size 0.39878 1.50114) (layers F.Cu F.Paste F.Mask) (net 16 +3V3)) (model Housings_SOT-23_SOT-143_TSOT-6.3dshapes/SC-70-6_Handsoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Resistors_SMD:R_0603_HandSoldering (layer B.Cu) (tedit 56414ED9) (tstamp 5646107B) (at 155.45 91.2 180) (descr "Resistor SMD 0603, hand soldering") (tags "resistor 0603") (path /564009DE/5640243A) (attr smd) (fp_text reference PORT_R1 (at 0 1.9 180) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_text value 10k (at 0 -1.9 180) (layer B.Fab) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_line (start -2 0.8) (end 2 0.8) (layer B.CrtYd) (width 0.05)) (fp_line (start -2 -0.8) (end 2 -0.8) (layer B.CrtYd) (width 0.05)) (fp_line (start -2 0.8) (end -2 -0.8) (layer B.CrtYd) (width 0.05)) (fp_line (start 2 0.8) (end 2 -0.8) (layer B.CrtYd) (width 0.05)) (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 "Net-(PORT_IC1-Pad7)")) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 16 +3V3)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Housings_SOT-23_SOT-143_TSOT-6:SC-70-6_Handsoldering (layer F.Cu) (tedit 56414E7B) (tstamp 56461087) (at 157.28096 96.04976 90) (descr "SC-70-6, Handsoldering,") (tags "SC-70-6, Handsoldering,") (path /564009DE/5640163C) (attr smd) (fp_text reference PORT_XOR1 (at -0.02032 -3.98018 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value SN74LVC1G58 (at -0.23876 4.11988 90) (layer F.Fab) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -1.3208 1.97866) (end -1.3208 2.54762) (layer F.SilkS) (width 0.15)) (fp_line (start -1.3208 2.54762) (end -0.90932 2.54762) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.65024 1.33096 90) (size 0.39878 1.50114) (layers F.Cu F.Paste F.Mask) (net 1 /ExpansionPort/HEIGHT_1)) (pad 2 smd rect (at 0 1.33096 90) (size 0.39878 1.50114) (layers F.Cu F.Paste F.Mask) (net 85 GND)) (pad 3 smd rect (at 0.65024 1.33096 90) (size 0.39878 1.50114) (layers F.Cu F.Paste F.Mask) (net 1 /ExpansionPort/HEIGHT_1)) (pad 4 smd rect (at 0.65024 -1.33096 90) (size 0.39878 1.50114) (layers F.Cu F.Paste F.Mask) (net 7 /ExpansionPort/NEW_HEIGHT_2)) (pad 5 smd rect (at 0 -1.33096 90) (size 0.39878 1.50114) (layers F.Cu F.Paste F.Mask) (net 16 +3V3)) (pad 6 smd rect (at -0.65024 -1.33096 90) (size 0.39878 1.50114) (layers F.Cu F.Paste F.Mask) (net 2 /ExpansionPort/HEIGHT_2)) (model Housings_SOT-23_SOT-143_TSOT-6.3dshapes/SC-70-6_Handsoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Measurement_Points:Measurement_Point_Round-SMD-Pad_Small (layer B.Cu) (tedit 570C1BE6) (tstamp 56496854) (at 158.55 91.25) (descr "Mesurement Point, Round, SMD Pad, DM 1.5mm,") (tags "Mesurement Point, Round, SMD Pad, DM 1.5mm,") (path /564009DE/564024DB) (fp_text reference PORT_P1 (at 0 2.54) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_text value CONN_01X01 (at 1.27 -2.54) (layer B.Fab) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 1 smd circle (at 0 0) (size 1.524 1.524) (layers B.Cu B.Paste B.Mask) (net 5 "Net-(PORT_IC1-Pad7)") (solder_paste_margin -2147.483648)) ) (module Capacitors_SMD:C_1206_HandSoldering (layer F.Cu) (tedit 541A9C03) (tstamp 5694AEE3) (at 153.81 107.65 90) (descr "Capacitor SMD 1206, hand soldering") (tags "capacitor 1206") (path /5694C7EF) (attr smd) (fp_text reference C1 (at -4.08 0.09 180) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 10uF (at 0 2.3 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -3.3 -1.15) (end 3.3 -1.15) (layer F.CrtYd) (width 0.05)) (fp_line (start -3.3 1.15) (end 3.3 1.15) (layer F.CrtYd) (width 0.05)) (fp_line (start -3.3 -1.15) (end -3.3 1.15) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.3 -1.15) (end 3.3 1.15) (layer F.CrtYd) (width 0.05)) (fp_line (start 1 -1.025) (end -1 -1.025) (layer F.SilkS) (width 0.15)) (fp_line (start -1 1.025) (end 1 1.025) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -2 0 90) (size 2 1.6) (layers F.Cu F.Paste F.Mask) (net 8 +5V)) (pad 2 smd rect (at 2 0 90) (size 2 1.6) (layers F.Cu F.Paste F.Mask) (net 85 GND)) (model Capacitors_SMD.3dshapes/C_1206_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Diodes_SMD:SOD-523 (layer F.Cu) (tedit 0) (tstamp 5694AEE9) (at 153.8 121.8 180) (descr "http://www.diodes.com/datasheets/ap02001.pdf p.144") (tags "Diode SOD523") (path /5694A62B) (attr smd) (fp_text reference D1 (at 0.3 2.3 180) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value D_Schottky_Small (at 0 1.7 180) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -0.4 0.6) (end 1.15 0.6) (layer F.SilkS) (width 0.15)) (fp_line (start -0.4 -0.6) (end 1.15 -0.6) (layer F.SilkS) (width 0.15)) (pad 2 smd rect (at -0.7 0 180) (size 0.6 0.7) (layers F.Cu F.Paste F.Mask) (net 9 "Net-(D1-Pad2)")) (pad 1 smd rect (at 0.7 0 180) (size 0.6 0.7) (layers F.Cu F.Paste F.Mask) (net 10 /S.Port)) ) (module Pin_Headers:Pin_Header_Straight_1x04 (layer F.Cu) (tedit 5694B50B) (tstamp 5694AEF1) (at 143.18 121.09 90) (descr "Through hole pin header") (tags "pin header") (path /5694B46F) (fp_text reference P1 (at 0 -5.1 90) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value CONN_01X04 (at 0 -3.1 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -1.75 -1.75) (end -1.75 9.4) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.75 -1.75) (end 1.75 9.4) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.75 9.4) (end 1.75 9.4) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.27 1.27) (end -1.27 8.89) (layer F.SilkS) (width 0.15)) (fp_line (start 1.27 1.27) (end 1.27 8.89) (layer F.SilkS) (width 0.15)) (fp_line (start 1.55 -1.55) (end 1.55 0) (layer F.SilkS) (width 0.15)) (fp_line (start -1.27 8.89) (end 1.27 8.89) (layer F.SilkS) (width 0.15)) (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15)) (fp_line (start -1.55 0) (end -1.55 -1.55) (layer F.SilkS) (width 0.15)) (fp_line (start -1.55 -1.55) (end 1.55 -1.55) (layer F.SilkS) (width 0.15)) (pad 1 thru_hole rect (at 0 0 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (net 11 /ExpansionPort/BATT_DIV)) (pad 2 thru_hole oval (at 0 2.54 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (net 85 GND)) (pad 3 thru_hole oval (at 0 5.08 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (net 12 "Net-(P1-Pad3)")) (pad 4 thru_hole oval (at 0 7.62 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (net 10 /S.Port)) (model Pin_Headers.3dshapes/Pin_Header_Straight_1x04.wrl (at (xyz 0 -0.15 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 90)) ) ) (module Pin_Headers:Pin_Header_Angled_2x06 (layer F.Cu) (tedit 5694B506) (tstamp 5694AF01) (at 150.85 111.18 180) (descr "Through hole pin header") (tags "pin header") (path /56949CEB) (fp_text reference P2 (at 0 -5.1 180) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value CONN_02X06 (at 0 -3.1 180) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -1.35 -1.75) (end -1.35 14.45) (layer F.CrtYd) (width 0.05)) (fp_line (start 13.2 -1.75) (end 13.2 14.45) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.35 -1.75) (end 13.2 -1.75) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.35 14.45) (end 13.2 14.45) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.524 12.446) (end 1.016 12.446) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 12.954) (end 1.016 12.954) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 10.414) (end 1.016 10.414) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 9.906) (end 1.016 9.906) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 7.874) (end 1.016 7.874) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 7.366) (end 1.016 7.366) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 -0.254) (end 1.016 -0.254) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 0.254) (end 1.016 0.254) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 5.334) (end 1.016 5.334) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 4.826) (end 1.016 4.826) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 2.794) (end 1.016 2.794) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 2.286) (end 1.016 2.286) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 12.954) (end 3.556 12.954) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 12.446) (end 3.556 12.446) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 10.414) (end 3.556 10.414) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 9.906) (end 3.556 9.906) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 -0.254) (end 3.556 -0.254) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 0.254) (end 3.556 0.254) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 2.286) (end 3.556 2.286) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 2.794) (end 3.556 2.794) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 7.874) (end 3.556 7.874) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 7.366) (end 3.556 7.366) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 5.334) (end 3.556 5.334) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 4.826) (end 3.556 4.826) (layer F.SilkS) (width 0.15)) (fp_line (start 0 -1.55) (end -1.15 -1.55) (layer F.SilkS) (width 0.15)) (fp_line (start -1.15 -1.55) (end -1.15 0) (layer F.SilkS) (width 0.15)) (fp_line (start 6.604 -0.127) (end 12.573 -0.127) (layer F.SilkS) (width 0.15)) (fp_line (start 12.573 -0.127) (end 12.573 0.127) (layer F.SilkS) (width 0.15)) (fp_line (start 12.573 0.127) (end 6.731 0.127) (layer F.SilkS) (width 0.15)) (fp_line (start 6.731 0.127) (end 6.731 0) (layer F.SilkS) (width 0.15)) (fp_line (start 6.731 0) (end 12.573 0) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 8.89) (end 6.604 8.89) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 8.89) (end 4.064 11.43) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 11.43) (end 6.604 11.43) (layer F.SilkS) (width 0.15)) (fp_line (start 6.604 9.906) (end 12.7 9.906) (layer F.SilkS) (width 0.15)) (fp_line (start 12.7 9.906) (end 12.7 10.414) (layer F.SilkS) (width 0.15)) (fp_line (start 12.7 10.414) (end 6.604 10.414) (layer F.SilkS) (width 0.15)) (fp_line (start 6.604 11.43) (end 6.604 8.89) (layer F.SilkS) (width 0.15)) (fp_line (start 6.604 13.97) (end 6.604 11.43) (layer F.SilkS) (width 0.15)) (fp_line (start 12.7 12.954) (end 6.604 12.954) (layer F.SilkS) (width 0.15)) (fp_line (start 12.7 12.446) (end 12.7 12.954) (layer F.SilkS) (width 0.15)) (fp_line (start 6.604 12.446) (end 12.7 12.446) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 11.43) (end 4.064 13.97) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 11.43) (end 6.604 11.43) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 13.97) (end 6.604 13.97) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 3.81) (end 6.604 3.81) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 3.81) (end 4.064 6.35) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 6.35) (end 6.604 6.35) (layer F.SilkS) (width 0.15)) (fp_line (start 6.604 4.826) (end 12.7 4.826) (layer F.SilkS) (width 0.15)) (fp_line (start 12.7 4.826) (end 12.7 5.334) (layer F.SilkS) (width 0.15)) (fp_line (start 12.7 5.334) (end 6.604 5.334) (layer F.SilkS) (width 0.15)) (fp_line (start 6.604 6.35) (end 6.604 3.81) (layer F.SilkS) (width 0.15)) (fp_line (start 6.604 8.89) (end 6.604 6.35) (layer F.SilkS) (width 0.15)) (fp_line (start 12.7 7.874) (end 6.604 7.874) (layer F.SilkS) (width 0.15)) (fp_line (start 12.7 7.366) (end 12.7 7.874) (layer F.SilkS) (width 0.15)) (fp_line (start 6.604 7.366) (end 12.7 7.366) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 8.89) (end 6.604 8.89) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 6.35) (end 4.064 8.89) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 6.35) (end 6.604 6.35) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 1.27) (end 6.604 1.27) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 1.27) (end 4.064 3.81) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 3.81) (end 6.604 3.81) (layer F.SilkS) (width 0.15)) (fp_line (start 6.604 2.286) (end 12.7 2.286) (layer F.SilkS) (width 0.15)) (fp_line (start 12.7 2.286) (end 12.7 2.794) (layer F.SilkS) (width 0.15)) (fp_line (start 12.7 2.794) (end 6.604 2.794) (layer F.SilkS) (width 0.15)) (fp_line (start 6.604 3.81) (end 6.604 1.27) (layer F.SilkS) (width 0.15)) (fp_line (start 6.604 1.27) (end 6.604 -1.27) (layer F.SilkS) (width 0.15)) (fp_line (start 12.7 0.254) (end 6.604 0.254) (layer F.SilkS) (width 0.15)) (fp_line (start 12.7 -0.254) (end 12.7 0.254) (layer F.SilkS) (width 0.15)) (fp_line (start 6.604 -0.254) (end 12.7 -0.254) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 1.27) (end 6.604 1.27) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 -1.27) (end 4.064 1.27) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 -1.27) (end 6.604 -1.27) (layer F.SilkS) (width 0.15)) (pad 1 thru_hole rect (at 0 0 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (net 15 /nRC_RX)) (pad 2 thru_hole oval (at 2.54 0 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (net 13 "Net-(P2-Pad2)")) (pad 3 thru_hole oval (at 0 2.54 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (net 8 +5V)) (pad 4 thru_hole oval (at 2.54 2.54 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (net 8 +5V)) (pad 5 thru_hole oval (at 0 5.08 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (net 85 GND)) (pad 6 thru_hole oval (at 2.54 5.08 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (net 85 GND)) (pad 7 thru_hole oval (at 0 7.62 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (net 85 GND)) (pad 8 thru_hole oval (at 2.54 7.62 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (net 85 GND)) (pad 9 thru_hole oval (at 0 10.16 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (net 8 +5V)) (pad 10 thru_hole oval (at 2.54 10.16 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (net 8 +5V)) (pad 11 thru_hole oval (at 0 12.7 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (net 14 "Net-(P2-Pad11)")) (pad 12 thru_hole oval (at 2.54 12.7 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (net 82 "Net-(P2-Pad12)")) (model Pin_Headers.3dshapes/Pin_Header_Angled_2x06.wrl (at (xyz 0.05 -0.25 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 90)) ) ) (module Pin_Headers:Pin_Header_Angled_1x02 (layer F.Cu) (tedit 56956332) (tstamp 56955F50) (at 140.8 92.06) (descr "Through hole pin header") (tags "pin header") (path /56956219) (fp_text reference P3 (at 0 -5.1) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value CONN_01X02 (at 0 -3.1) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -1.5 -1.75) (end -1.5 4.3) (layer F.CrtYd) (width 0.05)) (fp_line (start 10.65 -1.75) (end 10.65 4.3) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.5 -1.75) (end 10.65 -1.75) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.5 4.3) (end 10.65 4.3) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.3 -1.55) (end -1.3 0) (layer F.SilkS) (width 0.15)) (fp_line (start 0 -1.55) (end -1.3 -1.55) (layer F.SilkS) (width 0.15)) (fp_line (start 4.191 -0.127) (end 10.033 -0.127) (layer F.SilkS) (width 0.15)) (fp_line (start 10.033 -0.127) (end 10.033 0.127) (layer F.SilkS) (width 0.15)) (fp_line (start 10.033 0.127) (end 4.191 0.127) (layer F.SilkS) (width 0.15)) (fp_line (start 4.191 0.127) (end 4.191 0) (layer F.SilkS) (width 0.15)) (fp_line (start 4.191 0) (end 10.033 0) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 -0.254) (end 1.143 -0.254) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 0.254) (end 1.143 0.254) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 2.286) (end 1.143 2.286) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 2.794) (end 1.143 2.794) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 -1.27) (end 4.064 -1.27) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 1.27) (end 4.064 1.27) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 1.27) (end 1.524 3.81) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 3.81) (end 4.064 3.81) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 2.286) (end 10.16 2.286) (layer F.SilkS) (width 0.15)) (fp_line (start 10.16 2.286) (end 10.16 2.794) (layer F.SilkS) (width 0.15)) (fp_line (start 10.16 2.794) (end 4.064 2.794) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 3.81) (end 4.064 1.27) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 1.27) (end 4.064 -1.27) (layer F.SilkS) (width 0.15)) (fp_line (start 10.16 0.254) (end 4.064 0.254) (layer F.SilkS) (width 0.15)) (fp_line (start 10.16 -0.254) (end 10.16 0.254) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 -0.254) (end 10.16 -0.254) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 1.27) (end 4.064 1.27) (layer F.SilkS) (width 0.15)) (fp_line (start 1.524 -1.27) (end 1.524 1.27) (layer F.SilkS) (width 0.15)) (pad 1 thru_hole rect (at 0 0) (size 2.032 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (net 83 "Net-(P3-Pad1)")) (pad 2 thru_hole oval (at 0 2.54) (size 2.032 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (net 8 +5V)) (model Pin_Headers.3dshapes/Pin_Header_Angled_1x02.wrl (at (xyz 0 -0.05 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 90)) ) ) (module TO_SOT_Packages_SMD:SOT-23_Handsoldering (layer F.Cu) (tedit 54E9291B) (tstamp 56955F57) (at 137.73 93.25) (descr "SOT-23, Handsoldering") (tags SOT-23) (path /569563C3) (attr smd) (fp_text reference Q1 (at -2.57 2.36) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value Q_NMOS_GSD (at 0 3.81) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -1.49982 0.0508) (end -1.49982 -0.65024) (layer F.SilkS) (width 0.15)) (fp_line (start -1.49982 -0.65024) (end -1.2509 -0.65024) (layer F.SilkS) (width 0.15)) (fp_line (start 1.29916 -0.65024) (end 1.49982 -0.65024) (layer F.SilkS) (width 0.15)) (fp_line (start 1.49982 -0.65024) (end 1.49982 0.0508) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 1.50114) (size 0.8001 1.80086) (layers F.Cu F.Paste F.Mask) (net 56 /ExpansionPort/GPIO1)) (pad 2 smd rect (at 0.95 1.50114) (size 0.8001 1.80086) (layers F.Cu F.Paste F.Mask) (net 85 GND)) (pad 3 smd rect (at 0 -1.50114) (size 0.8001 1.80086) (layers F.Cu F.Paste F.Mask) (net 83 "Net-(P3-Pad1)")) (model TO_SOT_Packages_SMD.3dshapes/SOT-23_Handsoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Resistors_SMD:R_0603_HandSoldering (layer B.Cu) (tedit 5418A00F) (tstamp 569560CA) (at 152.78 97.39 270) (descr "Resistor SMD 0603, hand soldering") (tags "resistor 0603") (path /56956C0E) (attr smd) (fp_text reference R1 (at -1.19 1.88 270) (layer B.SilkS) (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_text value 10k (at 0 -1.9 270) (layer B.Fab) (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_line (start -2 0.8) (end 2 0.8) (layer B.CrtYd) (width 0.05)) (fp_line (start -2 -0.8) (end 2 -0.8) (layer B.CrtYd) (width 0.05)) (fp_line (start -2 0.8) (end -2 -0.8) (layer B.CrtYd) (width 0.05)) (fp_line (start 2 0.8) (end 2 -0.8) (layer B.CrtYd) (width 0.05)) (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at 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-0.993028) (xy -1.689499 -0.99895) (xy -1.662261 -1.003593) (xy -1.636814 -1.007112) (xy -1.611744 -1.009665) (xy -1.585636 -1.011408) (xy -1.557075 -1.012499) (xy -1.540933 -1.012857) (xy -1.508864 -1.013147) (xy -1.480436 -1.012729)) (layer F.Mask) (width 0.01)) ) (module hirose-df40:DF40-3-4mm-80pin-Receptacle (layer F.Cu) (tedit 56B41E39) (tstamp 56BAE9AB) (at 159.65 108) (path /564009DE/5640139F) (fp_text reference PORT_OUT1 (at 0.42 -11.75) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value CKD_SANDWICH (at 3.87 -0.52 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -0.49 7.875) (end 0.49 7.875) (layer F.Fab) (width 0.15)) (fp_line (start -1.47 9.2) (end 1.47 9.2) (layer F.Fab) (width 0.15)) (fp_line (start -1.47 -9.4) (end 1.47 -9.4) (layer F.Fab) (width 0.15)) (fp_line (start -0.49 -7.825) (end 0.49 -7.825) (layer F.Fab) (width 0.15)) (pad 41 smd rect (at 1.54 -7.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 21 /ExpansionPort/TIMG1_CH1)) (pad 42 smd rect (at 1.54 -7.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 52 /ExpansionPort/TIMG1_CH2)) (pad 43 smd rect (at 1.54 -7) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 51 /ExpansionPort/TIMG1_CH3)) (pad 44 smd rect (at 1.54 -6.6) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 50 /ExpansionPort/TIMG1_CH4)) (pad 45 smd rect (at 1.54 -6.2) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 49 /ExpansionPort/TIMG2_CH1)) (pad 46 smd rect (at 1.54 -5.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 48 /ExpansionPort/TIMG2_CH2)) (pad 47 smd rect (at 1.54 -5.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 47 /ExpansionPort/TIMG2_CH3)) (pad 48 smd rect (at 1.54 -5) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 46 /ExpansionPort/TIMG2_CH4)) (pad 49 smd rect (at 1.54 -4.6) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 45 /ExpansionPort/ADC1)) (pad 50 smd rect (at 1.54 -4.2) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 44 /ExpansionPort/ADC2)) (pad 60 smd rect (at 1.54 -0.2) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 85 GND)) (pad 59 smd rect (at 1.54 -0.6) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 85 GND)) (pad 58 smd rect (at 1.54 -1) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 85 GND)) (pad 57 smd rect (at 1.54 -1.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 85 GND)) (pad 56 smd rect (at 1.54 -1.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 38 /ExpansionPort/SDMMC1_CMD)) (pad 55 smd rect (at 1.54 -2.2) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 39 /ExpansionPort/SDMMC1_CK)) (pad 54 smd rect (at 1.54 -2.6) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 40 /ExpansionPort/SDMMC1_D3)) (pad 53 smd rect (at 1.54 -3) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 41 /ExpansionPort/SDMMC1_D2)) (pad 52 smd rect (at 1.54 -3.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 42 /ExpansionPort/SDMMC1_D1)) (pad 51 smd rect (at 1.54 -3.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 43 /ExpansionPort/SDMMC1_D0)) (pad 61 smd rect (at 1.54 0.2) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 85 GND)) (pad 62 smd rect (at 1.54 0.6) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 85 GND)) (pad 63 smd rect (at 1.54 1) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 85 GND)) (pad 64 smd rect (at 1.54 1.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 85 GND)) (pad 65 smd rect (at 1.54 1.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 37 /ExpansionPort/BOOT)) (pad 66 smd rect (at 1.54 2.2) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 36 /ExpansionPort/RESET)) (pad 67 smd rect (at 1.54 2.6) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 35 /ExpansionPort/CAN_HI)) (pad 68 smd rect (at 1.54 3) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 34 /ExpansionPort/CAN_LO)) (pad 69 smd rect (at 1.54 3.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 33 /ExpansionPort/SPI3_NSS)) (pad 70 smd rect (at 1.54 3.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 32 /ExpansionPort/SPI3_SCK)) (pad 80 smd rect (at 1.54 7.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 19 /ExpansionPort/SPI1_MOSI)) (pad 79 smd rect (at 1.54 7.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 23 /ExpansionPort/SPI1_MISO)) (pad 78 smd rect (at 1.54 7) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 24 /ExpansionPort/SPI1_SCK)) (pad 77 smd rect (at 1.54 6.6) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 25 /ExpansionPort/SPI1_NSS)) (pad 76 smd rect (at 1.54 6.2) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 26 /ExpansionPort/SPI2_MOSI)) (pad 75 smd rect (at 1.54 5.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 27 /ExpansionPort/SPI2_MISO)) (pad 74 smd rect (at 1.54 5.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 28 /ExpansionPort/SPI2_SCK)) (pad 73 smd rect (at 1.54 5) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 29 /ExpansionPort/SPI2_NSS)) (pad 72 smd rect (at 1.54 4.6) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 30 /ExpansionPort/SPI3_MOSI)) (pad 71 smd rect (at 1.54 4.2) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 31 /ExpansionPort/SPI3_MISO)) (pad 31 smd rect (at -1.54 4.2) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 65 /ExpansionPort/UART7_TX)) (pad 32 smd rect (at -1.54 4.6) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 66 /ExpansionPort/UART7_RX)) (pad 33 smd rect (at -1.54 5) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 67 /ExpansionPort/UART6_TX)) (pad 34 smd rect (at -1.54 5.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 68 /ExpansionPort/UART6_RX)) (pad 35 smd rect (at -1.54 5.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 69 /ExpansionPort/UART5_TX)) (pad 36 smd rect (at -1.54 6.2) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 70 /ExpansionPort/UART5_RX)) (pad 37 smd rect (at -1.54 6.6) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 71 /ExpansionPort/UART4_TX)) (pad 38 smd rect (at -1.54 7) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 72 /ExpansionPort/UART4_RX)) (pad 39 smd rect (at -1.54 7.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 73 /ExpansionPort/UART3_TX)) (pad 40 smd rect (at -1.54 7.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 74 /ExpansionPort/UART3_RX)) (pad 30 smd rect (at -1.54 3.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 64 /ExpansionPort/UART8_RX)) (pad 29 smd rect (at -1.54 3.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 63 /ExpansionPort/UART8_TX)) (pad 28 smd rect (at -1.54 3) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 78 "Net-(PORT_OUT1-Pad28)")) (pad 27 smd rect (at -1.54 2.6) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 79 "Net-(PORT_OUT1-Pad27)")) (pad 26 smd rect (at -1.54 2.2) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 80 "Net-(PORT_OUT1-Pad26)")) (pad 25 smd rect (at -1.54 1.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 81 "Net-(PORT_OUT1-Pad25)")) (pad 24 smd rect (at -1.54 1.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 8 +5V)) (pad 23 smd rect (at -1.54 1) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 8 +5V)) (pad 22 smd rect (at -1.54 0.6) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 8 +5V)) (pad 21 smd rect (at -1.54 0.2) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 8 +5V)) (pad 11 smd rect (at -1.54 -3.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 17 /ExpansionPort/i2c_SDA)) (pad 12 smd rect (at -1.54 -3.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 18 /ExpansionPort/i2c_SCL)) (pad 13 smd rect (at -1.54 -3) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 3 /ExpansionPort/NEW_HEIGHT_4)) (pad 14 smd rect (at -1.54 -2.6) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 7 /ExpansionPort/NEW_HEIGHT_2)) (pad 15 smd rect (at -1.54 -2.2) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 6 /ExpansionPort/NEW_HEIGHT_1)) (pad 16 smd rect (at -1.54 -1.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 16 +3V3)) (pad 17 smd rect (at -1.54 -1.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 62 /ExpansionPort/3V3_0.3A_E)) (pad 18 smd rect (at -1.54 -1) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 11 /ExpansionPort/BATT_DIV)) (pad 19 smd rect (at -1.54 -0.6) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 8 +5V)) (pad 20 smd rect (at -1.54 -0.2) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 8 +5V)) (pad 10 smd rect (at -1.54 -4.2) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 84 "Net-(PORT_OUT1-Pad10)")) (pad 9 smd rect (at -1.54 -4.6) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 61 /ExpansionPort/GPIO6)) (pad 8 smd rect (at -1.54 -5) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 60 /ExpansionPort/GPIO5)) (pad 7 smd rect (at -1.54 -5.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 59 /ExpansionPort/GPIO4)) (pad 6 smd rect (at -1.54 -5.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 58 /ExpansionPort/GPIO3)) (pad 5 smd rect (at -1.54 -6.2) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 57 /ExpansionPort/GPIO2)) (pad 4 smd rect (at -1.54 -6.6) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 55 /ExpansionPort/TIM4)) (pad 3 smd rect (at -1.54 -7) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 54 /ExpansionPort/TIM3)) (pad 2 smd rect (at -1.54 -7.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 53 /ExpansionPort/TIM2)) (pad 1 smd rect (at -1.54 -7.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (net 22 /ExpansionPort/TIM1)) ) (module Measurement_Points:Measurement_Point_Round-SMD-Pad_Small (layer F.Cu) (tedit 570C1B67) (tstamp 56BCA793) (at 153.6 117.1) (descr "Mesurement Point, Round, SMD Pad, DM 1.5mm,") (tags "Mesurement Point, Round, SMD Pad, DM 1.5mm,") (path /56B43080) (fp_text reference P5 (at 0 -2.54) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value CONN_01X01 (at 1.27 2.54) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd circle (at 0 0) (size 1.524 1.524) (layers F.Cu F.Paste F.Mask) (net 15 /nRC_RX) (solder_paste_margin -2147.483648)) ) (module Measurement_Points:Measurement_Point_Round-SMD-Pad_Small (layer F.Cu) (tedit 570C1B70) (tstamp 56BCA79D) (at 155.6 119.4) (descr "Mesurement Point, Round, SMD Pad, DM 1.5mm,") (tags "Mesurement Point, Round, SMD Pad, DM 1.5mm,") (path /56B4316C) (fp_text reference P7 (at 0 -2.54) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value CONN_01X01 (at 1.27 2.54) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd circle (at 0 0) (size 1.524 1.524) (layers F.Cu F.Paste F.Mask) (net 20 /ExpansionPort/UART1_RX) (solder_paste_margin -2147.483648)) ) (module Measurement_Points:Measurement_Point_Round-SMD-Pad_Small (layer F.Cu) (tedit 570C1B7A) (tstamp 56BCA7A2) (at 161.4 119.6) (descr "Mesurement Point, Round, SMD Pad, DM 1.5mm,") (tags "Mesurement Point, Round, SMD Pad, DM 1.5mm,") (path /56B43388) (fp_text reference P8 (at 0 -2.54) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value CONN_01X01 (at 1.27 2.54) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd circle (at 0 0) (size 1.524 1.524) (layers F.Cu F.Paste F.Mask) (net 76 /ExpansionPort/UART2_RX) (solder_paste_margin -2147.483648)) ) (module Measurement_Points:Measurement_Point_Round-SMD-Pad_Small (layer B.Cu) (tedit 570C1BD9) (tstamp 56BCA7A7) (at 153.9 121.8) (descr "Mesurement Point, Round, SMD Pad, DM 1.5mm,") (tags "Mesurement Point, Round, SMD Pad, DM 1.5mm,") (path /56B431E7) (fp_text reference P9 (at 0 2.54) (layer B.SilkS) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_text value CONN_01X01 (at 1.27 -2.54) (layer B.Fab) hide (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (pad 1 smd circle (at 0 0) (size 1.524 1.524) (layers B.Cu B.Paste B.Mask) (net 75 /ExpansionPort/UART2_TX) (solder_paste_margin -2147.483648)) ) (module Measurement_Points:Measurement_Point_Round-SMD-Pad_Small (layer F.Cu) (tedit 570C1B4F) (tstamp 56BCA7AC) (at 135.7 91.1) (descr "Mesurement Point, Round, SMD Pad, DM 1.5mm,") (tags "Mesurement Point, Round, SMD Pad, DM 1.5mm,") (path /56B437E4) (fp_text reference P10 (at 0 -2.54) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value CONN_01X01 (at 1.27 2.54) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd circle (at 0 0) (size 1.524 1.524) (layers F.Cu F.Paste F.Mask) (net 56 /ExpansionPort/GPIO1) (solder_paste_margin -2147.483648)) ) (module macrofab:Fiducial (layer F.Cu) (tedit 56DF2DD2) (tstamp 56DF30CF) (at 131.44 120.7) (fp_text reference F1 (at 1.96 0.02) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 1mm (at 0 -0.5) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad "" smd circle (at 0 0) (size 1 1) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.5) (solder_paste_margin_ratio -0.5) (clearance 0.5)) ) (module oshw:oshw-2mm (layer B.Cu) (tedit 0) (tstamp 56DF312D) (at 152.02 91.26 180) (fp_text reference G*** (at 0 0 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-0.948077) (xy -0.291144 -0.949599) (xy -0.289774 -0.951573) (xy -0.288414 -0.954214) (xy -0.287015 -0.957738) (xy -0.285527 -0.962362) (xy -0.283901 -0.968302) (xy -0.282086 -0.975775) (xy -0.280033 -0.984997) (xy -0.277691 -0.996183) (xy -0.275012 -1.009551) (xy -0.271946 -1.025316) (xy -0.268442 -1.043695) (xy -0.26445 -1.064904) (xy -0.259922 -1.089159) (xy -0.254807 -1.116677) (xy -0.249055 -1.147674) (xy -0.24815 -1.152554) (xy -0.243186 -1.179252) (xy -0.238384 -1.204969) (xy -0.233792 -1.229449) (xy -0.22946 -1.252439) (xy -0.225435 -1.273686) (xy -0.221767 -1.292935) (xy -0.218503 -1.309934) (xy -0.215692 -1.324428) (xy -0.213382 -1.336163) (xy -0.211622 -1.344886) (xy -0.210461 -1.350344) (xy -0.209989 -1.352206) (xy -0.206861 -1.356989) (xy -0.202225 -1.361078) (xy -0.202024 -1.361203) (xy -0.200969 -1.361776) (xy -0.199646 -1.362284) (xy -0.197834 -1.362731) (xy -0.195312 -1.363121) (xy -0.191859 -1.363458) (xy -0.187252 -1.363745) (xy -0.181271 -1.363987) (xy -0.173694 -1.364187) (xy -0.1643 -1.364349) (xy -0.152868 -1.364478) (xy -0.139175 -1.364577) (xy -0.123001 -1.36465) (xy -0.104124 -1.364701) (xy -0.082323 -1.364734) (xy -0.057376 -1.364752) (xy -0.029063 -1.364761) (xy 0 -1.364762) (xy 0.031591 -1.36476)) (layer F.Cu) (width 0.01)) ) (module ti-gate:QFN-14-3.5x3.5mm (layer F.Cu) (tedit 570C1EBD) (tstamp 56BAE9FE) (at 157.7 121.7 180) (path /56B40D73) (fp_text reference U1 (at 0 3.25 180) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 74LS86 (at 0.75 -4 180) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_circle (center -1.75 -2) (end -1.5 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd oval (at -0.75 -1.795 180) (size 0.28 0.99) (layers F.Cu F.Paste F.Mask) (net 16 +3V3) (solder_mask_margin 0.11) (solder_paste_margin -0.05)) (pad 2 smd oval (at -1.795 -1 180) (size 0.99 0.28) (layers F.Cu F.Paste F.Mask) (net 10 /S.Port) (solder_mask_margin 0.11) (solder_paste_margin -0.05)) (pad 3 smd oval (at -1.795 -0.5 180) (size 0.99 0.28) (layers F.Cu F.Paste F.Mask) (net 76 /ExpansionPort/UART2_RX) (solder_mask_margin 0.11) (solder_paste_margin -0.05)) (pad 4 smd oval (at -1.795 0 180) (size 0.99 0.28) (layers F.Cu F.Paste F.Mask) (net 85 GND) (solder_mask_margin 0.11) (solder_paste_margin -0.05)) (pad 5 smd oval (at -1.795 0.5 180) (size 0.99 0.28) (layers F.Cu F.Paste F.Mask) (net 85 GND) (solder_mask_margin 0.11) (solder_paste_margin -0.05)) (pad 6 smd oval (at -1.795 1 180) (size 0.99 0.28) (layers F.Cu F.Paste F.Mask) (net 86 "Net-(U1-Pad6)") (solder_mask_margin 0.11) (solder_paste_margin -0.05)) (pad 7 smd oval (at -0.75 1.795 180) (size 0.28 0.99) (layers F.Cu F.Paste F.Mask) (net 85 GND) (solder_mask_margin 0.11) (solder_paste_margin -0.05)) (pad 8 smd oval (at 0.75 1.795 180) (size 0.28 0.99) (layers F.Cu F.Paste F.Mask) (net 20 /ExpansionPort/UART1_RX) (solder_mask_margin 0.11) (solder_paste_margin -0.05)) (pad 9 smd oval (at 1.795 1 180) (size 0.99 0.28) (layers F.Cu F.Paste F.Mask) (net 15 /nRC_RX) (solder_mask_margin 0.11) (solder_paste_margin -0.05)) (pad 10 smd oval (at 1.795 0.5 180) (size 0.99 0.28) (layers F.Cu F.Paste F.Mask) (net 16 +3V3) (solder_mask_margin 0.11) (solder_paste_margin -0.05)) (pad 11 smd oval (at 1.795 0 180) (size 0.99 0.28) (layers F.Cu F.Paste F.Mask) (net 9 "Net-(D1-Pad2)") (solder_mask_margin 0.11) (solder_paste_margin -0.05)) (pad 12 smd oval (at 1.795 -0.5 180) (size 0.99 0.28) (layers F.Cu F.Paste F.Mask) (net 75 /ExpansionPort/UART2_TX) (solder_mask_margin 0.11) (solder_paste_margin -0.05)) (pad 13 smd oval (at 1.795 -1 180) (size 0.99 0.28) (layers F.Cu F.Paste F.Mask) (net 16 +3V3) (solder_mask_margin 0.11) (solder_paste_margin -0.05)) (pad 14 smd oval (at 0.75 -1.795 180) (size 0.28 0.99) (layers F.Cu F.Paste F.Mask) (net 16 +3V3) (solder_mask_margin 0.11) (solder_paste_margin -0.05)) (pad 7 smd rect (at -0.5 -0.5 180) (size 1.025 1.025) (layers F.Cu F.Paste F.Mask) (net 85 GND) (solder_paste_margin -0.15)) (pad 7 smd rect (at 0.5 -0.5 180) (size 1.025 1.025) (layers F.Cu F.Paste F.Mask) (net 85 GND) (solder_paste_margin -0.15)) (pad 7 smd rect (at 0.5 0.5 180) (size 1.025 1.025) (layers F.Cu F.Paste F.Mask) (net 85 GND) (solder_paste_margin -0.15)) (pad 7 smd rect (at -0.5 0.5 180) (size 1.025 1.025) (layers F.Cu F.Paste F.Mask) (net 85 GND) (solder_paste_margin -0.15)) ) (module polystack:polystack-bold-0.4 (layer F.Cu) (tedit 570D78B5) (tstamp 5710F73F) (at 164.8 107.9 90) (descr "Imported from ../chickadee-projects/shared/kicad/libraries/public/footprints/polystack.pretty/polystack.svg") (tags svg2mod) (attr smd) (fp_text reference svg2mod (at 0 -3.847922 90) (layer F.SilkS) hide (effects (font (thickness 0.3048))) ) (fp_text value G*** (at 0 3.847922 90) (layer F.SilkS) hide (effects (font (thickness 0.3048))) ) (fp_poly (pts (xy -3.839545 0.778753) (xy -3.610209 0.285721) (xy -3.598064 0.287266) (xy -3.586152 0.288664) (xy -3.574472 0.289915) (xy -3.563025 0.291019) (xy -3.551811 0.291976) (xy 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Remove it if your design\ndoes not comply with the open source\nhardware definition.\n" (at 178.37 116.02) (layer Cmts.User) (effects (font (size 1.5 1.5) (thickness 0.3)) (justify left)) ) (gr_line (start 108.84 107.79) (end 135.81 119.99) (layer Cmts.User) (width 0.2)) (gr_line (start 109.14 107.99) (end 160.41 107.49) (layer Cmts.User) (width 0.2)) (gr_line (start 109.04 107.79) (end 144.86 93.32) (layer Cmts.User) (width 0.2)) (gr_circle (center 164.74 107.99) (end 166.51 111.82) (layer Cmts.User) (width 0.2)) (gr_circle (center 147.71 91.06) (end 150.47 92.63) (layer Cmts.User) (width 0.2)) (gr_circle (center 138.37 122.45) (end 141.02 124.32) (layer Cmts.User) (width 0.2)) (gr_text "Remove all Chickadee Tech LLC trademarks\nbefore making your own board. The\nChickadee logo and Polystack logo\nare owned by Chickadee Tech LLC.\n\nYou may license the Polystack logo for\nfree by emailing support@chickadee.tech\nand receiving express written permission\nfrom Chickadee Tech LLC." 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