---
title: "Coroutine Co-simulation Test Bench (cocotb)"
description: "A coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python"
authors: []
links:
  gh: cocotb/cocotb
  docs: https://docs.cocotb.org
  web: https://www.cocotb.org/
tags: [
  "verification",
  "vhdl",
  "verilog",
  "systemverilog",
]
categories: [
  "Frameworks"
]
talk: 107
---

*"cocotb is a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python."*

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- Licence: [Revised BSD License](https://github.com/cocotb/cocotb/blob/master/LICENSE)
- Implemented in: Python, C++
- Write testbenches in: Python