Percent | Source code & Disassembly of vmlinux for cycles:ppp (166623 samples) ------------------------------------------------------------------------------------ : : : : Disassembly of section .text: : : ffff8000107a33c8 : : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a33c8: hint #0x19 0.00 : ffff8000107a33cc: stp x29, x30, [sp,#-496]! 0.00 : ffff8000107a33d0: mov x29, sp 0.00 : ffff8000107a33d4: add x5, x29, #0xcf 0.01 : ffff8000107a33d8: stp x25, x26, [sp,#64] 0.00 : ffff8000107a33dc: and x26, x5, #0xffffffffffffffc0 0.02 : ffff8000107a33e0: stp x23, x24, [sp,#48] 0.01 : ffff8000107a33e4: stp x27, x28, [sp,#80] 0.00 : ffff8000107a33e8: add x23, x26, #0x80 0.00 : ffff8000107a33ec: add x27, x0, #0x40 0.00 : ffff8000107a33f0: stp x19, x20, [sp,#16] 0.01 : ffff8000107a33f4: stp x21, x22, [sp,#32] 0.00 : ffff8000107a33f8: mov x28, x0 0.01 : ffff8000107a33fc: stp xzr, xzr, [x23,#16] 0.00 : ffff8000107a3400: adrp x0, ffff800011a79000 0.01 : ffff8000107a3404: stp xzr, xzr, [x23,#32] 0.00 : ffff8000107a3408: add x0, x0, #0x948 0.01 : ffff8000107a340c: stp xzr, xzr, [x23,#48] 0.01 : ffff8000107a3410: stp xzr, xzr, [x23,#64] 0.01 : ffff8000107a3414: ldr w19, [x27,#64] 0.00 : ffff8000107a3418: str x1, [x29,#96] 0.00 : ffff8000107a341c: and w1, w3, #0xff 0.01 : ffff8000107a3420: str w19, [x26,#192] 0.01 : ffff8000107a3424: str w1, [x29,#108] 0.01 : ffff8000107a3428: ldr x1, [x0] 0.00 : ffff8000107a342c: str x1, [x29,#488] 0.00 : ffff8000107a3430: mov x1, #0x0 // #0 0.00 : ffff8000107a3434: str w2, [x29,#104] 0.00 : ffff8000107a3438: mov x1, x23 0.01 : ffff8000107a343c: stp xzr, xzr, [x26,#128] 0.00 : ffff8000107a3440: mov x2, #0x80 // #128 0.00 : ffff8000107a3444: stp xzr, xzr, [x23,#80] 0.00 : ffff8000107a3448: mov x0, x26 0.01 : ffff8000107a344c: stp xzr, xzr, [x23,#96] 0.01 : ffff8000107a3450: stp xzr, xzr, [x23,#112] 0.00 : ffff8000107a3454: bl ffff8000104e0c00 <__memcpy> : arch_local_save_flags(): 0.00 : ffff8000107a3458: mrs x8, daif 0.00 : ffff8000107a345c: mov x21, x8 : arch_irqs_disabled_flags(): 0.00 : ffff8000107a3460: and w0, w8, #0x80 : arch_local_irq_save(): 0.00 : ffff8000107a3464: cbnz w0, ffff8000107a3470 : arch_local_irq_disable(): 0.00 : ffff8000107a3468: mov x0, #0x60 // #96 0.03 : ffff8000107a346c: msr daifset, #0x2 : __read_once_size(): 0.15 : ffff8000107a3470: ldr x0, [x28,#64] : queue_has_space(): 0.00 : ffff8000107a3474: mov w1, #0x1 // #1 1.36 : ffff8000107a3478: ldr w2, [x29,#104] 0.00 : ffff8000107a347c: lsl w19, w1, w19 : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a3480: str x0, [x26,#128] 0.00 : ffff8000107a3484: adrp x1, ffff800010fe7000 0.00 : ffff8000107a3488: ldr w0, [x29,#108] : queue_has_space(): 0.00 : ffff8000107a348c: sub w22, w19, #0x1 : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a3490: add x1, x1, #0xcb0 : queue_inc_prod_n(): 0.00 : ffff8000107a3494: orr w20, w22, w19 : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a3498: add x24, x1, #0x20 0.00 : ffff8000107a349c: add w25, w0, w2 0.07 : ffff8000107a34a0: ldp w1, w4, [x26,#128] : queue_has_space(): 0.05 : ffff8000107a34a4: and w0, w4, w22 0.00 : ffff8000107a34a8: and w3, w1, w22 0.00 : ffff8000107a34ac: add w2, w0, w19 0.05 : ffff8000107a34b0: eor w9, w4, w1 0.00 : ffff8000107a34b4: tst w9, w19 0.00 : ffff8000107a34b8: sub w2, w2, w3 0.00 : ffff8000107a34bc: sub w0, w0, w3 0.00 : ffff8000107a34c0: csel w0, w0, w2, ne : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a34c4: cmp w0, w25 0.00 : ffff8000107a34c8: b.cc ffff8000107a364c : queue_inc_prod_n(): 0.00 : ffff8000107a34cc: and w3, w1, w20 0.01 : ffff8000107a34d0: and w0, w1, #0x80000000 0.00 : ffff8000107a34d4: add w3, w3, w25 : arm_smmu_cmdq_issue_cmdlist(): 0.10 : ffff8000107a34d8: ldr x1, [x23] : queue_inc_prod_n(): 0.00 : ffff8000107a34dc: and w3, w3, w20 0.00 : ffff8000107a34e0: orr w3, w3, w0 : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a34e4: orr w0, w3, #0x80000000 0.00 : ffff8000107a34e8: stp w0, w4, [x26] 0.00 : ffff8000107a34ec: ldr x2, [x26] : arch_static_branch_jump(): 0.00 : ffff8000107a34f0: b ffff8000107a351c 0.16 : ffff8000107a34f4: b ffff8000107a351c : __lse__cmpxchg_case_64(): 0.00 : ffff8000107a34f8: mov x0, x27 0.00 : ffff8000107a34fc: mov x4, x1 0.00 : ffff8000107a3500: cas x4, x2, [x27] 26.52 : ffff8000107a3504: mov x0, x4 : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a3508: ldr x1, [x23] 0.00 : ffff8000107a350c: cmp x1, x0 0.00 : ffff8000107a3510: b.eq ffff8000107a352c 0.02 : ffff8000107a3514: str x0, [x23] 0.00 : ffff8000107a3518: b ffff8000107a34a0 : __ll_sc__cmpxchg_case_64(): 0.00 : ffff8000107a351c: b ffff8000107a66fc : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a3520: ldr x1, [x23] 0.00 : ffff8000107a3524: cmp x1, x0 0.00 : ffff8000107a3528: b.ne ffff8000107a3514 0.03 : ffff8000107a352c: ldr w25, [x23] 0.00 : ffff8000107a3530: and w0, w3, #0x7fffffff 0.09 : ffff8000107a3534: str w0, [x26] 0.00 : ffff8000107a3538: and w12, w25, #0x7fffffff : arm_smmu_cmdq_write_entries(): 0.00 : ffff8000107a353c: ldr w0, [x29,#104] : arm_smmu_cmdq_issue_cmdlist(): 0.01 : ffff8000107a3540: str w12, [x23] : arm_smmu_cmdq_write_entries(): 0.00 : ffff8000107a3544: ldr w2, [x27,#64] 0.00 : ffff8000107a3548: cmp w0, #0x0 0.00 : ffff8000107a354c: b.le ffff8000107a35bc : queue_inc_prod_n(): 0.00 : ffff8000107a3550: mov w13, #0x1 // #1 0.00 : ffff8000107a3554: sub w10, w0, #0x1 0.00 : ffff8000107a3558: lsl w0, w13, w2 0.00 : ffff8000107a355c: sub w11, w0, #0x1 0.00 : ffff8000107a3560: orr w11, w11, w0 0.00 : ffff8000107a3564: ldr x24, [x29,#96] 0.00 : ffff8000107a3568: and w1, w12, w11 0.00 : ffff8000107a356c: add w10, w10, w1 0.00 : ffff8000107a3570: b ffff8000107a357c 0.00 : ffff8000107a3574: ldr w2, [x27,#64] 0.00 : ffff8000107a3578: add w1, w1, #0x1 : arm_smmu_cmdq_write_entries(): 0.01 : ffff8000107a357c: ldr x3, [x27,#160] 0.00 : ffff8000107a3580: lsl w0, w13, w2 0.00 : ffff8000107a3584: sub w0, w0, #0x1 0.01 : ffff8000107a3588: ldr x4, [x27,#136] 0.00 : ffff8000107a358c: and w0, w0, w11 : queue_write(): 0.01 : ffff8000107a3590: ldr x9, [x24] : arm_smmu_cmdq_write_entries(): 0.00 : ffff8000107a3594: lsl x2, x3, #3 0.00 : ffff8000107a3598: and w0, w0, w1 0.00 : ffff8000107a359c: add x24, x24, #0x10 0.02 : ffff8000107a35a0: cmp w1, w10 0.00 : ffff8000107a35a4: mul x0, x0, x2 0.00 : ffff8000107a35a8: add x2, x4, x0 : queue_write(): 0.00 : ffff8000107a35ac: str x9, [x4,x0] 0.06 : ffff8000107a35b0: ldur x0, [x24,#-8] 0.00 : ffff8000107a35b4: str x0, [x2,#8] : arm_smmu_cmdq_write_entries(): 0.00 : ffff8000107a35b8: b.ne ffff8000107a3574 : arm_smmu_cmdq_issue_cmdlist(): 0.02 : ffff8000107a35bc: ldr w0, [x29,#108] 0.00 : ffff8000107a35c0: cbnz w0, ffff8000107a3958 0.00 : ffff8000107a35c4: dmb oshst : arm_smmu_cmdq_set_valid_map(): 0.14 : ffff8000107a35c8: ldr w3, [x26] 0.00 : ffff8000107a35cc: add x5, x28, #0x100 0.00 : ffff8000107a35d0: ldr w0, [x28,#128] 0.00 : ffff8000107a35d4: mov w4, #0x1 // #1 : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a35d8: ldr w24, [x26,#128] : arm_smmu_cmdq_set_valid_map(): 0.00 : ffff8000107a35dc: mov x1, x5 0.00 : ffff8000107a35e0: str x5, [x29,#96] 0.00 : ffff8000107a35e4: mov w2, w24 0.00 : ffff8000107a35e8: bl ffff8000107a31a8 <__arm_smmu_cmdq_poll_set_valid_map.isra.41> : arm_smmu_cmdq_issue_cmdlist(): 0.01 : ffff8000107a35ec: tbnz w25, #31, ffff8000107a37b0 : __read_once_size(): 0.00 : ffff8000107a35f0: ldr w0, [x28,#264] : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a35f4: add x1, x28, #0x108 0.00 : ffff8000107a35f8: ldr x5, [x29,#96] 0.00 : ffff8000107a35fc: cmp w24, w0 0.00 : ffff8000107a3600: b.eq ffff8000107a3634 0.00 : ffff8000107a3604: nop 0.00 : ffff8000107a3608: sxtw x0, w0 : __cmpwait_case_32(): 0.00 : ffff8000107a360c: sevl 0.00 : ffff8000107a3610: wfe 0.05 : ffff8000107a3614: ldxr w2, [x1] 0.00 : ffff8000107a3618: eor w2, w2, w0 0.00 : ffff8000107a361c: cbnz w2, ffff8000107a3624 0.03 : ffff8000107a3620: wfe : __read_once_size(): 0.26 : ffff8000107a3624: ldr w0, [x28,#264] : arm_smmu_cmdq_issue_cmdlist(): 0.84 : ffff8000107a3628: ldr w2, [x23] 0.00 : ffff8000107a362c: cmp w2, w0 0.00 : ffff8000107a3630: b.ne ffff8000107a3608 : arch_static_branch_jump(): 0.00 : ffff8000107a3634: b ffff8000107a3778 0.00 : ffff8000107a3638: b ffff8000107a3778 : __lse_atomic_fetch_andnot_relaxed(): 0.00 : ffff8000107a363c: mov w24, #0x80000000 // #-2147483648 0.00 : ffff8000107a3640: add x0, x28, #0x40 0.00 : ffff8000107a3644: ldclr w24, w24, [x0] 3.86 : ffff8000107a3648: b ffff8000107a3784 : arch_local_irq_restore(): 0.00 : ffff8000107a364c: msr daif, x21 : arch_static_branch(): 0.00 : ffff8000107a3650: nop : arch_local_save_flags(): 0.00 : ffff8000107a3654: mrs x4, daif : arch_irqs_disabled_flags(): 0.00 : ffff8000107a3658: and w0, w4, #0x80 : arch_local_irq_save(): 0.00 : ffff8000107a365c: cbnz w0, ffff8000107a3668 : arch_local_irq_disable(): 0.00 : ffff8000107a3660: mov x0, #0x60 // #96 0.00 : ffff8000107a3664: msr daifset, #0x2 : atomic_cmpxchg_relaxed(): 0.00 : ffff8000107a3668: add x3, x28, #0x10c : arch_static_branch_jump(): 0.00 : ffff8000107a366c: b ffff8000107a36d4 0.00 : ffff8000107a3670: b ffff8000107a36d4 : __lse__cmpxchg_case_32(): 0.00 : ffff8000107a3674: mov w1, #0x0 // #0 0.00 : ffff8000107a3678: mov x0, x3 0.00 : ffff8000107a367c: mov w2, #0x80000000 // #-2147483648 0.00 : ffff8000107a3680: mov w5, w1 0.00 : ffff8000107a3684: cas w5, w2, [x3] 0.00 : ffff8000107a3688: mov w0, w5 : arm_smmu_cmdq_poll_until_not_full(): 0.00 : ffff8000107a368c: cbnz w0, ffff8000107a36e8 : __raw_readl(): 0.00 : ffff8000107a3690: ldr x1, [x27,#176] 0.00 : ffff8000107a3694: ldr w1, [x1] : __write_once_size(): 0.00 : ffff8000107a3698: str w1, [x28,#68] : atomic_set_release(): 0.00 : ffff8000107a369c: add x1, x28, #0x10c 0.00 : ffff8000107a36a0: stlr w0, [x1] : arch_local_irq_restore(): 0.00 : ffff8000107a36a4: msr daif, x4 : arch_static_branch(): 0.00 : ffff8000107a36a8: nop : __read_once_size(): 0.00 : ffff8000107a36ac: ldr x0, [x28,#64] : arm_smmu_cmdq_poll_until_not_full(): 0.00 : ffff8000107a36b0: str x0, [x23] 0.00 : ffff8000107a36b4: nop : arch_local_save_flags(): 0.00 : ffff8000107a36b8: mrs x8, daif 0.00 : ffff8000107a36bc: mov x21, x8 : arch_irqs_disabled_flags(): 0.00 : ffff8000107a36c0: and w0, w8, #0x80 : arch_local_irq_save(): 0.00 : ffff8000107a36c4: cbnz w0, ffff8000107a34a0 : arch_local_irq_disable(): 0.00 : ffff8000107a36c8: mov x0, #0x60 // #96 0.00 : ffff8000107a36cc: msr daifset, #0x2 0.00 : ffff8000107a36d0: b ffff8000107a34a0 : __ll_sc__cmpxchg_case_32(): 0.00 : ffff8000107a36d4: mov x1, #0x0 // #0 0.00 : ffff8000107a36d8: mov w2, #0x80000000 // #-2147483648 0.00 : ffff8000107a36dc: add x5, x28, #0x10c 0.00 : ffff8000107a36e0: b ffff8000107a6718 : arm_smmu_cmdq_poll_until_not_full(): 0.00 : ffff8000107a36e4: cbz w0, ffff8000107a3690 : arch_local_irq_restore(): 0.00 : ffff8000107a36e8: msr daif, x4 : arch_static_branch(): 0.00 : ffff8000107a36ec: nop : queue_poll_init(): 0.00 : ffff8000107a36f0: ldr w0, [x28,#16] 0.00 : ffff8000107a36f4: mov x1, #0x1 // #1 0.00 : ffff8000107a36f8: str x1, [x29,#120] 0.00 : ffff8000107a36fc: ubfx x0, x0, #6, #1 0.00 : ffff8000107a3700: strb w0, [x29,#128] 0.00 : ffff8000107a3704: bl ffff8000101784e0 : ktime_add_us(): 0.00 : ffff8000107a3708: mov x1, #0xca00 // #51712 0.00 : ffff8000107a370c: movk x1, #0x3b9a, lsl #16 0.00 : ffff8000107a3710: add x0, x0, x1 : queue_poll_init(): 0.00 : ffff8000107a3714: str x0, [x29,#112] : __read_once_size(): 0.00 : ffff8000107a3718: ldr x0, [x28,#64] : arm_smmu_cmdq_poll_until_not_full(): 0.00 : ffff8000107a371c: str x0, [x23] : queue_full(): 0.00 : ffff8000107a3720: lsr x1, x0, #32 0.00 : ffff8000107a3724: eor w0, w0, w1 0.00 : ffff8000107a3728: tst w22, w0 0.00 : ffff8000107a372c: b.ne ffff8000107a36b8 0.00 : ffff8000107a3730: tst w19, w0 0.00 : ffff8000107a3734: b.eq ffff8000107a36b8 : arm_smmu_cmdq_poll_until_not_full(): 0.00 : ffff8000107a3738: add x0, x29, #0x70 0.00 : ffff8000107a373c: bl ffff8000107a2f90 0.00 : ffff8000107a3740: cbz w0, ffff8000107a3718 : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a3744: adrp x0, ffff800011c13000 0.00 : ffff8000107a3748: add x0, x0, #0x9d0 0.00 : ffff8000107a374c: mov x1, x24 0.00 : ffff8000107a3750: add x0, x0, #0x138 0.00 : ffff8000107a3754: bl ffff8000104ee748 <___ratelimit> 0.00 : ffff8000107a3758: cbz w0, ffff8000107a36b8 0.00 : ffff8000107a375c: ldr x0, [x28] 0.00 : ffff8000107a3760: adrp x1, ffff8000113aa000 0.00 : ffff8000107a3764: add x1, x1, #0x978 0.00 : ffff8000107a3768: bl ffff8000107b4bb4 <_dev_err> 0.00 : ffff8000107a376c: b ffff8000107a36b8 : arch_local_irq_restore(): 0.00 : ffff8000107a3770: dsb sy 0.00 : ffff8000107a3774: b ffff8000107a3654 : __ll_sc_atomic_fetch_andnot_relaxed(): 0.00 : ffff8000107a3778: mov w0, #0x80000000 // #-2147483648 0.00 : ffff8000107a377c: add x3, x28, #0x40 0.00 : ffff8000107a3780: b ffff8000107a6734 : arm_smmu_cmdq_poll_valid_map(): 0.00 : ffff8000107a3784: ldr w0, [x28,#128] : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a3788: and w24, w24, #0x7fffffff : arm_smmu_cmdq_poll_valid_map(): 0.00 : ffff8000107a378c: ldr w2, [x26,#128] 0.00 : ffff8000107a3790: mov w4, #0x0 // #0 0.00 : ffff8000107a3794: mov w3, w24 0.00 : ffff8000107a3798: mov x1, x5 0.00 : ffff8000107a379c: bl ffff8000107a31a8 <__arm_smmu_cmdq_poll_set_valid_map.isra.41> : __raw_writel(): 0.00 : ffff8000107a37a0: ldr x0, [x27,#168] 0.00 : ffff8000107a37a4: str w24, [x0] : atomic_set_release(): 0.00 : ffff8000107a37a8: add x0, x28, #0x108 0.02 : ffff8000107a37ac: stlr w24, [x0] : arm_smmu_cmdq_issue_cmdlist(): 1.11 : ffff8000107a37b0: ldr w0, [x29,#108] 0.00 : ffff8000107a37b4: mov w24, #0x0 // #0 0.00 : ffff8000107a37b8: cbnz w0, ffff8000107a3818 : arch_local_irq_restore(): 0.00 : ffff8000107a37bc: msr daif, x21 : arch_static_branch(): 0.16 : ffff8000107a37c0: nop : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a37c4: adrp x0, ffff800011a79000 0.00 : ffff8000107a37c8: add x21, x0, #0x948 0.00 : ffff8000107a37cc: ldr x2, [x29,#488] 0.16 : ffff8000107a37d0: ldr x1, [x21] 0.00 : ffff8000107a37d4: eor x1, x2, x1 0.00 : ffff8000107a37d8: mov w0, w24 0.00 : ffff8000107a37dc: cbnz x1, ffff8000107a3b64 0.01 : ffff8000107a37e0: ldp x19, x20, [sp,#16] 0.00 : ffff8000107a37e4: ldp x21, x22, [sp,#32] 0.00 : ffff8000107a37e8: ldp x23, x24, [sp,#48] 0.00 : ffff8000107a37ec: ldp x25, x26, [sp,#64] 0.00 : ffff8000107a37f0: ldp x27, x28, [sp,#80] 0.00 : ffff8000107a37f4: ldp x29, x30, [sp],#496 0.00 : ffff8000107a37f8: hint #0x1d 0.00 : ffff8000107a37fc: ret : arch_local_irq_restore(): 0.00 : ffff8000107a3800: dsb sy 0.00 : ffff8000107a3804: b ffff8000107a36ac 0.00 : ffff8000107a3808: dsb sy 0.00 : ffff8000107a380c: b ffff8000107a36f0 0.02 : ffff8000107a3810: dsb sy : arm_smmu_cmdq_issue_cmdlist(): 0.79 : ffff8000107a3814: b ffff8000107a37c4 0.00 : ffff8000107a3818: ldr w2, [x26,#128] : queue_inc_prod_n(): 0.00 : ffff8000107a381c: ldr w3, [x29,#104] 0.00 : ffff8000107a3820: and w0, w2, w20 : arm_smmu_cmdq_poll_until_sync(): 0.08 : ffff8000107a3824: ldr w1, [x28,#16] : queue_inc_prod_n(): 0.00 : ffff8000107a3828: add w3, w0, w3 0.00 : ffff8000107a382c: and w2, w2, #0x80000000 0.00 : ffff8000107a3830: and w3, w3, w20 : arm_smmu_cmdq_poll_until_sync(): 4.07 : ffff8000107a3834: and w0, w1, #0x180 : queue_inc_prod_n(): 0.00 : ffff8000107a3838: orr w25, w3, w2 : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a383c: str w25, [x26,#128] 0.00 : ffff8000107a3840: ubfx x1, x1, #6, #1 : arm_smmu_cmdq_poll_until_sync(): 0.00 : ffff8000107a3844: cmp w0, #0x180 0.00 : ffff8000107a3848: b.eq ffff8000107a3a84 : queue_poll_init(): 0.00 : ffff8000107a384c: mov x0, #0x1 // #1 0.00 : ffff8000107a3850: str x0, [x29,#120] 0.00 : ffff8000107a3854: strb w1, [x29,#128] 0.00 : ffff8000107a3858: and w20, w22, w25 0.00 : ffff8000107a385c: bl ffff8000101784e0 : __read_once_size(): 0.00 : ffff8000107a3860: ldr x1, [x28,#64] : ktime_add_us(): 0.00 : ffff8000107a3864: mov x2, #0xca00 // #51712 : __arm_smmu_cmdq_poll_until_consumed(): 0.00 : ffff8000107a3868: str x1, [x26,#128] : ktime_add_us(): 0.00 : ffff8000107a386c: movk x2, #0x3b9a, lsl #16 0.00 : ffff8000107a3870: add x0, x0, x2 : queue_poll_init(): 0.00 : ffff8000107a3874: str x0, [x29,#112] 0.00 : ffff8000107a3878: lsr x1, x1, #32 0.00 : ffff8000107a387c: nop : queue_consumed(): 0.00 : ffff8000107a3880: eor w0, w25, w1 0.00 : ffff8000107a3884: and w1, w22, w1 0.00 : ffff8000107a3888: tst w0, w19 0.00 : ffff8000107a388c: b.eq ffff8000107a38cc 0.00 : ffff8000107a3890: cmp w20, w1 0.00 : ffff8000107a3894: b.cc ffff8000107a38d4 : __arm_smmu_cmdq_poll_until_consumed(): 0.00 : ffff8000107a3898: mov w24, #0x0 // #0 : __read_once_size(): 0.01 : ffff8000107a389c: ldr w1, [x28,#268] 0.08 : ffff8000107a38a0: add x0, x28, #0x10c : arm_smmu_cmdq_shared_tryunlock(): 0.00 : ffff8000107a38a4: cmp w1, #0x1 1.26 : ffff8000107a38a8: b.eq ffff8000107a3b1c : arch_static_branch_jump(): 2.08 : ffff8000107a38ac: b ffff8000107a3948 0.01 : ffff8000107a38b0: b ffff8000107a3948 : __lse_atomic_sub_return_release(): 0.00 : ffff8000107a38b4: mov w1, #0x1 // #1 0.00 : ffff8000107a38b8: add x3, x28, #0x10c 0.00 : ffff8000107a38bc: neg w1, w1 0.00 : ffff8000107a38c0: ldaddl w1, w2, [x3] 13.30 : ffff8000107a38c4: add w1, w1, w2 0.00 : ffff8000107a38c8: b ffff8000107a37bc : queue_consumed(): 0.00 : ffff8000107a38cc: cmp w20, w1 0.00 : ffff8000107a38d0: b.cc ffff8000107a3898 : __arm_smmu_cmdq_poll_until_consumed(): 0.00 : ffff8000107a38d4: add x0, x29, #0x70 0.00 : ffff8000107a38d8: bl ffff8000107a2f90 : __raw_readl(): 0.00 : ffff8000107a38dc: ldr x1, [x27,#176] : __arm_smmu_cmdq_poll_until_consumed(): 0.00 : ffff8000107a38e0: mov w24, w0 : __raw_readl(): 0.00 : ffff8000107a38e4: ldr w1, [x1] : __arm_smmu_cmdq_poll_until_consumed(): 0.00 : ffff8000107a38e8: dmb oshld 0.00 : ffff8000107a38ec: mov w0, w1 0.00 : ffff8000107a38f0: eor x0, x0, x0 0.00 : ffff8000107a38f4: cbnz x0, ffff8000107a38f4 0.00 : ffff8000107a38f8: str w1, [x23,#4] 0.00 : ffff8000107a38fc: cbz w24, ffff8000107a3880 : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a3900: adrp x1, ffff800010fe7000 0.00 : ffff8000107a3904: adrp x0, ffff800011c13000 0.00 : ffff8000107a3908: add x1, x1, #0xcb0 0.00 : ffff8000107a390c: add x0, x0, #0x9d0 0.00 : ffff8000107a3910: add x1, x1, #0x20 0.00 : ffff8000107a3914: add x0, x0, #0x110 0.00 : ffff8000107a3918: bl ffff8000104ee748 <___ratelimit> 0.00 : ffff8000107a391c: cbz w0, ffff8000107a389c : __raw_readl(): 0.00 : ffff8000107a3920: ldr x3, [x27,#168] 0.00 : ffff8000107a3924: ldr w3, [x3] 0.00 : ffff8000107a3928: ldr x4, [x27,#176] 0.00 : ffff8000107a392c: ldr w4, [x4] : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a3930: ldr w2, [x26,#128] 0.00 : ffff8000107a3934: adrp x1, ffff8000113aa000 0.00 : ffff8000107a3938: ldr x0, [x28] 0.00 : ffff8000107a393c: add x1, x1, #0x988 0.00 : ffff8000107a3940: bl ffff8000107b4bb4 <_dev_err> 0.00 : ffff8000107a3944: b ffff8000107a389c : __ll_sc_atomic_sub_return_release(): 0.00 : ffff8000107a3948: mov w0, #0x1 // #1 0.00 : ffff8000107a394c: add x3, x28, #0x10c 0.00 : ffff8000107a3950: b ffff8000107a674c 0.00 : ffff8000107a3954: b ffff8000107a37bc : arm_smmu_cmdq_build_sync_cmd(): 0.00 : ffff8000107a3958: mov w1, #0x46 // #70 0.00 : ffff8000107a395c: stp xzr, xzr, [x29,#112] 0.00 : ffff8000107a3960: strb w1, [x29,#112] : queue_inc_prod_n(): 0.00 : ffff8000107a3964: and w9, w12, w20 : arm_smmu_cmdq_build_sync_cmd(): 0.00 : ffff8000107a3968: ldr w0, [x28,#16] : queue_inc_prod_n(): 2.63 : ffff8000107a396c: ldr w1, [x29,#104] : arm_smmu_cmdq_build_sync_cmd(): 0.00 : ffff8000107a3970: stp xzr, xzr, [x29,#128] 0.00 : ffff8000107a3974: and w0, w0, #0x180 : queue_inc_prod_n(): 0.00 : ffff8000107a3978: add w9, w9, w1 : arm_smmu_cmdq_build_sync_cmd(): 0.00 : ffff8000107a397c: cmp w0, #0x180 : queue_inc_prod_n(): 0.00 : ffff8000107a3980: and w9, w9, w20 : arm_smmu_cmdq_build_sync_cmd(): 0.00 : ffff8000107a3984: b.ne ffff8000107a39b0 0.00 : ffff8000107a3988: ldr w3, [x27,#64] 0.00 : ffff8000107a398c: mov w0, #0x1 // #1 0.01 : ffff8000107a3990: ldr x1, [x27,#160] 0.00 : ffff8000107a3994: ldr x2, [x27,#144] 0.00 : ffff8000107a3998: lsl w0, w0, w3 0.00 : ffff8000107a399c: sub w0, w0, #0x1 0.00 : ffff8000107a39a0: and w0, w0, w9 0.00 : ffff8000107a39a4: lsl x1, x1, #3 0.00 : ffff8000107a39a8: madd x0, x0, x1, x2 0.00 : ffff8000107a39ac: str x0, [x29,#120] 0.00 : ffff8000107a39b0: add x1, x29, #0x70 0.00 : ffff8000107a39b4: add x0, x29, #0x1d8 0.00 : ffff8000107a39b8: bl ffff8000107a2188 : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a39bc: ldr w4, [x27,#64] 0.00 : ffff8000107a39c0: mov w0, #0x1 // #1 0.01 : ffff8000107a39c4: ldr x1, [x27,#160] 0.00 : ffff8000107a39c8: ldr x2, [x27,#136] 0.00 : ffff8000107a39cc: lsl w0, w0, w4 0.00 : ffff8000107a39d0: sub w0, w0, #0x1 0.00 : ffff8000107a39d4: lsl x1, x1, #3 0.00 : ffff8000107a39d8: and w0, w0, w9 : queue_write(): 0.02 : ffff8000107a39dc: ldr x3, [x29,#472] : arm_smmu_cmdq_shared_lock(): 0.00 : ffff8000107a39e0: add x4, x28, #0x10c : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a39e4: mul x0, x0, x1 0.00 : ffff8000107a39e8: add x1, x2, x0 : queue_write(): 0.02 : ffff8000107a39ec: str x3, [x2,x0] 0.02 : ffff8000107a39f0: ldr x0, [x29,#480] 0.05 : ffff8000107a39f4: str x0, [x1,#8] : arch_static_branch_jump(): 0.00 : ffff8000107a39f8: b ffff8000107a3a6c 0.00 : ffff8000107a39fc: b ffff8000107a3a6c : __lse_atomic_fetch_add_relaxed(): 0.00 : ffff8000107a3a00: mov w0, #0x1 // #1 0.00 : ffff8000107a3a04: ldadd w0, w0, [x4] : arm_smmu_cmdq_shared_lock(): 16.92 : ffff8000107a3a08: tbz w0, #31, ffff8000107a35c4 : __read_once_size(): 0.00 : ffff8000107a3a0c: ldr w3, [x28,#268] : arm_smmu_cmdq_shared_lock(): 0.00 : ffff8000107a3a10: tbz w3, #31, ffff8000107a3a3c 0.00 : ffff8000107a3a14: nop 0.00 : ffff8000107a3a18: sxtw x3, w3 : __cmpwait_case_32(): 0.00 : ffff8000107a3a1c: sevl 0.00 : ffff8000107a3a20: wfe 0.00 : ffff8000107a3a24: ldxr w0, [x4] 0.00 : ffff8000107a3a28: eor w0, w0, w3 0.00 : ffff8000107a3a2c: cbnz w0, ffff8000107a3a34 0.00 : ffff8000107a3a30: wfe : __read_once_size(): 0.00 : ffff8000107a3a34: ldr w3, [x28,#268] : arm_smmu_cmdq_shared_lock(): 0.00 : ffff8000107a3a38: tbnz w3, #31, ffff8000107a3a18 : atomic_cmpxchg_relaxed(): 0.00 : ffff8000107a3a3c: sxtw x1, w3 : arm_smmu_cmdq_shared_lock(): 0.00 : ffff8000107a3a40: add w2, w3, #0x1 : arch_static_branch_jump(): 0.00 : ffff8000107a3a44: b ffff8000107a3a7c 0.00 : ffff8000107a3a48: b ffff8000107a3a7c : __lse__cmpxchg_case_32(): 0.00 : ffff8000107a3a4c: mov x0, x4 0.00 : ffff8000107a3a50: mov w1, w3 0.00 : ffff8000107a3a54: mov w5, w1 0.00 : ffff8000107a3a58: cas w5, w2, [x4] 0.00 : ffff8000107a3a5c: mov w0, w5 : arm_smmu_cmdq_shared_lock(): 0.00 : ffff8000107a3a60: cmp w3, w0 0.00 : ffff8000107a3a64: b.ne ffff8000107a3a34 0.00 : ffff8000107a3a68: b ffff8000107a35c4 : __ll_sc_atomic_fetch_add_relaxed(): 0.00 : ffff8000107a3a6c: add x3, x28, #0x10c 0.00 : ffff8000107a3a70: b ffff8000107a6764 : arm_smmu_cmdq_shared_lock(): 0.00 : ffff8000107a3a74: tbz w0, #31, ffff8000107a35c4 0.00 : ffff8000107a3a78: b ffff8000107a3a0c : __ll_sc__cmpxchg_case_32(): 0.00 : ffff8000107a3a7c: b ffff8000107a677c 0.00 : ffff8000107a3a80: b ffff8000107a3a60 : __arm_smmu_cmdq_poll_until_msi(): 0.00 : ffff8000107a3a84: ldr w2, [x27,#64] 0.00 : ffff8000107a3a88: mov w19, #0x1 // #1 0.01 : ffff8000107a3a8c: ldr x0, [x27,#160] : queue_poll_init(): 0.00 : ffff8000107a3a90: mov x3, #0x1 // #1 : __arm_smmu_cmdq_poll_until_msi(): 0.00 : ffff8000107a3a94: ldr x24, [x27,#136] 0.00 : ffff8000107a3a98: lsl w19, w19, w2 0.00 : ffff8000107a3a9c: sub w19, w19, #0x1 0.00 : ffff8000107a3aa0: lsl x0, x0, #3 0.00 : ffff8000107a3aa4: and w19, w19, w25 : queue_poll_init(): 0.00 : ffff8000107a3aa8: str x3, [x29,#120] 0.00 : ffff8000107a3aac: strb w1, [x29,#128] : __arm_smmu_cmdq_poll_until_msi(): 0.00 : ffff8000107a3ab0: mul x19, x19, x0 : queue_poll_init(): 0.00 : ffff8000107a3ab4: bl ffff8000101784e0 : ktime_add_us(): 0.00 : ffff8000107a3ab8: mov x1, #0xca00 // #51712 : __arm_smmu_cmdq_poll_until_msi(): 0.01 : ffff8000107a3abc: strb wzr, [x29,#128] : ktime_add_us(): 0.00 : ffff8000107a3ac0: movk x1, #0x3b9a, lsl #16 0.00 : ffff8000107a3ac4: add x0, x0, x1 : queue_poll_init(): 0.00 : ffff8000107a3ac8: str x0, [x29,#112] : __arm_smmu_cmdq_poll_until_msi(): 0.00 : ffff8000107a3acc: add x22, x24, x19 : __read_once_size(): 0.00 : ffff8000107a3ad0: ldr w19, [x24,x19] : __arm_smmu_cmdq_poll_until_msi(): 0.00 : ffff8000107a3ad4: cbnz w19, ffff8000107a3b00 0.13 : ffff8000107a3ad8: b ffff8000107a3b44 0.00 : ffff8000107a3adc: mov w19, w19 : __cmpwait_case_32(): 0.00 : ffff8000107a3ae0: sevl 0.00 : ffff8000107a3ae4: wfe 0.95 : ffff8000107a3ae8: ldxr w0, [x22] 0.00 : ffff8000107a3aec: eor w0, w0, w19 0.00 : ffff8000107a3af0: cbnz w0, ffff8000107a3af8 1.56 : ffff8000107a3af4: wfe : __read_once_size(): 4.53 : ffff8000107a3af8: ldr w19, [x22] : __arm_smmu_cmdq_poll_until_msi(): 0.00 : ffff8000107a3afc: cbz w19, ffff8000107a3b40 10.65 : ffff8000107a3b00: add x0, x29, #0x70 0.00 : ffff8000107a3b04: bl ffff8000107a2f90 0.01 : ffff8000107a3b08: mov w24, w0 0.00 : ffff8000107a3b0c: cbz w0, ffff8000107a3adc 0.00 : ffff8000107a3b10: ldr w0, [x26,#128] 0.00 : ffff8000107a3b14: str w0, [x23,#4] 0.00 : ffff8000107a3b18: b ffff8000107a3900 : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a3b1c: ldr w1, [x23,#4] : __write_once_size(): 0.00 : ffff8000107a3b20: str w1, [x28,#68] : arch_static_branch_jump(): 0.00 : ffff8000107a3b24: b ffff8000107a3948 0.00 : ffff8000107a3b28: b ffff8000107a3948 : __lse_atomic_sub_return_release(): 0.00 : ffff8000107a3b2c: mov w1, #0x1 // #1 0.00 : ffff8000107a3b30: neg w1, w1 0.00 : ffff8000107a3b34: ldaddl w1, w2, [x0] 0.00 : ffff8000107a3b38: add w1, w1, w2 0.00 : ffff8000107a3b3c: b ffff8000107a37bc 5.10 : ffff8000107a3b40: ldr w25, [x26,#128] : queue_inc_prod_n(): 0.00 : ffff8000107a3b44: and w0, w20, w25 0.00 : ffff8000107a3b48: and w22, w25, #0x80000000 0.00 : ffff8000107a3b4c: add w0, w0, #0x1 : __arm_smmu_cmdq_poll_until_msi(): 0.05 : ffff8000107a3b50: mov w24, #0x0 // #0 : queue_inc_prod_n(): 0.00 : ffff8000107a3b54: and w20, w0, w20 0.00 : ffff8000107a3b58: orr w22, w20, w22 : __arm_smmu_cmdq_poll_until_msi(): 0.00 : ffff8000107a3b5c: str w22, [x23,#4] 0.00 : ffff8000107a3b60: b ffff8000107a389c : arm_smmu_cmdq_issue_cmdlist(): 0.00 : ffff8000107a3b64: bl ffff8000100eb790 <__stack_chk_fail>