(kicad_pcb (version 20171130) (host pcbnew "(5.1.12-1-10_14)")

  (general
    (thickness 1.6002)
    (drawings 0)
    (tracks 27)
    (zones 0)
    (modules 4)
    (nets 6)
  )

  (page USLetter)
  (title_block
    (rev 1)
  )

  (layers
    (0 Front signal)
    (1 In1.Cu signal)
    (2 In2.Cu signal)
    (31 Back signal)
    (34 B.Paste user hide)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user hide)
    (38 B.Mask user)
    (39 F.Mask user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (49 F.Fab user)
  )

  (setup
    (last_trace_width 0.6)
    (user_trace_width 0.15)
    (user_trace_width 0.2)
    (user_trace_width 0.4)
    (user_trace_width 0.6)
    (user_trace_width 1.016)
    (trace_clearance 0.127)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.127)
    (via_size 0.6)
    (via_drill 0.3)
    (via_min_size 0.6)
    (via_min_drill 0.3)
    (user_via 0.6 0.3)
    (user_via 0.9 0.4)
    (uvia_size 0.6858)
    (uvia_drill 0.3302)
    (uvias_allowed no)
    (uvia_min_size 0)
    (uvia_min_drill 0)
    (edge_width 0.0381)
    (segment_width 0.254)
    (pcb_text_width 0.3048)
    (pcb_text_size 1.524 1.524)
    (mod_edge_width 0.1524)
    (mod_text_size 0.8128 0.8128)
    (mod_text_width 0.1524)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0)
    (solder_mask_min_width 0.12)
    (aux_axis_origin 0 0)
    (visible_elements FEFFFF7F)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.152400)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue false)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk true)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory "./gerbers"))
  )

  (net 0 "")
  (net 1 "Net-(Q1-Pad4)")
  (net 2 BATT)
  (net 3 ADC)
  (net 4 VCC)
  (net 5 GND)

  (net_class Default "This is the default net class."
    (clearance 0.127)
    (trace_width 0.127)
    (via_dia 0.6)
    (via_drill 0.3)
    (uvia_dia 0.6858)
    (uvia_drill 0.3302)
    (diff_pair_width 0.1524)
    (diff_pair_gap 0.254)
    (add_net ADC)
    (add_net BATT)
    (add_net GND)
    (add_net "Net-(Q1-Pad4)")
    (add_net VCC)
  )

  (module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Vertical (layer Front) (tedit 5AE5139B) (tstamp 61AD1500)
    (at 0.61 1.13 90)
    (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=5.08mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
    (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 5.08mm 0.167W length 3.6mm diameter 1.6mm")
    (path /61ADE2C4)
    (fp_text reference R2 (at 2.54 -1.92 90) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value 10k (at 2.54 1.92 90) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text user %R (at 2.54 -1.92 90) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_circle (center 0 0) (end 0.8 0) (layer F.Fab) (width 0.1))
    (fp_circle (center 0 0) (end 0.92 0) (layer F.SilkS) (width 0.12))
    (fp_line (start 0 0) (end 5.08 0) (layer F.Fab) (width 0.1))
    (fp_line (start 0.92 0) (end 4.08 0) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.05 1.05) (end 6.03 1.05) (layer F.CrtYd) (width 0.05))
    (fp_line (start 6.03 1.05) (end 6.03 -1.05) (layer F.CrtYd) (width 0.05))
    (fp_line (start 6.03 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05))
    (pad 2 thru_hole oval (at 5.08 0 90) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask)
      (net 5 GND))
    (pad 1 thru_hole circle (at 0 0 90) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask)
      (net 4 VCC))
    (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical (layer Front) (tedit 59FED5CC) (tstamp 61ACF242)
    (at -2.15 -1.36)
    (descr "Through hole straight pin header, 1x04, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x04 2.54mm single row")
    (path /61AD81BC)
    (fp_text reference J1 (at 0 -2.33) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value Conn_01x04_Male (at 0 9.95) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text user %R (at 0 3.81 90) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
    (fp_line (start 1.27 -1.27) (end 1.27 8.89) (layer F.Fab) (width 0.1))
    (fp_line (start 1.27 8.89) (end -1.27 8.89) (layer F.Fab) (width 0.1))
    (fp_line (start -1.27 8.89) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
    (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
    (fp_line (start -1.33 8.95) (end 1.33 8.95) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.33 1.27) (end -1.33 8.95) (layer F.SilkS) (width 0.12))
    (fp_line (start 1.33 1.27) (end 1.33 8.95) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.8 -1.8) (end -1.8 9.4) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.8 9.4) (end 1.8 9.4) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.8 9.4) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
    (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 2 BATT))
    (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 ADC))
    (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 VCC))
    (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 GND))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x04_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Vertical (layer Front) (tedit 5AE5139B) (tstamp 61AD17EF)
    (at 3.12 -3.99)
    (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=5.08mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
    (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 5.08mm 0.167W length 3.6mm diameter 1.6mm")
    (path /61AD192D)
    (fp_text reference R1 (at 2.54 -1.92) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value 1M (at 2.54 1.92) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text user %R (at 2.59 -0.03 180) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_circle (center 0 0) (end 0.8 0) (layer F.Fab) (width 0.1))
    (fp_circle (center 0 0) (end 0.92 0) (layer F.SilkS) (width 0.12))
    (fp_line (start 0 0) (end 5.08 0) (layer F.Fab) (width 0.1))
    (fp_line (start 0.92 0) (end 4.08 0) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.05 1.05) (end 6.03 1.05) (layer F.CrtYd) (width 0.05))
    (fp_line (start 6.03 1.05) (end 6.03 -1.05) (layer F.CrtYd) (width 0.05))
    (fp_line (start 6.03 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05))
    (pad 2 thru_hole oval (at 5.08 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask)
      (net 1 "Net-(Q1-Pad4)"))
    (pad 1 thru_hole circle (at 0 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask)
      (net 2 BATT))
    (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module Package_SO:SOIC-8_3.9x4.9mm_P1.27mm (layer Front) (tedit 5D9F72B1) (tstamp 61AD17AF)
    (at 5.64 0.49)
    (descr "SOIC, 8 Pin (JEDEC MS-012AA, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_8.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
    (tags "SOIC SO")
    (path /61AC9576)
    (attr smd)
    (fp_text reference Q1 (at 0 -3.4) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value Si4532DY (at 0 3.4) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text user %R (at 0.164999 0.984999) (layer F.Fab)
      (effects (font (size 0.98 0.98) (thickness 0.15)))
    )
    (fp_line (start 0 2.56) (end 1.95 2.56) (layer F.SilkS) (width 0.12))
    (fp_line (start 0 2.56) (end -1.95 2.56) (layer F.SilkS) (width 0.12))
    (fp_line (start 0 -2.56) (end 1.95 -2.56) (layer F.SilkS) (width 0.12))
    (fp_line (start 0 -2.56) (end -3.45 -2.56) (layer F.SilkS) (width 0.12))
    (fp_line (start -0.975 -2.45) (end 1.95 -2.45) (layer F.Fab) (width 0.1))
    (fp_line (start 1.95 -2.45) (end 1.95 2.45) (layer F.Fab) (width 0.1))
    (fp_line (start 1.95 2.45) (end -1.95 2.45) (layer F.Fab) (width 0.1))
    (fp_line (start -1.95 2.45) (end -1.95 -1.475) (layer F.Fab) (width 0.1))
    (fp_line (start -1.95 -1.475) (end -0.975 -2.45) (layer F.Fab) (width 0.1))
    (fp_line (start -3.7 -2.7) (end -3.7 2.7) (layer F.CrtYd) (width 0.05))
    (fp_line (start -3.7 2.7) (end 3.7 2.7) (layer F.CrtYd) (width 0.05))
    (fp_line (start 3.7 2.7) (end 3.7 -2.7) (layer F.CrtYd) (width 0.05))
    (fp_line (start 3.7 -2.7) (end -3.7 -2.7) (layer F.CrtYd) (width 0.05))
    (pad 8 smd roundrect (at 2.475 -1.905) (size 1.95 0.6) (layers Front F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 1 "Net-(Q1-Pad4)"))
    (pad 7 smd roundrect (at 2.475 -0.635) (size 1.95 0.6) (layers Front F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 1 "Net-(Q1-Pad4)"))
    (pad 6 smd roundrect (at 2.475 0.635) (size 1.95 0.6) (layers Front F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 3 ADC))
    (pad 5 smd roundrect (at 2.475 1.905) (size 1.95 0.6) (layers Front F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 3 ADC))
    (pad 4 smd roundrect (at -2.475 1.905) (size 1.95 0.6) (layers Front F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 1 "Net-(Q1-Pad4)"))
    (pad 3 smd roundrect (at -2.475 0.635) (size 1.95 0.6) (layers Front F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 2 BATT))
    (pad 2 smd roundrect (at -2.475 -0.635) (size 1.95 0.6) (layers Front F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 4 VCC))
    (pad 1 smd roundrect (at -2.475 -1.905) (size 1.95 0.6) (layers Front F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 5 GND))
    (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-8_3.9x4.9mm_P1.27mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (segment (start 8.115 -3.905) (end 8.2 -3.99) (width 1.016) (layer Front) (net 1))
  (segment (start 8.115 -1.415) (end 8.115 -3.905) (width 1.016) (layer Front) (net 1))
  (segment (start 8.115 -1.415) (end 8.115 -0.145) (width 1.016) (layer Front) (net 1))
  (segment (start 5.288093 2.395) (end 3.165 2.395) (width 0.508) (layer Front) (net 1))
  (segment (start 6.29101 1.392083) (end 5.288093 2.395) (width 0.508) (layer Front) (net 1))
  (segment (start 6.29101 0.70399) (end 6.29101 1.392083) (width 0.508) (layer Front) (net 1))
  (segment (start 7.14 -0.145) (end 6.29101 0.70399) (width 0.508) (layer Front) (net 1))
  (segment (start 8.115 -0.145) (end 7.14 -0.145) (width 0.508) (layer Front) (net 1))
  (segment (start 3.12 -3.99) (end 5.61 -1.5) (width 0.508) (layer Front) (net 2))
  (segment (start 4.78 -5.65) (end 3.12 -3.99) (width 1.016) (layer Front) (net 2))
  (segment (start 10.24 -5.65) (end 4.78 -5.65) (width 1.016) (layer Front) (net 2))
  (segment (start 10.24 6.26) (end 10.24 -5.65) (width 1.016) (layer Front) (net 2))
  (segment (start -2.15 6.26) (end 10.24 6.26) (width 1.016) (layer Front) (net 2))
  (segment (start 4.215 1.125) (end 3.165 1.125) (width 0.508) (layer Front) (net 2))
  (segment (start 5.61 -0.27) (end 4.215 1.125) (width 0.508) (layer Front) (net 2))
  (segment (start 5.61 -0.27) (end 5.61 -1.5) (width 0.508) (layer Front) (net 2))
  (segment (start 8.115 1.125) (end 8.115 2.395) (width 1.016) (layer Front) (net 3))
  (segment (start 6.79 3.72) (end 8.115 2.395) (width 1.016) (layer Front) (net 3))
  (segment (start -2.15 3.72) (end 6.79 3.72) (width 1.016) (layer Front) (net 3))
  (segment (start 0.56 1.18) (end 0.61 1.13) (width 1.016) (layer Front) (net 4))
  (segment (start -2.15 1.18) (end 0.56 1.18) (width 1.016) (layer Front) (net 4))
  (segment (start 1.885 -0.145) (end 3.165 -0.145) (width 1.016) (layer Front) (net 4))
  (segment (start 0.61 1.13) (end 1.885 -0.145) (width 1.016) (layer Front) (net 4))
  (segment (start 0.44 -3.95) (end -2.15 -1.36) (width 1.016) (layer Front) (net 5))
  (segment (start 0.61 -3.95) (end 0.44 -3.95) (width 1.016) (layer Front) (net 5))
  (segment (start -2.095 -1.415) (end -2.15 -1.36) (width 1.016) (layer Front) (net 5))
  (segment (start 3.165 -1.415) (end -2.095 -1.415) (width 1.016) (layer Front) (net 5))

)