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Std::Integer::Add Std::Bits::Append Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc Next_IP let cond := opcode[3:0]; let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let src2 := Read_GPR(context.rex_b4 ++ context.rex_b3 ++ rm, operand_size); LockPrefix #UD Next_IP := ip; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 rv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m rv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc False Memory_Read Normal_Alignment Next_IP let cond := opcode[3:0]; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); LockPrefix #UD let src2 := Logical_Mem_Read?(segment, effective_address, operand_size); Next_IP := next_ip0; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 mv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m mv2 cond opcode[3:0] let result := if Condition_Holds(cond) then src2 else src1; Condition_Holds Std::Integer::Add Std::Bits::Append Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc Next_IP let cond := opcode[3:0]; let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let src2 := Read_GPR(context.rex_b4 ++ context.rex_b3 ++ rm, operand_size); LockPrefix #UD Next_IP := ip; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 rv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m rv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc False Memory_Read Normal_Alignment Next_IP let cond := opcode[3:0]; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); LockPrefix #UD let src2 := Logical_Mem_Read?(segment, effective_address, operand_size); Next_IP := next_ip0; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 mv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m mv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc Next_IP let cond := opcode[3:0]; let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let src2 := Read_GPR(context.rex_b4 ++ context.rex_b3 ++ rm, operand_size); LockPrefix #UD Next_IP := ip; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 rv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m rv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc False Memory_Read Normal_Alignment Next_IP let cond := opcode[3:0]; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); LockPrefix #UD let src2 := Logical_Mem_Read?(segment, effective_address, operand_size); Next_IP := next_ip0; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 mv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m mv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc Next_IP let cond := opcode[3:0]; let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let src2 := Read_GPR(context.rex_b4 ++ context.rex_b3 ++ rm, operand_size); LockPrefix #UD Next_IP := ip; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 rv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m rv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc False Memory_Read Normal_Alignment Next_IP let cond := opcode[3:0]; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); LockPrefix #UD let src2 := Logical_Mem_Read?(segment, effective_address, operand_size); Next_IP := next_ip0; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 mv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m mv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc Next_IP let cond := opcode[3:0]; let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let src2 := Read_GPR(context.rex_b4 ++ context.rex_b3 ++ rm, operand_size); LockPrefix #UD Next_IP := ip; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 rv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m rv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc False Memory_Read Normal_Alignment Next_IP let cond := opcode[3:0]; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); LockPrefix #UD let src2 := Logical_Mem_Read?(segment, effective_address, operand_size); Next_IP := next_ip0; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 mv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m mv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc Next_IP let cond := opcode[3:0]; let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let src2 := Read_GPR(context.rex_b4 ++ context.rex_b3 ++ rm, operand_size); LockPrefix #UD Next_IP := ip; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 rv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m rv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc False Memory_Read Normal_Alignment Next_IP let cond := opcode[3:0]; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); LockPrefix #UD let src2 := Logical_Mem_Read?(segment, effective_address, operand_size); Next_IP := next_ip0; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 mv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m mv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc Next_IP let cond := opcode[3:0]; let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let src2 := Read_GPR(context.rex_b4 ++ context.rex_b3 ++ rm, operand_size); LockPrefix #UD Next_IP := ip; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 rv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m rv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc False Memory_Read Normal_Alignment Next_IP let cond := opcode[3:0]; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); LockPrefix #UD let src2 := Logical_Mem_Read?(segment, effective_address, operand_size); Next_IP := next_ip0; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 mv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m mv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc Next_IP let cond := opcode[3:0]; let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let src2 := Read_GPR(context.rex_b4 ++ context.rex_b3 ++ rm, operand_size); LockPrefix #UD Next_IP := ip; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 rv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m rv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc False Memory_Read Normal_Alignment Next_IP let cond := opcode[3:0]; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); LockPrefix #UD let src2 := Logical_Mem_Read?(segment, effective_address, operand_size); Next_IP := next_ip0; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 mv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m mv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc Next_IP let cond := opcode[3:0]; let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let src2 := Read_GPR(context.rex_b4 ++ context.rex_b3 ++ rm, operand_size); LockPrefix #UD Next_IP := ip; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 rv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m rv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc False Memory_Read Normal_Alignment Next_IP let cond := opcode[3:0]; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); LockPrefix #UD let src2 := Logical_Mem_Read?(segment, effective_address, operand_size); Next_IP := next_ip0; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 mv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m mv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc Next_IP let cond := opcode[3:0]; let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let src2 := Read_GPR(context.rex_b4 ++ context.rex_b3 ++ rm, operand_size); LockPrefix #UD Next_IP := ip; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 rv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m rv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc False Memory_Read Normal_Alignment Next_IP let cond := opcode[3:0]; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); LockPrefix #UD let src2 := Logical_Mem_Read?(segment, effective_address, operand_size); Next_IP := next_ip0; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 mv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m mv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc Next_IP let cond := opcode[3:0]; let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let src2 := Read_GPR(context.rex_b4 ++ context.rex_b3 ++ rm, operand_size); LockPrefix #UD Next_IP := ip; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 rv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m rv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc False Memory_Read Normal_Alignment Next_IP let cond := opcode[3:0]; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); LockPrefix #UD let src2 := Logical_Mem_Read?(segment, effective_address, operand_size); Next_IP := next_ip0; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 mv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m mv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc Next_IP let cond := opcode[3:0]; let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let src2 := Read_GPR(context.rex_b4 ++ context.rex_b3 ++ rm, operand_size); LockPrefix #UD Next_IP := ip; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 rv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m rv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc False Memory_Read Normal_Alignment Next_IP let cond := opcode[3:0]; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); LockPrefix #UD let src2 := Logical_Mem_Read?(segment, effective_address, operand_size); Next_IP := next_ip0; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 mv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m mv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc Next_IP let cond := opcode[3:0]; let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let src2 := Read_GPR(context.rex_b4 ++ context.rex_b3 ++ rm, operand_size); LockPrefix #UD Next_IP := ip; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 rv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m rv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc False Memory_Read Normal_Alignment Next_IP let cond := opcode[3:0]; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); LockPrefix #UD let src2 := Logical_Mem_Read?(segment, effective_address, operand_size); Next_IP := next_ip0; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 mv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m mv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc Next_IP let cond := opcode[3:0]; let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let src2 := Read_GPR(context.rex_b4 ++ context.rex_b3 ++ rm, operand_size); LockPrefix #UD Next_IP := ip; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 rv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m rv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc False Memory_Read Normal_Alignment Next_IP let cond := opcode[3:0]; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); LockPrefix #UD let src2 := Logical_Mem_Read?(segment, effective_address, operand_size); Next_IP := next_ip0; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 mv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m mv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc Next_IP let cond := opcode[3:0]; let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let src2 := Read_GPR(context.rex_b4 ++ context.rex_b3 ++ rm, operand_size); LockPrefix #UD Next_IP := ip; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 rv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m rv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc False Memory_Read Normal_Alignment Next_IP let cond := opcode[3:0]; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); LockPrefix #UD let src2 := Logical_Mem_Read?(segment, effective_address, operand_size); Next_IP := next_ip0; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 mv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m mv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc Next_IP let cond := opcode[3:0]; let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let src2 := Read_GPR(context.rex_b4 ++ context.rex_b3 ++ rm, operand_size); LockPrefix #UD Next_IP := ip; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 rv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m rv2 cond opcode[3:0] Std::Integer::Add Std::Bits::Append Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_GPR Report_Invalid_Opcode Write_GPR Instr_CMOVcc False Memory_Read Normal_Alignment Next_IP let cond := opcode[3:0]; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, operand_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); LockPrefix #UD let src2 := Logical_Mem_Read?(segment, effective_address, operand_size); Next_IP := next_ip0; let result := Instr_CMOVcc(operand_size, src1, src2, cond); Write_GPR(context.rex_r4 ++ context.rex_r3 ++ reg, result); rv1 mv2 CMOV src1 ModRM:reg rv1 result ModRM:reg rv1 src2 ModRM:r/m mv2 cond opcode[3:0] scalar integer/data_transfer