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The code in this file is not 'Sample Code'.
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Integer::Ne
Std::Bits::Append
Std::Bits::Eq
Effective_Address
Handle_RIP_Relative_Address
Logical_Mem_Read
Read_XMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_XMM
Instr_MULPf
False
CR4
CR0
Memory_Read
Explicitly_Aligned
Next_IP
let register_size := 128;
let element_size := 32;
let disp8n := 1;
let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip);
let src1 := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size);
let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0);
LockPrefix
#UD
OSZ_Prefix
#UD
REP_Not0
#UD
CR4_OSFXSR_0
#UD
CR0_EM_1
#UD
CR0_TS_1
#NM
let src2 := Logical_Mem_Read?(segment, effective_address, register_size, alignment_type=>Explicitly_Aligned);
Next_IP := next_ip0;
let result := Instr_MULPf?(element_size, register_size, src1, src2, context, mod);
Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present));
xmm1
m1282
SSE
src1
ModRM:reg
result
ModRM:reg
src2
ModRM:r/m
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Integer::Ne
Std::Bits::Append
Std::Bits::Eq
Calculate_RM
Read_XMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_XMM
Instr_MULPf
CR4
CR0
Next_IP
let register_size := 128;
let element_size := 32;
let src1 := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size);
let src2 := Read_XMM(Calculate_RM(mod, rm, context), register_size);
LockPrefix
#UD
OSZ_Prefix
#UD
REP_Not0
#UD
CR4_OSFXSR_0
#UD
CR0_EM_1
#UD
CR0_TS_1
#NM
Next_IP := ip;
let result := Instr_MULPf?(element_size, register_size, src1, src2, context, mod);
Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present));
xmm1
xmm2
SSE
src1
ModRM:reg
result
ModRM:reg
src2
ModRM:r/m
let elements := register_size / element_size;
let denormals_are_zeros := FP::Get_DAZ(element_size);
let flush_subnormals := FP::Get_FTZ(element_size);
let mask_underflow := MXCSR.UM == 0b1;
let exception_masks := MXCSR.Exception_Masks;
let suppress_all_exceptions := (context.evex_b == 0b1) and (mod == 0b11);
let rc := if (context.evex_b == 0b1) and (mod == 0b11) then context.evex_LLRC else MXCSR.RC;
let rounding_mode := FP::Decode_Rounding_Mode(rc);
var all_exceptions := Zero(6);
var result := Zero(register_size);
for i := 0 to elements-1 do
let op1 := src1[i *: element_size];
let op2 := src2[i *: element_size];
let (r, exceptions) := FP::Arithmetic(FP_MUL, op1, op2, denormals_are_zeros, rounding_mode, flush_subnormals, mask_underflow);
all_exceptions := all_exceptions or exceptions;
result[i *: element_size] := r;
endfor;
let reported_exceptions := if suppress_all_exceptions then Zero(6) else all_exceptions;
FP::Check_Exceptions?(reported_exceptions, exception_masks);
Std::Boolean::Strict_And
Std::Integer::Le
Std::Integer::Lt
Std::Integer::Multiply
Std::Integer::Positive_Divide
Std::Integer::Subtract
Std::Bits::Eq
Std::Bits::Or
Std::Bits::Zero
FP::Arithmetic
FP::Check_Exceptions
FP::Decode_Rounding_Mode
FP::Get_DAZ
FP::Get_FTZ
FP_MUL
MXCSR
MULPD
VMULPH
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Bits::Append
Std::Bits::Eq
Current_Mode
Effective_Address
Handle_RIP_Relative_Address
Logical_Mem_Read
Read_XMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_XMM
Instr_MULPf
False
Real_Address_Mode
Virtual_8086_Mode
CR4
CR0
Memory_Read
Normal_Alignment
XCR0
Next_IP
let register_size := 128;
let element_size := 32;
let disp8n := 1;
let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip);
let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size);
let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0);
LockPrefix
#UD
ModeRealOrVirtual
#UD
CR4_OSXSAVE_0
#UD
XCR0_AVX_0
#UD
CR0_TS_1
#NM
let src2 := Logical_Mem_Read?(segment, effective_address, register_size);
Next_IP := next_ip0;
let result := Instr_MULPf?(element_size, register_size, src1, src2, context, mod);
Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present));
xmm1
xmm2
m1283
AVX
result
ModRM:reg
src1
vvvv
src2
ModRM:r/m
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Bits::Append
Std::Bits::Eq
Calculate_RM
Current_Mode
Read_XMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_XMM
Instr_MULPf
Real_Address_Mode
Virtual_8086_Mode
CR4
CR0
XCR0
Next_IP
let register_size := 128;
let element_size := 32;
let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size);
let src2 := Read_XMM(Calculate_RM(mod, rm, context), register_size);
LockPrefix
#UD
ModeRealOrVirtual
#UD
CR4_OSXSAVE_0
#UD
XCR0_AVX_0
#UD
CR0_TS_1
#NM
Next_IP := ip;
let result := Instr_MULPf?(element_size, register_size, src1, src2, context, mod);
Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present));
xmm1
xmm2
xmm3
AVX
result
ModRM:reg
src1
vvvv
src2
ModRM:r/m
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Bits::Append
Std::Bits::Eq
Current_Mode
Effective_Address
Handle_RIP_Relative_Address
Logical_Mem_Read
Read_YMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_YMM
Instr_MULPf
False
Real_Address_Mode
Virtual_8086_Mode
CR4
CR0
Memory_Read
Normal_Alignment
XCR0
Next_IP
let register_size := 256;
let element_size := 32;
let disp8n := 1;
let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip);
let src1 := Read_YMM(context.evex_v4 ++ context.vvvv);
let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0);
LockPrefix
#UD
ModeRealOrVirtual
#UD
CR4_OSXSAVE_0
#UD
XCR0_AVX_0
#UD
CR0_TS_1
#NM
let src2 := Logical_Mem_Read?(segment, effective_address, register_size);
Next_IP := next_ip0;
let result := Instr_MULPf?(element_size, register_size, src1, src2, context, mod);
Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result);
ymm1
ymm2
m2563
AVX
result
ModRM:reg
src1
vvvv
src2
ModRM:r/m
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Bits::Append
Std::Bits::Eq
Calculate_RM
Current_Mode
Read_YMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_YMM
Instr_MULPf
Real_Address_Mode
Virtual_8086_Mode
CR4
CR0
XCR0
Next_IP
let register_size := 256;
let element_size := 32;
let src1 := Read_YMM(context.evex_v4 ++ context.vvvv);
let src2 := Read_YMM(Calculate_RM(mod, rm, context));
LockPrefix
#UD
ModeRealOrVirtual
#UD
CR4_OSXSAVE_0
#UD
XCR0_AVX_0
#UD
CR0_TS_1
#NM
Next_IP := ip;
let result := Instr_MULPf?(element_size, register_size, src1, src2, context, mod);
Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result);
ymm1
ymm2
ymm3
AVX
result
ModRM:reg
src1
vvvv
src2
ModRM:r/m
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Integer::Le
Std::Integer::Positive_Divide
Std::Bits::Append
Std::Bits::Eq
Current_Mode
Effective_Address
Handle_RIP_Relative_Address
Masked_Vector_Mem_Read
Read_Mask
Read_XMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_XMM
Instr_MULPf_m
True
Real_Address_Mode
Virtual_8086_Mode
CR4
CR0
XCR0
Next_IP
let register_size := 128;
let element_size := 32;
let disp8n := if context.evex_b == 0b1 then element_size / 8 else 16;
let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip);
let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size);
let k := Read_Mask(context.evex_aaa);
let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size);
let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0);
LockPrefix
#UD
ModeRealOrVirtual
#UD
VEX_W_1
#UD
CR4_OSXSAVE_0
#UD
XCR0_AVX_0
#UD
CR0_TS_1
#NM
let src2 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True);
Next_IP := next_ip0;
let result := Instr_MULPf_m?(element_size, register_size, old, k, src1, src2, context, mod);
Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present));
xmm1
{k1}{z}
xmm2
m1283
AVX512FAVX512VL
AVX10.1
result
ModRM:reg
src1
vvvv
src2
ModRM:r/m
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Bits::Append
Std::Bits::Eq
Calculate_RM
Current_Mode
Read_Mask
Read_XMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_XMM
Instr_MULPf_m
Real_Address_Mode
Virtual_8086_Mode
CR4
CR0
XCR0
Next_IP
let register_size := 128;
let element_size := 32;
let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size);
let k := Read_Mask(context.evex_aaa);
let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size);
let src2 := Read_XMM(Calculate_RM(mod, rm, context), register_size);
LockPrefix
#UD
ModeRealOrVirtual
#UD
VEX_W_1
#UD
CR4_OSXSAVE_0
#UD
XCR0_AVX_0
#UD
CR0_TS_1
#NM
Next_IP := ip;
let result := Instr_MULPf_m?(element_size, register_size, old, k, src1, src2, context, mod);
Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present));
xmm1
{k1}{z}
xmm2
xmm3
AVX512FAVX512VL
AVX10.1
result
ModRM:reg
src1
vvvv
src2
ModRM:r/m
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Integer::Le
Std::Integer::Positive_Divide
Std::Bits::Append
Std::Bits::Eq
Current_Mode
Effective_Address
Handle_RIP_Relative_Address
Masked_Vector_Mem_Read
Read_Mask
Read_XMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_XMM
Instr_MULPf_z
True
Real_Address_Mode
Virtual_8086_Mode
CR4
CR0
XCR0
Next_IP
let register_size := 128;
let element_size := 32;
let disp8n := if context.evex_b == 0b1 then element_size / 8 else 16;
let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip);
let k := Read_Mask(context.evex_aaa);
let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size);
let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0);
LockPrefix
#UD
ModeRealOrVirtual
#UD
VEX_W_1
#UD
CR4_OSXSAVE_0
#UD
XCR0_AVX_0
#UD
CR0_TS_1
#NM
let src2 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True);
Next_IP := next_ip0;
let result := Instr_MULPf_z?(element_size, register_size, k, src1, src2, context, mod);
Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present));
xmm1
{k1}{z}
xmm2
m1283
AVX512FAVX512VL
AVX10.1
result
ModRM:reg
src1
vvvv
src2
ModRM:r/m
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Bits::Append
Std::Bits::Eq
Calculate_RM
Current_Mode
Read_Mask
Read_XMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_XMM
Instr_MULPf_z
Real_Address_Mode
Virtual_8086_Mode
CR4
CR0
XCR0
Next_IP
let register_size := 128;
let element_size := 32;
let k := Read_Mask(context.evex_aaa);
let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size);
let src2 := Read_XMM(Calculate_RM(mod, rm, context), register_size);
LockPrefix
#UD
ModeRealOrVirtual
#UD
VEX_W_1
#UD
CR4_OSXSAVE_0
#UD
XCR0_AVX_0
#UD
CR0_TS_1
#NM
Next_IP := ip;
let result := Instr_MULPf_z?(element_size, register_size, k, src1, src2, context, mod);
Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present));
xmm1
{k1}{z}
xmm2
xmm3
AVX512FAVX512VL
AVX10.1
result
ModRM:reg
src1
vvvv
src2
ModRM:r/m
let elements := register_size / element_size;
let denormals_are_zeros := FP::Get_DAZ(element_size);
let flush_subnormals := FP::Get_FTZ(element_size);
let mask_underflow := MXCSR.UM == 0b1;
let exception_masks := MXCSR.Exception_Masks;
let suppress_all_exceptions := (context.evex_b == 0b1) and (mod == 0b11);
let rc := if (context.evex_b == 0b1) and (mod == 0b11) then context.evex_LLRC else MXCSR.RC;
let rounding_mode := FP::Decode_Rounding_Mode(rc);
var all_exceptions := Zero(6);
var result := Zero(register_size);
for i := 0 to elements-1 do
if k[i] == 0b1 then
let op1 := src1[i *: element_size];
let op2 := src2[i *: element_size];
let (r, exceptions) := FP::Arithmetic(FP_MUL, op1, op2, denormals_are_zeros, rounding_mode, flush_subnormals, mask_underflow);
all_exceptions := all_exceptions or exceptions;
result[i *: element_size] := r;
else
result[i *: element_size] := old[i *: element_size];
endif;
endfor;
let reported_exceptions := if suppress_all_exceptions then Zero(6) else all_exceptions;
FP::Check_Exceptions?(reported_exceptions, exception_masks);
Std::Boolean::Strict_And
Std::Integer::Le
Std::Integer::Lt
Std::Integer::Multiply
Std::Integer::Positive_Divide
Std::Integer::Subtract
Std::Bits::Eq
Std::Bits::Or
Std::Bits::Zero
FP::Arithmetic
FP::Check_Exceptions
FP::Decode_Rounding_Mode
FP::Get_DAZ
FP::Get_FTZ
FP_MUL
MXCSR
MULPD
VMULPH
let elements := register_size / element_size;
let denormals_are_zeros := FP::Get_DAZ(element_size);
let flush_subnormals := FP::Get_FTZ(element_size);
let mask_underflow := MXCSR.UM == 0b1;
let exception_masks := MXCSR.Exception_Masks;
let suppress_all_exceptions := (context.evex_b == 0b1) and (mod == 0b11);
let rc := if (context.evex_b == 0b1) and (mod == 0b11) then context.evex_LLRC else MXCSR.RC;
let rounding_mode := FP::Decode_Rounding_Mode(rc);
var all_exceptions := Zero(6);
var result := Zero(register_size);
for i := 0 to elements-1 do
if k[i] == 0b1 then
let op1 := src1[i *: element_size];
let op2 := src2[i *: element_size];
let (r, exceptions) := FP::Arithmetic(FP_MUL, op1, op2, denormals_are_zeros, rounding_mode, flush_subnormals, mask_underflow);
all_exceptions := all_exceptions or exceptions;
result[i *: element_size] := r;
else
result[i *: element_size] := Zero(element_size);
endif;
endfor;
let reported_exceptions := if suppress_all_exceptions then Zero(6) else all_exceptions;
FP::Check_Exceptions?(reported_exceptions, exception_masks);
Std::Boolean::Strict_And
Std::Integer::Le
Std::Integer::Lt
Std::Integer::Multiply
Std::Integer::Positive_Divide
Std::Integer::Subtract
Std::Bits::Eq
Std::Bits::Or
Std::Bits::Zero
FP::Arithmetic
FP::Check_Exceptions
FP::Decode_Rounding_Mode
FP::Get_DAZ
FP::Get_FTZ
FP_MUL
MXCSR
MULPD
VMULPH
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Integer::Le
Std::Integer::Positive_Divide
Std::Bits::Append
Std::Bits::Eq
Current_Mode
Effective_Address
Handle_RIP_Relative_Address
Masked_Vector_Mem_Read
Read_Mask
Read_YMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_YMM
Instr_MULPf_m
True
Real_Address_Mode
Virtual_8086_Mode
CR4
CR0
XCR0
Next_IP
let register_size := 256;
let element_size := 32;
let disp8n := if context.evex_b == 0b1 then element_size / 8 else 32;
let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip);
let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg);
let k := Read_Mask(context.evex_aaa);
let src1 := Read_YMM(context.evex_v4 ++ context.vvvv);
let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0);
LockPrefix
#UD
ModeRealOrVirtual
#UD
VEX_W_1
#UD
CR4_OSXSAVE_0
#UD
XCR0_AVX_0
#UD
CR0_TS_1
#NM
let src2 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True);
Next_IP := next_ip0;
let result := Instr_MULPf_m?(element_size, register_size, old, k, src1, src2, context, mod);
Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result);
ymm1
{k1}{z}
ymm2
m2563
AVX512FAVX512VL
AVX10.1
result
ModRM:reg
src1
vvvv
src2
ModRM:r/m
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Bits::Append
Std::Bits::Eq
Calculate_RM
Current_Mode
Read_Mask
Read_YMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_YMM
Instr_MULPf_m
Real_Address_Mode
Virtual_8086_Mode
CR4
CR0
XCR0
Next_IP
let register_size := 256;
let element_size := 32;
let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg);
let k := Read_Mask(context.evex_aaa);
let src1 := Read_YMM(context.evex_v4 ++ context.vvvv);
let src2 := Read_YMM(Calculate_RM(mod, rm, context));
LockPrefix
#UD
ModeRealOrVirtual
#UD
VEX_W_1
#UD
CR4_OSXSAVE_0
#UD
XCR0_AVX_0
#UD
CR0_TS_1
#NM
Next_IP := ip;
let result := Instr_MULPf_m?(element_size, register_size, old, k, src1, src2, context, mod);
Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result);
ymm1
{k1}{z}
ymm2
ymm3
AVX512FAVX512VL
AVX10.1
result
ModRM:reg
src1
vvvv
src2
ModRM:r/m
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Integer::Le
Std::Integer::Positive_Divide
Std::Bits::Append
Std::Bits::Eq
Current_Mode
Effective_Address
Handle_RIP_Relative_Address
Masked_Vector_Mem_Read
Read_Mask
Read_YMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_YMM
Instr_MULPf_z
True
Real_Address_Mode
Virtual_8086_Mode
CR4
CR0
XCR0
Next_IP
let register_size := 256;
let element_size := 32;
let disp8n := if context.evex_b == 0b1 then element_size / 8 else 32;
let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip);
let k := Read_Mask(context.evex_aaa);
let src1 := Read_YMM(context.evex_v4 ++ context.vvvv);
let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0);
LockPrefix
#UD
ModeRealOrVirtual
#UD
VEX_W_1
#UD
CR4_OSXSAVE_0
#UD
XCR0_AVX_0
#UD
CR0_TS_1
#NM
let src2 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True);
Next_IP := next_ip0;
let result := Instr_MULPf_z?(element_size, register_size, k, src1, src2, context, mod);
Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result);
ymm1
{k1}{z}
ymm2
m2563
AVX512FAVX512VL
AVX10.1
result
ModRM:reg
src1
vvvv
src2
ModRM:r/m
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Bits::Append
Std::Bits::Eq
Calculate_RM
Current_Mode
Read_Mask
Read_YMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_YMM
Instr_MULPf_z
Real_Address_Mode
Virtual_8086_Mode
CR4
CR0
XCR0
Next_IP
let register_size := 256;
let element_size := 32;
let k := Read_Mask(context.evex_aaa);
let src1 := Read_YMM(context.evex_v4 ++ context.vvvv);
let src2 := Read_YMM(Calculate_RM(mod, rm, context));
LockPrefix
#UD
ModeRealOrVirtual
#UD
VEX_W_1
#UD
CR4_OSXSAVE_0
#UD
XCR0_AVX_0
#UD
CR0_TS_1
#NM
Next_IP := ip;
let result := Instr_MULPf_z?(element_size, register_size, k, src1, src2, context, mod);
Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result);
ymm1
{k1}{z}
ymm2
ymm3
AVX512FAVX512VL
AVX10.1
result
ModRM:reg
src1
vvvv
src2
ModRM:r/m
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Bits::Append
Std::Bits::Eq
Calculate_RM
Current_Mode
Read_Mask
Read_ZMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_ZMM
Instr_MULPf_m
Real_Address_Mode
Virtual_8086_Mode
CR4
CR0
XCR0
Next_IP
let register_size := 512;
let element_size := 32;
let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg);
let k := Read_Mask(context.evex_aaa);
let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv);
let src2 := Read_ZMM(Calculate_RM(mod, rm, context));
LockPrefix
#UD
ModeRealOrVirtual
#UD
VEX_W_1
#UD
CR4_OSXSAVE_0
#UD
XCR0_AVX_0
#UD
CR0_TS_1
#NM
Next_IP := ip;
let result := Instr_MULPf_m?(element_size, register_size, old, k, src1, src2, context, mod);
Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result);
{er}
zmm1
{k1}{z}
zmm2
zmm3
AVX512F
AVX10.1
result
ModRM:reg
src1
vvvv
src2
ModRM:r/m
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Bits::Append
Std::Bits::Eq
Calculate_RM
Current_Mode
Read_Mask
Read_ZMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_ZMM
Instr_MULPf_z
Real_Address_Mode
Virtual_8086_Mode
CR4
CR0
XCR0
Next_IP
let register_size := 512;
let element_size := 32;
let k := Read_Mask(context.evex_aaa);
let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv);
let src2 := Read_ZMM(Calculate_RM(mod, rm, context));
LockPrefix
#UD
ModeRealOrVirtual
#UD
VEX_W_1
#UD
CR4_OSXSAVE_0
#UD
XCR0_AVX_0
#UD
CR0_TS_1
#NM
Next_IP := ip;
let result := Instr_MULPf_z?(element_size, register_size, k, src1, src2, context, mod);
Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result);
{er}
zmm1
{k1}{z}
zmm2
zmm3
AVX512F
AVX10.1
result
ModRM:reg
src1
vvvv
src2
ModRM:r/m
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Integer::Le
Std::Integer::Positive_Divide
Std::Bits::Append
Std::Bits::Eq
Current_Mode
Effective_Address
Handle_RIP_Relative_Address
Masked_Vector_Mem_Read
Read_Mask
Read_ZMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_ZMM
Instr_MULPf_m
True
Real_Address_Mode
Virtual_8086_Mode
CR4
CR0
XCR0
Next_IP
let register_size := 512;
let element_size := 32;
let disp8n := if context.evex_b == 0b1 then element_size / 8 else 64;
let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip);
let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg);
let k := Read_Mask(context.evex_aaa);
let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv);
let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0);
LockPrefix
#UD
ModeRealOrVirtual
#UD
VEX_W_1
#UD
CR4_OSXSAVE_0
#UD
XCR0_AVX_0
#UD
CR0_TS_1
#NM
let src2 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True);
Next_IP := next_ip0;
let result := Instr_MULPf_m?(element_size, register_size, old, k, src1, src2, context, mod);
Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result);
zmm1
{k1}{z}
zmm2
m5123
AVX512F
AVX10.1
result
ModRM:reg
src1
vvvv
src2
ModRM:r/m
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Bits::Append
Std::Bits::Eq
Calculate_RM
Current_Mode
Read_Mask
Read_ZMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_ZMM
Instr_MULPf_m
Real_Address_Mode
Virtual_8086_Mode
CR4
CR0
XCR0
Next_IP
let register_size := 512;
let element_size := 32;
let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg);
let k := Read_Mask(context.evex_aaa);
let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv);
let src2 := Read_ZMM(Calculate_RM(mod, rm, context));
LockPrefix
#UD
ModeRealOrVirtual
#UD
VEX_W_1
#UD
CR4_OSXSAVE_0
#UD
XCR0_AVX_0
#UD
CR0_TS_1
#NM
Next_IP := ip;
let result := Instr_MULPf_m?(element_size, register_size, old, k, src1, src2, context, mod);
Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result);
zmm1
{k1}{z}
zmm2
zmm3
AVX512F
AVX10.1
result
ModRM:reg
src1
vvvv
src2
ModRM:r/m
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Integer::Le
Std::Integer::Positive_Divide
Std::Bits::Append
Std::Bits::Eq
Current_Mode
Effective_Address
Handle_RIP_Relative_Address
Masked_Vector_Mem_Read
Read_Mask
Read_ZMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_ZMM
Instr_MULPf_z
True
Real_Address_Mode
Virtual_8086_Mode
CR4
CR0
XCR0
Next_IP
let register_size := 512;
let element_size := 32;
let disp8n := if context.evex_b == 0b1 then element_size / 8 else 64;
let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip);
let k := Read_Mask(context.evex_aaa);
let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv);
let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0);
LockPrefix
#UD
ModeRealOrVirtual
#UD
VEX_W_1
#UD
CR4_OSXSAVE_0
#UD
XCR0_AVX_0
#UD
CR0_TS_1
#NM
let src2 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True);
Next_IP := next_ip0;
let result := Instr_MULPf_z?(element_size, register_size, k, src1, src2, context, mod);
Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result);
zmm1
{k1}{z}
zmm2
m5123
AVX512F
AVX10.1
result
ModRM:reg
src1
vvvv
src2
ModRM:r/m
Std::Boolean::Strict_Or
Std::Integer::Add
Std::Bits::Append
Std::Bits::Eq
Calculate_RM
Current_Mode
Read_Mask
Read_ZMM
Report_Invalid_Opcode
Report_Not_Available_Exception
Write_ZMM
Instr_MULPf_z
Real_Address_Mode
Virtual_8086_Mode
CR4
CR0
XCR0
Next_IP
let register_size := 512;
let element_size := 32;
let k := Read_Mask(context.evex_aaa);
let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv);
let src2 := Read_ZMM(Calculate_RM(mod, rm, context));
LockPrefix
#UD
ModeRealOrVirtual
#UD
VEX_W_1
#UD
CR4_OSXSAVE_0
#UD
XCR0_AVX_0
#UD
CR0_TS_1
#NM
Next_IP := ip;
let result := Instr_MULPf_z?(element_size, register_size, k, src1, src2, context, mod);
Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result);
zmm1
{k1}{z}
zmm2
zmm3
AVX512F
AVX10.1
result
ModRM:reg
src1
vvvv
src2
ModRM:r/m
vector
fp/arithmetic
An explicitly-aligned memory access is performed.
If EVEX.b == 0b1, a single element is read from memory and broadcast across the vector.
Memory faults while reading inactive elements are suppressed.
If EVEX.z == 0b0, the previous value of the result is read into `old` and the masking variant of the operation is used; if EVEX.z == 0b1, the zeroing variant of the operation is used.