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Std::Boolean::Not Std::Integer::Eq Std::Integer::Le Std::Integer::Ne Std::Bits::Eq Std::Bits::Zero Effective_Address FP87::Check_For_Pending_Unmasked_Floating_Point_Exceptions Handle_RIP_Relative_Address Logical_Mem_Read Read_MMX Report_Invalid_Opcode Report_Not_Available_Exception Write_MMX Instr_PCMPGT False CR0 Memory_Read Normal_Alignment FP87_Tag_Word FP87_Status Next_IP let register_size := 64; let element_size := 8; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_MMX(reg)[0 +: register_size]; let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD OSZ_Prefix #UD REP_Not0 #UD CR0_EM_1 #UD CR0_TS_1 #NM TRUE CHECK_X87 let src2 := Logical_Mem_Read?(segment, effective_address, register_size); FP87_Status.TOP := 0b000; Next_IP := next_ip0; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_MMX(reg, result); FP87_Tag_Word := Zero(16); mmx1 m642 MMX src1 ModRM:reg mmx1 result ModRM:reg mmx1 src2 ModRM:r/m m642 Std::Boolean::Not Std::Integer::Eq Std::Integer::Le Std::Integer::Ne Std::Bits::Eq Std::Bits::Zero FP87::Check_For_Pending_Unmasked_Floating_Point_Exceptions Read_MMX Report_Invalid_Opcode Report_Not_Available_Exception Write_MMX Instr_PCMPGT CR0 FP87_Tag_Word FP87_Status Next_IP let register_size := 64; let element_size := 8; let src1 := Read_MMX(reg)[0 +: register_size]; let src2 := Read_MMX(rm)[0 +: register_size]; if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD OSZ_Prefix #UD REP_Not0 #UD CR0_EM_1 #UD CR0_TS_1 #NM TRUE CHECK_X87 FP87_Status.TOP := 0b000; Next_IP := ip; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_MMX(reg, result); FP87_Tag_Word := Zero(16); mmx1 mmx2 MMX src1 ModRM:reg mmx1 result ModRM:reg mmx1 src2 ModRM:r/m mmx2 let elements := register_size / element_size; var result := Zero(register_size); for i := 0 to elements-1 do let op1 := src1[i *: element_size]; let op2 := src2[i *: element_size]; let r := if Signed(op1) > Signed(op2) then All_Ones(element_size) else Zero(element_size); result[i *: element_size] := r; endfor; Std::Integer::Gt Std::Integer::Le Std::Integer::Lt Std::Integer::Multiply Std::Integer::Positive_Divide Std::Integer::Subtract Std::Bits::Signed Std::Bits::All_Ones Std::Bits::Zero PCMPGTQ Std::Boolean::Not Std::Integer::Eq Std::Integer::Le Std::Integer::Ne Std::Bits::Eq Std::Bits::Zero Effective_Address FP87::Check_For_Pending_Unmasked_Floating_Point_Exceptions Handle_RIP_Relative_Address Logical_Mem_Read Read_MMX Report_Invalid_Opcode Report_Not_Available_Exception Write_MMX Instr_PCMPGT False CR0 Memory_Read Normal_Alignment FP87_Tag_Word FP87_Status Next_IP let register_size := 64; let element_size := 16; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_MMX(reg)[0 +: register_size]; let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD OSZ_Prefix #UD REP_Not0 #UD CR0_EM_1 #UD CR0_TS_1 #NM TRUE CHECK_X87 let src2 := Logical_Mem_Read?(segment, effective_address, register_size); FP87_Status.TOP := 0b000; Next_IP := next_ip0; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_MMX(reg, result); FP87_Tag_Word := Zero(16); mmx1 m642 MMX src1 ModRM:reg mmx1 result ModRM:reg mmx1 src2 ModRM:r/m m642 Std::Boolean::Not Std::Integer::Eq Std::Integer::Le Std::Integer::Ne Std::Bits::Eq Std::Bits::Zero FP87::Check_For_Pending_Unmasked_Floating_Point_Exceptions Read_MMX Report_Invalid_Opcode Report_Not_Available_Exception Write_MMX Instr_PCMPGT CR0 FP87_Tag_Word FP87_Status Next_IP let register_size := 64; let element_size := 16; let src1 := Read_MMX(reg)[0 +: register_size]; let src2 := Read_MMX(rm)[0 +: register_size]; if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD OSZ_Prefix #UD REP_Not0 #UD CR0_EM_1 #UD CR0_TS_1 #NM TRUE CHECK_X87 FP87_Status.TOP := 0b000; Next_IP := ip; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_MMX(reg, result); FP87_Tag_Word := Zero(16); mmx1 mmx2 MMX src1 ModRM:reg mmx1 result ModRM:reg mmx1 src2 ModRM:r/m mmx2 Std::Boolean::Not Std::Integer::Eq Std::Integer::Le Std::Integer::Ne Std::Bits::Eq Std::Bits::Zero Effective_Address FP87::Check_For_Pending_Unmasked_Floating_Point_Exceptions Handle_RIP_Relative_Address Logical_Mem_Read Read_MMX Report_Invalid_Opcode Report_Not_Available_Exception Write_MMX Instr_PCMPGT False CR0 Memory_Read Normal_Alignment FP87_Tag_Word FP87_Status Next_IP let register_size := 64; let element_size := 32; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_MMX(reg)[0 +: register_size]; let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD OSZ_Prefix #UD REP_Not0 #UD CR0_EM_1 #UD CR0_TS_1 #NM TRUE CHECK_X87 let src2 := Logical_Mem_Read?(segment, effective_address, register_size); FP87_Status.TOP := 0b000; Next_IP := next_ip0; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_MMX(reg, result); FP87_Tag_Word := Zero(16); mmx1 m642 MMX src1 ModRM:reg mmx1 result ModRM:reg mmx1 src2 ModRM:r/m m642 Std::Boolean::Not Std::Integer::Eq Std::Integer::Le Std::Integer::Ne Std::Bits::Eq Std::Bits::Zero FP87::Check_For_Pending_Unmasked_Floating_Point_Exceptions Read_MMX Report_Invalid_Opcode Report_Not_Available_Exception Write_MMX Instr_PCMPGT CR0 FP87_Tag_Word FP87_Status Next_IP let register_size := 64; let element_size := 32; let src1 := Read_MMX(reg)[0 +: register_size]; let src2 := Read_MMX(rm)[0 +: register_size]; if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD OSZ_Prefix #UD REP_Not0 #UD CR0_EM_1 #UD CR0_TS_1 #NM TRUE CHECK_X87 FP87_Status.TOP := 0b000; Next_IP := ip; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_MMX(reg, result); FP87_Tag_Word := Zero(16); mmx1 mmx2 MMX src1 ModRM:reg mmx1 result ModRM:reg mmx1 src2 ModRM:r/m mmx2 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PCMPGT False CR4 CR0 Memory_Read Explicitly_Aligned Next_IP let register_size := 128; let element_size := 8; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM let src2 := Logical_Mem_Read?(segment, effective_address, register_size, alignment_type=>Explicitly_Aligned); Next_IP := next_ip0; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 m1282 SSE2 src1 ModRM:reg xmm1 result ModRM:reg xmm1 src2 ModRM:r/m m1282 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Calculate_RM Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PCMPGT CR4 CR0 Next_IP let register_size := 128; let element_size := 8; let src1 := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let src2 := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 SSE2 src1 ModRM:reg xmm1 result ModRM:reg xmm1 src2 ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PCMPGT False CR4 CR0 Memory_Read Explicitly_Aligned Next_IP let register_size := 128; let element_size := 16; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM let src2 := Logical_Mem_Read?(segment, effective_address, register_size, alignment_type=>Explicitly_Aligned); Next_IP := next_ip0; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 m1282 SSE2 src1 ModRM:reg xmm1 result ModRM:reg xmm1 src2 ModRM:r/m m1282 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Calculate_RM Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PCMPGT CR4 CR0 Next_IP let register_size := 128; let element_size := 16; let src1 := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let src2 := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 SSE2 src1 ModRM:reg xmm1 result ModRM:reg xmm1 src2 ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PCMPGT False CR4 CR0 Memory_Read Explicitly_Aligned Next_IP let register_size := 128; let element_size := 32; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM let src2 := Logical_Mem_Read?(segment, effective_address, register_size, alignment_type=>Explicitly_Aligned); Next_IP := next_ip0; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 m1282 SSE2 src1 ModRM:reg xmm1 result ModRM:reg xmm1 src2 ModRM:r/m m1282 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Calculate_RM Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PCMPGT CR4 CR0 Next_IP let register_size := 128; let element_size := 32; let src1 := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let src2 := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 SSE2 src1 ModRM:reg xmm1 result ModRM:reg xmm1 src2 ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PCMPGT False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 128; let element_size := 8; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src2 := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 m1283 AVX result ModRM:reg xmm1 src1 vvvv xmm2 src2 ModRM:r/m m1283 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PCMPGT Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let element_size := 8; let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let src2 := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 xmm3 AVX result ModRM:reg xmm1 src1 vvvv xmm2 src2 ModRM:r/m xmm3 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PCMPGT False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 128; let element_size := 16; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src2 := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 m1283 AVX result ModRM:reg xmm1 src1 vvvv xmm2 src2 ModRM:r/m m1283 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PCMPGT Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let element_size := 16; let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let src2 := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 xmm3 AVX result ModRM:reg xmm1 src1 vvvv xmm2 src2 ModRM:r/m xmm3 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PCMPGT False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 128; let element_size := 32; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src2 := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 m1283 AVX result ModRM:reg xmm1 src1 vvvv xmm2 src2 ModRM:r/m m1283 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PCMPGT Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let element_size := 32; let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let src2 := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 xmm3 AVX result ModRM:reg xmm1 src1 vvvv xmm2 src2 ModRM:r/m xmm3 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PCMPGT False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 256; let element_size := 8; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src2 := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 ymm2 m2563 AVX2 result ModRM:reg ymm1 src1 vvvv ymm2 src2 ModRM:r/m m2563 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PCMPGT Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let element_size := 8; let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let src2 := Read_YMM(Calculate_RM(mod, rm, context)); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 ymm2 ymm3 AVX2 result ModRM:reg ymm1 src1 vvvv ymm2 src2 ModRM:r/m ymm3 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PCMPGT False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 256; let element_size := 16; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src2 := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 ymm2 m2563 AVX2 result ModRM:reg ymm1 src1 vvvv ymm2 src2 ModRM:r/m m2563 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PCMPGT Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let element_size := 16; let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let src2 := Read_YMM(Calculate_RM(mod, rm, context)); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 ymm2 ymm3 AVX2 result ModRM:reg ymm1 src1 vvvv ymm2 src2 ModRM:r/m ymm3 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PCMPGT False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 256; let element_size := 32; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src2 := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 ymm2 m2563 AVX2 result ModRM:reg ymm1 src1 vvvv ymm2 src2 ModRM:r/m m2563 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PCMPGT Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let element_size := 32; let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let src2 := Read_YMM(Calculate_RM(mod, rm, context)); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PCMPGT(element_size, register_size, src1, src2); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 ymm2 ymm3 AVX2 result ModRM:reg ymm1 src1 vvvv ymm2 src2 ModRM:r/m ymm3 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Append Std::Bits::Eq Std::Bits::Ne Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_Mask Instr_PCMPGT_mask_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let element_size := 8; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.evex_z != 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src2 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PCMPGT_mask_z(element_size, register_size, k, src1, src2, context, mod); Write_Mask(reg, result); k {k1}{z} xmm1 m1282 AVX512BWAVX512VL AVX10.1 result ModRM:reg k src1 vvvv xmm1 src2 ModRM:r/m m1282 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Append Std::Bits::Eq Std::Bits::Ne Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_Mask Instr_PCMPGT_mask_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let element_size := 8; let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let src2 := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.evex_z != 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PCMPGT_mask_z(element_size, register_size, k, src1, src2, context, mod); Write_Mask(reg, result); k {k1}{z} xmm1 xmm2 AVX512BWAVX512VL AVX10.1 result ModRM:reg k src1 vvvv xmm1 src2 ModRM:r/m xmm2 let elements := register_size / element_size; var result := Zero(64); for i := 0 to elements-1 do if k[i] == 0b1 then let op1 := src1[i *: element_size]; let op2 := src2[i *: element_size]; let r := Bit(Signed(op1) > Signed(op2)); result[i *: 1] := r; else result[i *: 1] := 0b0; endif; endfor; Std::Integer::Gt Std::Integer::Le Std::Integer::Lt Std::Integer::Multiply Std::Integer::Positive_Divide Std::Integer::Subtract Std::Bits::Signed Std::Bits::Eq Std::Bits::Zero Bit PCMPGTQ Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Append Std::Bits::Eq Std::Bits::Ne Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_Mask Instr_PCMPGT_mask_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let element_size := 16; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.evex_z != 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src2 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PCMPGT_mask_z(element_size, register_size, k, src1, src2, context, mod); Write_Mask(reg, result); k {k1}{z} xmm1 m1282 AVX512BWAVX512VL AVX10.1 result ModRM:reg k src1 vvvv xmm1 src2 ModRM:r/m m1282 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Append Std::Bits::Eq Std::Bits::Ne Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_Mask Instr_PCMPGT_mask_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let element_size := 16; let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let src2 := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.evex_z != 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PCMPGT_mask_z(element_size, register_size, k, src1, src2, context, mod); Write_Mask(reg, result); k {k1}{z} xmm1 xmm2 AVX512BWAVX512VL AVX10.1 result ModRM:reg k src1 vvvv xmm1 src2 ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Le Std::Integer::Positive_Divide Std::Bits::Append Std::Bits::Eq Std::Bits::Ne Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_Mask Instr_PCMPGT_mask_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let element_size := 32; let disp8n := if context.evex_b == 0b1 then element_size / 8 else 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.rex_w == 0b0) and (context.evex_z != 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src2 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PCMPGT_mask_z(element_size, register_size, k, src1, src2, context, mod); Write_Mask(reg, result); k {k1}{z} xmm1 m1282 AVX512FAVX512VL AVX10.1 result ModRM:reg k src1 vvvv xmm1 src2 ModRM:r/m m1282 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Append Std::Bits::Eq Std::Bits::Ne Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_Mask Instr_PCMPGT_mask_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let element_size := 32; let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let src2 := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b0) and (context.evex_z != 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PCMPGT_mask_z(element_size, register_size, k, src1, src2, context, mod); Write_Mask(reg, result); k {k1}{z} xmm1 xmm2 AVX512FAVX512VL AVX10.1 result ModRM:reg k src1 vvvv xmm1 src2 ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Append Std::Bits::Eq Std::Bits::Ne Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_Mask Instr_PCMPGT_mask_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let element_size := 8; let disp8n := 32; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.evex_z != 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src2 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PCMPGT_mask_z(element_size, register_size, k, src1, src2, context, mod); Write_Mask(reg, result); k {k1}{z} ymm1 m2562 AVX512BWAVX512VL AVX10.1 result ModRM:reg k src1 vvvv ymm1 src2 ModRM:r/m m2562 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Append Std::Bits::Eq Std::Bits::Ne Calculate_RM Current_Mode Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_Mask Instr_PCMPGT_mask_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let element_size := 8; let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let src2 := Read_YMM(Calculate_RM(mod, rm, context)); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.evex_z != 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PCMPGT_mask_z(element_size, register_size, k, src1, src2, context, mod); Write_Mask(reg, result); k {k1}{z} ymm1 ymm2 AVX512BWAVX512VL AVX10.1 result ModRM:reg k src1 vvvv ymm1 src2 ModRM:r/m ymm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Append Std::Bits::Eq Std::Bits::Ne Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_Mask Instr_PCMPGT_mask_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let element_size := 16; let disp8n := 32; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.evex_z != 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src2 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PCMPGT_mask_z(element_size, register_size, k, src1, src2, context, mod); Write_Mask(reg, result); k {k1}{z} ymm1 m2562 AVX512BWAVX512VL AVX10.1 result ModRM:reg k src1 vvvv ymm1 src2 ModRM:r/m m2562 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Append Std::Bits::Eq Std::Bits::Ne Calculate_RM Current_Mode Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_Mask Instr_PCMPGT_mask_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let element_size := 16; let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let src2 := Read_YMM(Calculate_RM(mod, rm, context)); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.evex_z != 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PCMPGT_mask_z(element_size, register_size, k, src1, src2, context, mod); Write_Mask(reg, result); k {k1}{z} ymm1 ymm2 AVX512BWAVX512VL AVX10.1 result ModRM:reg k src1 vvvv ymm1 src2 ModRM:r/m ymm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Le Std::Integer::Positive_Divide Std::Bits::Append Std::Bits::Eq Std::Bits::Ne Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_Mask Instr_PCMPGT_mask_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let element_size := 32; let disp8n := if context.evex_b == 0b1 then element_size / 8 else 32; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.rex_w == 0b0) and (context.evex_z != 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src2 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PCMPGT_mask_z(element_size, register_size, k, src1, src2, context, mod); Write_Mask(reg, result); k {k1}{z} ymm1 m2562 AVX512FAVX512VL AVX10.1 result ModRM:reg k src1 vvvv ymm1 src2 ModRM:r/m m2562 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Append Std::Bits::Eq Std::Bits::Ne Calculate_RM Current_Mode Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_Mask Instr_PCMPGT_mask_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let element_size := 32; let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let src2 := Read_YMM(Calculate_RM(mod, rm, context)); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b0) and (context.evex_z != 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PCMPGT_mask_z(element_size, register_size, k, src1, src2, context, mod); Write_Mask(reg, result); k {k1}{z} ymm1 ymm2 AVX512FAVX512VL AVX10.1 result ModRM:reg k src1 vvvv ymm1 src2 ModRM:r/m ymm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Append Std::Bits::Eq Std::Bits::Ne Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_Mask Instr_PCMPGT_mask_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let element_size := 8; let disp8n := 64; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.evex_z != 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src2 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PCMPGT_mask_z(element_size, register_size, k, src1, src2, context, mod); Write_Mask(reg, result); k {k1}{z} zmm1 m5122 AVX512BW AVX10.1 result ModRM:reg k src1 vvvv zmm1 src2 ModRM:r/m m5122 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Append Std::Bits::Eq Std::Bits::Ne Calculate_RM Current_Mode Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_Mask Instr_PCMPGT_mask_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let element_size := 8; let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let src2 := Read_ZMM(Calculate_RM(mod, rm, context)); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.evex_z != 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PCMPGT_mask_z(element_size, register_size, k, src1, src2, context, mod); Write_Mask(reg, result); k {k1}{z} zmm1 zmm2 AVX512BW AVX10.1 result ModRM:reg k src1 vvvv zmm1 src2 ModRM:r/m zmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Append Std::Bits::Eq Std::Bits::Ne Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_Mask Instr_PCMPGT_mask_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let element_size := 16; let disp8n := 64; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.evex_z != 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src2 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PCMPGT_mask_z(element_size, register_size, k, src1, src2, context, mod); Write_Mask(reg, result); k {k1}{z} zmm1 m5122 AVX512BW AVX10.1 result ModRM:reg k src1 vvvv zmm1 src2 ModRM:r/m m5122 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Append Std::Bits::Eq Std::Bits::Ne Calculate_RM Current_Mode Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_Mask Instr_PCMPGT_mask_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let element_size := 16; let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let src2 := Read_ZMM(Calculate_RM(mod, rm, context)); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.evex_z != 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PCMPGT_mask_z(element_size, register_size, k, src1, src2, context, mod); Write_Mask(reg, result); k {k1}{z} zmm1 zmm2 AVX512BW AVX10.1 result ModRM:reg k src1 vvvv zmm1 src2 ModRM:r/m zmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Le Std::Integer::Positive_Divide Std::Bits::Append Std::Bits::Eq Std::Bits::Ne Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_Mask Instr_PCMPGT_mask_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let element_size := 32; let disp8n := if context.evex_b == 0b1 then element_size / 8 else 64; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.rex_w == 0b0) and (context.evex_z != 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src2 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PCMPGT_mask_z(element_size, register_size, k, src1, src2, context, mod); Write_Mask(reg, result); k {k1}{z} zmm1 m5122 AVX512F AVX10.1 result ModRM:reg k src1 vvvv zmm1 src2 ModRM:r/m m5122 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Append Std::Bits::Eq Std::Bits::Ne Calculate_RM Current_Mode Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_Mask Instr_PCMPGT_mask_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let element_size := 32; let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let src2 := Read_ZMM(Calculate_RM(mod, rm, context)); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b0) and (context.evex_z != 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PCMPGT_mask_z(element_size, register_size, k, src1, src2, context, mod); Write_Mask(reg, result); k {k1}{z} zmm1 zmm2 AVX512F AVX10.1 result ModRM:reg k src1 vvvv zmm1 src2 ModRM:r/m zmm2 vector integer/comparison

An explicitly-aligned memory access is performed. If EVEX.b == 0b1, a single element is read from memory and broadcast across the vector. Memory faults while reading inactive elements are suppressed. If EVEX.z == 0b0, the previous value of the result is read into `old` and the masking variant of the operation is used; if EVEX.z == 0b1, the zeroing variant of the operation is used.