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Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX False CR4 CR0 Memory_Read Normal_Alignment Next_IP let register_size := 64; let result_size := 128; let element_size := 8; let result_element_size := 16; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.rep_prefix == 0) and context.osz_prefix_present) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM let src := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 m642 SSE4 result ModRM:reg xmm1 src ModRM:r/m m642 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Calculate_RM Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX CR4 CR0 Next_IP let register_size := 128; let result_size := 128; let element_size := 8; let result_element_size := 16; let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.rep_prefix == 0) and context.osz_prefix_present) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 SSE4 result ModRM:reg xmm1 src ModRM:r/m xmm2 let elements := result_size / result_element_size; var result := Zero(result_size); for i := 0 to elements-1 do let op := src[i *: element_size]; let r := Zero_Extend(op, result_element_size); result[i *: result_element_size] := r; endfor; Std::Integer::Le Std::Integer::Lt Std::Integer::Multiply Std::Integer::Positive_Divide Std::Integer::Subtract Std::Bits::Zero_Extend Std::Bits::Zero Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX False CR4 CR0 Memory_Read Normal_Alignment Next_IP let register_size := 32; let result_size := 128; let element_size := 8; let result_element_size := 32; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.rep_prefix == 0) and context.osz_prefix_present) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM let src := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 m322 SSE4 result ModRM:reg xmm1 src ModRM:r/m m322 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Calculate_RM Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX CR4 CR0 Next_IP let register_size := 128; let result_size := 128; let element_size := 8; let result_element_size := 32; let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.rep_prefix == 0) and context.osz_prefix_present) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 SSE4 result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX False CR4 CR0 Memory_Read Normal_Alignment Next_IP let register_size := 16; let result_size := 128; let element_size := 8; let result_element_size := 64; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.rep_prefix == 0) and context.osz_prefix_present) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM let src := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 m162 SSE4 result ModRM:reg xmm1 src ModRM:r/m m162 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Calculate_RM Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX CR4 CR0 Next_IP let register_size := 128; let result_size := 128; let element_size := 8; let result_element_size := 64; let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.rep_prefix == 0) and context.osz_prefix_present) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 SSE4 result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX False CR4 CR0 Memory_Read Normal_Alignment Next_IP let register_size := 64; let result_size := 128; let element_size := 16; let result_element_size := 32; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.rep_prefix == 0) and context.osz_prefix_present) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM let src := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 m642 SSE4 result ModRM:reg xmm1 src ModRM:r/m m642 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Calculate_RM Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX CR4 CR0 Next_IP let register_size := 128; let result_size := 128; let element_size := 16; let result_element_size := 32; let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.rep_prefix == 0) and context.osz_prefix_present) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 SSE4 result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 64; let result_size := 128; let element_size := 8; let result_element_size := 16; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 m642 AVX result ModRM:reg xmm1 src ModRM:r/m m642 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 128; let element_size := 8; let result_element_size := 16; let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 AVX result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX False CR4 CR0 Memory_Read Normal_Alignment Next_IP let register_size := 32; let result_size := 128; let element_size := 16; let result_element_size := 64; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.rep_prefix == 0) and context.osz_prefix_present) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM let src := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 m322 SSE4 result ModRM:reg xmm1 src ModRM:r/m m322 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Calculate_RM Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX CR4 CR0 Next_IP let register_size := 128; let result_size := 128; let element_size := 16; let result_element_size := 64; let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.rep_prefix == 0) and context.osz_prefix_present) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 SSE4 result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 32; let result_size := 128; let element_size := 8; let result_element_size := 32; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 m322 AVX result ModRM:reg xmm1 src ModRM:r/m m322 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 128; let element_size := 8; let result_element_size := 32; let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 AVX result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX False CR4 CR0 Memory_Read Normal_Alignment Next_IP let register_size := 64; let result_size := 128; let element_size := 32; let result_element_size := 64; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.rep_prefix == 0) and context.osz_prefix_present) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM let src := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 m642 SSE4 result ModRM:reg xmm1 src ModRM:r/m m642 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Calculate_RM Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX CR4 CR0 Next_IP let register_size := 128; let result_size := 128; let element_size := 32; let result_element_size := 64; let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.rep_prefix == 0) and context.osz_prefix_present) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 SSE4 result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 16; let result_size := 128; let element_size := 8; let result_element_size := 64; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 m162 AVX result ModRM:reg xmm1 src ModRM:r/m m162 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 128; let element_size := 8; let result_element_size := 64; let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 AVX result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 64; let result_size := 128; let element_size := 16; let result_element_size := 32; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 m642 AVX result ModRM:reg xmm1 src ModRM:r/m m642 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 128; let element_size := 16; let result_element_size := 32; let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 AVX result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 32; let result_size := 128; let element_size := 16; let result_element_size := 64; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 m322 AVX result ModRM:reg xmm1 src ModRM:r/m m322 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 128; let element_size := 16; let result_element_size := 64; let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 AVX result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 64; let result_size := 128; let element_size := 32; let result_element_size := 64; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 m642 AVX result ModRM:reg xmm1 src ModRM:r/m m642 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 128; let element_size := 32; let result_element_size := 64; let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 AVX result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 128; let result_size := 256; let element_size := 8; let result_element_size := 16; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm m128 AVX2 result ModRM:reg ymm src ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 256; let element_size := 8; let result_element_size := 16; let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm xmm AVX2 result ModRM:reg ymm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 64; let result_size := 256; let element_size := 8; let result_element_size := 32; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm m64 AVX2 result ModRM:reg ymm src ModRM:r/m m64 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 256; let element_size := 8; let result_element_size := 32; let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm xmm AVX2 result ModRM:reg ymm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 32; let result_size := 256; let element_size := 8; let result_element_size := 64; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm m32 AVX2 result ModRM:reg ymm src ModRM:r/m m32 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 256; let element_size := 8; let result_element_size := 64; let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm xmm AVX2 result ModRM:reg ymm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 128; let result_size := 256; let element_size := 16; let result_element_size := 32; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm m128 AVX2 result ModRM:reg ymm src ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 256; let element_size := 16; let result_element_size := 32; let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm xmm AVX2 result ModRM:reg ymm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 64; let result_size := 256; let element_size := 16; let result_element_size := 64; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm m64 AVX2 result ModRM:reg ymm src ModRM:r/m m64 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 256; let element_size := 16; let result_element_size := 64; let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm xmm AVX2 result ModRM:reg ymm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 128; let result_size := 256; let element_size := 32; let result_element_size := 64; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Logical_Mem_Read?(segment, effective_address, register_size); Next_IP := next_ip0; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm m128 AVX2 result ModRM:reg ymm src ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 256; let element_size := 32; let result_element_size := 64; let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.vex_pp == 0b01) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX(element_size, register_size, result_size, result_element_size, src); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm xmm AVX2 result ModRM:reg ymm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 128; let register_size := 64; let element_size := 8; let result_element_size := 16; let disp8n := 8; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, 128); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m642 AVX512BWAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m m642 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 128; let register_size := 128; let element_size := 8; let result_element_size := 16; let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, 128); let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 AVX512BWAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 64; let result_size := 128; let element_size := 8; let result_element_size := 16; let disp8n := 8; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m642 AVX512BWAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m m642 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 128; let element_size := 8; let result_element_size := 16; let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 AVX512BWAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m xmm2 let elements := result_size / result_element_size; var result := Zero(result_size); for i := 0 to elements-1 do if k[i] == 0b1 then let op := src[i *: element_size]; let r := Zero_Extend(op, result_element_size); result[i *: result_element_size] := r; else result[i *: result_element_size] := old[i *: result_element_size]; endif; endfor; Std::Integer::Le Std::Integer::Lt Std::Integer::Multiply Std::Integer::Positive_Divide Std::Integer::Subtract Std::Bits::Eq Std::Bits::Zero_Extend Std::Bits::Zero let elements := result_size / result_element_size; var result := Zero(result_size); for i := 0 to elements-1 do if k[i] == 0b1 then let op := src[i *: element_size]; let r := Zero_Extend(op, result_element_size); result[i *: result_element_size] := r; else result[i *: result_element_size] := Zero(result_element_size); endif; endfor; Std::Integer::Le Std::Integer::Lt Std::Integer::Multiply Std::Integer::Positive_Divide Std::Integer::Subtract Std::Bits::Eq Std::Bits::Zero_Extend Std::Bits::Zero Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 128; let register_size := 32; let element_size := 8; let result_element_size := 32; let disp8n := 4; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, 128); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m322 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m m322 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 128; let register_size := 128; let element_size := 8; let result_element_size := 32; let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, 128); let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 32; let result_size := 128; let element_size := 8; let result_element_size := 32; let disp8n := 4; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m322 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m m322 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 128; let element_size := 8; let result_element_size := 32; let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 128; let register_size := 64; let element_size := 16; let result_element_size := 32; let disp8n := 8; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, 128); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m642 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m m642 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 128; let register_size := 128; let element_size := 16; let result_element_size := 32; let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, 128); let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 64; let result_size := 128; let element_size := 16; let result_element_size := 32; let disp8n := 8; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m642 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m m642 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 128; let element_size := 16; let result_element_size := 32; let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 128; let register_size := 16; let element_size := 8; let result_element_size := 64; let disp8n := 2; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, 128); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m162 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m m162 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 128; let register_size := 128; let element_size := 8; let result_element_size := 64; let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, 128); let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 16; let result_size := 128; let element_size := 8; let result_element_size := 64; let disp8n := 2; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m162 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m m162 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 128; let element_size := 8; let result_element_size := 64; let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 128; let register_size := 32; let element_size := 16; let result_element_size := 64; let disp8n := 4; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, 128); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m322 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m m322 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 128; let register_size := 128; let element_size := 16; let result_element_size := 64; let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, 128); let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 32; let result_size := 128; let element_size := 16; let result_element_size := 64; let disp8n := 4; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m322 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m m322 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 128; let element_size := 16; let result_element_size := 64; let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 128; let register_size := 64; let element_size := 32; let result_element_size := 64; let disp8n := 8; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, 128); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (context.rex_w == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m642 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m m642 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 128; let register_size := 128; let element_size := 32; let result_element_size := 64; let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, 128); let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (context.rex_w == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 64; let result_size := 128; let element_size := 32; let result_element_size := 64; let disp8n := 8; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (context.rex_w == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m642 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m m642 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PMOVZX_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 128; let element_size := 32; let result_element_size := 64; let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (context.rex_w == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 256; let register_size := 128; let element_size := 8; let result_element_size := 16; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} m128 AVX512BWAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 256; let register_size := 128; let element_size := 8; let result_element_size := 16; let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} xmm AVX512BWAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 256; let element_size := 8; let result_element_size := 16; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} m128 AVX512BWAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 256; let element_size := 8; let result_element_size := 16; let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} xmm AVX512BWAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 256; let register_size := 64; let element_size := 8; let result_element_size := 32; let disp8n := 8; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} m64 AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m m64 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 256; let register_size := 128; let element_size := 8; let result_element_size := 32; let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} xmm AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 64; let result_size := 256; let element_size := 8; let result_element_size := 32; let disp8n := 8; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} m64 AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m m64 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 256; let element_size := 8; let result_element_size := 32; let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} xmm AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 256; let register_size := 128; let element_size := 16; let result_element_size := 32; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} m128 AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 256; let register_size := 128; let element_size := 16; let result_element_size := 32; let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} xmm AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 256; let element_size := 16; let result_element_size := 32; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} m128 AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 256; let element_size := 16; let result_element_size := 32; let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} xmm AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 256; let register_size := 32; let element_size := 8; let result_element_size := 64; let disp8n := 4; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} m32 AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m m32 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 256; let register_size := 128; let element_size := 8; let result_element_size := 64; let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} xmm AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 32; let result_size := 256; let element_size := 8; let result_element_size := 64; let disp8n := 4; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} m32 AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m m32 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 256; let element_size := 8; let result_element_size := 64; let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} xmm AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 256; let register_size := 64; let element_size := 16; let result_element_size := 64; let disp8n := 8; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} m64 AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m m64 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 256; let register_size := 128; let element_size := 16; let result_element_size := 64; let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} xmm AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 64; let result_size := 256; let element_size := 16; let result_element_size := 64; let disp8n := 8; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} m64 AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m m64 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 256; let element_size := 16; let result_element_size := 64; let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} xmm AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 256; let register_size := 128; let element_size := 32; let result_element_size := 64; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (context.rex_w == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} m128 AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 256; let register_size := 128; let element_size := 32; let result_element_size := 64; let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (context.rex_w == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} xmm AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 256; let element_size := 32; let result_element_size := 64; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (context.rex_w == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} m128 AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PMOVZX_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 256; let element_size := 32; let result_element_size := 64; let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (context.rex_w == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm {k1}{z} xmm AVX512FAVX512VL AVX10.1 result ModRM:reg ymm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 512; let register_size := 256; let element_size := 8; let result_element_size := 16; let disp8n := 32; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} m256 AVX512BW AVX10.1 result ModRM:reg zmm src ModRM:r/m m256 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_YMM Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 512; let register_size := 256; let element_size := 8; let result_element_size := 16; let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src := Read_YMM(Calculate_RM(mod, rm, context)); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} ymm AVX512BW AVX10.1 result ModRM:reg zmm src ModRM:r/m ymm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let result_size := 512; let element_size := 8; let result_element_size := 16; let disp8n := 32; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} m256 AVX512BW AVX10.1 result ModRM:reg zmm src ModRM:r/m m256 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let result_size := 512; let element_size := 8; let result_element_size := 16; let k := Read_Mask(context.evex_aaa); let src := Read_YMM(Calculate_RM(mod, rm, context)); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} ymm AVX512BW AVX10.1 result ModRM:reg zmm src ModRM:r/m ymm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 512; let register_size := 128; let element_size := 8; let result_element_size := 32; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} m128 AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 512; let register_size := 128; let element_size := 8; let result_element_size := 32; let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} xmm AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 512; let element_size := 8; let result_element_size := 32; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} m128 AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 512; let element_size := 8; let result_element_size := 32; let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} xmm AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 512; let register_size := 256; let element_size := 16; let result_element_size := 32; let disp8n := 32; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} m256 AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m m256 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_YMM Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 512; let register_size := 256; let element_size := 16; let result_element_size := 32; let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src := Read_YMM(Calculate_RM(mod, rm, context)); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} ymm AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m ymm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let result_size := 512; let element_size := 16; let result_element_size := 32; let disp8n := 32; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} m256 AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m m256 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let result_size := 512; let element_size := 16; let result_element_size := 32; let k := Read_Mask(context.evex_aaa); let src := Read_YMM(Calculate_RM(mod, rm, context)); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} ymm AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m ymm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 512; let register_size := 64; let element_size := 8; let result_element_size := 64; let disp8n := 8; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} m64 AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m m64 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 512; let register_size := 128; let element_size := 8; let result_element_size := 64; let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} xmm AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 64; let result_size := 512; let element_size := 8; let result_element_size := 64; let disp8n := 8; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} m64 AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m m64 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 512; let element_size := 8; let result_element_size := 64; let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} xmm AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 512; let register_size := 128; let element_size := 16; let result_element_size := 64; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} m128 AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 512; let register_size := 128; let element_size := 16; let result_element_size := 64; let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} xmm AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 512; let element_size := 16; let result_element_size := 64; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} m128 AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let result_size := 512; let element_size := 16; let result_element_size := 64; let k := Read_Mask(context.evex_aaa); let src := Read_XMM(Calculate_RM(mod, rm, context), register_size); if not ((context.evex_b == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} xmm AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 512; let register_size := 256; let element_size := 32; let result_element_size := 64; let disp8n := 32; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (context.rex_w == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} m256 AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m m256 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_YMM Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let result_size := 512; let register_size := 256; let element_size := 32; let result_element_size := 64; let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src := Read_YMM(Calculate_RM(mod, rm, context)); if not ((context.evex_b == 0b0) and (context.rex_w == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_m(element_size, register_size, result_size, result_element_size, old, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} ymm AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m ymm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let result_size := 512; let element_size := 32; let result_element_size := 64; let disp8n := 32; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0) and (context.rex_w == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} m256 AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m m256 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Std::Bits::Not Calculate_RM Current_Mode Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PMOVZX_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let result_size := 512; let element_size := 32; let result_element_size := 64; let k := Read_Mask(context.evex_aaa); let src := Read_YMM(Calculate_RM(mod, rm, context)); if not ((context.evex_b == 0b0) and (context.rex_w == 0b0) and (not context.vvvv[3] == 0b1) and (not context.vvvv[2:0] == 0b111) and (context.evex_v4 == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PMOVZX_z(element_size, register_size, result_size, result_element_size, k, src, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm {k1}{z} ymm AVX512F AVX10.1 result ModRM:reg zmm src ModRM:r/m ymm vector data_transfer

If EVEX.b == 0b1, a single element is read from memory and broadcast across the vector. Memory faults while reading inactive elements are suppressed. If EVEX.z == 0b0, the previous value of the result is read into `old` and the masking variant of the operation is used; if EVEX.z == 0b1, the zeroing variant of the operation is used.