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Std::Boolean::Not Std::Integer::Eq Std::Integer::Le Std::Integer::Ne Std::Bits::Add_int Std::Bits::Eq Std::Bits::Sign_Extend Std::Bits::Zero FP87::Check_For_Pending_Unmasked_Floating_Point_Exceptions Mem_Fetch Read_MMX Report_Invalid_Opcode Report_Not_Available_Exception Write_MMX Instr_PSRL CR0 FP87_Tag_Word FP87_Status Next_IP let register_size := 64; let shift_size := 8; let element_size := 16; let src1 := Read_MMX(rm)[0 +: register_size]; let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD OSZ_Prefix #UD REP_Not0 #UD CR0_EM_1 #UD CR0_TS_1 #NM TRUE CHECK_X87 FP87_Status.TOP := 0b000; Next_IP := ip + 1; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_MMX(rm, result); FP87_Tag_Word := Zero(16); mmx imm8 MMX src1 ModRM:r/m mmx result ModRM:r/m mmx shift_distance imm8 let elements := register_size / element_size; var result := Zero(register_size); for i := 0 to elements-1 do let op1 := src1[i *: element_size]; let count := if shift_size > 64 then Unsigned(shift_distance[0 +: 64]) else Unsigned(shift_distance); let r := Shift_Right_Logical(op1, count); result[i *: element_size] := r; endfor; Std::Integer::Gt Std::Integer::Le Std::Integer::Lt Std::Integer::Multiply Std::Integer::Positive_Divide Std::Integer::Power2 Std::Integer::Subtract Std::Bits::Unsigned Std::Bits::Zero Std::Bits::Shift_Right_Logical Std::Boolean::Not Std::Integer::Eq Std::Integer::Le Std::Integer::Ne Std::Bits::Add_int Std::Bits::Eq Std::Bits::Sign_Extend Std::Bits::Zero FP87::Check_For_Pending_Unmasked_Floating_Point_Exceptions Mem_Fetch Read_MMX Report_Invalid_Opcode Report_Not_Available_Exception Write_MMX Instr_PSRL CR0 FP87_Tag_Word FP87_Status Next_IP let register_size := 64; let shift_size := 8; let element_size := 32; let src1 := Read_MMX(rm)[0 +: register_size]; let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD OSZ_Prefix #UD REP_Not0 #UD CR0_EM_1 #UD CR0_TS_1 #NM TRUE CHECK_X87 FP87_Status.TOP := 0b000; Next_IP := ip + 1; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_MMX(rm, result); FP87_Tag_Word := Zero(16); mmx imm8 MMX src1 ModRM:r/m mmx result ModRM:r/m mmx shift_distance imm8 Std::Boolean::Not Std::Integer::Eq Std::Integer::Le Std::Integer::Ne Std::Bits::Add_int Std::Bits::Eq Std::Bits::Sign_Extend Std::Bits::Zero FP87::Check_For_Pending_Unmasked_Floating_Point_Exceptions Mem_Fetch Read_MMX Report_Invalid_Opcode Report_Not_Available_Exception Write_MMX Instr_PSRL CR0 FP87_Tag_Word FP87_Status Next_IP let register_size := 64; let shift_size := 8; let element_size := 64; let src1 := Read_MMX(rm)[0 +: register_size]; let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD OSZ_Prefix #UD REP_Not0 #UD CR0_EM_1 #UD CR0_TS_1 #NM TRUE CHECK_X87 FP87_Status.TOP := 0b000; Next_IP := ip + 1; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_MMX(rm, result); FP87_Tag_Word := Zero(16); mmx imm8 MMX src1 ModRM:r/m mmx result ModRM:r/m mmx shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Eq Std::Integer::Ne Std::Bits::Add_int Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Mem_Fetch Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL CR4 CR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 16; let src1 := Read_XMM(Calculate_RM(mod, rm, context), register_size); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_XMM(Calculate_RM(mod, rm, context), result, (context.vex_prefix_present or context.evex_prefix_present)); xmm imm8 SSE2 src1 ModRM:r/m xmm result ModRM:r/m xmm shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Eq Std::Integer::Ne Std::Bits::Add_int Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Mem_Fetch Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL CR4 CR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 32; let src1 := Read_XMM(Calculate_RM(mod, rm, context), register_size); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_XMM(Calculate_RM(mod, rm, context), result, (context.vex_prefix_present or context.evex_prefix_present)); xmm imm8 SSE2 src1 ModRM:r/m xmm result ModRM:r/m xmm shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Eq Std::Integer::Ne Std::Bits::Add_int Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Mem_Fetch Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL CR4 CR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 64; let src1 := Read_XMM(Calculate_RM(mod, rm, context), register_size); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_XMM(Calculate_RM(mod, rm, context), result, (context.vex_prefix_present or context.evex_prefix_present)); xmm imm8 SSE2 src1 ModRM:r/m xmm result ModRM:r/m xmm shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 16; let src1 := Read_XMM(Calculate_RM(mod, rm, context), register_size); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 imm8 AVX result vvvv xmm1 src1 ModRM:r/m xmm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 32; let src1 := Read_XMM(Calculate_RM(mod, rm, context), register_size); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 imm8 AVX result vvvv xmm1 src1 ModRM:r/m xmm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 64; let src1 := Read_XMM(Calculate_RM(mod, rm, context), register_size); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 imm8 AVX result vvvv xmm1 src1 ModRM:r/m xmm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 8; let element_size := 16; let src1 := Read_YMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 ymm2 imm8 AVX2 result vvvv ymm1 src1 ModRM:r/m ymm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 8; let element_size := 32; let src1 := Read_YMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 ymm2 imm8 AVX2 result vvvv ymm1 src1 ModRM:r/m ymm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 8; let element_size := 64; let src1 := Read_YMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 ymm2 imm8 AVX2 result vvvv ymm1 src1 ModRM:r/m ymm2 shift_distance imm8 Std::Boolean::Not Std::Integer::Eq Std::Integer::Le Std::Integer::Ne Std::Bits::Eq Std::Bits::Zero Effective_Address FP87::Check_For_Pending_Unmasked_Floating_Point_Exceptions Handle_RIP_Relative_Address Logical_Mem_Read Read_MMX Report_Invalid_Opcode Report_Not_Available_Exception Write_MMX Instr_PSRL False CR0 Memory_Read Normal_Alignment FP87_Tag_Word FP87_Status Next_IP let register_size := 64; let shift_size := 64; let element_size := 16; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_MMX(reg)[0 +: register_size]; let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD OSZ_Prefix #UD REP_Not0 #UD CR0_EM_1 #UD CR0_TS_1 #NM TRUE CHECK_X87 let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); FP87_Status.TOP := 0b000; Next_IP := next_ip0; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_MMX(reg, result); FP87_Tag_Word := Zero(16); mmx1 m642 MMX src1 ModRM:reg mmx1 result ModRM:reg mmx1 shift_distance ModRM:r/m m642 Std::Boolean::Not Std::Integer::Eq Std::Integer::Le Std::Integer::Ne Std::Bits::Eq Std::Bits::Zero FP87::Check_For_Pending_Unmasked_Floating_Point_Exceptions Read_MMX Report_Invalid_Opcode Report_Not_Available_Exception Write_MMX Instr_PSRL CR0 FP87_Tag_Word FP87_Status Next_IP let register_size := 64; let shift_size := 64; let element_size := 16; let src1 := Read_MMX(reg)[0 +: register_size]; let shift_distance := Read_MMX(rm)[0 +: 64]; if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD OSZ_Prefix #UD REP_Not0 #UD CR0_EM_1 #UD CR0_TS_1 #NM TRUE CHECK_X87 FP87_Status.TOP := 0b000; Next_IP := ip; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_MMX(reg, result); FP87_Tag_Word := Zero(16); mmx1 mmx2 MMX src1 ModRM:reg mmx1 result ModRM:reg mmx1 shift_distance ModRM:r/m mmx2 Std::Boolean::Not Std::Integer::Eq Std::Integer::Le Std::Integer::Ne Std::Bits::Eq Std::Bits::Zero Effective_Address FP87::Check_For_Pending_Unmasked_Floating_Point_Exceptions Handle_RIP_Relative_Address Logical_Mem_Read Read_MMX Report_Invalid_Opcode Report_Not_Available_Exception Write_MMX Instr_PSRL False CR0 Memory_Read Normal_Alignment FP87_Tag_Word FP87_Status Next_IP let register_size := 64; let shift_size := 64; let element_size := 32; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_MMX(reg)[0 +: register_size]; let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD OSZ_Prefix #UD REP_Not0 #UD CR0_EM_1 #UD CR0_TS_1 #NM TRUE CHECK_X87 let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); FP87_Status.TOP := 0b000; Next_IP := next_ip0; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_MMX(reg, result); FP87_Tag_Word := Zero(16); mmx1 m642 MMX src1 ModRM:reg mmx1 result ModRM:reg mmx1 shift_distance ModRM:r/m m642 Std::Boolean::Not Std::Integer::Eq Std::Integer::Le Std::Integer::Ne Std::Bits::Eq Std::Bits::Zero FP87::Check_For_Pending_Unmasked_Floating_Point_Exceptions Read_MMX Report_Invalid_Opcode Report_Not_Available_Exception Write_MMX Instr_PSRL CR0 FP87_Tag_Word FP87_Status Next_IP let register_size := 64; let shift_size := 64; let element_size := 32; let src1 := Read_MMX(reg)[0 +: register_size]; let shift_distance := Read_MMX(rm)[0 +: 64]; if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD OSZ_Prefix #UD REP_Not0 #UD CR0_EM_1 #UD CR0_TS_1 #NM TRUE CHECK_X87 FP87_Status.TOP := 0b000; Next_IP := ip; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_MMX(reg, result); FP87_Tag_Word := Zero(16); mmx1 mmx2 MMX src1 ModRM:reg mmx1 result ModRM:reg mmx1 shift_distance ModRM:r/m mmx2 Std::Boolean::Not Std::Integer::Eq Std::Integer::Le Std::Integer::Ne Std::Bits::Eq Std::Bits::Zero Effective_Address FP87::Check_For_Pending_Unmasked_Floating_Point_Exceptions Handle_RIP_Relative_Address Logical_Mem_Read Read_MMX Report_Invalid_Opcode Report_Not_Available_Exception Write_MMX Instr_PSRL False CR0 Memory_Read Normal_Alignment FP87_Tag_Word FP87_Status Next_IP let register_size := 64; let shift_size := 64; let element_size := 64; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_MMX(reg)[0 +: register_size]; let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD OSZ_Prefix #UD REP_Not0 #UD CR0_EM_1 #UD CR0_TS_1 #NM TRUE CHECK_X87 let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); FP87_Status.TOP := 0b000; Next_IP := next_ip0; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_MMX(reg, result); FP87_Tag_Word := Zero(16); mmx1 m642 MMX src1 ModRM:reg mmx1 result ModRM:reg mmx1 shift_distance ModRM:r/m m642 Std::Boolean::Not Std::Integer::Eq Std::Integer::Le Std::Integer::Ne Std::Bits::Eq Std::Bits::Zero FP87::Check_For_Pending_Unmasked_Floating_Point_Exceptions Read_MMX Report_Invalid_Opcode Report_Not_Available_Exception Write_MMX Instr_PSRL CR0 FP87_Tag_Word FP87_Status Next_IP let register_size := 64; let shift_size := 64; let element_size := 64; let src1 := Read_MMX(reg)[0 +: register_size]; let shift_distance := Read_MMX(rm)[0 +: 64]; if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD OSZ_Prefix #UD REP_Not0 #UD CR0_EM_1 #UD CR0_TS_1 #NM TRUE CHECK_X87 FP87_Status.TOP := 0b000; Next_IP := ip; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_MMX(reg, result); FP87_Tag_Word := Zero(16); mmx1 mmx2 MMX src1 ModRM:reg mmx1 result ModRM:reg mmx1 shift_distance ModRM:r/m mmx2 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL False CR4 CR0 Memory_Read Explicitly_Aligned Next_IP let register_size := 128; let shift_size := 128; let element_size := 16; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size, alignment_type=>Explicitly_Aligned); Next_IP := next_ip0; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 m1282 SSE2 src1 ModRM:reg xmm1 result ModRM:reg xmm1 shift_distance ModRM:r/m m1282 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Calculate_RM Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL CR4 CR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 16; let src1 := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 SSE2 src1 ModRM:reg xmm1 result ModRM:reg xmm1 shift_distance ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL False CR4 CR0 Memory_Read Explicitly_Aligned Next_IP let register_size := 128; let shift_size := 128; let element_size := 32; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size, alignment_type=>Explicitly_Aligned); Next_IP := next_ip0; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 m1282 SSE2 src1 ModRM:reg xmm1 result ModRM:reg xmm1 shift_distance ModRM:r/m m1282 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Calculate_RM Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL CR4 CR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 32; let src1 := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 SSE2 src1 ModRM:reg xmm1 result ModRM:reg xmm1 shift_distance ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL False CR4 CR0 Memory_Read Explicitly_Aligned Next_IP let register_size := 128; let shift_size := 128; let element_size := 64; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size, alignment_type=>Explicitly_Aligned); Next_IP := next_ip0; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 m1282 SSE2 src1 ModRM:reg xmm1 result ModRM:reg xmm1 shift_distance ModRM:r/m m1282 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Integer::Eq Std::Integer::Ne Std::Bits::Append Std::Bits::Eq Calculate_RM Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL CR4 CR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 64; let src1 := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.rep_prefix == 0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD REP_Not0 #UD CR4_OSFXSR_0 #UD CR0_EM_1 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 SSE2 src1 ModRM:reg xmm1 result ModRM:reg xmm1 shift_distance ModRM:r/m xmm2 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 16; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 m1283 AVX result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m m1283 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 16; let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 xmm3 AVX result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m xmm3 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 32; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 m1283 AVX result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m m1283 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 32; let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 xmm3 AVX result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m xmm3 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 64; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 m1283 AVX result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m m1283 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 64; let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 xmm2 xmm3 AVX result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m xmm3 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 16; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 ymm2 m128 AVX2 result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_XMM Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 64; let element_size := 16; let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 64); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 ymm2 xmm AVX2 result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 32; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 ymm2 m128 AVX2 result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_XMM Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 64; let element_size := 32; let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 64); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 ymm2 xmm AVX2 result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 64; let disp8n := 1; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 ymm2 m128 AVX2 result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_XMM Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 64; let element_size := 64; let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 64); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL(element_size, register_size, shift_size, src1, shift_distance); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 ymm2 xmm AVX2 result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 8; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m1282 imm8 AVX10_BYTESHIFT result vvvv xmm1 src1 ModRM:r/m m1282 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 8; let old := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(Calculate_RM(mod, rm, context), register_size); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 imm8 AVX10_BYTESHIFT result vvvv xmm1 src1 ModRM:r/m xmm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 8; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m1282 imm8 AVX10_BYTESHIFT result vvvv xmm1 src1 ModRM:r/m m1282 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 8; let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(Calculate_RM(mod, rm, context), register_size); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 imm8 AVX10_BYTESHIFT result vvvv xmm1 src1 ModRM:r/m xmm2 shift_distance imm8 let elements := register_size / element_size; var result := Zero(register_size); for i := 0 to elements-1 do if k[i] == 0b1 then let op1 := src1[i *: element_size]; let count := if shift_size > 64 then Unsigned(shift_distance[0 +: 64]) else Unsigned(shift_distance); let r := Shift_Right_Logical(op1, count); result[i *: element_size] := r; else result[i *: element_size] := old[i *: element_size]; endif; endfor; Std::Integer::Gt Std::Integer::Le Std::Integer::Lt Std::Integer::Multiply Std::Integer::Positive_Divide Std::Integer::Power2 Std::Integer::Subtract Std::Bits::Unsigned Std::Bits::Eq Std::Bits::Zero Std::Bits::Shift_Right_Logical let elements := register_size / element_size; var result := Zero(register_size); for i := 0 to elements-1 do if k[i] == 0b1 then let op1 := src1[i *: element_size]; let count := if shift_size > 64 then Unsigned(shift_distance[0 +: 64]) else Unsigned(shift_distance); let r := Shift_Right_Logical(op1, count); result[i *: element_size] := r; else result[i *: element_size] := Zero(element_size); endif; endfor; Std::Integer::Gt Std::Integer::Le Std::Integer::Lt Std::Integer::Multiply Std::Integer::Positive_Divide Std::Integer::Power2 Std::Integer::Subtract Std::Bits::Unsigned Std::Bits::Eq Std::Bits::Zero Std::Bits::Shift_Right_Logical Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_m False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 8; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 m1283 AVX10_BYTESHIFT result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m m1283 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 8; let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 xmm3 AVX10_BYTESHIFT result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m xmm3 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_z False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 8; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 m1283 AVX10_BYTESHIFT result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m m1283 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 8; let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 xmm3 AVX10_BYTESHIFT result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m xmm3 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 16; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m1282 imm8 AVX512BWAVX512VL AVX10.1 result vvvv xmm1 src1 ModRM:r/m m1282 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 16; let old := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(Calculate_RM(mod, rm, context), register_size); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 imm8 AVX512BWAVX512VL AVX10.1 result vvvv xmm1 src1 ModRM:r/m xmm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 16; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m1282 imm8 AVX512BWAVX512VL AVX10.1 result vvvv xmm1 src1 ModRM:r/m m1282 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 16; let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(Calculate_RM(mod, rm, context), register_size); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 imm8 AVX512BWAVX512VL AVX10.1 result vvvv xmm1 src1 ModRM:r/m xmm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_m False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 16; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 m1283 AVX512BWAVX512VL AVX10.1 result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m m1283 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 16; let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 xmm3 AVX512BWAVX512VL AVX10.1 result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m xmm3 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_z False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 16; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 m1283 AVX512BWAVX512VL AVX10.1 result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m m1283 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 16; let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 xmm3 AVX512BWAVX512VL AVX10.1 result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m xmm3 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Le Std::Integer::Positive_Divide Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 32; let disp8n := if context.evex_b == 0b1 then element_size / 8 else 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m1282 imm8 AVX512FAVX512VL AVX10.1 result vvvv xmm1 src1 ModRM:r/m m1282 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 32; let old := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(Calculate_RM(mod, rm, context), register_size); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 imm8 AVX512FAVX512VL AVX10.1 result vvvv xmm1 src1 ModRM:r/m xmm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Le Std::Integer::Positive_Divide Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let shift_size := 8; let register_size := 128; let element_size := 32; let disp8n := if context.evex_b == 0b1 then element_size / 8 else 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m1282 imm8 AVX512FAVX512VL AVX10.1 result vvvv xmm1 src1 ModRM:r/m m1282 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 32; let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(Calculate_RM(mod, rm, context), register_size); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 imm8 AVX512FAVX512VL AVX10.1 result vvvv xmm1 src1 ModRM:r/m xmm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_m False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 32; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 m1283 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m m1283 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 32; let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 xmm3 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m xmm3 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_z False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 32; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 m1283 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m m1283 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 32; let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 xmm3 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m xmm3 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Le Std::Integer::Positive_Divide Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 64; let disp8n := if context.evex_b == 0b1 then element_size / 8 else 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m1282 imm8 AVX512FAVX512VL AVX10.1 result vvvv xmm1 src1 ModRM:r/m m1282 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 64; let old := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(Calculate_RM(mod, rm, context), register_size); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 imm8 AVX512FAVX512VL AVX10.1 result vvvv xmm1 src1 ModRM:r/m xmm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Le Std::Integer::Positive_Divide Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let shift_size := 8; let register_size := 128; let element_size := 64; let disp8n := if context.evex_b == 0b1 then element_size / 8 else 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} m1282 imm8 AVX512FAVX512VL AVX10.1 result vvvv xmm1 src1 ModRM:r/m m1282 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 8; let element_size := 64; let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(Calculate_RM(mod, rm, context), register_size); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_XMM(context.evex_v4 ++ context.vvvv, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 imm8 AVX512FAVX512VL AVX10.1 result vvvv xmm1 src1 ModRM:r/m xmm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_m False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 64; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 m1283 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m m1283 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 64; let old := Read_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, register_size); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 xmm3 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m xmm3 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_z False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 64; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 m1283 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m m1283 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Report_Invalid_Opcode Report_Not_Available_Exception Write_XMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 128; let shift_size := 128; let element_size := 64; let k := Read_Mask(context.evex_aaa); let src1 := Read_XMM(context.evex_v4 ++ context.vvvv, register_size); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_XMM(context.rex_r4 ++ context.rex_r3 ++ reg, result, (context.vex_prefix_present or context.evex_prefix_present)); xmm1 {k1}{z} xmm2 xmm3 AVX512FAVX512VL AVX10.1 result ModRM:reg xmm1 src1 vvvv xmm2 shift_distance ModRM:r/m xmm3 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 8; let element_size := 8; let disp8n := 32; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_YMM(context.evex_v4 ++ context.vvvv); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 {k1}{z} m2562 imm8 AVX10_BYTESHIFT result vvvv ymm1 src1 ModRM:r/m m2562 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 8; let element_size := 8; let old := Read_YMM(context.evex_v4 ++ context.vvvv); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 {k1}{z} ymm2 imm8 AVX10_BYTESHIFT result vvvv ymm1 src1 ModRM:r/m ymm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 8; let element_size := 8; let disp8n := 32; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 {k1}{z} m2562 imm8 AVX10_BYTESHIFT result vvvv ymm1 src1 ModRM:r/m m2562 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 8; let element_size := 8; let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 {k1}{z} ymm2 imm8 AVX10_BYTESHIFT result vvvv ymm1 src1 ModRM:r/m ymm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_m False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 8; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 {k1}{z} ymm2 m128 AVX10_BYTESHIFT result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 8; let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 {k1}{z} ymm2 xmm AVX10_BYTESHIFT result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_z False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 8; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 {k1}{z} ymm2 m128 AVX10_BYTESHIFT result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 8; let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 {k1}{z} ymm2 xmm AVX10_BYTESHIFT result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 8; let element_size := 16; let disp8n := 32; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_YMM(context.evex_v4 ++ context.vvvv); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 {k1}{z} m2562 imm8 AVX512BWAVX512VL AVX10.1 result vvvv ymm1 src1 ModRM:r/m m2562 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 8; let element_size := 16; let old := Read_YMM(context.evex_v4 ++ context.vvvv); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 {k1}{z} ymm2 imm8 AVX512BWAVX512VL AVX10.1 result vvvv ymm1 src1 ModRM:r/m ymm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 8; let element_size := 16; let disp8n := 32; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 {k1}{z} m2562 imm8 AVX512BWAVX512VL AVX10.1 result vvvv ymm1 src1 ModRM:r/m m2562 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 8; let element_size := 16; let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 {k1}{z} ymm2 imm8 AVX512BWAVX512VL AVX10.1 result vvvv ymm1 src1 ModRM:r/m ymm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_m False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 16; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 {k1}{z} ymm2 m128 AVX512BWAVX512VL AVX10.1 result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 16; let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 {k1}{z} ymm2 xmm AVX512BWAVX512VL AVX10.1 result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_z False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 16; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 {k1}{z} ymm2 m128 AVX512BWAVX512VL AVX10.1 result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 16; let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 {k1}{z} ymm2 xmm AVX512BWAVX512VL AVX10.1 result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Le Std::Integer::Positive_Divide Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 8; let element_size := 32; let disp8n := if context.evex_b == 0b1 then element_size / 8 else 32; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_YMM(context.evex_v4 ++ context.vvvv); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 {k1}{z} m2562 imm8 AVX512FAVX512VL AVX10.1 result vvvv ymm1 src1 ModRM:r/m m2562 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 8; let element_size := 32; let old := Read_YMM(context.evex_v4 ++ context.vvvv); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 {k1}{z} ymm2 imm8 AVX512FAVX512VL AVX10.1 result vvvv ymm1 src1 ModRM:r/m ymm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Le Std::Integer::Positive_Divide Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let shift_size := 8; let register_size := 256; let element_size := 32; let disp8n := if context.evex_b == 0b1 then element_size / 8 else 32; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 {k1}{z} m2562 imm8 AVX512FAVX512VL AVX10.1 result vvvv ymm1 src1 ModRM:r/m m2562 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 8; let element_size := 32; let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 {k1}{z} ymm2 imm8 AVX512FAVX512VL AVX10.1 result vvvv ymm1 src1 ModRM:r/m ymm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_m False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 32; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 {k1}{z} ymm2 m128 AVX512FAVX512VL AVX10.1 result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 32; let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 {k1}{z} ymm2 xmm AVX512FAVX512VL AVX10.1 result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_z False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 32; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 {k1}{z} ymm2 m128 AVX512FAVX512VL AVX10.1 result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 32; let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 {k1}{z} ymm2 xmm AVX512FAVX512VL AVX10.1 result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Le Std::Integer::Positive_Divide Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 8; let element_size := 64; let disp8n := if context.evex_b == 0b1 then element_size / 8 else 32; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_YMM(context.evex_v4 ++ context.vvvv); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 {k1}{z} m2562 imm8 AVX512FAVX512VL AVX10.1 result vvvv ymm1 src1 ModRM:r/m m2562 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 8; let element_size := 64; let old := Read_YMM(context.evex_v4 ++ context.vvvv); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 {k1}{z} ymm2 imm8 AVX512FAVX512VL AVX10.1 result vvvv ymm1 src1 ModRM:r/m ymm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Le Std::Integer::Positive_Divide Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let shift_size := 8; let register_size := 256; let element_size := 64; let disp8n := if context.evex_b == 0b1 then element_size / 8 else 32; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 {k1}{z} m2562 imm8 AVX512FAVX512VL AVX10.1 result vvvv ymm1 src1 ModRM:r/m m2562 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 8; let element_size := 64; let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_YMM(context.evex_v4 ++ context.vvvv, result); ymm1 {k1}{z} ymm2 imm8 AVX512FAVX512VL AVX10.1 result vvvv ymm1 src1 ModRM:r/m ymm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_m False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 64; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 {k1}{z} ymm2 m128 AVX512FAVX512VL AVX10.1 result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 64; let old := Read_YMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 {k1}{z} ymm2 xmm AVX512FAVX512VL AVX10.1 result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_z False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 64; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 {k1}{z} ymm2 m128 AVX512FAVX512VL AVX10.1 result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Read_YMM Report_Invalid_Opcode Report_Not_Available_Exception Write_YMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 256; let shift_size := 128; let element_size := 64; let k := Read_Mask(context.evex_aaa); let src1 := Read_YMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_YMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); ymm1 {k1}{z} ymm2 xmm AVX512FAVX512VL AVX10.1 result ModRM:reg ymm1 src1 vvvv ymm2 shift_distance ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 8; let element_size := 8; let disp8n := 64; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_ZMM(context.evex_v4 ++ context.vvvv); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_ZMM(context.evex_v4 ++ context.vvvv, result); zmm1 {k1}{z} m5122 imm8 AVX10_BYTESHIFT result vvvv zmm1 src1 ModRM:r/m m5122 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 8; let element_size := 8; let old := Read_ZMM(context.evex_v4 ++ context.vvvv); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_ZMM(context.evex_v4 ++ context.vvvv, result); zmm1 {k1}{z} zmm2 imm8 AVX10_BYTESHIFT result vvvv zmm1 src1 ModRM:r/m zmm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 8; let element_size := 8; let disp8n := 64; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_ZMM(context.evex_v4 ++ context.vvvv, result); zmm1 {k1}{z} m5122 imm8 AVX10_BYTESHIFT result vvvv zmm1 src1 ModRM:r/m m5122 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 8; let element_size := 8; let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_ZMM(context.evex_v4 ++ context.vvvv, result); zmm1 {k1}{z} zmm2 imm8 AVX10_BYTESHIFT result vvvv zmm1 src1 ModRM:r/m zmm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_m False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 512; let shift_size := 128; let element_size := 8; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm1 {k1}{z} zmm2 m128 AVX10_BYTESHIFT result ModRM:reg zmm1 src1 vvvv zmm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 128; let element_size := 8; let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm1 {k1}{z} zmm2 xmm AVX10_BYTESHIFT result ModRM:reg zmm1 src1 vvvv zmm2 shift_distance ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_z False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 512; let shift_size := 128; let element_size := 8; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm1 {k1}{z} zmm2 m128 AVX10_BYTESHIFT result ModRM:reg zmm1 src1 vvvv zmm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 128; let element_size := 8; let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm1 {k1}{z} zmm2 xmm AVX10_BYTESHIFT result ModRM:reg zmm1 src1 vvvv zmm2 shift_distance ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 8; let element_size := 16; let disp8n := 64; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_ZMM(context.evex_v4 ++ context.vvvv); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_ZMM(context.evex_v4 ++ context.vvvv, result); zmm1 {k1}{z} m5122 imm8 AVX512BW AVX10.1 result vvvv zmm1 src1 ModRM:r/m m5122 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 8; let element_size := 16; let old := Read_ZMM(context.evex_v4 ++ context.vvvv); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_ZMM(context.evex_v4 ++ context.vvvv, result); zmm1 {k1}{z} zmm2 imm8 AVX512BW AVX10.1 result vvvv zmm1 src1 ModRM:r/m zmm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 8; let element_size := 16; let disp8n := 64; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_ZMM(context.evex_v4 ++ context.vvvv, result); zmm1 {k1}{z} m5122 imm8 AVX512BW AVX10.1 result vvvv zmm1 src1 ModRM:r/m m5122 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 8; let element_size := 16; let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_ZMM(context.evex_v4 ++ context.vvvv, result); zmm1 {k1}{z} zmm2 imm8 AVX512BW AVX10.1 result vvvv zmm1 src1 ModRM:r/m zmm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_m False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 512; let shift_size := 128; let element_size := 16; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm1 {k1}{z} zmm2 m128 AVX512BW AVX10.1 result ModRM:reg zmm1 src1 vvvv zmm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 128; let element_size := 16; let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm1 {k1}{z} zmm2 xmm AVX512BW AVX10.1 result ModRM:reg zmm1 src1 vvvv zmm2 shift_distance ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_z False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 512; let shift_size := 128; let element_size := 16; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm1 {k1}{z} zmm2 m128 AVX512BW AVX10.1 result ModRM:reg zmm1 src1 vvvv zmm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 128; let element_size := 16; let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm1 {k1}{z} zmm2 xmm AVX512BW AVX10.1 result ModRM:reg zmm1 src1 vvvv zmm2 shift_distance ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Le Std::Integer::Positive_Divide Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 8; let element_size := 32; let disp8n := if context.evex_b == 0b1 then element_size / 8 else 64; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_ZMM(context.evex_v4 ++ context.vvvv); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_ZMM(context.evex_v4 ++ context.vvvv, result); zmm1 {k1}{z} m5122 imm8 AVX512F AVX10.1 result vvvv zmm1 src1 ModRM:r/m m5122 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 8; let element_size := 32; let old := Read_ZMM(context.evex_v4 ++ context.vvvv); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_ZMM(context.evex_v4 ++ context.vvvv, result); zmm1 {k1}{z} zmm2 imm8 AVX512F AVX10.1 result vvvv zmm1 src1 ModRM:r/m zmm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_Or Std::Integer::Le Std::Integer::Positive_Divide Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let shift_size := 8; let register_size := 512; let element_size := 32; let disp8n := if context.evex_b == 0b1 then element_size / 8 else 64; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_ZMM(context.evex_v4 ++ context.vvvv, result); zmm1 {k1}{z} m5122 imm8 AVX512F AVX10.1 result vvvv zmm1 src1 ModRM:r/m m5122 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 8; let element_size := 32; let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_ZMM(context.evex_v4 ++ context.vvvv, result); zmm1 {k1}{z} zmm2 imm8 AVX512F AVX10.1 result vvvv zmm1 src1 ModRM:r/m zmm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_m False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 512; let shift_size := 128; let element_size := 32; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm1 {k1}{z} zmm2 m128 AVX512F AVX10.1 result ModRM:reg zmm1 src1 vvvv zmm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 128; let element_size := 32; let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm1 {k1}{z} zmm2 xmm AVX512F AVX10.1 result ModRM:reg zmm1 src1 vvvv zmm2 shift_distance ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_z False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 512; let shift_size := 128; let element_size := 32; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm1 {k1}{z} zmm2 m128 AVX512F AVX10.1 result ModRM:reg zmm1 src1 vvvv zmm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 128; let element_size := 32; let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b0)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_1 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm1 {k1}{z} zmm2 xmm AVX512F AVX10.1 result ModRM:reg zmm1 src1 vvvv zmm2 shift_distance ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Le Std::Integer::Positive_Divide Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_m True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 8; let element_size := 64; let disp8n := if context.evex_b == 0b1 then element_size / 8 else 64; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_ZMM(context.evex_v4 ++ context.vvvv); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_ZMM(context.evex_v4 ++ context.vvvv, result); zmm1 {k1}{z} m5122 imm8 AVX512F AVX10.1 result vvvv zmm1 src1 ModRM:r/m m5122 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 8; let element_size := 64; let old := Read_ZMM(context.evex_v4 ++ context.vvvv); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_ZMM(context.evex_v4 ++ context.vvvv, result); zmm1 {k1}{z} zmm2 imm8 AVX512F AVX10.1 result vvvv zmm1 src1 ModRM:r/m zmm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Le Std::Integer::Positive_Divide Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Current_Mode Effective_Address Handle_RIP_Relative_Address Masked_Vector_Mem_Read Mem_Fetch Read_Mask Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_z True Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let shift_size := 8; let register_size := 512; let element_size := 64; let disp8n := if context.evex_b == 0b1 then element_size / 8 else 64; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let shift_distance := Sign_Extend(Mem_Fetch?(next_ip0, 8), shift_size); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0 + 1); if not ((context.vex_pp == 0b01) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let src1 := Masked_Vector_Mem_Read?(register_size, element_size, context.evex_b == 0b1, k, segment, effective_address, fault_suppression=>True); Next_IP := next_ip0 + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_ZMM(context.evex_v4 ++ context.vvvv, result); zmm1 {k1}{z} m5122 imm8 AVX512F AVX10.1 result vvvv zmm1 src1 ModRM:r/m m5122 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Bits::Add_int Std::Bits::Append Std::Bits::Eq Std::Bits::Sign_Extend Calculate_RM Current_Mode Mem_Fetch Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 8; let element_size := 64; let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(Calculate_RM(mod, rm, context)); let shift_distance := Sign_Extend(Mem_Fetch?(ip, 8), shift_size); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip + 1; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_ZMM(context.evex_v4 ++ context.vvvv, result); zmm1 {k1}{z} zmm2 imm8 AVX512F AVX10.1 result vvvv zmm1 src1 ModRM:r/m zmm2 shift_distance imm8 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_m False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 512; let shift_size := 128; let element_size := 64; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm1 {k1}{z} zmm2 m128 AVX512F AVX10.1 result ModRM:reg zmm1 src1 vvvv zmm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_m Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 128; let element_size := 64; let old := Read_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_m(element_size, register_size, shift_size, old, k, src1, shift_distance, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm1 {k1}{z} zmm2 xmm AVX512F AVX10.1 result ModRM:reg zmm1 src1 vvvv zmm2 shift_distance ModRM:r/m xmm Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Current_Mode Effective_Address Handle_RIP_Relative_Address Logical_Mem_Read Read_Mask Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_z False Real_Address_Mode Virtual_8086_Mode CR4 CR0 Memory_Read Normal_Alignment XCR0 Next_IP let register_size := 512; let shift_size := 128; let element_size := 64; let disp8n := 16; let (ea_offset, segment, next_ip0, is_rip_relative) := Effective_Address?(address_size, context, mod, rm, disp8n, ip); let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let effective_address := Handle_RIP_Relative_Address(address_size, is_rip_relative, ea_offset, next_ip0); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM let shift_distance := Logical_Mem_Read?(segment, effective_address, shift_size); Next_IP := next_ip0; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm1 {k1}{z} zmm2 m128 AVX512F AVX10.1 result ModRM:reg zmm1 src1 vvvv zmm2 shift_distance ModRM:r/m m128 Std::Boolean::Not Std::Boolean::Strict_And Std::Boolean::Strict_Or Std::Integer::Add Std::Bits::Append Std::Bits::Eq Calculate_RM Current_Mode Read_Mask Read_XMM Read_ZMM Report_Invalid_Opcode Report_Not_Available_Exception Write_ZMM Instr_PSRL_z Real_Address_Mode Virtual_8086_Mode CR4 CR0 XCR0 Next_IP let register_size := 512; let shift_size := 128; let element_size := 64; let k := Read_Mask(context.evex_aaa); let src1 := Read_ZMM(context.evex_v4 ++ context.vvvv); let shift_distance := Read_XMM(Calculate_RM(mod, rm, context), 128); if not ((context.vex_pp == 0b01) and (context.evex_b == 0b0) and (context.rex_w == 0b1)) then Report_Invalid_Opcode!(); endif; LockPrefix #UD ModeRealOrVirtual #UD VEX_W_0 #UD CR4_OSXSAVE_0 #UD XCR0_AVX_0 #UD CR0_TS_1 #NM Next_IP := ip; let result := Instr_PSRL_z(element_size, register_size, shift_size, k, src1, shift_distance, context, mod); Write_ZMM(context.rex_r4 ++ context.rex_r3 ++ reg, result); zmm1 {k1}{z} zmm2 xmm AVX512F AVX10.1 result ModRM:reg zmm1 src1 vvvv zmm2 shift_distance ModRM:r/m xmm vector integer/shift

An explicitly-aligned memory access is performed. If EVEX.b == 0b1, a single element is read from memory and broadcast across the vector. Memory faults while reading inactive elements are suppressed. If EVEX.z == 0b0, the previous value of the result is read into `old` and the masking variant of the operation is used; if EVEX.z == 0b1, the zeroing variant of the operation is used. Operand is sign-extended to shift_size bits.