(kicad_pcb (version 20240108) (generator pcbnew) (general (thickness 0.4) (legacy_teardrops no) ) (paper "A4") (title_block (title "GLYPH-REAPER — Covert Embedded Display Bus Interception") (date "2026-08-12") (rev "Rev A") (company "jayis1") (comment 1 "22mm x 18mm flexible PCB, 4-layer polyimide") (comment 2 "Author: jayis1") (comment 3 "MIPI DSI / RGB / SPI LCD / LVDS display capture implant") ) (layers (0 "F.Cu" signal "Top copper — components") (31 "B.Cu" signal "Bottom copper — ground plane") (32 "B.Adhes" user "Bottom adhesive") (33 "F.Adhes" user "Top adhesive") (34 "B.Paste" user "Bottom solder paste") (35 "F.Paste" user "Top solder paste") (36 "B.SilkS" user "Bottom silkscreen") (37 "F.SilkS" user "Top silkscreen") (38 "B.Mask" user "Bottom solder mask") (39 "F.Mask" user "Top solder mask") (40 "Dwgs.User" user "Design guide") (41 "Cmts.User" user "Comments") (42 "Eco1.User" user "Eco1") (43 "Eco2.User" user "Eco2") (44 "Edge.Cuts" user "Board outline") (45 "Margin" user "Margin") (46 "B.CrtYd" user "Bottom courtyard") (47 "F.CrtYd" user "Top courtyard") (48 "B.Fab" user "Bottom fabrication") (49 "F.Fab" user "Top fabrication") (1 "In1.Cu" signal "Inner 1 — signal layer") (2 "In2.Cu" signal "Inner 2 — ground plane") ) (setup (stackup (layer "F.SilkS" (type "Top Silk Screen")) (layer "F.Paste" (type "Top Solder Paste")) (layer "F.Mask" (type "Top Solder Mask") (thickness 0.015)) (layer "F.Cu" (type "copper") (thickness 0.012)) (layer "Dielectric 1" (type "core") (thickness 0.05) (material "Polyimide")) (layer "In1.Cu" (type "copper") (thickness 0.012)) (layer "Dielectric 2" (type "prepreg") (thickness 0.05) (material "Polyimide")) (layer "In2.Cu" (type "copper") (thickness 0.012)) (layer "Dielectric 3" (type "core") (thickness 0.05) (material "Polyimide")) (layer "B.Cu" (type "copper") (thickness 0.012)) (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.015)) (layer "B.SilkS" (type "Bottom Silk Screen")) (copper_finish "ENIG") (dielectric_constraints no) ) (pad_to_mask_clearance 0.05) (solder_mask_min_width 0.04) (grid_origin 0 0) (pcbplotparams (layerselection 0x00010fc_ffffffff) (plot_on_all_layers 0) (usegerberextensions 1) (usegerberattributes 1) (usegerberadvancedattributes 1) (creategerberjobfile 1) (dashed_line_dash_ratio 12.0) (dashed_line_gap_ratio 3.0) (svgprecision 6) (excludeedgelayer 1) (plotframeref 0) (viasonmask 0) (mode 1) (useauxorigin 0) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15.0) (pdf_front_fp_property_popups 1) (pdf_back_fp_property_popups 1) (dxfpolygonmode 1) (dxfimperialunits 1) (dxfusepcbnewfont 1) (psnegative 0) (psa4output 0) (pscolor 1) (plotpadstosilk 0) ) ) /* ============================================================ * NETS * ============================================================ */ (net 0 "") (net 1 "+3V3") (net 2 "GND") (net 3 "VBAT") (net 4 "VBUS") (net 10 "FPGA_SCK") (net 11 "FPGA_MOSI") (net 12 "FPGA_MISO") (net 13 "FPGA_CSN") (net 14 "FPGA_CDONE") (net 15 "FPGA_CRSTB") (net 20 "DSP_SCK") (net 21 "DSP_MOSI") (net 22 "DSP_MISO") (net 23 "DSP_CSN") (net 24 "DSP_HANDSHAKE") (net 25 "DSP_RESET") (net 30 "QSPI_CLK") (net 31 "QSPI_IO0") (net 32 "QSPI_IO1") (net 33 "QSPI_IO2") (net 34 "QSPI_IO3") (net 35 "QSPI_CSN_PSRAM") (net 36 "QSPI_CSN_FLASH") (net 40 "I2C_SDA") (net 41 "I2C_SCL") (net 50 "FRAME_D0") (net 51 "FRAME_D1") (net 52 "FRAME_D2") (net 53 "FRAME_D3") (net 54 "FRAME_D4") (net 55 "FRAME_D5") (net 56 "FRAME_D6") (net 57 "FRAME_D7") (net 58 "FRAME_HSYNC") (net 59 "FRAME_VSYNC") (net 60 "FRAME_PCLK") (net 61 "FRAME_DE") (net 70 "LED_RED") (net 71 "LED_GRN") (net 72 "LED_BLU") (net 73 "BTN_USER") (net 80 "USB_D+") (net 81 "USB_D-") (net 90 "DISP_CLK_P") (net 91 "DISP_CLK_N") (net 92 "DISP_DATA0_P") (net 93 "DISP_DATA0_N") (net 94 "DISP_DATA1_P") (net 95 "DISP_DATA1_N") (net 96 "DISP_DATA2_P") (net 97 "DISP_DATA2_N") (net 98 "DISP_DATA3_P") (net 99 "DISP_DATA3_N") /* ============================================================ * FOOTPRINTS — Component placement on 22mm x 18mm flex PCB * ============================================================ */ /* U1: nRF52840-QIAA-R7 — Center of board */ (footprint "Package_DFN_QFN:QFN-73-1EP_7x7mm_P0.5mm_EP5.6x5.6mm" (layer "F.Cu") (at 11 9) (property "Reference" "U1" (at 0 -5 0)) (property "Value" "nRF52840-QIAA-R7" (at 0 5 0)) (property "Manufacturer" "Nordic Semiconductor") (property "PartNumber" "nRF52840-QIAA-R7") (property "Author" "jayis1") (pad "1" smd rect (at -3.5 -3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 1)) (pad "2" smd rect (at -3 -3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 0)) (pad "3" smd rect (at -2.5 -3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 0)) (pad "4" smd rect (at -2 -3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 0)) (pad "5" smd rect (at -1.5 -3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 0)) (pad "6" smd rect (at -1 -3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 3)) (pad "7" smd rect (at -0.5 -3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 0)) (pad "8" smd rect (at 0 -3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 10)) (pad "9" smd rect (at 0.5 -3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 11)) (pad "10" smd rect (at 1 -3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 12)) (pad "35" smd rect (at -3.5 3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 1)) (pad "58" smd rect (at 0 3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 4)) (pad "59" smd rect (at 0.5 3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 81)) (pad "60" smd rect (at 1 3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 80)) (pad "67" smd rect (at -3.5 -3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) (pad "EP" smd rect (at 0 0) (size 5.6 5.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) ) /* U2: iCE40UP5K-SG48 — Right side */ (footprint "Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm" (layer "F.Cu") (at 11 16) (property "Reference" "U2" (at 0 -5 0)) (property "Value" "iCE40UP5K-SG48" (at 0 5 0)) (property "Manufacturer" "Lattice Semiconductor") (property "PartNumber" "iCE40UP5K-SG48") (property "Author" "jayis1") (pad "1" smd rect (at -3.5 -3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 90)) (pad "2" smd rect (at -3 -3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 91)) (pad "7" smd rect (at -0.5 -3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 1)) (pad "11" smd rect (at 1.5 -3.25) (size 0.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) (pad "28" smd rect (at 3.5 0) (size 0.9 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (net 12)) (pad "29" smd rect (at 3.5 0.5) (size 0.9 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (net 11)) (pad "30" smd rect (at 3.5 1) (size 0.9 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (net 10)) (pad "31" smd rect (at 3.5 1.5) (size 0.9 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (net 13)) (pad "34" smd rect (at 3.5 3) (size 0.9 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (net 14)) (pad "35" smd rect (at 3.5 3.5) (size 0.9 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (net 15)) (pad "EP" smd rect (at 0 0) (size 5.6 5.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) ) /* U3: ESP32-S3-MINI-1 — Bottom area */ (footprint "RF_Module:ESP32-S3-MINI-1" (layer "F.Cu") (at 11 15.5 180) (property "Reference" "U3" (at 0 -7 0)) (property "Value" "ESP32-S3-MINI-1" (at 0 7 0)) (property "Manufacturer" "Espressif Systems") (property "PartNumber" "ESP32-S3-MINI-1") (property "Author" "jayis1") (pad "1" smd rect (at -7 -5.8) (size 0.8 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) (pad "2" smd rect (at -7 -4.8) (size 0.8 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 1)) (pad "27" smd rect (at 0 -7.2) (size 0.8 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 25)) (pad "28" smd rect (at 0 7.2) (size 0.8 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 1)) (pad "29" smd rect (at 1 -7.2) (size 0.8 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) ) /* U4: APS6404L PSRAM — 8MB QSPI */ (footprint "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" (layer "F.Cu") (at 3 13) (property "Reference" "U4" (at 0 -3.5 0)) (property "Value" "APS6404L-3SQR-SN" (at 0 3.5 0)) (property "Manufacturer" "AP Memory") (property "PartNumber" "APS6404L-3SQR-SN") (property "Author" "jayis1") (pad "1" smd rect (at -2.7 1.905) (size 0.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 35)) (pad "2" smd rect (at -2.7 0.635) (size 0.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 32)) (pad "3" smd rect (at -2.7 -0.635) (size 0.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 33)) (pad "4" smd rect (at -2.7 -1.905) (size 0.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) (pad "5" smd rect (at 2.7 -1.905) (size 0.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 31)) (pad "6" smd rect (at 2.7 -0.635) (size 0.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 30)) (pad "7" smd rect (at 2.7 0.635) (size 0.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 34)) (pad "8" smd rect (at 2.7 1.905) (size 0.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 1)) ) /* U5: W25Q128JV NOR Flash — 16MB QSPI */ (footprint "Package_SO:SOIC-8_5.275x5.275mm_P1.27mm" (layer "F.Cu") (at 3 8) (property "Reference" "U5" (at 0 -3.5 0)) (property "Value" "W25Q128JVSIQ" (at 0 3.5 0)) (property "Manufacturer" "Winbond Electronics") (property "PartNumber" "W25Q128JVSIQ") (property "Author" "jayis1") (pad "1" smd rect (at -3.0 1.905) (size 0.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 36)) (pad "2" smd rect (at -3.0 0.635) (size 0.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 32)) (pad "3" smd rect (at -3.0 -0.635) (size 0.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 33)) (pad "4" smd rect (at -3.0 -1.905) (size 0.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) (pad "5" smd rect (at 3.0 -1.905) (size 0.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 31)) (pad "6" smd rect (at 3.0 -0.635) (size 0.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 30)) (pad "7" smd rect (at 3.0 0.635) (size 0.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 34)) (pad "8" smd rect (at 3.0 1.905) (size 0.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 1)) ) /* U6: TPS62740 DC/DC Converter */ (footprint "Package_SON:Texas_S-PDSO-N10" (layer "F.Cu") (at 3 3) (property "Reference" "U6" (at 0 -3 0)) (property "Value" "TPS62740DSCT" (at 0 3 0)) (property "Manufacturer" "Texas Instruments") (property "PartNumber" "TPS62740DSCT") (property "Author" "jayis1") (pad "1" smd rect (at -1.5 1.5) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 3)) (pad "2" smd rect (at -1.5 0.5) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 3)) (pad "3" smd rect (at -1.5 -0.5) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 0)) (pad "6" smd rect (at 1.5 1.5) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 1)) (pad "10" smd rect (at 0 -1.5) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) ) /* U7: LIS2DH12 Accelerometer */ (footprint "Package_LGA:LGA-12_2x2mm_P0.5mm" (layer "F.Cu") (at 18 3) (property "Reference" "U7" (at 0 -2.5 0)) (property "Value" "LIS2DH12TR" (at 0 2.5 0)) (property "Manufacturer" "STMicroelectronics") (property "PartNumber" "LIS2DH12TR") (property "Author" "jayis1") (pad "1" smd rect (at -1 -0.75) (size 0.3 0.4) (layers "F.Cu" "F.Paste" "F.Mask") (net 1)) (pad "2" smd rect (at -1 -0.25) (size 0.3 0.4) (layers "F.Cu" "F.Paste" "F.Mask") (net 1)) (pad "5" smd rect (at -1 0.25) (size 0.3 0.4) (layers "F.Cu" "F.Paste" "F.Mask") (net 41)) (pad "6" smd rect (at -1 0.75) (size 0.3 0.4) (layers "F.Cu" "F.Paste" "F.Mask") (net 40)) (pad "9" smd rect (at 0.5 -0.75) (size 0.3 0.4) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) (pad "10" smd rect (at 1 -0.75) (size 0.3 0.4) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) ) /* J1: MIPI DSI FPC Connector (41-pin, 0.5mm pitch) */ (footprint "Connector_FFC-FPC:Hirose_DF40C-41DP-0.4V_51_1x41_P0.4mm_Vertical" (layer "F.Cu") (at 18 11) (property "Reference" "J1" (at 0 -3 0)) (property "Value" "DF40C-41DP-0.4V(51)" (at 0 3 0)) (property "Manufacturer" "Hirose Electric") (property "PartNumber" "DF40C-41DP-0.4V(51)") (property "Author" "jayis1") (pad "1" smd rect (at -8 -1) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) (pad "2" smd rect (at -7.6 -1) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (net 90)) (pad "3" smd rect (at -7.2 -1) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (net 91)) (pad "4" smd rect (at -6.8 -1) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (net 92)) (pad "5" smd rect (at -6.4 -1) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (net 93)) (pad "6" smd rect (at -6 -1) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (net 94)) (pad "7" smd rect (at -5.6 -1) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (net 95)) (pad "8" smd rect (at -5.2 -1) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (net 96)) (pad "9" smd rect (at -4.8 -1) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (net 97)) (pad "10" smd rect (at -4.4 -1) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (net 98)) (pad "11" smd rect (at -4 -1) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (net 99)) (pad "20" smd rect (at -0.4 -1) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (net 1)) (pad "41" smd rect (at 8 -1) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) ) /* J3: USB-C Connector */ (footprint "Connector_USB:USB_C_Receptacle_Amphenol_10104110" (layer "F.Cu") (at 3 17) (property "Reference" "J3" (at 0 -5 0)) (property "Value" "USB-C" (at 0 5 0)) (property "Manufacturer" "Amphenol") (property "PartNumber" "10104110") (property "Author" "jayis1") (pad "A1" smd rect (at -4 -1) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) (pad "A4" smd rect (at -3 -1) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 4)) (pad "A6" smd rect (at -1.5 -1) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 80)) (pad "A7" smd rect (at -1 -1) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 81)) (pad "B4" smd rect (at 2.5 1) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 4)) (pad "B6" smd rect (at 1 1) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 80)) (pad "B7" smd rect (at 1.5 1) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 81)) ) /* LEDs */ (footprint "LED_SMD:LED_0402_1005Metric" (layer "F.Cu") (at 18 16) (property "Reference" "D1" (at 0 -1.5 0)) (property "Value" "RED" (at 0 1.5 0)) (property "Author" "jayis1") (pad "1" smd rect (at -0.5 0) (size 0.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 70)) (pad "2" smd rect (at 0.5 0) (size 0.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) ) (footprint "LED_SMD:LED_0402_1005Metric" (layer "F.Cu") (at 18 17) (property "Reference" "D2" (at 0 -1.5 0)) (property "Value" "GRN" (at 0 1.5 0)) (property "Author" "jayis1") (pad "1" smd rect (at -0.5 0) (size 0.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 71)) (pad "2" smd rect (at 0.5 0) (size 0.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) ) (footprint "LED_SMD:LED_0402_1005Metric" (layer "F.Cu") (at 18 18) (property "Reference" "D3" (at 0 -1.5 0)) (property "Value" "BLU" (at 0 1.5 0)) (property "Author" "jayis1") (pad "1" smd rect (at -0.5 0) (size 0.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 72)) (pad "2" smd rect (at 0.5 0) (size 0.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) ) /* Decoupling capacitors */ (footprint "Capacitor_SMD:C_0402_1005Metric" (layer "F.Cu") (at 6 6) (property "Reference" "C3" (at 0 -1 0)) (property "Value" "100nF" (at 0 1 0)) (property "Author" "jayis1") (pad "1" smd rect (at -0.5 0) (size 0.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 1)) (pad "2" smd rect (at 0.5 0) (size 0.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) ) (footprint "Capacitor_SMD:C_0402_1005Metric" (layer "F.Cu") (at 7 6) (property "Reference" "C4" (at 0 -1 0)) (property "Value" "4.7uF" (at 0 1 0)) (property "Author" "jayis1") (pad "1" smd rect (at -0.5 0) (size 0.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 1)) (pad "2" smd rect (at 0.5 0) (size 0.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) ) (footprint "Capacitor_SMD:C_0402_1005Metric" (layer "F.Cu") (at 8 6) (property "Reference" "C5" (at 0 -1 0)) (property "Value" "10uF" (at 0 1 0)) (property "Author" "jayis1") (pad "1" smd rect (at -0.5 0) (size 0.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 1)) (pad "2" smd rect (at 0.5 0) (size 0.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) ) /* Crystal Y1 — 32 MHz */ (footprint "Crystal:Crystal_SMD_2016-2Pin_2.0x1.6mm" (layer "F.Cu") (at 8 10) (property "Reference" "Y1" (at 0 -2 0)) (property "Value" "32MHz" (at 0 2 0)) (property "Author" "jayis1") (pad "1" smd rect (at -0.8 0) (size 0.8 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 0)) (pad "2" smd rect (at 0.8 0) (size 0.8 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (net 0)) ) /* Crystal Y2 — 32.768 kHz */ (footprint "Crystal:Crystal_SMD_3215-2Pin_3.2x1.5mm" (layer "F.Cu") (at 14 3) (property "Reference" "Y2" (at 0 -2 0)) (property "Value" "32.768kHz" (at 0 2 0)) (property "Author" "jayis1") (pad "1" smd rect (at -1.2 0) (size 1.0 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 0)) (pad "2" smd rect (at 1.2 0) (size 1.0 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 0)) ) /* Battery holder */ (footprint "Battery:BatteryHolder_Keystone_3002_1x2032" (layer "F.Cu") (at 3 3) (property "Reference" "BT1" (at 0 -12 0)) (property "Value" "CR2032" (at 0 12 0)) (property "Author" "jayis1") (pad "1" smd rect (at 0 -8) (size 5 5) (layers "F.Cu" "F.Paste" "F.Mask") (net 3)) (pad "2" smd rect (at 0 8) (size 5 5) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) ) /* ============================================================ * BOARD OUTLINE — 22mm x 18mm flexible PCB * ============================================================ */ (gr_line (start 0 0) (end 22 0) (stroke (width 0.1)) (layer "Edge.Cuts")) (gr_line (start 22 0) (end 22 18) (stroke (width 0.1)) (layer "Edge.Cuts")) (gr_line (start 22 18) (end 0 18) (stroke (width 0.1)) (layer "Edge.Cuts")) (gr_line (start 0 18) (end 0 0) (stroke (width 0.1)) (layer "Edge.Cuts")) /* Board identification text */ (gr_text "GLYPH-REAPER Rev A" (at 11 1) (layer "F.SilkS") (effects (font (size 0.8 0.8)))) (gr_text "jayis1 2026" (at 11 17.5) (layer "F.SilkS") (effects (font (size 0.6 0.6)))) (gr_text "22x18mm Flex" (at 1 17.5) (layer "F.SilkS") (effects (font (size 0.5 0.5)))) /* ============================================================ * ZONES — Ground plane on inner layers * ============================================================ */ (zone (net 2) (net_name "GND") (layer "In2.Cu") (tstamp 0) (hatch edge 0.2) (connect_pads (clearance 0.1)) (min_thickness 0.1) (fill yes (thermal_gap 0.15) (thermal_bridge_width 0.2)) (polygon (pts (xy 0.1 0.1) (xy 21.9 0.1) (xy 21.9 17.9) (xy 0.1 17.9))) ) (zone (net 2) (net_name "GND") (layer "B.Cu") (tstamp 1) (hatch edge 0.2) (connect_pads (clearance 0.1)) (min_thickness 0.1) (fill yes (thermal_gap 0.15) (thermal_bridge_width 0.2)) (polygon (pts (xy 0.1 0.1) (xy 21.9 0.1) (xy 21.9 17.9) (xy 0.1 17.9))) ) /* ============================================================ * ROUTES — Key signal traces (representative) * ============================================================ */ /* QSPI clock and data lines (50 ohm impedance on In1.Cu) */ (segment (start 5.7 12.365) (end 7.5 12.365) (width 0.15) (layer "In1.Cu") (net 30)) (segment (start 5.7 13.095) (end 7.5 13.095) (width 0.15) (layer "In1.Cu") (net 31)) (segment (start 5.7 11.365) (end 7.5 11.365) (width 0.15) (layer "In1.Cu") (net 32)) (segment (start 5.7 10.365) (end 7.5 10.365) (width 0.15) (layer "In1.Cu") (net 33)) (segment (start 5.7 14.365) (end 7.5 14.365) (width 0.15) (layer "In1.Cu") (net 34)) /* FPGA SPI lines (routed on F.Cu) */ (segment (start 7.5 5.75) (end 9 7.25) (width 0.15) (layer "F.Cu") (net 10)) (segment (start 7.5 6.25) (end 9 7.75) (width 0.15) (layer "F.Cu") (net 11)) (segment (start 7.5 6.75) (end 9 8.25) (width 0.15) (layer "F.Cu") (net 12)) (segment (start 7.5 7.25) (end 9 8.75) (width 0.15) (layer "F.Cu") (net 13)) /* Display bus differential pairs (F.Cu, 90 ohm differential) */ (segment (start 16.4 10) (end 15 10) (width 0.12) (layer "F.Cu") (net 90)) (segment (start 16.4 10.4) (end 15 10.4) (width 0.12) (layer "F.Cu") (net 91)) (segment (start 16.4 9.6) (end 15 9.6) (width 0.12) (layer "F.Cu") (net 92)) (segment (start 16.4 9.2) (end 15 9.2) (width 0.12) (layer "F.Cu") (net 93)) /* Vias for layer transitions */ (via (at 6 6) (size 0.3) (drill 0.15) (layers "F.Cu" "B.Cu") (net 2)) (via (at 9 6) (size 0.3) (drill 0.15) (layers "F.Cu" "B.Cu") (net 2)) (via (at 12 6) (size 0.3) (drill 0.15) (layers "F.Cu" "B.Cu") (net 2)) (via (at 15 6) (size 0.3) (drill 0.15) (layers "F.Cu" "B.Cu") (net 2)) (via (at 18 6) (size 0.3) (drill 0.15) (layers "F.Cu" "B.Cu") (net 2)) (via (at 6 12) (size 0.3) (drill 0.15) (layers "F.Cu" "B.Cu") (net 2)) (via (at 9 12) (size 0.3) (drill 0.15) (layers "F.Cu" "B.Cu") (net 2)) (via (at 12 12) (size 0.3) (drill 0.15) (layers "F.Cu" "B.Cu") (net 2)) (via (at 15 12) (size 0.3) (drill 0.15) (layers "F.Cu" "B.Cu") (net 2)) (via (at 18 12) (size 0.3) (drill 0.15) (layers "F.Cu" "B.Cu") (net 2)) )