(kicad_pcb (version 20240108) (generator "kicad-pcb-tools") (generator_version "7.0") (general (thickness 1.6) (legacy_teardrops no) ) (paper "A4") (title_block (title "WireReaper — Multi-Bus Infiltrator") (date "2026-06-22") (rev "1.0") (company "jayis1") (comment 1 "Author: jayis1") (comment 2 "License: CERN-OHL-S v2") (comment 3 "95x55mm, 4-layer") ) (layers (0 "F.Cu" signal) (1 "In1.Cu" signal "GND") (2 "In2.Cu" signal "PWR") (31 "B.Cu" signal) (32 "B.Adhes" user "B.Adhesive") (33 "F.Adhes" user "F.Adhesive") (34 "B.Paste" user) (35 "F.Paste" user) (36 "B.SilkS" user "B.Silkscreen") (37 "F.SilkS" user "F.Silkscreen") (38 "B.Mask" user) (39 "F.Mask" user) (40 "Dwgs.User" user "User.Drawings") (41 "Cmts.User" user "User.Comments") (42 "Eco1.User" user "User.Eco1") (43 "Eco2.User" user "User.Eco2") (44 "Edge.Cuts" user) (45 "Margin" user) (46 "B.CrtYd" user "B.Courtyard") (47 "F.CrtYd" user "F.Courtyard") (48 "B.Fab" user) (49 "F.Fab" user) ) (setup (pad_to_mask_clearance 0.05) (solder_mask_min_width 0.05) (grid_origin 0 0) (pcbplotparams (layerselection 0x00010fc_ffffffff) (plot_on_all_layers_selection 0x0000000_00000000) (disableapertmacros no) (usegerberextensions no) (usegerberattributes yes) (usegerberadvancedattributes yes) (creategerberjobfile yes) (dashed_line_dash_ratio 12.000000) (dashed_line_gap_ratio 3.000000) (svgprecision 4) (plotframeref no) (viasonmask no) (mode 1) (useauxorigin no) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15.000000) (pdf_front_fp_property_popups yes) (pdf_back_fp_property_popups yes) (dxfpolygonmode yes) (dxfimperialunits yes) (dxfusepcbnewfont yes) (psnegative no) (psa4output yes) (plotreference yes) (plotvalue yes) (plotfptext yes) (plotinvisibletext no) (sketchpadsonfab no) (subtractmaskfromsilk no) (outputformat 1) (mirror no) (drillshape 1) (scaleselection 1) (outputdirectory "gerbers/")) ) (net 0 "") (net 1 "VBUS") (net 2 "GND") (net 3 "3V3") (net 4 "VBAT") (net 5 "OSC_IN") (net 6 "OSC_OUT") (net 7 "FPGA_SCK") (net 8 "FPGA_MISO") (net 9 "FPGA_MOSI") (net 10 "FPGA_NCS") (net 11 "FPGA_CDONE") (net 12 "FPGA_CRESET") (net 13 "BLE_TX") (net 14 "BLE_RX") (net 15 "ULPI_CLK") (net 16 "ULPI_DIR") (net 17 "ULPI_STP") (net 18 "ULPI_NXT") (net 19 "ULPI_D0") (net 20 "ULPI_D7") (net 21 "FMC_D0") (net 22 "FMC_D31") (net 23 "FMC_A0") (net 24 "FMC_SDCLK") (net 25 "FMC_SDNRAS") (net 26 "I2C_INT_SCL") (net 27 "I2C_INT_SDA") (net 28 "SD_D0") (net 29 "SD_CLK") (net 30 "SD_CMD") (net 31 "USB_DM") (net 32 "USB_DP") (net 33 "I2C0_SCL") (net 34 "I2C0_SDA") (net 35 "I2C1_SCL") (net 36 "I2C1_SDA") (net 37 "SPI0_SCK") (net 38 "SPI0_MISO") (net 39 "SPI0_MOSI") (net 40 "SPI0_NCS") (net 41 "UART0_TX") (net 42 "UART0_RX") (net 43 "ONEWIRE") (net 44 "SD_D1") (net 45 "SD_D2") (net 46 "SD_D3") ; ---- Footprints ---- ; STM32H743 (U1) — center of board (footprint "Package_QFP:LQFP-100_14x14mm_P0.5mm" (layer "F.Cu") (tedit 0) (tstamp 00000001) (at 47.5 27.5 0) (property "Reference" "U1" (at 0 -9 (angle 0) (layer "F.SilkS"))) (property "Value" "STM32H743VIT6" (at 0 9 (angle 0) (layer "F.Fab")) (property "Manufacturer" "STMicroelectronics") (property "MPN" "STM32H743VIT6") (property "Author" "jayis1")) (pad "1" smd roundrect (at -6 -6.75 0) (size 0.3 1.55) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (net 2 "GND")) (pad "5" smd roundrect (at -6 -5.25 0) (size 0.3 1.55) (layers "F.Cu" "F.Paste" "F.Mask") (net 5 "OSC_IN")) (pad "6" smd roundrect (at -6 -4.75 0) (size 0.3 1.55) (layers "F.Cu" "F.Paste" "F.Mask") (net 6 "OSC_OUT")) (pad "9" smd roundrect (at -6 -3.25 0) (size 0.3 1.55) (layers "F.Cu" "F.Paste" "F.Mask") (net 13 "BLE_TX")) (pad "10" smd roundrect (at -6 -2.75 0) (size 0.3 1.55) (layers "F.Cu" "F.Paste" "F.Mask") (net 14 "BLE_RX")) (pad "11" smd roundrect (at -6 -2.25 0) (size 0.3 1.55) (layers "F.Cu" "F.Paste" "F.Mask") (net 43 "ONEWIRE")) (pad "14" smd roundrect (at -6 -0.75 0) (size 0.3 1.55) (layers "F.Cu" "F.Paste" "F.Mask") (net 37 "SPI0_SCK")) (pad "15" smd roundrect (at -6 -0.25 0) (size 0.3 1.55) (layers "F.Cu" "F.Paste" "F.Mask") (net 38 "SPI0_MISO")) (pad "16" smd roundrect (at -6 0.25 0) (size 0.3 1.55) (layers "F.Cu" "F.Paste" "F.Mask") (net 39 "SPI0_MOSI")) (pad "21" smd roundrect (at -6 2.75 0) (size 0.3 1.55) (layers "F.Cu" "F.Paste" "F.Mask") (net 7 "FPGA_SCK")) (pad "22" smd roundrect (at -6 3.25 0) (size 0.3 1.55) (layers "F.Cu" "F.Paste" "F.Mask") (net 8 "FPGA_MISO")) (pad "23" smd roundrect (at -6 3.75 0) (size 0.3 1.55) (layers "F.Cu" "F.Paste" "F.Mask") (net 9 "FPGA_MOSI")) (pad "26" smd roundrect (at -6 5.25 0) (size 0.3 1.55) (layers "F.Cu" "F.Paste" "F.Mask") (net 33 "I2C0_SCL")) (pad "27" smd roundrect (at -6 5.75 0) (size 0.3 1.55) (layers "F.Cu" "F.Paste" "F.Mask") (net 34 "I2C0_SDA")) (pad "28" smd roundrect (at -6 6.25 0) (size 0.3 1.55) (layers "F.Cu" "F.Paste" "F.Mask") (net 35 "I2C1_SCL")) (pad "29" smd roundrect (at -6 6.75 0) (size 0.3 1.55) (layers "F.Cu" "F.Paste" "F.Mask") (net 36 "I2C1_SDA")) (pad "50" smd roundrect (at 6 6.75 0) (size 0.3 1.55) (layers "F.Cu" "F.Paste" "F.Mask") (net 2 "GND")) (pad "75" smd roundrect (at 6 -6.75 0) (size 0.3 1.55) (layers "F.Cu" "F.Paste" "F.Mask") (net 3 "3V3")) ) ; iCE40-UP5K (U2) (footprint "Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm" (layer "F.Cu") (tedit 0) (tstamp 00000002) (at 62 27.5 0) (property "Reference" "U2" (at 0 -5 (angle 0) (layer "F.SilkS"))) (property "Value" "iCE40-UP5K-SG48" (at 0 5 (angle 0) (layer "F.Fab")) (property "Author" "jayis1")) (pad "1" smd roundrect (at -3.25 -3 0) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 2 "GND")) (pad "5" smd roundrect (at -3.25 -1 0) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 10 "FPGA_NCS")) (pad "6" smd roundrect (at -3.25 -0.5 0) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 7 "FPGA_SCK")) (pad "7" smd roundrect (at -3.25 0 0) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 9 "FPGA_MOSI")) (pad "8" smd roundrect (at -3.25 0.5 0) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 8 "FPGA_MISO")) (pad "9" smd roundrect (at -3.25 1 0) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 11 "FPGA_CDONE")) (pad "10" smd roundrect (at -3.25 1.5 0) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 12 "FPGA_CRESET")) (pad "25" smd roundrect (at 3.25 3 0) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 37 "SPI0_SCK")) (pad "26" smd roundrect (at 3.25 2.5 0) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 38 "SPI0_MISO")) (pad "27" smd roundrect (at 3.25 2 0) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 39 "SPI0_MOSI")) (pad "28" smd roundrect (at 3.25 1.5 0) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 40 "SPI0_NCS")) (pad "49" smd roundrect (at 0 0 0) (size 5.2 5.2) (layers "F.Cu" "F.Paste" "F.Mask") (net 2 "GND")) ) ; nRF52840 module (U3) (footprint "RF_Module:ublox_NINA-B3" (layer "F.Cu") (tedit 0) (tstamp 00000003) (at 72 42 0) (property "Reference" "U3" (at 0 -7 (angle 0) (layer "F.SilkS"))) (property "Value" "NINA-B302" (at 0 7 (angle 0) (layer "F.Fab")) (property "Author" "jayis1")) (pad "1" smd roundrect (at -4.5 -5.5 0) (size 0.8 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 3 "3V3")) (pad "2" smd roundrect (at -4.5 -4.5 0) (size 0.8 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 2 "GND")) (pad "3" smd roundrect (at -4.5 -3.5 0) (size 0.8 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 13 "BLE_TX")) (pad "4" smd roundrect (at -4.5 -2.5 0) (size 0.8 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 14 "BLE_RX")) ) ; USB3300 ULPI PHY (U4) (footprint "Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm" (layer "F.Cu") (tedit 0) (tstamp 00000004) (at 30 27.5 0) (property "Reference" "U4" (at 0 -4 (angle 0) (layer "F.SilkS"))) (property "Value" "USB3300-JK-02" (at 0 4 (angle 0) (layer "F.Fab")) (property "Author" "jayis1")) (pad "1" smd roundrect (at -2.25 -2.25 0) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 3 "3V3")) (pad "5" smd roundrect (at -2.25 -0.25 0) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 15 "ULPI_CLK")) (pad "6" smd roundrect (at -2.25 0.25 0) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 16 "ULPI_DIR")) (pad "7" smd roundrect (at -2.25 0.75 0) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 17 "ULPI_STP")) (pad "8" smd roundrect (at -2.25 1.25 0) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 18 "ULPI_NXT")) (pad "21" smd roundrect (at 2.25 2.25 0) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 31 "USB_DM")) (pad "22" smd roundrect (at 2.25 1.75 0) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 32 "USB_DP")) (pad "33" smd roundrect (at 0 0 0) (size 3.7 3.7) (layers "F.Cu" "F.Paste" "F.Mask") (net 2 "GND")) ) ; SDRAM (U5) (footprint "Package_SO:TSOP-II-54_10.16x21.84mm_P0.8mm" (layer "F.Cu") (tedit 0) (tstamp 00000005) (at 47.5 48 0) (property "Reference" "U5" (at 0 -11 (angle 0) (layer "F.SilkS"))) (property "Value" "IS42S32800G-6BLI" (at 0 11 (angle 0) (layer "F.Fab")) (property "Author" "jayis1")) (pad "1" smd rect (at -5.08 -10.4 0) (size 0.4 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 3 "3V3")) (pad "2" smd rect (at -4.28 -10.4 0) (size 0.4 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 2 "GND")) (pad "3" smd rect (at -3.48 -10.4 0) (size 0.4 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 21 "FMC_D0")) (pad "29" smd rect (at 5.08 -10.4 0) (size 0.4 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 22 "FMC_D31")) (pad "41" smd rect (at 5.08 10.4 0) (size 0.4 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 23 "FMC_A0")) (pad "43" smd rect (at 3.48 10.4 0) (size 0.4 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 24 "FMC_SDCLK")) (pad "45" smd rect (at 1.88 10.4 0) (size 0.4 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 25 "FMC_SDNRAS")) ) ; TXS0108E Level Shifter (U6) (footprint "Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm" (layer "F.Cu") (tedit 0) (tstamp 00000006) (at 80 27.5 0) (property "Reference" "U6" (at 0 -4.5 (angle 0) (layer "F.SilkS"))) (property "Value" "TXS0108E" (at 0 4.5 (angle 0) (layer "F.Fab")) (property "Author" "jayis1")) (pad "1" smd rect (at -2.95 -2.6 0) (size 0.45 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 33 "I2C0_SCL")) (pad "2" smd rect (at -2.95 -1.95 0) (size 0.45 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 34 "I2C0_SDA")) (pad "3" smd rect (at -2.95 -1.3 0) (size 0.45 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 35 "I2C1_SCL")) (pad "4" smd rect (at -2.95 -0.65 0) (size 0.45 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 36 "I2C1_SDA")) (pad "11" smd rect (at 2.95 -0.65 0) (size 0.45 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 43 "ONEWIRE")) (pad "12" smd rect (at 2.95 0 0) (size 0.45 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 37 "SPI0_SCK")) ) ; OLED Display (U7) (footprint "Display_OLED:OLED_128x64_0.96in" (layer "F.Cu") (tedit 0) (tstamp 00000007) (at 72 15 0) (property "Reference" "U7" (at 0 -6 (angle 0) (layer "F.SilkS"))) (property "Value" "SSD1306_128x64" (at 0 6 (angle 0) (layer "F.Fab")) (property "Author" "jayis1")) (pad "1" smd rect (at -3 -2 0) (size 0.8 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 2 "GND")) (pad "2" smd rect (at -2 -2 0) (size 0.8 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 3 "3V3")) (pad "3" smd rect (at -1 -2 0) (size 0.8 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 26 "I2C_INT_SCL")) (pad "4" smd rect (at 0 -2 0) (size 0.8 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 27 "I2C_INT_SDA")) ) ; MAX17048 Fuel Gauge (U8) (footprint "Package_TO_SOT_SMD:SOT-23-8" (layer "F.Cu") (tedit 0) (tstamp 00000008) (at 22 42 0) (property "Reference" "U8" (at 0 -2.5 (angle 0) (layer "F.SilkS"))) (property "Value" "MAX17048" (at 0 2.5 (angle 0) (layer "F.Fab")) (property "Author" "jayis1")) (pad "1" smd rect (at -1.4 -0.9 0) (size 0.6 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 4 "VBAT")) (pad "2" smd rect (at -1.4 0 0) (size 0.6 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 2 "GND")) (pad "5" smd rect (at 1.4 -0.9 0) (size 0.6 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 26 "I2C_INT_SCL")) (pad "6" smd rect (at 1.4 0 0) (size 0.6 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 27 "I2C_INT_SDA")) ) ; MCP73831 Charger (U9) (footprint "Package_TO_SOT_SMD:SOT-23-5" (layer "F.Cu") (tedit 0) (tstamp 00000009) (at 15 42 0) (property "Reference" "U9" (at 0 -2.5 (angle 0) (layer "F.SilkS"))) (property "Value" "MCP73831" (at 0 2.5 (angle 0) (layer "F.Fab")) (property "Author" "jayis1")) (pad "1" smd rect (at -1.2 -1 0) (size 0.6 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 1 "VBUS")) (pad "2" smd rect (at -1.2 0 0) (size 0.6 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 2 "GND")) (pad "3" smd rect (at 1.2 -1 0) (size 0.6 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 4 "VBAT")) (pad "5" smd rect (at 1.2 1 0) (size 0.6 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 3 "3V3")) ) ; USB-C Connector (J1) (footprint "Connector_USB:USB_C_Receptacle_HRO_TYPE-C-31-M-12" (layer "F.Cu") (tedit 0) (tstamp 00000010) (at 10 27.5 0) (property "Reference" "J1" (at 0 -5 (angle 0) (layer "F.SilkS"))) (property "Value" "USB_C" (at 0 5 (angle 0) (layer "F.Fab")) (property "Author" "jayis1")) (pad "A4" smd rect (at -2.5 -2 0) (size 0.3 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (net 1 "VBUS")) (pad "A7" smd rect (at -1.5 -2 0) (size 0.3 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (net 31 "USB_DM")) (pad "A6" smd rect (at -1 -2 0) (size 0.3 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (net 32 "USB_DP")) (pad "B12" smd rect (at 2.5 -2 0) (size 0.3 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (net 2 "GND")) (pad "S1" thru_hole circle (at -4.5 0 0) (size 0.8 0.8) (drill 0.4) (layers "*.Cu" "*.Mask") (net 2 "GND")) (pad "S2" thru_hole circle (at 4.5 0 0) (size 0.8 0.8) (drill 0.4) (layers "*.Cu" "*.Mask") (net 2 "GND")) ) ; Probe Header (J2) (footprint "Connector_PinHeader_2.54mm:PinHeader_1x14_P2.54mm_Vertical" (layer "F.Cu") (tedit 0) (tstamp 00000011) (at 87.5 15 0) (property "Reference" "J2" (at 0 -2 (angle 0) (layer "F.SilkS"))) (property "Value" "Probe_Header" (at 0 36 (angle 0) (layer "F.Fab")) (property "Author" "jayis1")) (pad "1" thru_hole circle (at 0 0 0) (size 1.5 1.5) (drill 0.8) (layers "*.Cu" "*.Mask") (net 2 "GND")) (pad "2" thru_hole circle (at 0 2.54 0) (size 1.5 1.5) (drill 0.8) (layers "*.Cu" "*.Mask") (net 3 "3V3")) (pad "3" thru_hole circle (at 0 5.08 0) (size 1.5 1.5) (drill 0.8) (layers "*.Cu" "*.Mask") (net 34 "I2C0_SDA")) (pad "4" thru_hole circle (at 0 7.62 0) (size 1.5 1.5) (drill 0.8) (layers "*.Cu" "*.Mask") (net 36 "I2C1_SDA")) (pad "5" thru_hole circle (at 0 10.16 0) (size 1.5 1.5) (drill 0.8) (layers "*.Cu" "*.Mask") (net 37 "SPI0_SCK")) (pad "6" thru_hole circle (at 0 12.7 0) (size 1.5 1.5) (drill 0.8) (layers "*.Cu" "*.Mask") (net 38 "SPI0_MISO")) (pad "7" thru_hole circle (at 0 15.24 0) (size 1.5 1.5) (drill 0.8) (layers "*.Cu" "*.Mask") (net 39 "SPI0_MOSI")) (pad "8" thru_hole circle (at 0 17.78 0) (size 1.5 1.5) (drill 0.8) (layers "*.Cu" "*.Mask") (net 2 "GND")) (pad "9" thru_hole circle (at 0 20.32 0) (size 1.5 1.5) (drill 0.8) (layers "*.Cu" "*.Mask") (net 33 "I2C0_SCL")) (pad "10" thru_hole circle (at 0 22.86 0) (size 1.5 1.5) (drill 0.8) (layers "*.Cu" "*.Mask") (net 35 "I2C1_SCL")) (pad "11" thru_hole circle (at 0 25.4 0) (size 1.5 1.5) (drill 0.8) (layers "*.Cu" "*.Mask") (net 40 "SPI0_NCS")) (pad "12" thru_hole circle (at 0 27.94 0) (size 1.5 1.5) (drill 0.8) (layers "*.Cu" "*.Mask") (net 41 "UART0_TX")) (pad "13" thru_hole circle (at 0 30.48 0) (size 1.5 1.5) (drill 0.8) (layers "*.Cu" "*.Mask") (net 37 "SPI1_SCK")) (pad "14" thru_hole circle (at 0 33.02 0) (size 1.5 1.5) (drill 0.8) (layers "*.Cu" "*.Mask") (net 42 "UART0_RX")) ) ; microSD Socket (J3) (footprint "Connector_Card:microSD_HC_Hirose_DM3D-SF" (layer "F.Cu") (tedit 0) (tstamp 00000012) (at 30 48 0) (property "Reference" "J3" (at 0 -6 (angle 0) (layer "F.SilkS"))) (property "Value" "Micro_SD" (at 0 6 (angle 0) (layer "F.Fab")) (property "Author" "jayis1")) (pad "1" smd rect (at -3 3 0) (size 0.5 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 46 "SD_D3")) (pad "2" smd rect (at -2 3 0) (size 0.5 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 29 "SD_CMD")) (pad "3" smd rect (at -1 3 0) (size 0.5 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 2 "GND")) (pad "4" smd rect (at 0 3 0) (size 0.5 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 29 "SD_CLK")) (pad "5" smd rect (at 1 3 0) (size 0.5 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 3 "3V3")) (pad "6" smd rect (at 2 3 0) (size 0.5 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 30 "SD_CMD")) (pad "7" smd rect (at 3 3 0) (size 0.5 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (net 28 "SD_D0")) ) ; Crystal Y1 (footprint "Crystal:Crystal_SMD_HC49-SD" (layer "F.Cu") (tedit 0) (tstamp 00000013) (at 20 17.5 0) (property "Reference" "Y1" (at 0 -3 (angle 0) (layer "F.SilkS"))) (property "Value" "8MHz" (at 0 3 (angle 0) (layer "F.Fab")) (property "Author" "jayis1")) (pad "1" smd rect (at -2.5 0 0) (size 2 2) (layers "F.Cu" "F.Paste" "F.Mask") (net 5 "OSC_IN")) (pad "2" smd rect (at 2.5 0 0) (size 2 2) (layers "F.Cu" "F.Paste" "F.Mask") (net 6 "OSC_OUT")) ) ; Decoupling caps (footprint "Capacitor_SMD:C_0402_1005Metric" (layer "F.Cu") (tedit 0) (tstamp 00000020) (at 43 22 0) (property "Reference" "C1" (at 0 -1 (angle 0) (layer "F.SilkS"))) (property "Value" "100nF" (at 0 1 (angle 0) (layer "F.Fab")) (property "Author" "jayis1")) (pad "1" smd roundrect (at -0.42 0 0) (size 0.42 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 3 "3V3")) (pad "2" smd roundrect (at 0.42 0 0) (size 0.42 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (net 2 "GND")) ) ; ---- Board outline (95 x 55 mm, Edge.Cuts layer) ---- (gr_line (start 5 5) (end 90 5) (layer "Edge.Cuts") (width 0.15)) (gr_line (start 90 5) (end 90 50) (layer "Edge.Cuts") (width 0.15)) (gr_line (start 90 50) (end 5 50) (layer "Edge.Cuts") (width 0.15)) (gr_line (start 5 50) (end 5 5) (layer "Edge.Cuts") (width 0.15)) ; ---- Silk text ---- (gr_text "WireReaper by jayis1" (at 47.5 3) (layer "F.SilkS") (size 1.5) (thickness 0.15)) (gr_text "v1.0" (at 47.5 48) (layer "F.SilkS") (size 1.0) (thickness 0.1)) (gr_text "AUTHORIZED USE ONLY" (at 47.5 46.5) (layer "F.SilkS") (size 0.8) (thickness 0.08)) ; ---- Via for GND stitching ---- (via (at 10 10) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 2 "GND")) (via (at 85 10) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 2 "GND")) (via (at 85 45) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 2 "GND")) (via (at 10 45) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 2 "GND")) (via (at 40 15) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 2 "GND")) (via (at 55 15) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 2 "GND")) (via (at 40 40) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 2 "GND")) (via (at 55 40) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 2 "GND")) ; ---- GND pour on F.Cu ---- (zone (net 2) (net_name "GND") (layer "F.Cu") (tstamp 0) (hatch edge 0.5) (connect_pads (clearance 0.2)) (min_thickness 0.15) (fill (thermal_gap 0.2) (thermal_bridge_width 0.3)) (polygon (pts (xy 5 5) (xy 90 5) (xy 90 50) (xy 5 50)) ) ) ; ---- GND pour on B.Cu ---- (zone (net 2) (net_name "GND") (layer "B.Cu") (tstamp 1) (hatch edge 0.5) (connect_pads (clearance 0.2)) (min_thickness 0.15) (fill (thermal_gap 0.2) (thermal_bridge_width 0.3)) (polygon (pts (xy 5 5) (xy 90 5) (xy 90 50) (xy 5 50)) ) ) )