(kicad_pcb (version 20171130) (host pcbnew 5.1.2-f72e74a~84~ubuntu18.04.1) (general (thickness 1.6) (drawings 0) (tracks 0) (zones 0) (modules 67) (nets 139) ) (page A4) (layers (0 F.Cu signal) (1 GND.Cu power hide) (2 VCC.Cu power hide) (31 B.Cu signal) (36 B.SilkS user) (37 F.SilkS user) (38 B.Mask user) (39 F.Mask user) (44 Edge.Cuts user) (45 Margin user) (46 B.CrtYd user) (47 F.CrtYd user) ) (setup (last_trace_width 0.25) (trace_clearance 0.2) (zone_clearance 0.508) (zone_45_only no) (trace_min 0.2) (via_size 0.6) (via_drill 0.4) (via_min_size 0.4) (via_min_drill 0.3) (uvia_size 0.3) (uvia_drill 0.1) (uvias_allowed no) (uvia_min_size 0.2) (uvia_min_drill 0.1) (edge_width 0.0254) (segment_width 0.2) (pcb_text_width 0.3) (pcb_text_size 1.5 1.5) (mod_edge_width 0.15) (mod_text_size 1 1) (mod_text_width 0.15) (pad_size 7 7) (pad_drill 3.5) (pad_to_mask_clearance 0.2) (solder_mask_min_width 0.25) (aux_axis_origin 0 0) (visible_elements FFFFFFFF) (pcbplotparams (layerselection 0x00000_7ffffff9) (usegerberextensions false) (usegerberattributes false) (usegerberadvancedattributes false) (creategerberjobfile false) (excludeedgelayer true) (linewidth 0.100000) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15.000000) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 4) (mirror false) (drillshape 0) (scaleselection 1) (outputdirectory "./")) ) (net 0 "") (net 1 VCC) (net 2 "Net-(C1-Pad1)") (net 3 "Net-(C2-Pad2)") (net 4 GND) (net 5 "Net-(C4-Pad2)") (net 6 "Net-(C4-Pad1)") (net 7 "Net-(C5-Pad1)") (net 8 "Net-(C5-Pad2)") (net 9 "Net-(C14-Pad1)") (net 10 "Net-(C15-Pad1)") (net 11 +5V) (net 12 "Net-(C19-Pad1)") (net 13 "Net-(D1-Pad2)") (net 14 "Net-(D3-Pad1)") (net 15 "/VIA and IDE/~IDE:DASP") (net 16 "Net-(D4-Pad2)") (net 17 "/Glue and control logic/PWR_IN") (net 18 "/DUART and line drivers/RS232CTSa") (net 19 "/DUART and line drivers/RS232RTSa") (net 20 "/DUART and line drivers/RS232TxDa") (net 21 "/DUART and line drivers/RS232RxDa") (net 22 "/DUART and line drivers/RS232RxDb") (net 23 "/DUART and line drivers/RS232TxDb") (net 24 "/DUART and line drivers/RS232RTSb") (net 25 "/DUART and line drivers/RS232CTSb") (net 26 "Net-(J3-Pad12)") (net 27 "Net-(J3-Pad11)") (net 28 "Net-(J3-Pad10)") (net 29 "Net-(J3-Pad9)") (net 30 "Net-(J3-Pad8)") (net 31 "Net-(J3-Pad7)") (net 32 "Net-(J3-Pad6)") (net 33 "Net-(J3-Pad5)") (net 34 "Net-(J3-Pad4)") (net 35 "Net-(J3-Pad3)") (net 36 "/VIA and IDE/~IDE:CS1") (net 37 "/VIA and IDE/~IDE:CS0") (net 38 "/VIA and IDE/IDE-A2") (net 39 "/VIA and IDE/IDE-A0") (net 40 "/VIA and IDE/IDE-A1") (net 41 "/VIA and IDE/~IDE:DMACK") (net 42 "/VIA and IDE/~DIOR") (net 43 "/VIA and IDE/~DIOW") (net 44 "/VIA and IDE/IDE-D15") (net 45 "/VIA and IDE/IDE-D0") (net 46 "/VIA and IDE/IDE-D14") (net 47 "/VIA and IDE/IDE-D1") (net 48 "/VIA and IDE/IDE-D13") (net 49 "/VIA and IDE/IDE-D2") (net 50 "/VIA and IDE/IDE-D12") (net 51 "/VIA and IDE/IDE-D3") (net 52 "/VIA and IDE/IDE-D11") (net 53 "/VIA and IDE/IDE-D4") (net 54 "/VIA and IDE/IDE-D10") (net 55 "/VIA and IDE/IDE-D5") (net 56 "/VIA and IDE/IDE-D9") (net 57 "/VIA and IDE/IDE-D6") (net 58 "/VIA and IDE/IDE-D8") (net 59 "/VIA and IDE/IDE-D7") (net 60 "/VIA and IDE/~IDE:RES") (net 61 "/Glue and control logic/TDO") (net 62 "/Glue and control logic/TDI") (net 63 "/Glue and control logic/TMS") (net 64 "/Glue and control logic/TCK") (net 65 "/Glue and control logic/RDY") (net 66 "/Glue and control logic/STP") (net 67 "/Glue and control logic/~NMI") (net 68 "Net-(R1-Pad2)") (net 69 "Net-(R2-Pad1)") (net 70 "/DUART and line drivers/RES") (net 71 "Net-(R5-Pad2)") (net 72 "/Glue and control logic/~KS") (net 73 "/Glue and control logic/BE") (net 74 "/Glue and control logic/~ABT") (net 75 "/Glue and control logic/~PWR") (net 76 "/Glue and control logic/~RES") (net 77 "/Glue and control logic/VDA") (net 78 "/Glue and control logic/VPA") (net 79 "/MPU, ROM and RAM/A5") (net 80 "/MPU, ROM and RAM/A4") (net 81 "/MPU, ROM and RAM/A6") (net 82 "/Glue and control logic/A8") (net 83 "/Glue and control logic/A10") (net 84 "/Glue and control logic/A12") (net 85 "/Glue and control logic/A14") (net 86 "/MPU, ROM and RAM/A7") (net 87 "/Glue and control logic/A9") (net 88 "/Glue and control logic/A11") (net 89 "/Glue and control logic/A13") (net 90 "/Glue and control logic/A15") (net 91 "/Glue and control logic/~RAM0") (net 92 "/DUART and line drivers/~MWR") (net 93 "/DUART and line drivers/~MRD") (net 94 "/Glue and control logic/A16") (net 95 "/Glue and control logic/A17") (net 96 "/Glue and control logic/A18") (net 97 "/DUART and line drivers/CTSa") (net 98 "/DUART and line drivers/RTSb") (net 99 "/DUART and line drivers/RTSa") (net 100 "Net-(U3-Pad18)") (net 101 "Net-(U3-Pad6)") (net 102 "/DUART and line drivers/CTSb") (net 103 "Net-(U3-Pad5)") (net 104 "Net-(U3-Pad4)") (net 105 "/DUART and line drivers/~DUARTSEL") (net 106 "/Glue and control logic/~ROM") (net 107 "/Glue and control logic/~RAM1") (net 108 "/Glue and control logic/~VIA1SEL") (net 109 "/VIA and IDE/D5") (net 110 "/VIA and IDE/D7") (net 111 "/Glue and control logic/D3") (net 112 "/Glue and control logic/D2") (net 113 "/Glue and control logic/D0") (net 114 "/VIA and IDE/D6") (net 115 "/VIA and IDE/D4") (net 116 "/Glue and control logic/D1") (net 117 "/Glue and control logic/~VIA2SEL") (net 118 "Net-(U9-Pad2)") (net 119 "Net-(U9-Pad3)") (net 120 "/Glue and control logic/~RTCSEL") (net 121 "/Glue and control logic/~IOSEL2") (net 122 "/VIA and IDE/~IRQVIA1") (net 123 "/DUART and line drivers/~IRQ") (net 124 "/DUART and line drivers/D0") (net 125 "/DUART and line drivers/A0") (net 126 "/DUART and line drivers/D1") (net 127 "/DUART and line drivers/A1") (net 128 "/DUART and line drivers/D2") (net 129 "/DUART and line drivers/A2") (net 130 "/DUART and line drivers/D3") (net 131 "/DUART and line drivers/A3") (net 132 "/DUART and line drivers/D4") (net 133 "/DUART and line drivers/D5") (net 134 "/DUART and line drivers/D6") (net 135 "/DUART and line drivers/D7") (net 136 "/Glue and control logic/CLK") (net 137 "/Glue and control logic/R/~W") (net 138 "/Glue and control logic/~IOSEL3") (net_class Default "This is the default net class." (clearance 0.2) (trace_width 0.25) (via_dia 0.6) (via_drill 0.4) (uvia_dia 0.3) (uvia_drill 0.1) (add_net +5V) (add_net "/DUART and line drivers/A0") (add_net "/DUART and line drivers/A1") (add_net "/DUART and line drivers/A2") (add_net "/DUART and line drivers/A3") (add_net "/DUART and line drivers/CTSa") (add_net "/DUART and line drivers/CTSb") (add_net "/DUART and line drivers/D0") (add_net "/DUART and line drivers/D1") (add_net "/DUART and line drivers/D2") (add_net "/DUART and line drivers/D3") (add_net "/DUART and line drivers/D4") (add_net "/DUART and line drivers/D5") (add_net "/DUART and line drivers/D6") (add_net "/DUART and line drivers/D7") (add_net "/DUART and line drivers/RES") (add_net "/DUART and line drivers/RS232CTSa") (add_net "/DUART and line drivers/RS232CTSb") (add_net "/DUART and line drivers/RS232RTSa") (add_net "/DUART and line drivers/RS232RTSb") (add_net "/DUART and line drivers/RS232RxDa") (add_net "/DUART and line drivers/RS232RxDb") (add_net "/DUART and line drivers/RS232TxDa") (add_net "/DUART and line drivers/RS232TxDb") (add_net "/DUART and line drivers/RTSa") (add_net "/DUART and line drivers/RTSb") (add_net "/DUART and line drivers/~DUARTSEL") (add_net "/DUART and line drivers/~IRQ") (add_net "/DUART and line drivers/~MRD") (add_net "/DUART and line drivers/~MWR") (add_net "/Glue and control logic/A10") (add_net "/Glue and control logic/A11") (add_net "/Glue and control logic/A12") (add_net "/Glue and control logic/A13") (add_net "/Glue and control logic/A14") (add_net "/Glue and control logic/A15") (add_net "/Glue and control logic/A16") (add_net "/Glue and control logic/A17") (add_net "/Glue and control logic/A18") (add_net "/Glue and control logic/A8") (add_net "/Glue and control logic/A9") (add_net "/Glue and control logic/BE") (add_net "/Glue and control logic/CLK") (add_net "/Glue and control logic/D0") (add_net "/Glue and control logic/D1") (add_net "/Glue and control logic/D2") (add_net "/Glue and control logic/D3") (add_net "/Glue and control logic/PWR_IN") (add_net "/Glue and control logic/R/~W") (add_net "/Glue and control logic/RDY") (add_net "/Glue and control logic/STP") (add_net "/Glue and control logic/TCK") (add_net "/Glue and control logic/TDI") (add_net "/Glue and control logic/TDO") (add_net "/Glue and control logic/TMS") (add_net "/Glue and control logic/VDA") (add_net "/Glue and control logic/VPA") (add_net "/Glue and control logic/~ABT") (add_net "/Glue and control logic/~IOSEL2") (add_net "/Glue and control logic/~IOSEL3") (add_net "/Glue and control logic/~KS") (add_net "/Glue and control logic/~NMI") (add_net "/Glue and control logic/~PWR") (add_net "/Glue and control logic/~RAM0") (add_net "/Glue and control logic/~RAM1") (add_net "/Glue and control logic/~RES") (add_net "/Glue and control logic/~ROM") (add_net "/Glue and control logic/~RTCSEL") (add_net "/Glue and control logic/~VIA1SEL") (add_net "/Glue and control logic/~VIA2SEL") (add_net "/MPU, ROM and RAM/A4") (add_net "/MPU, ROM and RAM/A5") (add_net "/MPU, ROM and RAM/A6") (add_net "/MPU, ROM and RAM/A7") (add_net "/VIA and IDE/D4") (add_net "/VIA and IDE/D5") (add_net "/VIA and IDE/D6") (add_net "/VIA and IDE/D7") (add_net "/VIA and IDE/IDE-A0") (add_net "/VIA and IDE/IDE-A1") (add_net "/VIA and IDE/IDE-A2") (add_net "/VIA and IDE/IDE-D0") (add_net "/VIA and IDE/IDE-D1") (add_net "/VIA and IDE/IDE-D10") (add_net "/VIA and IDE/IDE-D11") (add_net "/VIA and IDE/IDE-D12") (add_net "/VIA and IDE/IDE-D13") (add_net "/VIA and IDE/IDE-D14") (add_net "/VIA and IDE/IDE-D15") (add_net "/VIA and IDE/IDE-D2") (add_net "/VIA and IDE/IDE-D3") (add_net "/VIA and IDE/IDE-D4") (add_net "/VIA and IDE/IDE-D5") (add_net "/VIA and IDE/IDE-D6") (add_net "/VIA and IDE/IDE-D7") (add_net "/VIA and IDE/IDE-D8") (add_net "/VIA and IDE/IDE-D9") (add_net "/VIA and IDE/~DIOR") (add_net "/VIA and IDE/~DIOW") (add_net "/VIA and IDE/~IDE:CS0") (add_net "/VIA and IDE/~IDE:CS1") (add_net "/VIA and IDE/~IDE:DASP") (add_net "/VIA and IDE/~IDE:DMACK") (add_net "/VIA and IDE/~IDE:RES") (add_net "/VIA and IDE/~IRQVIA1") (add_net GND) (add_net "Net-(C1-Pad1)") (add_net "Net-(C14-Pad1)") (add_net "Net-(C15-Pad1)") (add_net "Net-(C19-Pad1)") (add_net "Net-(C2-Pad2)") (add_net "Net-(C4-Pad1)") (add_net "Net-(C4-Pad2)") (add_net "Net-(C5-Pad1)") (add_net "Net-(C5-Pad2)") (add_net "Net-(D1-Pad2)") (add_net "Net-(D3-Pad1)") (add_net "Net-(D4-Pad2)") (add_net "Net-(J3-Pad10)") (add_net "Net-(J3-Pad11)") (add_net "Net-(J3-Pad12)") (add_net "Net-(J3-Pad3)") (add_net "Net-(J3-Pad4)") (add_net "Net-(J3-Pad5)") (add_net "Net-(J3-Pad6)") (add_net "Net-(J3-Pad7)") (add_net "Net-(J3-Pad8)") (add_net "Net-(J3-Pad9)") (add_net "Net-(R1-Pad2)") (add_net "Net-(R2-Pad1)") (add_net "Net-(R5-Pad2)") (add_net "Net-(U3-Pad18)") (add_net "Net-(U3-Pad4)") (add_net "Net-(U3-Pad5)") (add_net "Net-(U3-Pad6)") (add_net "Net-(U9-Pad2)") (add_net "Net-(U9-Pad3)") (add_net VCC) ) (module Capacitors_ThroughHole:CP_Radial_Tantal_D4.5mm_P2.50mm (layer F.Cu) (tedit 597C781B) (tstamp 5CFD3DE8) (at 54.864 74.168) (descr "CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=4.5mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf") (tags "CP Radial_Tantal series Radial pin pitch 2.50mm diameter 4.5mm Tantal Electrolytic Capacitor") (path /5952FC81/5A14E8FA) (fp_text reference C1 (at -2.032 -2.032 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 1.0uF (at 1.25 3.56) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_arc (start 1.25 0) (end -0.770693 -1.18) (angle 119.4) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.25 0) (end -0.770693 1.18) (angle -119.4) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.25 0) (end 3.270693 -1.18) (angle 60.6) (layer F.SilkS) (width 0.12)) (fp_circle (center 1.25 0) (end 3.5 0) (layer F.Fab) (width 0.1)) (fp_line (start -2.2 0) (end -1 0) (layer F.Fab) (width 0.1)) (fp_line (start -1.6 -0.65) (end -1.6 0.65) (layer F.Fab) (width 0.1)) (fp_line (start -2.2 0) (end -1 0) (layer F.SilkS) (width 0.12)) (fp_line (start -1.6 -0.65) (end -1.6 0.65) (layer F.SilkS) (width 0.12)) (fp_line (start -1.35 -2.6) (end -1.35 2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.35 2.6) (end 3.85 2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.85 2.6) (end 3.85 -2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.85 -2.6) (end -1.35 -2.6) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 1.25 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 2 "Net-(C1-Pad1)")) (pad 2 thru_hole circle (at 2.5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/CP_Radial_Tantal_D4.5mm_P2.50mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:CP_Radial_Tantal_D4.5mm_P2.50mm (layer F.Cu) (tedit 597C781B) (tstamp 5CFD3DFB) (at 54.864 92.456 90) (descr "CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=4.5mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf") (tags "CP Radial_Tantal series Radial pin pitch 2.50mm diameter 4.5mm Tantal Electrolytic Capacitor") (path /5952FC81/5A14F3DD) (fp_text reference C2 (at 1.25 3.556 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 1.0uF (at 1.25 3.56 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 1.25 0 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 3.85 -2.6) (end -1.35 -2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.85 2.6) (end 3.85 -2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.35 2.6) (end 3.85 2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.35 -2.6) (end -1.35 2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.6 -0.65) (end -1.6 0.65) (layer F.SilkS) (width 0.12)) (fp_line (start -2.2 0) (end -1 0) (layer F.SilkS) (width 0.12)) (fp_line (start -1.6 -0.65) (end -1.6 0.65) (layer F.Fab) (width 0.1)) (fp_line (start -2.2 0) (end -1 0) (layer F.Fab) (width 0.1)) (fp_circle (center 1.25 0) (end 3.5 0) (layer F.Fab) (width 0.1)) (fp_arc (start 1.25 0) (end 3.270693 -1.18) (angle 60.6) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.25 0) (end -0.770693 1.18) (angle -119.4) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.25 0) (end -0.770693 -1.18) (angle 119.4) (layer F.SilkS) (width 0.12)) (pad 2 thru_hole circle (at 2.5 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 3 "Net-(C2-Pad2)")) (pad 1 thru_hole rect (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/CP_Radial_Tantal_D4.5mm_P2.50mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:CP_Radial_Tantal_D4.5mm_P2.50mm (layer F.Cu) (tedit 597C781B) (tstamp 5CFD3E0E) (at 60.96 74.168) (descr "CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=4.5mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf") (tags "CP Radial_Tantal series Radial pin pitch 2.50mm diameter 4.5mm Tantal Electrolytic Capacitor") (path /5952FC81/5A14EA93) (fp_text reference C3 (at 1.25 -3.56) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 1.0uF (at 1.25 3.56) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_arc (start 1.25 0) (end -0.770693 -1.18) (angle 119.4) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.25 0) (end -0.770693 1.18) (angle -119.4) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.25 0) (end 3.270693 -1.18) (angle 60.6) (layer F.SilkS) (width 0.12)) (fp_circle (center 1.25 0) (end 3.5 0) (layer F.Fab) (width 0.1)) (fp_line (start -2.2 0) (end -1 0) (layer F.Fab) (width 0.1)) (fp_line (start -1.6 -0.65) (end -1.6 0.65) (layer F.Fab) (width 0.1)) (fp_line (start -2.2 0) (end -1 0) (layer F.SilkS) (width 0.12)) (fp_line (start -1.6 -0.65) (end -1.6 0.65) (layer F.SilkS) (width 0.12)) (fp_line (start -1.35 -2.6) (end -1.35 2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.35 2.6) (end 3.85 2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.85 2.6) (end 3.85 -2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.85 -2.6) (end -1.35 -2.6) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 1.25 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 2 thru_hole circle (at 2.5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/CP_Radial_Tantal_D4.5mm_P2.50mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:CP_Radial_Tantal_D4.5mm_P2.50mm (layer F.Cu) (tedit 597C781B) (tstamp 5CFD3E21) (at 50.292 74.168 180) (descr "CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=4.5mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf") (tags "CP Radial_Tantal series Radial pin pitch 2.50mm diameter 4.5mm Tantal Electrolytic Capacitor") (path /5952FC81/5A14E4E1) (fp_text reference C4 (at -2.032 -2.032 270) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 1.0uF (at 1.25 3.56) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 1.25 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 3.85 -2.6) (end -1.35 -2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.85 2.6) (end 3.85 -2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.35 2.6) (end 3.85 2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.35 -2.6) (end -1.35 2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.6 -0.65) (end -1.6 0.65) (layer F.SilkS) (width 0.12)) (fp_line (start -2.2 0) (end -1 0) (layer F.SilkS) (width 0.12)) (fp_line (start -1.6 -0.65) (end -1.6 0.65) (layer F.Fab) (width 0.1)) (fp_line (start -2.2 0) (end -1 0) (layer F.Fab) (width 0.1)) (fp_circle (center 1.25 0) (end 3.5 0) (layer F.Fab) (width 0.1)) (fp_arc (start 1.25 0) (end 3.270693 -1.18) (angle 60.6) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.25 0) (end -0.770693 1.18) (angle -119.4) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.25 0) (end -0.770693 -1.18) (angle 119.4) (layer F.SilkS) (width 0.12)) (pad 2 thru_hole circle (at 2.5 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 5 "Net-(C4-Pad2)")) (pad 1 thru_hole rect (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 6 "Net-(C4-Pad1)")) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/CP_Radial_Tantal_D4.5mm_P2.50mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:CP_Radial_Tantal_D4.5mm_P2.50mm (layer F.Cu) (tedit 597C781B) (tstamp 5CFD3E34) (at 48.26 91.44) (descr "CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=4.5mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf") (tags "CP Radial_Tantal series Radial pin pitch 2.50mm diameter 4.5mm Tantal Electrolytic Capacitor") (path /5952FC81/5A14E779) (fp_text reference C5 (at 1.016 3.556) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 1.0uF (at 1.25 3.56) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 1.25 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 3.85 -2.6) (end -1.35 -2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.85 2.6) (end 3.85 -2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.35 2.6) (end 3.85 2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.35 -2.6) (end -1.35 2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.6 -0.65) (end -1.6 0.65) (layer F.SilkS) (width 0.12)) (fp_line (start -2.2 0) (end -1 0) (layer F.SilkS) (width 0.12)) (fp_line (start -1.6 -0.65) (end -1.6 0.65) (layer F.Fab) (width 0.1)) (fp_line (start -2.2 0) (end -1 0) (layer F.Fab) (width 0.1)) (fp_circle (center 1.25 0) (end 3.5 0) (layer F.Fab) (width 0.1)) (fp_arc (start 1.25 0) (end 3.270693 -1.18) (angle 60.6) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.25 0) (end -0.770693 1.18) (angle -119.4) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.25 0) (end -0.770693 -1.18) (angle 119.4) (layer F.SilkS) (width 0.12)) (pad 2 thru_hole circle (at 2.5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 8 "Net-(C5-Pad2)")) (pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 7 "Net-(C5-Pad1)")) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/CP_Radial_Tantal_D4.5mm_P2.50mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5CFD3E49) (at 99.06 83.82 180) (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") (tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor") (path /5952FC81/5A157F44) (fp_text reference C6 (at -2.032 -0.508) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 0.1uF (at 2.5 2.56) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 2.5 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 2 thru_hole circle (at 5 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5CFD3E5E) (at 153.235001 61.277001) (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") (tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor") (path /5952FC78/5A3ABA2D) (fp_text reference C7 (at 2.5 -2.56) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 0.1uF (at 2.5 2.56) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 2.5 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1)) (pad 2 thru_hole circle (at 5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5CFD3E73) (at 172.635001 49.577001) (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") (tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor") (path /5952FC78/5A3ABA08) (fp_text reference C8 (at 2.5 -2.56) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 0.1uF (at 2.5 2.56) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 2.5 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 2 thru_hole circle (at 5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5CFD3E88) (at 81.28 156.464 270) (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") (tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor") (path /5952FC78/5A3AB953) (fp_text reference C9 (at 2.5 -2.56 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 0.1uF (at 2.5 2.56 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 2.5 0 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1)) (pad 2 thru_hole circle (at 5 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5CFD3E9D) (at 180.785001 49.577001) (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") (tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor") (path /5952FC78/5A3AB916) (fp_text reference C10 (at 2.5 -2.56) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 0.1uF (at 2.5 2.56) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 2.5 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 2 thru_hole circle (at 5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5CFD3EB2) (at 161.385001 61.277001) (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") (tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor") (path /5952FC78/5A3C057F) (fp_text reference C11 (at 2.5 -2.56) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 0.1uF (at 2.5 2.56) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 2.5 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 2 thru_hole circle (at 5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5CFD3EC7) (at 157.988 71.628) (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") (tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor") (path /5952FC78/5A3AB89B) (fp_text reference C12 (at 2.5 -2.56) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 0.1uF (at 2.5 2.56) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 2.5 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1)) (pad 2 thru_hole circle (at 5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5CFD3EDC) (at 161.385001 65.527001) (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") (tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor") (path /5952FC78/5A3C0579) (fp_text reference C13 (at 2.5 -2.56) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 0.1uF (at 2.5 2.56) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 2.5 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1)) (pad 2 thru_hole circle (at 5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:CP_Radial_D5.0mm_P2.50mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5CFD3F61) (at 97.536 74.168 180) (descr "CP, Radial series, Radial, pin pitch=2.50mm, , diameter=5mm, Electrolytic Capacitor") (tags "CP Radial series Radial pin pitch 2.50mm diameter 5mm Electrolytic Capacitor") (path /5A3B356D/5A3B6D16) (fp_text reference C14 (at 1.25 -3.81) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 15uF (at 1.25 3.81) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 1.25 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 4.1 -2.85) (end -1.6 -2.85) (layer F.CrtYd) (width 0.05)) (fp_line (start 4.1 2.85) (end 4.1 -2.85) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.6 2.85) (end 4.1 2.85) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.6 -2.85) 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-0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 1.85 0.98) (end 1.85 2.48) (layer F.SilkS) (width 0.12)) (fp_line (start 1.85 -2.48) (end 1.85 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 1.81 0.98) (end 1.81 2.489) (layer F.SilkS) (width 0.12)) (fp_line (start 1.81 -2.489) (end 1.81 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 1.77 0.98) (end 1.77 2.498) (layer F.SilkS) (width 0.12)) (fp_line (start 1.77 -2.498) (end 1.77 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 1.73 0.98) (end 1.73 2.506) (layer F.SilkS) (width 0.12)) (fp_line (start 1.73 -2.506) (end 1.73 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 1.69 0.98) (end 1.69 2.513) (layer F.SilkS) (width 0.12)) (fp_line (start 1.69 -2.513) (end 1.69 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 1.65 0.98) (end 1.65 2.519) (layer F.SilkS) (width 0.12)) (fp_line (start 1.65 -2.519) (end 1.65 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 1.61 0.98) (end 1.61 2.525) (layer F.SilkS) (width 0.12)) (fp_line (start 1.61 -2.525) (end 1.61 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 1.57 0.98) (end 1.57 2.531) (layer F.SilkS) (width 0.12)) (fp_line (start 1.57 -2.531) (end 1.57 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 1.53 0.98) (end 1.53 2.535) (layer F.SilkS) (width 0.12)) (fp_line (start 1.53 -2.535) (end 1.53 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 1.49 -2.539) (end 1.49 2.539) (layer F.SilkS) (width 0.12)) (fp_line (start 1.45 -2.543) (end 1.45 2.543) (layer F.SilkS) (width 0.12)) (fp_line (start 1.41 -2.546) (end 1.41 2.546) (layer F.SilkS) (width 0.12)) (fp_line (start 1.37 -2.548) (end 1.37 2.548) (layer F.SilkS) (width 0.12)) (fp_line (start 1.33 -2.549) (end 1.33 2.549) (layer F.SilkS) (width 0.12)) (fp_line (start 1.29 -2.55) (end 1.29 2.55) (layer F.SilkS) (width 0.12)) (fp_line (start 1.25 -2.55) (end 1.25 2.55) (layer F.SilkS) (width 0.12)) (fp_line (start -1.6 -0.65) (end -1.6 0.65) (layer F.Fab) (width 0.1)) (fp_line (start -2.2 0) (end -1 0) (layer F.Fab) (width 0.1)) (fp_circle (center 1.25 0) (end 3.75 0) (layer F.Fab) (width 0.1)) (fp_arc (start 1.25 0) (end 3.55558 -1.18) (angle 54.2) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.25 0) (end -1.05558 1.18) (angle -125.8) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.25 0) (end -1.05558 -1.18) (angle 125.8) (layer F.SilkS) (width 0.12)) (pad 2 thru_hole circle (at 2.5 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 1 thru_hole rect (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 9 "Net-(C14-Pad1)")) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/CP_Radial_D5.0mm_P2.50mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5CFD3F76) (at 189.445001 129.007001) (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") (tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor") (path /5A3B356D/5A3B6A11) (fp_text reference C15 (at 2.5 -2.56) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 0.1uF (at 2.5 2.56) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 2.5 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 10 "Net-(C15-Pad1)")) (pad 2 thru_hole circle (at 5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5CFD3F8B) (at 61.976 155.956 180) (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") (tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor") (path /5A3B21BC/5A3DFDF6) (fp_text reference C16 (at 2.5 -2.56) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 0.1uF (at 2.5 2.56) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 2.5 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1)) (pad 2 thru_hole circle (at 5 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5CFD3FA0) (at 52.832 123.952) (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") (tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor") (path /5A3B21BC/5A3DFACE) (fp_text reference C17 (at 2.5 2.54) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 0.1uF (at 2.5 2.56) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 2.5 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1)) (pad 2 thru_hole circle (at 5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:CP_Radial_D6.3mm_P2.50mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5CFD4035) (at 218.285001 109.907001) (descr "CP, Radial series, Radial, pin pitch=2.50mm, , diameter=6.3mm, Electrolytic Capacitor") (tags "CP Radial series Radial pin pitch 2.50mm diameter 6.3mm Electrolytic Capacitor") (path /5A3B356D/5A43C96F) (fp_text reference C18 (at 1.25 -4.46) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 100uF (at 1.25 4.46) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 1.25 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 4.75 -3.5) (end -2.25 -3.5) (layer F.CrtYd) (width 0.05)) (fp_line (start 4.75 3.5) (end 4.75 -3.5) (layer F.CrtYd) (width 0.05)) (fp_line (start -2.25 3.5) (end 4.75 3.5) (layer F.CrtYd) (width 0.05)) (fp_line (start -2.25 -3.5) (end -2.25 3.5) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.6 -0.65) (end -1.6 0.65) (layer F.SilkS) (width 0.12)) (fp_line (start -2.2 0) (end -1 0) (layer F.SilkS) (width 0.12)) (fp_line (start 4.451 -0.468) (end 4.451 0.468) (layer F.SilkS) (width 0.12)) (fp_line (start 4.411 -0.676) (end 4.411 0.676) (layer F.SilkS) (width 0.12)) (fp_line (start 4.371 -0.834) (end 4.371 0.834) (layer F.SilkS) (width 0.12)) (fp_line (start 4.331 -0.966) (end 4.331 0.966) (layer F.SilkS) (width 0.12)) (fp_line (start 4.291 -1.081) (end 4.291 1.081) (layer F.SilkS) (width 0.12)) (fp_line (start 4.251 -1.184) (end 4.251 1.184) (layer F.SilkS) (width 0.12)) (fp_line (start 4.211 -1.278) (end 4.211 1.278) (layer F.SilkS) (width 0.12)) (fp_line (start 4.171 -1.364) (end 4.171 1.364) (layer F.SilkS) (width 0.12)) (fp_line (start 4.131 -1.445) (end 4.131 1.445) (layer F.SilkS) (width 0.12)) (fp_line (start 4.091 -1.52) (end 4.091 1.52) (layer F.SilkS) (width 0.12)) (fp_line (start 4.051 -1.591) (end 4.051 1.591) (layer F.SilkS) (width 0.12)) (fp_line (start 4.011 -1.658) (end 4.011 1.658) (layer F.SilkS) (width 0.12)) (fp_line (start 3.971 -1.721) (end 3.971 1.721) (layer F.SilkS) (width 0.12)) (fp_line (start 3.931 -1.781) (end 3.931 1.781) (layer F.SilkS) (width 0.12)) (fp_line (start 3.891 -1.839) (end 3.891 1.839) (layer F.SilkS) (width 0.12)) (fp_line (start 3.851 -1.894) (end 3.851 1.894) (layer F.SilkS) (width 0.12)) (fp_line (start 3.811 -1.946) (end 3.811 1.946) (layer F.SilkS) (width 0.12)) (fp_line (start 3.771 -1.997) (end 3.771 1.997) (layer F.SilkS) (width 0.12)) (fp_line (start 3.731 -2.045) (end 3.731 2.045) (layer F.SilkS) (width 0.12)) (fp_line (start 3.691 -2.092) (end 3.691 2.092) (layer F.SilkS) (width 0.12)) (fp_line (start 3.651 -2.137) (end 3.651 2.137) (layer F.SilkS) (width 0.12)) (fp_line (start 3.611 -2.18) (end 3.611 2.18) (layer F.SilkS) (width 0.12)) (fp_line (start 3.571 -2.222) (end 3.571 2.222) (layer F.SilkS) (width 0.12)) (fp_line (start 3.531 -2.262) (end 3.531 2.262) (layer F.SilkS) (width 0.12)) (fp_line (start 3.491 -2.301) (end 3.491 2.301) (layer F.SilkS) (width 0.12)) (fp_line (start 3.451 0.98) (end 3.451 2.339) (layer F.SilkS) (width 0.12)) (fp_line (start 3.451 -2.339) (end 3.451 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.411 0.98) (end 3.411 2.375) (layer F.SilkS) (width 0.12)) (fp_line (start 3.411 -2.375) (end 3.411 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.371 0.98) (end 3.371 2.411) (layer F.SilkS) (width 0.12)) (fp_line (start 3.371 -2.411) (end 3.371 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.331 0.98) (end 3.331 2.445) (layer F.SilkS) (width 0.12)) (fp_line (start 3.331 -2.445) (end 3.331 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.291 0.98) (end 3.291 2.478) (layer F.SilkS) (width 0.12)) (fp_line (start 3.291 -2.478) (end 3.291 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.251 0.98) (end 3.251 2.51) (layer F.SilkS) (width 0.12)) (fp_line (start 3.251 -2.51) (end 3.251 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.211 0.98) (end 3.211 2.54) (layer F.SilkS) (width 0.12)) (fp_line (start 3.211 -2.54) (end 3.211 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.171 0.98) (end 3.171 2.57) (layer F.SilkS) (width 0.12)) (fp_line (start 3.171 -2.57) (end 3.171 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.131 0.98) (end 3.131 2.599) (layer F.SilkS) (width 0.12)) (fp_line (start 3.131 -2.599) (end 3.131 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.091 0.98) (end 3.091 2.627) (layer F.SilkS) (width 0.12)) (fp_line (start 3.091 -2.627) (end 3.091 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.051 0.98) (end 3.051 2.654) (layer F.SilkS) (width 0.12)) (fp_line (start 3.051 -2.654) (end 3.051 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.011 0.98) (end 3.011 2.681) (layer F.SilkS) (width 0.12)) (fp_line (start 3.011 -2.681) (end 3.011 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 2.971 0.98) (end 2.971 2.706) (layer F.SilkS) (width 0.12)) (fp_line (start 2.971 -2.706) (end 2.971 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 2.931 0.98) (end 2.931 2.731) (layer F.SilkS) (width 0.12)) (fp_line (start 2.931 -2.731) (end 2.931 -0.98) (layer F.SilkS) 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3.051 -2.654) (end 3.051 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.051 0.98) (end 3.051 2.654) (layer F.SilkS) (width 0.12)) (fp_line (start 3.091 -2.627) (end 3.091 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.091 0.98) (end 3.091 2.627) (layer F.SilkS) (width 0.12)) (fp_line (start 3.131 -2.599) (end 3.131 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.131 0.98) (end 3.131 2.599) (layer F.SilkS) (width 0.12)) (fp_line (start 3.171 -2.57) (end 3.171 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.171 0.98) (end 3.171 2.57) (layer F.SilkS) (width 0.12)) (fp_line (start 3.211 -2.54) (end 3.211 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.211 0.98) (end 3.211 2.54) (layer F.SilkS) (width 0.12)) (fp_line (start 3.251 -2.51) (end 3.251 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.251 0.98) (end 3.251 2.51) (layer F.SilkS) (width 0.12)) (fp_line (start 3.291 -2.478) (end 3.291 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.291 0.98) (end 3.291 2.478) (layer F.SilkS) (width 0.12)) (fp_line (start 3.331 -2.445) (end 3.331 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.331 0.98) (end 3.331 2.445) (layer F.SilkS) (width 0.12)) (fp_line (start 3.371 -2.411) (end 3.371 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.371 0.98) (end 3.371 2.411) (layer F.SilkS) (width 0.12)) (fp_line (start 3.411 -2.375) (end 3.411 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.411 0.98) (end 3.411 2.375) (layer F.SilkS) (width 0.12)) (fp_line (start 3.451 -2.339) (end 3.451 -0.98) (layer F.SilkS) (width 0.12)) (fp_line (start 3.451 0.98) (end 3.451 2.339) (layer F.SilkS) (width 0.12)) (fp_line (start 3.491 -2.301) (end 3.491 2.301) (layer F.SilkS) (width 0.12)) (fp_line (start 3.531 -2.262) (end 3.531 2.262) (layer F.SilkS) (width 0.12)) (fp_line (start 3.571 -2.222) (end 3.571 2.222) (layer F.SilkS) (width 0.12)) (fp_line (start 3.611 -2.18) (end 3.611 2.18) (layer F.SilkS) (width 0.12)) (fp_line (start 3.651 -2.137) (end 3.651 2.137) (layer F.SilkS) (width 0.12)) (fp_line (start 3.691 -2.092) (end 3.691 2.092) (layer F.SilkS) (width 0.12)) (fp_line (start 3.731 -2.045) (end 3.731 2.045) (layer F.SilkS) (width 0.12)) (fp_line (start 3.771 -1.997) (end 3.771 1.997) (layer F.SilkS) (width 0.12)) (fp_line (start 3.811 -1.946) (end 3.811 1.946) (layer F.SilkS) (width 0.12)) (fp_line (start 3.851 -1.894) (end 3.851 1.894) (layer F.SilkS) (width 0.12)) (fp_line (start 3.891 -1.839) (end 3.891 1.839) (layer F.SilkS) (width 0.12)) (fp_line (start 3.931 -1.781) (end 3.931 1.781) (layer F.SilkS) (width 0.12)) (fp_line (start 3.971 -1.721) (end 3.971 1.721) (layer F.SilkS) (width 0.12)) (fp_line (start 4.011 -1.658) (end 4.011 1.658) (layer F.SilkS) (width 0.12)) (fp_line (start 4.051 -1.591) (end 4.051 1.591) (layer F.SilkS) (width 0.12)) (fp_line (start 4.091 -1.52) (end 4.091 1.52) (layer F.SilkS) (width 0.12)) (fp_line (start 4.131 -1.445) (end 4.131 1.445) (layer F.SilkS) (width 0.12)) (fp_line (start 4.171 -1.364) (end 4.171 1.364) (layer F.SilkS) (width 0.12)) (fp_line (start 4.211 -1.278) (end 4.211 1.278) (layer F.SilkS) (width 0.12)) (fp_line (start 4.251 -1.184) (end 4.251 1.184) (layer F.SilkS) (width 0.12)) (fp_line (start 4.291 -1.081) (end 4.291 1.081) (layer F.SilkS) (width 0.12)) (fp_line (start 4.331 -0.966) (end 4.331 0.966) (layer F.SilkS) (width 0.12)) (fp_line (start 4.371 -0.834) (end 4.371 0.834) (layer F.SilkS) (width 0.12)) (fp_line (start 4.411 -0.676) (end 4.411 0.676) (layer F.SilkS) (width 0.12)) (fp_line (start 4.451 -0.468) (end 4.451 0.468) (layer F.SilkS) (width 0.12)) (fp_line (start -2.2 0) (end -1 0) (layer F.SilkS) (width 0.12)) (fp_line (start -1.6 -0.65) (end -1.6 0.65) (layer F.SilkS) (width 0.12)) (fp_line (start -2.25 -3.5) (end -2.25 3.5) (layer F.CrtYd) (width 0.05)) (fp_line (start -2.25 3.5) (end 4.75 3.5) (layer F.CrtYd) (width 0.05)) (fp_line (start 4.75 3.5) (end 4.75 -3.5) (layer F.CrtYd) (width 0.05)) (fp_line (start 4.75 -3.5) (end -2.25 -3.5) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 1.25 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 12 "Net-(C19-Pad1)")) (pad 2 thru_hole circle (at 2.5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/CP_Radial_D6.3mm_P2.50mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5CFD40DF) (at 203.2 178.816) (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") (tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor") (path /5A3D7428/5A3D89E9) (fp_text reference C20 (at 2.5 -2.56) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 0.1uF (at 2.5 2.56) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 2.5 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 2 thru_hole circle (at 5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5CFD40F4) (at 154.685001 137.177001) (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") (tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor") (path /5A3B356D/5A449A79) (fp_text reference C21 (at 2.5 -2.56) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 0.1uF (at 2.5 2.56) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 2.5 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1)) (pad 2 thru_hole circle (at 5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Capacitors_ThroughHole:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5CFD4109) (at 208.935001 108.007001) (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") (tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor") (path /5A3B356D/5A449952) (fp_text reference C22 (at 2.5 -2.56) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 0.1uF (at 2.5 2.56) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12)) (fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12)) (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 2.5 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 2 thru_hole circle (at 5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module LEDs:LED_D3.0mm (layer F.Cu) (tedit 587A3A7B) (tstamp 5CFD411C) (at 223.015001 116.707001) (descr "LED, diameter 3.0mm, 2 pins") (tags "LED diameter 3.0mm 2 pins") (path /5A3B356D/5A43C9AA) (fp_text reference D1 (at 1.27 -2.96) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value LED (at 1.27 2.96) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 3.7 -2.25) (end -1.15 -2.25) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.7 2.25) (end 3.7 -2.25) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.15 2.25) (end 3.7 2.25) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.15 -2.25) (end -1.15 2.25) (layer F.CrtYd) (width 0.05)) (fp_line (start -0.29 1.08) (end -0.29 1.236) (layer F.SilkS) (width 0.12)) (fp_line (start -0.29 -1.236) (end -0.29 -1.08) (layer F.SilkS) (width 0.12)) (fp_line (start -0.23 -1.16619) (end -0.23 1.16619) (layer F.Fab) (width 0.1)) (fp_circle (center 1.27 0) (end 2.77 0) (layer F.Fab) (width 0.1)) (fp_arc (start 1.27 0) (end 0.229039 1.08) (angle -87.9) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.27 0) (end 0.229039 -1.08) (angle 87.9) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.27 0) (end -0.29 1.235516) (angle -108.8) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.27 0) (end -0.29 -1.235516) (angle 108.8) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.27 0) (end -0.23 -1.16619) (angle 284.3) (layer F.Fab) (width 0.1)) (pad 2 thru_hole circle (at 2.54 0) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask) (net 13 "Net-(D1-Pad2)")) (pad 1 thru_hole rect (at 0 0) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_D3.0mm.wrl (at (xyz 0 0 0)) (scale (xyz 0.393701 0.393701 0.393701)) (rotate (xyz 0 0 0)) ) ) (module Diodes_ThroughHole:D_T-1_P5.08mm_Horizontal (layer F.Cu) (tedit 5921392F) (tstamp 5CFD4135) (at 64.516 155.956) (descr "D, T-1 series, Axial, Horizontal, pin pitch=5.08mm, , length*diameter=3.2*2.6mm^2, , http://www.diodes.com/_files/packages/T-1.pdf") (tags "D T-1 series Axial Horizontal pin pitch 5.08mm length 3.2mm diameter 2.6mm") (path /5A3B21BC/5C26C9C0) (fp_text reference D2 (at 2.54 -2.36) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value DIRQ1 (at 2.54 2.36) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 6.35 -1.65) (end -1.25 -1.65) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.35 1.65) (end 6.35 -1.65) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.25 1.65) (end 6.35 1.65) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.25 -1.65) (end -1.25 1.65) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.42 -1.36) (end 1.42 1.36) (layer F.SilkS) (width 0.12)) (fp_line (start 4.2 1.36) (end 4.2 1.18) (layer F.SilkS) (width 0.12)) (fp_line (start 0.88 1.36) (end 4.2 1.36) (layer F.SilkS) (width 0.12)) (fp_line (start 0.88 1.18) (end 0.88 1.36) (layer F.SilkS) (width 0.12)) (fp_line (start 4.2 -1.36) (end 4.2 -1.18) (layer F.SilkS) (width 0.12)) (fp_line (start 0.88 -1.36) (end 4.2 -1.36) (layer F.SilkS) (width 0.12)) (fp_line (start 0.88 -1.18) (end 0.88 -1.36) (layer F.SilkS) (width 0.12)) (fp_line (start 1.42 -1.3) (end 1.42 1.3) (layer F.Fab) (width 0.1)) (fp_line (start 5.08 0) (end 4.14 0) (layer F.Fab) (width 0.1)) (fp_line (start 0 0) (end 0.94 0) (layer F.Fab) (width 0.1)) (fp_line (start 4.14 -1.3) (end 0.94 -1.3) (layer F.Fab) (width 0.1)) (fp_line (start 4.14 1.3) (end 4.14 -1.3) (layer F.Fab) (width 0.1)) (fp_line (start 0.94 1.3) (end 4.14 1.3) (layer F.Fab) (width 0.1)) (fp_line (start 0.94 -1.3) (end 0.94 1.3) (layer F.Fab) (width 0.1)) (fp_text user %R (at 2.54 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 thru_hole oval (at 5.08 0) (size 2 2) (drill 1) (layers *.Cu *.Mask) (net 123 "/DUART and line drivers/~IRQ")) (pad 1 thru_hole rect (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask) (net 122 "/VIA and IDE/~IRQVIA1")) (model ${KISYS3DMOD}/Diodes_THT.3dshapes/D_T-1_P5.08mm_Horizontal.wrl (at (xyz 0 0 0)) (scale (xyz 0.393701 0.393701 0.393701)) (rotate (xyz 0 0 0)) ) ) (module Diodes_ThroughHole:D_T-1_P5.08mm_Horizontal (layer F.Cu) (tedit 5921392F) (tstamp 5CFD414E) (at 60.452 123.952) (descr "D, T-1 series, Axial, Horizontal, pin pitch=5.08mm, , length*diameter=3.2*2.6mm^2, , http://www.diodes.com/_files/packages/T-1.pdf") (tags "D T-1 series Axial Horizontal pin pitch 5.08mm length 3.2mm diameter 2.6mm") (path /5A3B21BC/5C26C801) (fp_text reference D3 (at 3.556 2.54) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value DIRQ2 (at 2.54 2.36) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 2.54 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 0.94 -1.3) (end 0.94 1.3) (layer F.Fab) (width 0.1)) (fp_line (start 0.94 1.3) (end 4.14 1.3) (layer F.Fab) (width 0.1)) (fp_line (start 4.14 1.3) (end 4.14 -1.3) (layer F.Fab) (width 0.1)) (fp_line (start 4.14 -1.3) (end 0.94 -1.3) (layer F.Fab) (width 0.1)) (fp_line (start 0 0) (end 0.94 0) (layer F.Fab) (width 0.1)) (fp_line (start 5.08 0) (end 4.14 0) (layer F.Fab) (width 0.1)) (fp_line (start 1.42 -1.3) (end 1.42 1.3) (layer F.Fab) (width 0.1)) (fp_line (start 0.88 -1.18) (end 0.88 -1.36) (layer F.SilkS) (width 0.12)) (fp_line (start 0.88 -1.36) (end 4.2 -1.36) (layer F.SilkS) (width 0.12)) (fp_line (start 4.2 -1.36) (end 4.2 -1.18) (layer F.SilkS) (width 0.12)) (fp_line (start 0.88 1.18) (end 0.88 1.36) (layer F.SilkS) (width 0.12)) (fp_line (start 0.88 1.36) (end 4.2 1.36) (layer F.SilkS) (width 0.12)) (fp_line (start 4.2 1.36) (end 4.2 1.18) (layer F.SilkS) (width 0.12)) (fp_line (start 1.42 -1.36) (end 1.42 1.36) (layer F.SilkS) (width 0.12)) (fp_line (start -1.25 -1.65) (end -1.25 1.65) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.25 1.65) (end 6.35 1.65) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.35 1.65) (end 6.35 -1.65) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.35 -1.65) (end -1.25 -1.65) (layer F.CrtYd) (width 0.05)) (pad 1 thru_hole rect (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask) (net 14 "Net-(D3-Pad1)")) (pad 2 thru_hole oval (at 5.08 0) (size 2 2) (drill 1) (layers *.Cu *.Mask) (net 123 "/DUART and line drivers/~IRQ")) (model ${KISYS3DMOD}/Diodes_THT.3dshapes/D_T-1_P5.08mm_Horizontal.wrl (at (xyz 0 0 0)) (scale (xyz 0.393701 0.393701 0.393701)) (rotate (xyz 0 0 0)) ) ) (module LEDs:LED_D3.0mm (layer F.Cu) (tedit 587A3A7B) (tstamp 5CFD5DF0) (at 45.212 162.052) (descr "LED, diameter 3.0mm, 2 pins") (tags "LED diameter 3.0mm 2 pins") (path /5A3B21BC/5AA70441) (fp_text reference D4 (at 1.524 3.048) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value LED (at 1.27 2.96) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_arc (start 1.27 0) (end -0.23 -1.16619) (angle 284.3) (layer F.Fab) (width 0.1)) (fp_arc (start 1.27 0) (end -0.29 -1.235516) (angle 108.8) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.27 0) (end -0.29 1.235516) (angle -108.8) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.27 0) (end 0.229039 -1.08) (angle 87.9) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.27 0) (end 0.229039 1.08) (angle -87.9) (layer F.SilkS) (width 0.12)) (fp_circle (center 1.27 0) (end 2.77 0) (layer F.Fab) (width 0.1)) (fp_line (start -0.23 -1.16619) (end -0.23 1.16619) (layer F.Fab) (width 0.1)) (fp_line (start -0.29 -1.236) (end -0.29 -1.08) (layer F.SilkS) (width 0.12)) (fp_line (start -0.29 1.08) (end -0.29 1.236) (layer F.SilkS) (width 0.12)) (fp_line (start -1.15 -2.25) (end -1.15 2.25) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.15 2.25) (end 3.7 2.25) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.7 2.25) (end 3.7 -2.25) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.7 -2.25) (end -1.15 -2.25) (layer F.CrtYd) (width 0.05)) (pad 1 thru_hole rect (at 0 0) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask) (net 15 "/VIA and IDE/~IDE:DASP")) (pad 2 thru_hole circle (at 2.54 0) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask) (net 16 "Net-(D4-Pad2)")) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_D3.0mm.wrl (at (xyz 0 0 0)) (scale (xyz 0.393701 0.393701 0.393701)) (rotate (xyz 0 0 0)) ) ) (module Fuse_Holders_and_Fuses:Fuseholder5x20_horiz_open_Schurter_0031_8201 (layer F.Cu) (tedit 5880C433) (tstamp 5CFD417A) (at 138.684 96.52) (descr http://www.schurter.com/var/schurter/storage/ilcatalogue/files/document/datasheet/en/pdf/typ_OGN.pdf) (tags "Fuseholder horizontal open 5x20 Schurter 0031.8201") (path /5A3B356D/5A43A5A2) (fp_text reference F1 (at 11.25 -6) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 200mA (at 11.25 6) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 0.1 -4.7) (end 0.1 4.7) (layer F.Fab) (width 0.1)) (fp_line (start 0.1 4.7) (end 22.4 4.7) (layer F.Fab) (width 0.1)) (fp_line (start 22.4 4.7) (end 22.4 -4.7) (layer F.Fab) (width 0.1)) (fp_line (start 22.4 -4.7) (end 0.1 -4.7) (layer F.Fab) (width 0.1)) (fp_line (start -0.25 5.05) (end -0.25 1.95) (layer F.CrtYd) (width 0.05)) (fp_line (start 22.5 4.8) (end 22.5 2) (layer F.SilkS) (width 0.12)) (fp_line (start 22.5 -2) (end 22.5 -4.8) (layer F.SilkS) (width 0.12)) (fp_line (start 0 -2) (end 0 -4.8) (layer F.SilkS) (width 0.12)) (fp_line (start 0 -4.8) (end 22.5 -4.8) (layer F.SilkS) (width 0.12)) (fp_line (start 22.75 5.05) (end -0.25 5.05) (layer F.CrtYd) (width 0.05)) (fp_line (start -0.25 -5.05) (end 22.75 -5.05) (layer F.CrtYd) (width 0.05)) (fp_line (start 0 4.8) (end 22.5 4.8) (layer F.SilkS) (width 0.12)) (fp_line (start -0.25 -1.95) (end -0.25 -5.05) (layer F.CrtYd) (width 0.05)) (fp_line (start 22.75 -1.95) (end 22.75 -5.05) (layer F.CrtYd) (width 0.05)) (fp_line (start 22.75 1.95) (end 22.75 5.05) (layer F.CrtYd) (width 0.05)) (fp_line (start 0 4.8) (end 0 2) (layer F.SilkS) (width 0.12)) (fp_arc (start 22.5 0) (end 22.75 -1.95) (angle 165.3) (layer F.CrtYd) (width 0.05)) (fp_arc (start 0 0) (end -0.25 1.95) (angle 165.3) (layer F.CrtYd) (width 0.05)) (pad 1 thru_hole circle (at 0 0) (size 3 3) (drill 1.3) (layers *.Cu *.Mask) (net 1 VCC)) (pad 2 thru_hole circle (at 22.5 0) (size 3 3) (drill 1.3) (layers *.Cu *.Mask) (net 11 +5V)) (pad "" np_thru_hole circle (at 11.25 0) (size 2.7 2.7) (drill 2.7) (layers *.Cu *.Mask)) ) (module Fuse_Holders_and_Fuses:Fuseholder5x20_horiz_open_Schurter_0031_8201 (layer F.Cu) (tedit 5880C433) (tstamp 5CFD4193) (at 138.176 82.296) (descr http://www.schurter.com/var/schurter/storage/ilcatalogue/files/document/datasheet/en/pdf/typ_OGN.pdf) (tags "Fuseholder horizontal open 5x20 Schurter 0031.8201") (path /5A3B356D/5A43A547) (fp_text reference F2 (at 11.25 -6) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 1A (at 11.25 6) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_arc (start 0 0) (end -0.25 1.95) (angle 165.3) (layer F.CrtYd) (width 0.05)) (fp_arc (start 22.5 0) (end 22.75 -1.95) (angle 165.3) (layer F.CrtYd) (width 0.05)) (fp_line (start 0 4.8) (end 0 2) (layer F.SilkS) (width 0.12)) (fp_line (start 22.75 1.95) (end 22.75 5.05) (layer F.CrtYd) (width 0.05)) (fp_line (start 22.75 -1.95) (end 22.75 -5.05) (layer F.CrtYd) (width 0.05)) (fp_line (start -0.25 -1.95) (end -0.25 -5.05) (layer F.CrtYd) (width 0.05)) (fp_line (start 0 4.8) (end 22.5 4.8) (layer F.SilkS) (width 0.12)) (fp_line (start -0.25 -5.05) (end 22.75 -5.05) (layer F.CrtYd) (width 0.05)) (fp_line (start 22.75 5.05) (end -0.25 5.05) (layer F.CrtYd) (width 0.05)) (fp_line (start 0 -4.8) (end 22.5 -4.8) (layer F.SilkS) (width 0.12)) (fp_line (start 0 -2) (end 0 -4.8) (layer F.SilkS) (width 0.12)) (fp_line (start 22.5 -2) (end 22.5 -4.8) (layer F.SilkS) (width 0.12)) (fp_line (start 22.5 4.8) (end 22.5 2) (layer F.SilkS) (width 0.12)) (fp_line (start -0.25 5.05) (end -0.25 1.95) (layer F.CrtYd) (width 0.05)) (fp_line (start 22.4 -4.7) (end 0.1 -4.7) (layer F.Fab) (width 0.1)) (fp_line (start 22.4 4.7) (end 22.4 -4.7) (layer F.Fab) (width 0.1)) (fp_line (start 0.1 4.7) (end 22.4 4.7) (layer F.Fab) (width 0.1)) (fp_line (start 0.1 -4.7) (end 0.1 4.7) (layer F.Fab) (width 0.1)) (pad "" np_thru_hole circle (at 11.25 0) (size 2.7 2.7) (drill 2.7) (layers *.Cu *.Mask)) (pad 2 thru_hole circle (at 22.5 0) (size 3 3) (drill 1.3) (layers *.Cu *.Mask) (net 12 "Net-(C19-Pad1)")) (pad 1 thru_hole circle (at 0 0) (size 3 3) (drill 1.3) (layers *.Cu *.Mask) (net 17 "/Glue and control logic/PWR_IN")) ) (module Mounting_Holes:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 5CFD419B) (at 38.608 65.024) (descr "Mounting Hole 3.2mm, M3, DIN965") (tags "mounting hole 3.2mm m3 din965") (path /5A3B356D/5C2392E9) (attr virtual) (fp_text reference H1 (at 0 -3.8) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value MountingHole (at 0 3.8) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05)) (fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15)) (fp_text user %R (at 0.3 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask)) ) (module Mounting_Holes:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 5CFD41A3) (at 209.715001 121.757001) (descr "Mounting Hole 3.2mm, M3, DIN965") (tags "mounting hole 3.2mm m3 din965") (path /5A3B356D/5C239368) (attr virtual) (fp_text reference H2 (at 0 -3.8) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value MountingHole (at 0 3.8) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 0.3 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15)) (fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05)) (pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask)) ) (module Mounting_Holes:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 5CFD41AB) (at 217.765001 117.507001) (descr "Mounting Hole 3.2mm, M3, DIN965") (tags "mounting hole 3.2mm m3 din965") (path /5A3B356D/5C2393BC) (attr virtual) (fp_text reference H3 (at 0 -3.8) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value MountingHole (at 0 3.8) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05)) (fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15)) (fp_text user %R (at 0.3 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask)) ) (module Mounting_Holes:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 5CFD41B3) (at 38.608 162.56) (descr "Mounting Hole 3.2mm, M3, DIN965") (tags "mounting hole 3.2mm m3 din965") (path /5A3B356D/5C9ECC4F) (attr virtual) (fp_text reference H4 (at 4.064 0) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value MountingHole (at 0 3.8) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 0.3 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15)) (fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05)) (pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask)) ) (module Connectors_IDC:IDC-Header_2x05_Pitch2.54mm_Straight (layer F.Cu) (tedit 59DE0611) (tstamp 5CFD6856) (at 62.484 64.008 270) (descr "10 pins through hole IDC header") (tags "IDC header socket VASCH") (path /5952FC81/5A152192) (fp_text reference J1 (at -1.524 16.764 180) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value RS232a (at 1.27 16.764 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 1.27 5.08 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 5.695 -5.1) (end 5.695 15.26) (layer F.Fab) (width 0.1)) (fp_line (start 5.145 -4.56) (end 5.145 14.7) (layer F.Fab) (width 0.1)) (fp_line (start -3.155 -5.1) (end -3.155 15.26) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 -4.56) (end -2.605 2.83) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 7.33) (end -2.605 14.7) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 2.83) (end -3.155 2.83) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 7.33) (end -3.155 7.33) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 -5.1) (end -3.155 -5.1) (layer F.Fab) (width 0.1)) (fp_line (start 5.145 -4.56) (end -2.605 -4.56) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 15.26) (end -3.155 15.26) (layer F.Fab) (width 0.1)) (fp_line (start 5.145 14.7) (end -2.605 14.7) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 -5.1) (end 5.145 -4.56) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 15.26) (end 5.145 14.7) (layer F.Fab) (width 0.1)) (fp_line (start -3.155 -5.1) (end -2.605 -4.56) (layer F.Fab) (width 0.1)) (fp_line (start -3.155 15.26) (end -2.605 14.7) (layer F.Fab) (width 0.1)) (fp_line (start 6.2 -5.85) (end 6.2 15.76) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.2 15.76) (end -3.91 15.76) (layer F.CrtYd) (width 0.05)) (fp_line (start -3.91 15.76) (end -3.91 -5.85) (layer F.CrtYd) (width 0.05)) (fp_line (start -3.91 -5.85) (end 6.2 -5.85) (layer F.CrtYd) (width 0.05)) (fp_line (start 5.945 -5.35) (end 5.945 15.51) (layer F.SilkS) (width 0.12)) (fp_line (start 5.945 15.51) (end -3.405 15.51) (layer F.SilkS) (width 0.12)) (fp_line (start -3.405 15.51) (end -3.405 -5.35) (layer F.SilkS) (width 0.12)) (fp_line (start -3.405 -5.35) (end 5.945 -5.35) (layer F.SilkS) (width 0.12)) (fp_line (start -3.655 -5.6) (end -3.655 -3.06) (layer F.SilkS) (width 0.12)) (fp_line (start -3.655 -5.6) (end -1.115 -5.6) (layer F.SilkS) (width 0.12)) (pad 1 thru_hole rect (at 0 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (pad 2 thru_hole oval (at 2.54 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 21 "/DUART and line drivers/RS232RxDa")) (pad 3 thru_hole oval (at 0 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 20 "/DUART and line drivers/RS232TxDa")) (pad 4 thru_hole oval (at 2.54 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (pad 5 thru_hole oval (at 0 5.08 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 4 GND)) (pad 6 thru_hole oval (at 2.54 5.08 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (pad 7 thru_hole oval (at 0 7.62 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 19 "/DUART and line drivers/RS232RTSa")) (pad 8 thru_hole oval (at 2.54 7.62 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 18 "/DUART and line drivers/RS232CTSa")) (pad 9 thru_hole oval (at 0 10.16 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (pad 10 thru_hole oval (at 2.54 10.16 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (model ${KISYS3DMOD}/Connectors_IDC.3dshapes/IDC-Header_2x05_Pitch2.54mm_Straight.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Connectors_IDC:IDC-Header_2x05_Pitch2.54mm_Straight (layer F.Cu) (tedit 59DE0611) (tstamp 5CFD4203) (at 84.836 64.008 270) (descr "10 pins through hole IDC header") (tags "IDC header socket VASCH") (path /5952FC81/5A15222D) (fp_text reference J2 (at 1.27 -6.604 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value RS232b (at 1.27 16.764 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -3.655 -5.6) (end -1.115 -5.6) (layer F.SilkS) (width 0.12)) (fp_line (start -3.655 -5.6) (end -3.655 -3.06) (layer F.SilkS) (width 0.12)) (fp_line (start -3.405 -5.35) (end 5.945 -5.35) (layer F.SilkS) (width 0.12)) (fp_line (start -3.405 15.51) (end -3.405 -5.35) (layer F.SilkS) (width 0.12)) (fp_line (start 5.945 15.51) (end -3.405 15.51) (layer F.SilkS) (width 0.12)) (fp_line (start 5.945 -5.35) (end 5.945 15.51) (layer F.SilkS) (width 0.12)) (fp_line (start -3.91 -5.85) (end 6.2 -5.85) (layer F.CrtYd) (width 0.05)) (fp_line (start -3.91 15.76) (end -3.91 -5.85) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.2 15.76) (end -3.91 15.76) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.2 -5.85) (end 6.2 15.76) (layer F.CrtYd) (width 0.05)) (fp_line (start -3.155 15.26) (end -2.605 14.7) (layer F.Fab) (width 0.1)) (fp_line (start -3.155 -5.1) (end -2.605 -4.56) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 15.26) (end 5.145 14.7) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 -5.1) (end 5.145 -4.56) (layer F.Fab) (width 0.1)) (fp_line (start 5.145 14.7) (end -2.605 14.7) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 15.26) (end -3.155 15.26) (layer F.Fab) (width 0.1)) (fp_line (start 5.145 -4.56) (end -2.605 -4.56) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 -5.1) (end -3.155 -5.1) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 7.33) (end -3.155 7.33) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 2.83) (end -3.155 2.83) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 7.33) (end -2.605 14.7) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 -4.56) (end -2.605 2.83) (layer F.Fab) (width 0.1)) (fp_line (start -3.155 -5.1) (end -3.155 15.26) (layer F.Fab) (width 0.1)) (fp_line (start 5.145 -4.56) (end 5.145 14.7) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 -5.1) (end 5.695 15.26) (layer F.Fab) (width 0.1)) (fp_text user %R (at 1.27 5.08 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 10 thru_hole oval (at 2.54 10.16 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (pad 9 thru_hole oval (at 0 10.16 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (pad 8 thru_hole oval (at 2.54 7.62 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 25 "/DUART and line drivers/RS232CTSb")) (pad 7 thru_hole oval (at 0 7.62 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 24 "/DUART and line drivers/RS232RTSb")) (pad 6 thru_hole oval (at 2.54 5.08 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (pad 5 thru_hole oval (at 0 5.08 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 4 GND)) (pad 4 thru_hole oval (at 2.54 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (pad 3 thru_hole oval (at 0 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 23 "/DUART and line drivers/RS232TxDb")) (pad 2 thru_hole oval (at 2.54 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 22 "/DUART and line drivers/RS232RxDb")) (pad 1 thru_hole rect (at 0 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (model ${KISYS3DMOD}/Connectors_IDC.3dshapes/IDC-Header_2x05_Pitch2.54mm_Straight.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Connectors_IDC:IDC-Header_2x07_Pitch2.54mm_Straight (layer F.Cu) (tedit 59DE0420) (tstamp 5CFD422F) (at 39.624 76.2) (descr "14 pins through hole IDC header") (tags "IDC header socket VASCH") (path /5A3B21BC/5A3C12B2) (fp_text reference J3 (at 1.27 -6.604) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value VIA2PB (at 1.27 21.844) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -3.655 -5.6) (end -1.115 -5.6) (layer F.SilkS) (width 0.12)) (fp_line (start -3.655 -5.6) (end -3.655 -3.06) (layer F.SilkS) (width 0.12)) (fp_line (start -3.405 -5.35) (end 5.945 -5.35) (layer F.SilkS) (width 0.12)) (fp_line (start -3.405 20.59) (end -3.405 -5.35) (layer F.SilkS) (width 0.12)) (fp_line (start 5.945 20.59) (end -3.405 20.59) (layer F.SilkS) (width 0.12)) (fp_line (start 5.945 -5.35) (end 5.945 20.59) (layer F.SilkS) (width 0.12)) (fp_line (start -3.91 -5.85) (end 6.2 -5.85) (layer F.CrtYd) (width 0.05)) (fp_line (start -3.91 20.84) (end -3.91 -5.85) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.2 20.84) (end -3.91 20.84) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.2 -5.85) (end 6.2 20.84) (layer F.CrtYd) (width 0.05)) (fp_line (start -3.155 20.34) (end -2.605 19.78) (layer F.Fab) (width 0.1)) (fp_line (start -3.155 -5.1) (end -2.605 -4.56) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 20.34) (end 5.145 19.78) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 -5.1) (end 5.145 -4.56) (layer F.Fab) (width 0.1)) (fp_line (start 5.145 19.78) (end -2.605 19.78) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 20.34) (end -3.155 20.34) (layer F.Fab) (width 0.1)) (fp_line (start 5.145 -4.56) (end -2.605 -4.56) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 -5.1) (end -3.155 -5.1) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 9.87) (end -3.155 9.87) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 5.37) (end -3.155 5.37) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 9.87) (end -2.605 19.78) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 -4.56) (end -2.605 5.37) (layer F.Fab) (width 0.1)) (fp_line (start -3.155 -5.1) (end -3.155 20.34) (layer F.Fab) (width 0.1)) (fp_line (start 5.145 -4.56) (end 5.145 19.78) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 -5.1) (end 5.695 20.34) (layer F.Fab) (width 0.1)) (fp_text user %R (at 1.27 7.62) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 14 thru_hole oval (at 2.54 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 VCC)) (pad 13 thru_hole oval (at 0 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 VCC)) (pad 12 thru_hole oval (at 2.54 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 26 "Net-(J3-Pad12)")) (pad 11 thru_hole oval (at 0 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 27 "Net-(J3-Pad11)")) (pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 28 "Net-(J3-Pad10)")) (pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 29 "Net-(J3-Pad9)")) (pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 30 "Net-(J3-Pad8)")) (pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 31 "Net-(J3-Pad7)")) (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 32 "Net-(J3-Pad6)")) (pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 33 "Net-(J3-Pad5)")) (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 34 "Net-(J3-Pad4)")) (pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 35 "Net-(J3-Pad3)")) (pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 4 GND)) (pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Connectors_IDC.3dshapes/IDC-Header_2x07_Pitch2.54mm_Straight.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Connectors_IDC:IDC-Header_2x20_Pitch2.54mm_Straight (layer F.Cu) (tedit 59DE12BE) (tstamp 5CFD4275) (at 39.624 103.632) (descr "40 pins through hole IDC header") (tags "IDC header socket VASCH") (path /5A3B21BC/5A3C11DF) (fp_text reference J4 (at 0.508 54.864) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value IDE (at 1.27 54.864) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 1.27 24.13) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 5.695 -5.1) (end 5.695 53.36) (layer F.Fab) (width 0.1)) (fp_line (start 5.145 -4.56) (end 5.145 52.8) (layer F.Fab) (width 0.1)) (fp_line (start -3.155 -5.1) (end -3.155 53.36) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 -4.56) (end -2.605 21.88) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 26.38) (end -2.605 52.8) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 21.88) (end -3.155 21.88) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 26.38) (end -3.155 26.38) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 -5.1) (end -3.155 -5.1) (layer F.Fab) (width 0.1)) (fp_line (start 5.145 -4.56) (end -2.605 -4.56) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 53.36) (end -3.155 53.36) (layer F.Fab) (width 0.1)) (fp_line (start 5.145 52.8) (end -2.605 52.8) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 -5.1) (end 5.145 -4.56) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 53.36) (end 5.145 52.8) (layer F.Fab) (width 0.1)) (fp_line (start -3.155 -5.1) (end -2.605 -4.56) (layer F.Fab) (width 0.1)) (fp_line (start -3.155 53.36) (end -2.605 52.8) (layer F.Fab) (width 0.1)) (fp_line (start 6.2 -5.85) (end 6.2 53.86) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.2 53.86) (end -3.91 53.86) (layer F.CrtYd) (width 0.05)) (fp_line (start -3.91 53.86) (end -3.91 -5.85) (layer F.CrtYd) (width 0.05)) (fp_line (start -3.91 -5.85) (end 6.2 -5.85) (layer F.CrtYd) (width 0.05)) (fp_line (start 5.945 -5.35) (end 5.945 53.61) (layer F.SilkS) (width 0.12)) (fp_line (start 5.945 53.61) (end -3.405 53.61) (layer F.SilkS) (width 0.12)) (fp_line (start -3.405 53.61) (end -3.405 -5.35) (layer F.SilkS) (width 0.12)) (fp_line (start -3.405 -5.35) (end 5.945 -5.35) (layer F.SilkS) (width 0.12)) (fp_line (start -3.655 -5.6) (end -3.655 -3.06) (layer F.SilkS) (width 0.12)) (fp_line (start -3.655 -5.6) (end -1.115 -5.6) (layer F.SilkS) (width 0.12)) (pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 60 "/VIA and IDE/~IDE:RES")) (pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 4 GND)) (pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 59 "/VIA and IDE/IDE-D7")) (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 58 "/VIA and IDE/IDE-D8")) (pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 57 "/VIA and IDE/IDE-D6")) (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 56 "/VIA and IDE/IDE-D9")) (pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 55 "/VIA and IDE/IDE-D5")) (pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 54 "/VIA and IDE/IDE-D10")) (pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 53 "/VIA and IDE/IDE-D4")) (pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 52 "/VIA and IDE/IDE-D11")) (pad 11 thru_hole oval (at 0 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 51 "/VIA and IDE/IDE-D3")) (pad 12 thru_hole oval (at 2.54 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 50 "/VIA and IDE/IDE-D12")) (pad 13 thru_hole oval (at 0 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 49 "/VIA and IDE/IDE-D2")) (pad 14 thru_hole oval (at 2.54 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 48 "/VIA and IDE/IDE-D13")) (pad 15 thru_hole oval (at 0 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 47 "/VIA and IDE/IDE-D1")) (pad 16 thru_hole oval (at 2.54 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 46 "/VIA and IDE/IDE-D14")) (pad 17 thru_hole oval (at 0 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 45 "/VIA and IDE/IDE-D0")) (pad 18 thru_hole oval (at 2.54 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 44 "/VIA and IDE/IDE-D15")) (pad 19 thru_hole oval (at 0 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 4 GND)) (pad 20 thru_hole oval (at 2.54 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (pad 21 thru_hole oval (at 0 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (pad 22 thru_hole oval (at 2.54 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 4 GND)) (pad 23 thru_hole oval (at 0 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 43 "/VIA and IDE/~DIOW")) (pad 24 thru_hole oval (at 2.54 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 4 GND)) (pad 25 thru_hole oval (at 0 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 42 "/VIA and IDE/~DIOR")) (pad 26 thru_hole oval (at 2.54 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 4 GND)) (pad 27 thru_hole oval (at 0 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (pad 28 thru_hole oval (at 2.54 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (pad 29 thru_hole oval (at 0 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 41 "/VIA and IDE/~IDE:DMACK")) (pad 30 thru_hole oval (at 2.54 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 4 GND)) (pad 31 thru_hole oval (at 0 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (pad 32 thru_hole oval (at 2.54 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 4 GND)) (pad 33 thru_hole oval (at 0 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 40 "/VIA and IDE/IDE-A1")) (pad 34 thru_hole oval (at 2.54 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (pad 35 thru_hole oval (at 0 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 39 "/VIA and IDE/IDE-A0")) (pad 36 thru_hole oval (at 2.54 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 38 "/VIA and IDE/IDE-A2")) (pad 37 thru_hole oval (at 0 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 37 "/VIA and IDE/~IDE:CS0")) (pad 38 thru_hole oval (at 2.54 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 36 "/VIA and IDE/~IDE:CS1")) (pad 39 thru_hole oval (at 0 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 15 "/VIA and IDE/~IDE:DASP")) (pad 40 thru_hole oval (at 2.54 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Connectors_IDC.3dshapes/IDC-Header_2x20_Pitch2.54mm_Straight.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Connectors_Molex:Molex_NanoFit_1x04x2.50mm_Angled (layer F.Cu) (tedit 58A28F0A) (tstamp 5CFD42A2) (at 192.024 61.468 270) (descr "Molex Nano Fit, single row, side entry, through hole, Datasheet:http://www.molex.com/pdm_docs/sd/1053131208_sd.pdf") (tags "connector molex nano-fit 105313-xx08") (path /5A3B356D/5A43C29B) (fp_text reference J5 (at 3.75 2.2 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value POWER_IN (at 3.75 3.5 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 3.75 -4.5 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -2 -0.3) (end -1.4 0) (layer F.Fab) (width 0.1)) (fp_line (start -2 0.3) (end -2 -0.3) (layer F.Fab) (width 0.1)) (fp_line (start -1.4 0) (end -2 0.3) (layer F.Fab) (width 0.1)) (fp_line (start -2 -0.3) (end -1.4 0) (layer F.SilkS) (width 0.12)) (fp_line (start -2 0.3) (end -2 -0.3) (layer F.SilkS) (width 0.12)) (fp_line (start -1.4 0) (end -2 0.3) (layer F.SilkS) (width 0.12)) (fp_line (start 9.71 -10.88) (end -2.21 -10.88) (layer F.CrtYd) (width 0.05)) (fp_line (start 9.71 1.45) (end 9.71 -10.88) (layer F.CrtYd) (width 0.05)) (fp_line (start -2.21 1.45) (end 9.71 1.45) (layer F.CrtYd) (width 0.05)) (fp_line (start -2.21 -10.88) (end -2.21 1.45) (layer F.CrtYd) (width 0.05)) (fp_line (start 7.65 -1.77) (end 7.35 -1.77) (layer F.SilkS) (width 0.12)) (fp_line (start 7.65 -1.3) (end 7.65 -1.77) (layer F.SilkS) (width 0.12)) (fp_line (start 7.35 -1.3) (end 7.65 -1.3) (layer F.SilkS) (width 0.12)) (fp_line (start 7.35 -1.77) (end 7.35 -1.3) (layer F.SilkS) (width 0.12)) (fp_line (start 5.15 -1.77) (end 4.85 -1.77) (layer F.SilkS) (width 0.12)) (fp_line (start 5.15 -1.3) (end 5.15 -1.77) (layer F.SilkS) (width 0.12)) (fp_line (start 4.85 -1.3) (end 5.15 -1.3) (layer F.SilkS) (width 0.12)) (fp_line (start 4.85 -1.77) (end 4.85 -1.3) (layer F.SilkS) (width 0.12)) (fp_line (start 2.65 -1.77) (end 2.35 -1.77) (layer F.SilkS) (width 0.12)) (fp_line (start 2.65 -1.3) (end 2.65 -1.77) (layer F.SilkS) (width 0.12)) (fp_line (start 2.35 -1.3) (end 2.65 -1.3) (layer F.SilkS) (width 0.12)) (fp_line (start 2.35 -1.77) (end 2.35 -1.3) (layer F.SilkS) (width 0.12)) (fp_line (start 0.15 -1.77) (end -0.15 -1.77) (layer F.SilkS) (width 0.12)) (fp_line (start 0.15 -1.3) (end 0.15 -1.77) (layer F.SilkS) (width 0.12)) (fp_line (start -0.15 -1.3) (end 0.15 -1.3) (layer F.SilkS) (width 0.12)) (fp_line (start -0.15 -1.77) (end -0.15 -1.3) (layer F.SilkS) (width 0.12)) (fp_line (start 9.37 -10.53) (end -1.87 -10.53) (layer F.SilkS) (width 0.12)) (fp_line (start 9.37 -1.77) (end 9.37 -10.53) (layer F.SilkS) (width 0.12)) (fp_line (start -1.87 -1.77) (end 9.37 -1.77) (layer F.SilkS) (width 0.12)) (fp_line (start -1.87 -10.53) (end -1.87 -1.77) (layer F.SilkS) (width 0.12)) (fp_line (start 9.22 -10.38) (end -1.72 -10.38) (layer F.Fab) (width 0.1)) (fp_line (start 9.22 -1.92) (end 9.22 -10.38) (layer F.Fab) (width 0.1)) (fp_line (start -1.72 -1.92) (end 9.22 -1.92) (layer F.Fab) (width 0.1)) (fp_line (start -1.72 -10.38) (end -1.72 -1.92) (layer F.Fab) (width 0.1)) (pad "" np_thru_hole circle (at 7.5 -7.18 270) (size 1.6 1.6) (drill 1.6) (layers *.Cu *.Mask)) (pad "" np_thru_hole circle (at 0 -7.18 270) (size 1.6 1.6) (drill 1.6) (layers *.Cu *.Mask)) (pad 4 thru_hole circle (at 7.5 0 270) (size 1.9 1.9) (drill 1.2) (layers *.Cu *.Mask)) (pad 3 thru_hole circle (at 5 0 270) (size 1.9 1.9) (drill 1.2) (layers *.Cu *.Mask) (net 4 GND)) (pad 2 thru_hole circle (at 2.5 0 270) (size 1.9 1.9) (drill 1.2) (layers *.Cu *.Mask) (net 4 GND)) (pad 1 thru_hole rect (at 0 0 270) (size 1.9 1.9) (drill 1.2) (layers *.Cu *.Mask) (net 17 "/Glue and control logic/PWR_IN")) (model ${KISYS3DMOD}/Connectors_Molex.3dshapes/Molex_NanoFit_1x04x2.50mm_Angled.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Connectors_IDC:IDC-Header_2x05_Pitch2.54mm_Straight (layer F.Cu) (tedit 59DE0611) (tstamp 5CFD42CA) (at 248.412 100.584) (descr "10 pins through hole IDC header") (tags "IDC header socket VASCH") (path /5A3B356D/5A4410D6) (fp_text reference J6 (at 1.27 -6.604) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value JTAG (at 1.27 16.764) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -3.655 -5.6) (end -1.115 -5.6) (layer F.SilkS) (width 0.12)) (fp_line (start -3.655 -5.6) (end -3.655 -3.06) (layer F.SilkS) (width 0.12)) (fp_line (start -3.405 -5.35) (end 5.945 -5.35) (layer F.SilkS) (width 0.12)) (fp_line (start -3.405 15.51) (end -3.405 -5.35) (layer F.SilkS) (width 0.12)) (fp_line (start 5.945 15.51) (end -3.405 15.51) (layer F.SilkS) (width 0.12)) (fp_line (start 5.945 -5.35) (end 5.945 15.51) (layer F.SilkS) (width 0.12)) (fp_line (start -3.91 -5.85) (end 6.2 -5.85) (layer F.CrtYd) (width 0.05)) (fp_line (start -3.91 15.76) (end -3.91 -5.85) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.2 15.76) (end -3.91 15.76) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.2 -5.85) (end 6.2 15.76) (layer F.CrtYd) (width 0.05)) (fp_line (start -3.155 15.26) (end -2.605 14.7) (layer F.Fab) (width 0.1)) (fp_line (start -3.155 -5.1) (end -2.605 -4.56) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 15.26) (end 5.145 14.7) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 -5.1) (end 5.145 -4.56) (layer F.Fab) (width 0.1)) (fp_line (start 5.145 14.7) (end -2.605 14.7) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 15.26) (end -3.155 15.26) (layer F.Fab) (width 0.1)) (fp_line (start 5.145 -4.56) (end -2.605 -4.56) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 -5.1) (end -3.155 -5.1) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 7.33) (end -3.155 7.33) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 2.83) (end -3.155 2.83) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 7.33) (end -2.605 14.7) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 -4.56) (end -2.605 2.83) (layer F.Fab) (width 0.1)) (fp_line (start -3.155 -5.1) (end -3.155 15.26) (layer F.Fab) (width 0.1)) (fp_line (start 5.145 -4.56) (end 5.145 14.7) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 -5.1) (end 5.695 15.26) (layer F.Fab) (width 0.1)) (fp_text user %R (at 1.27 5.08) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 4 GND)) (pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 61 "/Glue and control logic/TDO")) (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 11 +5V)) (pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 62 "/Glue and control logic/TDI")) (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 4 GND)) (pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 63 "/Glue and control logic/TMS")) (pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 4 GND)) (pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 64 "/Glue and control logic/TCK")) (model ${KISYS3DMOD}/Connectors_IDC.3dshapes/IDC-Header_2x05_Pitch2.54mm_Straight.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Connectors_IDC:IDC-Header_2x20_Pitch2.54mm_Straight (layer F.Cu) (tedit 59DE12BE) (tstamp 5CFD4310) (at 236.728 131.064) (descr "40 pins through hole IDC header") (tags "IDC header socket VASCH") (path /5A3D7428/5BE1F74C) (fp_text reference J7 (at 1.27 -6.604) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value "Expansion Bus" (at 1.27 54.864) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -3.655 -5.6) (end -1.115 -5.6) (layer F.SilkS) (width 0.12)) (fp_line (start -3.655 -5.6) (end -3.655 -3.06) (layer F.SilkS) (width 0.12)) (fp_line (start -3.405 -5.35) (end 5.945 -5.35) (layer F.SilkS) (width 0.12)) (fp_line (start -3.405 53.61) (end -3.405 -5.35) (layer F.SilkS) (width 0.12)) (fp_line (start 5.945 53.61) (end -3.405 53.61) (layer F.SilkS) (width 0.12)) (fp_line (start 5.945 -5.35) (end 5.945 53.61) (layer F.SilkS) (width 0.12)) (fp_line (start -3.91 -5.85) (end 6.2 -5.85) (layer F.CrtYd) (width 0.05)) (fp_line (start -3.91 53.86) (end -3.91 -5.85) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.2 53.86) (end -3.91 53.86) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.2 -5.85) (end 6.2 53.86) (layer F.CrtYd) (width 0.05)) (fp_line (start -3.155 53.36) (end -2.605 52.8) (layer F.Fab) (width 0.1)) (fp_line (start -3.155 -5.1) (end -2.605 -4.56) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 53.36) (end 5.145 52.8) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 -5.1) (end 5.145 -4.56) (layer F.Fab) (width 0.1)) (fp_line (start 5.145 52.8) (end -2.605 52.8) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 53.36) (end -3.155 53.36) (layer F.Fab) (width 0.1)) (fp_line (start 5.145 -4.56) (end -2.605 -4.56) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 -5.1) (end -3.155 -5.1) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 26.38) (end -3.155 26.38) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 21.88) (end -3.155 21.88) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 26.38) (end -2.605 52.8) (layer F.Fab) (width 0.1)) (fp_line (start -2.605 -4.56) (end -2.605 21.88) (layer F.Fab) (width 0.1)) (fp_line (start -3.155 -5.1) (end -3.155 53.36) (layer F.Fab) (width 0.1)) (fp_line (start 5.145 -4.56) (end 5.145 52.8) (layer F.Fab) (width 0.1)) (fp_line (start 5.695 -5.1) (end 5.695 53.36) (layer F.Fab) (width 0.1)) (fp_text user %R (at 1.27 24.13) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 40 thru_hole oval (at 2.54 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 4 GND)) (pad 39 thru_hole oval (at 0 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 4 GND)) (pad 38 thru_hole oval (at 2.54 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (pad 37 thru_hole oval (at 0 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 92 "/DUART and line drivers/~MWR")) (pad 36 thru_hole oval (at 2.54 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 65 "/Glue and control logic/RDY")) (pad 35 thru_hole oval (at 0 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 93 "/DUART and line drivers/~MRD")) (pad 34 thru_hole oval (at 2.54 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 90 "/Glue and control logic/A15")) (pad 33 thru_hole oval (at 0 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 123 "/DUART and line drivers/~IRQ")) (pad 32 thru_hole oval (at 2.54 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 85 "/Glue and control logic/A14")) (pad 31 thru_hole oval (at 0 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 76 "/Glue and control logic/~RES")) (pad 30 thru_hole oval (at 2.54 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 89 "/Glue and control logic/A13")) (pad 29 thru_hole oval (at 0 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 138 "/Glue and control logic/~IOSEL3")) (pad 28 thru_hole oval (at 2.54 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 84 "/Glue and control logic/A12")) (pad 27 thru_hole oval (at 0 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 121 "/Glue and control logic/~IOSEL2")) (pad 26 thru_hole oval (at 2.54 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 88 "/Glue and control logic/A11")) (pad 25 thru_hole oval (at 0 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 137 "/Glue and control logic/R/~W")) (pad 24 thru_hole oval (at 2.54 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 83 "/Glue and control logic/A10")) (pad 23 thru_hole oval (at 0 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 136 "/Glue and control logic/CLK")) (pad 22 thru_hole oval (at 2.54 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 87 "/Glue and control logic/A9")) (pad 21 thru_hole oval (at 0 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 67 "/Glue and control logic/~NMI")) (pad 20 thru_hole oval (at 2.54 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 82 "/Glue and control logic/A8")) (pad 19 thru_hole oval (at 0 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) (pad 18 thru_hole oval (at 2.54 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 86 "/MPU, ROM and RAM/A7")) (pad 17 thru_hole oval (at 0 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 135 "/DUART and line drivers/D7")) (pad 16 thru_hole oval (at 2.54 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 81 "/MPU, ROM and RAM/A6")) (pad 15 thru_hole oval (at 0 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 134 "/DUART and line drivers/D6")) (pad 14 thru_hole oval (at 2.54 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 79 "/MPU, ROM and RAM/A5")) (pad 13 thru_hole oval (at 0 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 133 "/DUART and line drivers/D5")) (pad 12 thru_hole oval (at 2.54 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 80 "/MPU, ROM and RAM/A4")) (pad 11 thru_hole oval (at 0 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 132 "/DUART and line drivers/D4")) (pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 131 "/DUART and line drivers/A3")) (pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 130 "/DUART and line drivers/D3")) (pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 129 "/DUART and line drivers/A2")) (pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 128 "/DUART and line drivers/D2")) (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 127 "/DUART and line drivers/A1")) (pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 126 "/DUART and line drivers/D1")) (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 125 "/DUART and line drivers/A0")) (pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 124 "/DUART and line drivers/D0")) (pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 VCC)) (pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 VCC)) (model ${KISYS3DMOD}/Connectors_IDC.3dshapes/IDC-Header_2x20_Pitch2.54mm_Straight.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Pin_Headers:Pin_Header_Straight_1x03_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5CFD4327) (at 190.195001 119.507001) (descr "Through hole straight pin header, 1x03, 2.54mm pitch, single row") (tags "Through hole pin header THT 1x03 2.54mm single row") (path /5A3B356D/5AA76556) (fp_text reference J8 (at 0 -2.33) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value "Stop System" (at 0 7.41) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 0 2.54 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.8 6.85) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.8 6.85) (end 1.8 6.85) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.8 -1.8) (end -1.8 6.85) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12)) (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12)) (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12)) (fp_line (start 1.33 1.27) (end 1.33 6.41) (layer F.SilkS) (width 0.12)) (fp_line (start -1.33 1.27) (end -1.33 6.41) (layer F.SilkS) (width 0.12)) (fp_line (start -1.33 6.41) (end 1.33 6.41) (layer F.SilkS) (width 0.12)) (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1)) (fp_line (start -1.27 6.35) (end -1.27 -0.635) (layer F.Fab) (width 0.1)) (fp_line (start 1.27 6.35) (end -1.27 6.35) (layer F.Fab) (width 0.1)) (fp_line (start 1.27 -1.27) (end 1.27 6.35) (layer F.Fab) (width 0.1)) (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1)) (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 4 GND)) (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 65 "/Glue and control logic/RDY")) (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 66 "/Glue and control logic/STP")) (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x03_Pitch2.54mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module TO_SOT_Packages_THT:TO-92_Inline_Narrow_Oval (layer F.Cu) (tedit 58CE52AF) (tstamp 5CFD4339) (at 106.68 71.628 270) (descr "TO-92 leads in-line, narrow, oval pads, drill 0.6mm (see NXP sot054_po.pdf)") (tags "to-92 sc-43 sc-43a sot54 PA33 transistor") (path /5A3B356D/5B5CB0CA) (fp_text reference Q1 (at -2.54 0 180) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value DS1813 (at 1.27 2.79 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_arc (start 1.27 0) (end 1.27 -2.6) (angle 135) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.27 0) (end 1.27 -2.48) (angle -135) (layer F.Fab) (width 0.1)) (fp_arc (start 1.27 0) (end 1.27 -2.6) (angle -135) (layer F.SilkS) (width 0.12)) (fp_arc (start 1.27 0) (end 1.27 -2.48) (angle 135) (layer F.Fab) (width 0.1)) (fp_line (start 4 2.01) (end -1.46 2.01) (layer F.CrtYd) (width 0.05)) (fp_line (start 4 2.01) (end 4 -2.73) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.46 -2.73) (end -1.46 2.01) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.46 -2.73) (end 4 -2.73) (layer F.CrtYd) (width 0.05)) (fp_line (start -0.5 1.75) (end 3 1.75) (layer F.Fab) (width 0.1)) (fp_line (start -0.53 1.85) (end 3.07 1.85) (layer F.SilkS) (width 0.12)) (fp_text user %R (at 1.27 -3.56 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole rect (at 0 0 90) (size 0.9 1.5) (drill 0.6) (layers *.Cu *.Mask) (net 67 "/Glue and control logic/~NMI")) (pad 3 thru_hole oval (at 2.54 0 90) (size 0.9 1.5) (drill 0.6) (layers *.Cu *.Mask) (net 4 GND)) (pad 2 thru_hole oval (at 1.27 0 90) (size 0.9 1.5) (drill 0.6) (layers *.Cu *.Mask) (net 1 VCC)) (model ${KISYS3DMOD}/TO_SOT_Packages_THT.3dshapes/TO-92_Inline_Narrow_Oval.wrl (offset (xyz 1.269999980926514 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 -90)) ) ) (module Resistors_ThroughHole:R_Axial_DIN0207_L6.3mm_D2.5mm_P2.54mm_Vertical (layer F.Cu) (tedit 5874F706) (tstamp 5CFD4347) (at 105.156 63.5 90) (descr "Resistor, Axial_DIN0207 series, Axial, Vertical, pin pitch=2.54mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") (tags "Resistor Axial_DIN0207 series Axial Vertical pin pitch 2.54mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") (path /5A3B356D/5A3B6D93) (fp_text reference R1 (at 1.016 2.54 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 22k (at 1.27 2.31 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 3.65 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.65 1.6) (end 3.65 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.6 1.6) (end 3.65 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.6 -1.6) (end -1.6 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.31 0) (end 1.44 0) (layer F.SilkS) (width 0.12)) (fp_line (start 0 0) (end 2.54 0) (layer F.Fab) (width 0.1)) (fp_circle (center 0 0) (end 1.31 0) (layer F.SilkS) (width 0.12)) (fp_circle (center 0 0) (end 1.25 0) (layer F.Fab) (width 0.1)) (pad 2 thru_hole oval (at 2.54 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 68 "Net-(R1-Pad2)")) (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (model ${KISYS3DMOD}/Resistors_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P2.54mm_Vertical.wrl (at (xyz 0 0 0)) (scale (xyz 0.393701 0.393701 0.393701)) (rotate (xyz 0 0 0)) ) ) (module Resistors_ThroughHole:R_Axial_DIN0207_L6.3mm_D2.5mm_P2.54mm_Vertical (layer F.Cu) (tedit 5874F706) (tstamp 5CFD4355) (at 101.6 73.152 270) (descr "Resistor, Axial_DIN0207 series, Axial, Vertical, pin pitch=2.54mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") (tags "Resistor Axial_DIN0207 series Axial Vertical pin pitch 2.54mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") (path /5A3B356D/5A3B6C94) (fp_text reference R2 (at 1.27 -2.31 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 475 (at 1.27 2.31 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_circle (center 0 0) (end 1.25 0) (layer F.Fab) (width 0.1)) (fp_circle (center 0 0) (end 1.31 0) (layer F.SilkS) (width 0.12)) (fp_line (start 0 0) (end 2.54 0) (layer F.Fab) (width 0.1)) (fp_line (start 1.31 0) (end 1.44 0) (layer F.SilkS) (width 0.12)) (fp_line (start -1.6 -1.6) (end -1.6 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.6 1.6) (end 3.65 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.65 1.6) (end 3.65 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.65 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05)) (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 69 "Net-(R2-Pad1)")) (pad 2 thru_hole oval (at 2.54 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 9 "Net-(C14-Pad1)")) (model ${KISYS3DMOD}/Resistors_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P2.54mm_Vertical.wrl (at (xyz 0 0 0)) (scale (xyz 0.393701 0.393701 0.393701)) (rotate (xyz 0 0 0)) ) ) (module Resistors_ThroughHole:R_Axial_DIN0207_L6.3mm_D2.5mm_P2.54mm_Vertical (layer F.Cu) (tedit 5874F706) (tstamp 5CFD4363) (at 205.295001 131.707001) (descr "Resistor, Axial_DIN0207 series, Axial, Vertical, pin pitch=2.54mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") (tags "Resistor Axial_DIN0207 series Axial Vertical pin pitch 2.54mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") (path /5A3B356D/5A3B6A86) (fp_text reference R3 (at 1.27 -2.31) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 3.3k (at 1.27 2.31) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 3.65 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.65 1.6) (end 3.65 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.6 1.6) (end 3.65 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.6 -1.6) (end -1.6 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.31 0) (end 1.44 0) (layer F.SilkS) (width 0.12)) (fp_line (start 0 0) (end 2.54 0) (layer F.Fab) (width 0.1)) (fp_circle (center 0 0) (end 1.31 0) (layer F.SilkS) (width 0.12)) (fp_circle (center 0 0) (end 1.25 0) (layer F.Fab) (width 0.1)) (pad 2 thru_hole oval (at 2.54 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 70 "/DUART and line drivers/RES")) (model ${KISYS3DMOD}/Resistors_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P2.54mm_Vertical.wrl (at (xyz 0 0 0)) (scale (xyz 0.393701 0.393701 0.393701)) (rotate (xyz 0 0 0)) ) ) (module Resistors_ThroughHole:R_Axial_DIN0207_L6.3mm_D2.5mm_P2.54mm_Vertical (layer F.Cu) (tedit 5874F706) (tstamp 5CFD4371) (at 205.295001 127.457001) (descr "Resistor, Axial_DIN0207 series, Axial, Vertical, pin pitch=2.54mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") (tags "Resistor Axial_DIN0207 series Axial Vertical pin pitch 2.54mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") (path /5A3B356D/5A43CA45) (fp_text reference R4 (at 1.27 -2.31) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 470 (at 1.27 2.31) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 3.65 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.65 1.6) (end 3.65 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.6 1.6) (end 3.65 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.6 -1.6) (end -1.6 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.31 0) (end 1.44 0) (layer F.SilkS) (width 0.12)) (fp_line (start 0 0) (end 2.54 0) (layer F.Fab) (width 0.1)) (fp_circle (center 0 0) (end 1.31 0) (layer F.SilkS) (width 0.12)) (fp_circle (center 0 0) (end 1.25 0) (layer F.Fab) (width 0.1)) (pad 2 thru_hole oval (at 2.54 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 13 "Net-(D1-Pad2)")) (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (model ${KISYS3DMOD}/Resistors_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P2.54mm_Vertical.wrl (at (xyz 0 0 0)) (scale (xyz 0.393701 0.393701 0.393701)) (rotate (xyz 0 0 0)) ) ) (module Resistors_ThroughHole:R_Axial_DIN0207_L6.3mm_D2.5mm_P2.54mm_Vertical (layer F.Cu) (tedit 5874F706) (tstamp 5CFD437F) (at 70.612 74.168) (descr "Resistor, Axial_DIN0207 series, Axial, Vertical, pin pitch=2.54mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") (tags "Resistor Axial_DIN0207 series Axial Vertical pin pitch 2.54mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") (path /5952FC81/5A984B90) (fp_text reference R5 (at 1.27 -2.31) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 470 (at 1.27 2.31) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_circle (center 0 0) (end 1.25 0) (layer F.Fab) (width 0.1)) (fp_circle (center 0 0) (end 1.31 0) (layer F.SilkS) (width 0.12)) (fp_line (start 0 0) (end 2.54 0) (layer F.Fab) (width 0.1)) (fp_line (start 1.31 0) (end 1.44 0) (layer F.SilkS) (width 0.12)) (fp_line (start -1.6 -1.6) (end -1.6 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.6 1.6) (end 3.65 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.65 1.6) (end 3.65 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.65 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05)) (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 2 thru_hole oval (at 2.54 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 71 "Net-(R5-Pad2)")) (model ${KISYS3DMOD}/Resistors_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P2.54mm_Vertical.wrl (at (xyz 0 0 0)) (scale (xyz 0.393701 0.393701 0.393701)) (rotate (xyz 0 0 0)) ) ) (module Resistors_ThroughHole:R_Axial_DIN0207_L6.3mm_D2.5mm_P2.54mm_Vertical (layer F.Cu) (tedit 5874F706) (tstamp 5CFD438D) (at 53.848 155.956 180) (descr "Resistor, Axial_DIN0207 series, Axial, Vertical, pin pitch=2.54mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") (tags "Resistor Axial_DIN0207 series Axial Vertical pin pitch 2.54mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") (path /5A3B21BC/5AA72016) (fp_text reference R6 (at 1.27 -2.31) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 3.3k (at 1.27 2.31) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_circle (center 0 0) (end 1.25 0) (layer F.Fab) (width 0.1)) (fp_circle (center 0 0) (end 1.31 0) (layer F.SilkS) (width 0.12)) (fp_line (start 0 0) (end 2.54 0) (layer F.Fab) (width 0.1)) (fp_line (start 1.31 0) (end 1.44 0) (layer F.SilkS) (width 0.12)) (fp_line (start -1.6 -1.6) (end -1.6 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.6 1.6) (end 3.65 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.65 1.6) (end 3.65 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.65 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05)) (pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 2 thru_hole oval (at 2.54 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 41 "/VIA and IDE/~IDE:DMACK")) (model ${KISYS3DMOD}/Resistors_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P2.54mm_Vertical.wrl (at (xyz 0 0 0)) (scale (xyz 0.393701 0.393701 0.393701)) (rotate (xyz 0 0 0)) ) ) (module Resistors_ThroughHole:R_Axial_DIN0207_L6.3mm_D2.5mm_P2.54mm_Vertical (layer F.Cu) (tedit 5874F706) (tstamp 5CFD439B) (at 47.244 155.448 270) (descr "Resistor, Axial_DIN0207 series, Axial, Vertical, pin pitch=2.54mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") (tags "Resistor Axial_DIN0207 series Axial Vertical pin pitch 2.54mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") (path /5A3B21BC/5AA72069) (fp_text reference R7 (at 1.27 -2.31 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 470 (at 1.27 2.31 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 3.65 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.65 1.6) (end 3.65 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.6 1.6) (end 3.65 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.6 -1.6) (end -1.6 1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.31 0) (end 1.44 0) (layer F.SilkS) (width 0.12)) (fp_line (start 0 0) (end 2.54 0) (layer F.Fab) (width 0.1)) (fp_circle (center 0 0) (end 1.31 0) (layer F.SilkS) (width 0.12)) (fp_circle (center 0 0) (end 1.25 0) (layer F.Fab) (width 0.1)) (pad 2 thru_hole oval (at 2.54 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 16 "Net-(D4-Pad2)")) (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (model ${KISYS3DMOD}/Resistors_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P2.54mm_Vertical.wrl (at (xyz 0 0 0)) (scale (xyz 0.393701 0.393701 0.393701)) (rotate (xyz 0 0 0)) ) ) (module Resistors_THT:R_Array_SIP9 (layer F.Cu) (tedit 57FA3974) (tstamp 5CFD43B6) (at 162.56 128.016) (descr "9-pin Resistor SIP pack") (tags R) (path /5A3B356D/5A416FA2) (fp_text reference RN1 (at 11.43 -2.4) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 3.3k (at 11.43 2.4) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 22.05 -1.65) (end -1.7 -1.65) (layer F.CrtYd) (width 0.05)) (fp_line (start 22.05 1.65) (end 22.05 -1.65) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.7 1.65) (end 22.05 1.65) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.7 -1.65) (end -1.7 1.65) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.27 -1.4) (end 1.27 1.4) (layer F.SilkS) (width 0.12)) (fp_line (start 21.76 -1.4) (end -1.44 -1.4) (layer F.SilkS) (width 0.12)) (fp_line (start 21.76 1.4) (end 21.76 -1.4) (layer F.SilkS) (width 0.12)) (fp_line (start -1.44 1.4) (end 21.76 1.4) (layer F.SilkS) (width 0.12)) (fp_line (start -1.44 -1.4) (end -1.44 1.4) (layer F.SilkS) (width 0.12)) (fp_line (start 1.27 -1.25) (end 1.27 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 21.61 -1.25) (end -1.29 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 21.61 1.25) (end 21.61 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start -1.29 1.25) (end 21.61 1.25) (layer F.Fab) (width 0.1)) (fp_line (start -1.29 -1.25) (end -1.29 1.25) (layer F.Fab) (width 0.1)) (pad 9 thru_hole oval (at 20.32 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 72 "/Glue and control logic/~KS")) (pad 8 thru_hole oval (at 17.78 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 123 "/DUART and line drivers/~IRQ")) (pad 7 thru_hole oval (at 15.24 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 67 "/Glue and control logic/~NMI")) (pad 6 thru_hole oval (at 12.7 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 73 "/Glue and control logic/BE")) (pad 5 thru_hole oval (at 10.16 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 65 "/Glue and control logic/RDY")) (pad 4 thru_hole oval (at 7.62 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 74 "/Glue and control logic/~ABT")) (pad 3 thru_hole oval (at 5.08 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 75 "/Glue and control logic/~PWR")) (pad 2 thru_hole oval (at 2.54 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 76 "/Glue and control logic/~RES")) (pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (model ${KISYS3DMOD}/Resistors_THT.3dshapes/R_Array_SIP9.wrl (at (xyz 0 0 0)) (scale (xyz 0.39 0.39 0.39)) (rotate (xyz 0 0 0)) ) ) (module Resistors_THT:R_Array_SIP5 (layer F.Cu) (tedit 57FA3974) (tstamp 5CFD43CD) (at 262.636 102.616) (descr "5-pin Resistor SIP pack") (tags R) (path /5A3B356D/5C9EDD0C) (fp_text reference RN2 (at 6.35 -2.4) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 3.3k (at 6.35 2.4) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 11.9 -1.65) (end -1.7 -1.65) (layer F.CrtYd) (width 0.05)) (fp_line (start 11.9 1.65) (end 11.9 -1.65) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.7 1.65) (end 11.9 1.65) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.7 -1.65) (end -1.7 1.65) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.27 -1.4) (end 1.27 1.4) (layer F.SilkS) (width 0.12)) (fp_line (start 11.6 -1.4) (end -1.44 -1.4) (layer F.SilkS) (width 0.12)) (fp_line (start 11.6 1.4) (end 11.6 -1.4) (layer F.SilkS) (width 0.12)) (fp_line (start -1.44 1.4) (end 11.6 1.4) (layer F.SilkS) (width 0.12)) (fp_line (start -1.44 -1.4) (end -1.44 1.4) (layer F.SilkS) (width 0.12)) (fp_line (start 1.27 -1.25) (end 1.27 1.25) (layer F.Fab) (width 0.1)) (fp_line (start 11.45 -1.25) (end -1.29 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start 11.45 1.25) (end 11.45 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start -1.29 1.25) (end 11.45 1.25) (layer F.Fab) (width 0.1)) (fp_line (start -1.29 -1.25) (end -1.29 1.25) (layer F.Fab) (width 0.1)) (pad 5 thru_hole oval (at 10.16 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 64 "/Glue and control logic/TCK")) (pad 4 thru_hole oval (at 7.62 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 63 "/Glue and control logic/TMS")) (pad 3 thru_hole oval (at 5.08 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 62 "/Glue and control logic/TDI")) (pad 2 thru_hole oval (at 2.54 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 61 "/Glue and control logic/TDO")) (pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (model ${KISYS3DMOD}/Resistors_THT.3dshapes/R_Array_SIP5.wrl (at (xyz 0 0 0)) (scale (xyz 0.39 0.39 0.39)) (rotate (xyz 0 0 0)) ) ) (module Switches_THT:SW-SPDT-0900766b81587629 (layer F.Cu) (tedit 5A32C8F2) (tstamp 5CFD43DD) (at 130.048 65.532) (path /5A3B356D/5A43C20E) (fp_text reference S1 (at 0 5.969) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value SPDT (at 0 -12.192) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -1.27 -6.858) (end -1.27 -11.049) (layer F.SilkS) (width 0.15)) (fp_line (start -1.27 -11.049) (end 1.27 -11.049) (layer F.SilkS) (width 0.15)) (fp_line (start 1.27 -11.049) (end 1.27 -6.858) (layer F.SilkS) (width 0.15)) (fp_line (start -4.064 -6.858) (end 4.064 -6.858) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 -6.858) (end 4.064 4.572) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 4.572) (end -4.064 4.572) (layer F.SilkS) (width 0.15)) (fp_line (start -4.064 4.572) (end -4.064 -6.858) (layer F.SilkS) (width 0.15)) (pad "" thru_hole circle (at 2.54 -2.54) (size 1.778 1.778) (drill 1.0922) (layers *.Cu *.Mask)) (pad "" thru_hole circle (at -2.54 -2.54) (size 1.778 1.778) (drill 1.0922) (layers *.Cu *.Mask)) (pad 3 thru_hole circle (at 2.54 3.048) (size 1.778 1.778) (drill 1.0922) (layers *.Cu *.Mask)) (pad 2 thru_hole circle (at 0 3.048) (size 1.778 1.778) (drill 1.0922) (layers *.Cu *.Mask) (net 1 VCC)) (pad 1 thru_hole circle (at -2.54 3.048) (size 1.778 1.778) (drill 1.0922) (layers *.Cu *.Mask) (net 12 "Net-(C19-Pad1)")) ) (module Buttons_Switches_ThroughHole:SW_PUSH_6mm_h4.3mm (layer F.Cu) (tedit 5923F252) (tstamp 5CFD43FC) (at 117.856 66.04 180) (descr "tactile push button, 6x6mm e.g. PHAP33xx series, height=4.3mm") (tags "tact sw push 6mm") (path /5A3B356D/5A3B9114) (fp_text reference SW1 (at 8.636 0.508 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value RESET (at 3.75 6.7) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 3.25 2.25) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 3.25 -0.75) (end 6.25 -0.75) (layer F.Fab) (width 0.1)) (fp_line (start 6.25 -0.75) (end 6.25 5.25) (layer F.Fab) (width 0.1)) (fp_line (start 6.25 5.25) (end 0.25 5.25) (layer F.Fab) (width 0.1)) (fp_line (start 0.25 5.25) (end 0.25 -0.75) (layer F.Fab) (width 0.1)) (fp_line (start 0.25 -0.75) (end 3.25 -0.75) (layer F.Fab) (width 0.1)) (fp_line (start 7.75 6) (end 8 6) (layer F.CrtYd) (width 0.05)) (fp_line (start 8 6) (end 8 5.75) (layer F.CrtYd) (width 0.05)) (fp_line (start 7.75 -1.5) (end 8 -1.5) (layer F.CrtYd) (width 0.05)) (fp_line (start 8 -1.5) (end 8 -1.25) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.5 -1.25) (end -1.5 -1.5) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.5 -1.5) (end -1.25 -1.5) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.5 5.75) (end -1.5 6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.5 6) (end -1.25 6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.25 -1.5) (end 7.75 -1.5) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.5 5.75) (end -1.5 -1.25) (layer F.CrtYd) (width 0.05)) (fp_line (start 7.75 6) (end -1.25 6) (layer F.CrtYd) (width 0.05)) (fp_line (start 8 -1.25) (end 8 5.75) (layer F.CrtYd) (width 0.05)) (fp_line (start 1 5.5) (end 5.5 5.5) (layer F.SilkS) (width 0.12)) (fp_line (start -0.25 1.5) (end -0.25 3) (layer F.SilkS) (width 0.12)) (fp_line (start 5.5 -1) (end 1 -1) (layer F.SilkS) (width 0.12)) (fp_line (start 6.75 3) (end 6.75 1.5) (layer F.SilkS) (width 0.12)) (fp_circle (center 3.25 2.25) (end 1.25 2.5) (layer F.Fab) (width 0.1)) (pad 2 thru_hole circle (at 0 4.5 270) (size 2 2) (drill 1.1) (layers *.Cu *.Mask) (net 68 "Net-(R1-Pad2)")) (pad 1 thru_hole circle (at 0 0 270) (size 2 2) (drill 1.1) (layers *.Cu *.Mask) (net 4 GND)) (pad 2 thru_hole circle (at 6.5 4.5 270) (size 2 2) (drill 1.1) (layers *.Cu *.Mask) (net 68 "Net-(R1-Pad2)")) (pad 1 thru_hole circle (at 6.5 0 270) (size 2 2) (drill 1.1) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Buttons_Switches_THT.3dshapes/SW_PUSH_6mm_h4.3mm.wrl (offset (xyz 0.1269999980926514 0 0)) (scale (xyz 0.3937 0.3937 0.3937)) (rotate (xyz 0 0 0)) ) ) (module Buttons_Switches_ThroughHole:SW_PUSH_6mm_h4.3mm (layer F.Cu) (tedit 5923F252) (tstamp 5CFD441B) (at 111.252 71.628) (descr "tactile push button, 6x6mm e.g. PHAP33xx series, height=4.3mm") (tags "tact sw push 6mm") (path /5A3B356D/5B5CB858) (fp_text reference SW2 (at 3.25 -2) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value PANIC (at 3.75 6.7) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_circle (center 3.25 2.25) (end 1.25 2.5) (layer F.Fab) (width 0.1)) (fp_line (start 6.75 3) (end 6.75 1.5) (layer F.SilkS) (width 0.12)) (fp_line (start 5.5 -1) (end 1 -1) (layer F.SilkS) (width 0.12)) (fp_line (start -0.25 1.5) (end -0.25 3) (layer F.SilkS) (width 0.12)) (fp_line (start 1 5.5) (end 5.5 5.5) (layer F.SilkS) (width 0.12)) (fp_line (start 8 -1.25) (end 8 5.75) (layer F.CrtYd) (width 0.05)) (fp_line (start 7.75 6) (end -1.25 6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.5 5.75) (end -1.5 -1.25) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.25 -1.5) (end 7.75 -1.5) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.5 6) (end -1.25 6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.5 5.75) (end -1.5 6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.5 -1.5) (end -1.25 -1.5) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.5 -1.25) (end -1.5 -1.5) (layer F.CrtYd) (width 0.05)) (fp_line (start 8 -1.5) (end 8 -1.25) (layer F.CrtYd) (width 0.05)) (fp_line (start 7.75 -1.5) (end 8 -1.5) (layer F.CrtYd) (width 0.05)) (fp_line (start 8 6) (end 8 5.75) (layer F.CrtYd) (width 0.05)) (fp_line (start 7.75 6) (end 8 6) (layer F.CrtYd) (width 0.05)) (fp_line (start 0.25 -0.75) (end 3.25 -0.75) (layer F.Fab) (width 0.1)) (fp_line (start 0.25 5.25) (end 0.25 -0.75) (layer F.Fab) (width 0.1)) (fp_line (start 6.25 5.25) (end 0.25 5.25) (layer F.Fab) (width 0.1)) (fp_line (start 6.25 -0.75) (end 6.25 5.25) (layer F.Fab) (width 0.1)) (fp_line (start 3.25 -0.75) (end 6.25 -0.75) (layer F.Fab) (width 0.1)) (fp_text user %R (at 3.25 2.25) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole circle (at 6.5 0 90) (size 2 2) (drill 1.1) (layers *.Cu *.Mask) (net 67 "/Glue and control logic/~NMI")) (pad 2 thru_hole circle (at 6.5 4.5 90) (size 2 2) (drill 1.1) (layers *.Cu *.Mask) (net 4 GND)) (pad 1 thru_hole circle (at 0 0 90) (size 2 2) (drill 1.1) (layers *.Cu *.Mask) (net 67 "/Glue and control logic/~NMI")) (pad 2 thru_hole circle (at 0 4.5 90) (size 2 2) (drill 1.1) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Buttons_Switches_THT.3dshapes/SW_PUSH_6mm_h4.3mm.wrl (offset (xyz 0.1269999980926514 0 0)) (scale (xyz 0.3937 0.3937 0.3937)) (rotate (xyz 0 0 0)) ) ) (module saturn:PLCC-44_THT-Socket (layer F.Cu) (tedit 5A9EFF1A) (tstamp 5CFD4461) (at 222.145001 28.277001) (descr "PLCC, 44 pins, through hole") (tags "plcc leaded") (path /5952FC78/5A3AB10B) (fp_text reference U1 (at -1.27 -6.4) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value WD65C816S_PLCC44 (at -1.27 19.1) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -12.02 -5.4) (end -13.02 -4.4) (layer F.Fab) (width 0.1)) (fp_line (start -13.02 -4.4) (end -13.02 18.1) (layer F.Fab) (width 0.1)) (fp_line (start -13.02 18.1) (end 10.48 18.1) (layer F.Fab) (width 0.1)) (fp_line (start 10.48 18.1) (end 10.48 -5.4) (layer F.Fab) (width 0.1)) (fp_line (start 10.48 -5.4) (end -12.02 -5.4) (layer F.Fab) (width 0.1)) (fp_line (start -13.52 -5.9) (end -13.52 18.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -13.52 18.6) (end 10.98 18.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 10.98 18.6) (end 10.98 -5.9) (layer F.CrtYd) (width 0.05)) (fp_line (start 10.98 -5.9) (end -13.52 -5.9) (layer F.CrtYd) (width 0.05)) (fp_line (start -10.48 -2.86) (end -10.48 15.56) (layer F.Fab) (width 0.1)) (fp_line (start -10.48 15.56) (end 7.94 15.56) (layer F.Fab) (width 0.1)) (fp_line (start 7.94 15.56) (end 7.94 -2.86) (layer F.Fab) (width 0.1)) (fp_line (start 7.94 -2.86) (end -10.48 -2.86) (layer F.Fab) (width 0.1)) (fp_line (start -1.77 -5.4) (end -1.27 -4.4) (layer F.Fab) (width 0.1)) (fp_line (start -1.27 -4.4) (end -0.77 -5.4) (layer F.Fab) (width 0.1)) (fp_line (start -2.27 -5.5) (end -12.12 -5.5) (layer F.SilkS) (width 0.12)) (fp_line (start -12.12 -5.5) (end -13.12 -4.5) (layer F.SilkS) (width 0.12)) (fp_line (start -13.12 -4.5) (end -13.12 18.2) (layer F.SilkS) (width 0.12)) (fp_line (start -13.12 18.2) (end 10.58 18.2) (layer F.SilkS) (width 0.12)) (fp_line (start 10.58 18.2) (end 10.58 -5.5) (layer F.SilkS) (width 0.12)) (fp_line (start 10.58 -5.5) (end -0.27 -5.5) (layer F.SilkS) (width 0.12)) (fp_text user %R (at -1.27 6.35) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole rect (at 0 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 4 GND)) (pad 3 thru_hole circle (at -2.54 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 65 "/Glue and control logic/RDY")) (pad 5 thru_hole circle (at -5.08 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 123 "/DUART and line drivers/~IRQ")) (pad 43 thru_hole circle (at 2.54 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 77 "/Glue and control logic/VDA")) (pad 41 thru_hole circle (at 5.08 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 136 "/Glue and control logic/CLK")) (pad 39 thru_hole circle (at 7.62 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 2 thru_hole circle (at -2.54 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 4 thru_hole circle (at -5.08 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 74 "/Glue and control logic/~ABT")) (pad 6 thru_hole circle (at -7.62 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 44 thru_hole circle (at 0 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 76 "/Glue and control logic/~RES")) (pad 42 thru_hole circle (at 2.54 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 40 thru_hole circle (at 5.08 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 73 "/Glue and control logic/BE")) (pad 8 thru_hole circle (at -7.62 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 78 "/Glue and control logic/VPA")) (pad 10 thru_hole circle (at -7.62 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 125 "/DUART and line drivers/A0")) (pad 12 thru_hole circle (at -7.62 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 14 thru_hole circle (at -7.62 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 131 "/DUART and line drivers/A3")) (pad 16 thru_hole circle (at -7.62 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 79 "/MPU, ROM and RAM/A5")) (pad 7 thru_hole circle (at -10.16 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 67 "/Glue and control logic/~NMI")) (pad 9 thru_hole circle (at -10.16 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 1 VCC)) (pad 11 thru_hole circle (at -10.16 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 127 "/DUART and line drivers/A1")) (pad 13 thru_hole circle (at -10.16 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 129 "/DUART and line drivers/A2")) (pad 15 thru_hole circle (at -10.16 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 80 "/MPU, ROM and RAM/A4")) (pad 17 thru_hole circle (at -10.16 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 81 "/MPU, ROM and RAM/A6")) (pad 19 thru_hole circle (at -7.62 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 82 "/Glue and control logic/A8")) (pad 21 thru_hole circle (at -5.08 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 83 "/Glue and control logic/A10")) (pad 23 thru_hole circle (at -2.54 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 4 GND)) (pad 25 thru_hole circle (at 0 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 84 "/Glue and control logic/A12")) (pad 27 thru_hole circle (at 2.54 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 85 "/Glue and control logic/A14")) (pad 30 thru_hole circle (at 5.08 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 134 "/DUART and line drivers/D6")) (pad 18 thru_hole circle (at -7.62 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 86 "/MPU, ROM and RAM/A7")) (pad 20 thru_hole circle (at -5.08 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 87 "/Glue and control logic/A9")) (pad 22 thru_hole circle (at -2.54 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 88 "/Glue and control logic/A11")) (pad 24 thru_hole circle (at 0 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 4 GND)) (pad 26 thru_hole circle (at 2.54 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 89 "/Glue and control logic/A13")) (pad 28 thru_hole circle (at 5.08 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 90 "/Glue and control logic/A15")) (pad 32 thru_hole circle (at 5.08 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 132 "/DUART and line drivers/D4")) (pad 34 thru_hole circle (at 5.08 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 128 "/DUART and line drivers/D2")) (pad 36 thru_hole circle (at 5.08 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 124 "/DUART and line drivers/D0")) (pad 38 thru_hole circle (at 5.08 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 137 "/Glue and control logic/R/~W")) (pad 29 thru_hole circle (at 7.62 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 135 "/DUART and line drivers/D7")) (pad 31 thru_hole circle (at 7.62 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 133 "/DUART and line drivers/D5")) (pad 33 thru_hole circle (at 7.62 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 130 "/DUART and line drivers/D3")) (pad 35 thru_hole circle (at 7.62 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 126 "/DUART and line drivers/D1")) (pad 37 thru_hole circle (at 7.62 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 1 VCC)) (model ${KISYS3DMOD}/Housings_LCC.3dshapes/PLCC-44_THT-Socket.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module saturn:SOJ-36 (layer F.Cu) (tedit 5C97B9FF) (tstamp 5CFD449A) (at 198.589 35.252001) (descr "28-Lead Plastic Small Outline (SO) - Wide, 7.50 mm X 18.7 mm Body [SOIC] (https://www.akm.com/akm/en/file/datasheet/AK5394AVS.pdf)") (tags "SOIC 1.27") (path /5952FC78/5965591C) (attr smd) (fp_text reference U2 (at -0.127 -14.605) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value AS7C34096A (at 0.127 12.446) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -3.559 -12.05) (end -5.384 -12.05) (layer F.SilkS) (width 0.15)) (fp_line (start -3.683 11.303) (end 4.067 11.303) (layer F.SilkS) (width 0.15)) (fp_line (start -3.559 -12.7) (end 4.191 -12.7) (layer F.SilkS) (width 0.15)) (fp_line (start -3.683 11.286) (end -3.683 10.541) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 11.286) (end 4.064 10.541) (layer F.SilkS) (width 0.15)) (fp_line (start 4.191 -12.7) (end 4.191 -11.955) (layer F.SilkS) (width 0.15)) (fp_line (start -3.559 -12.7) (end -3.559 -12.05) (layer F.SilkS) (width 0.15)) (fp_line (start -5.715 11.684) (end 6.223 11.684) (layer F.CrtYd) (width 0.05)) (fp_line (start -5.696 -12.875) (end 6.204 -12.875) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.204 -12.875) (end 6.223 11.684) (layer F.CrtYd) (width 0.05)) (fp_line (start -5.696 -12.875) (end -5.715 11.684) (layer F.CrtYd) (width 0.05)) (fp_line (start -3.496 -11.525) (end -2.496 -12.525) (layer F.Fab) (width 0.15)) (fp_line (start -3.556 10.922) (end -3.496 -11.525) (layer F.Fab) (width 0.15)) (fp_line (start 3.944 10.922) (end -3.556 10.922) (layer F.Fab) (width 0.15)) (fp_line (start 4.004 -12.525) (end 3.937 10.922) (layer F.Fab) (width 0.15)) (fp_line (start -2.496 -12.525) (end 4.004 -12.525) (layer F.Fab) (width 0.15)) (fp_text user %R (at 0.127 0.127) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 36 smd rect (at 6.477 -11.43) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask)) (pad 35 smd rect (at 6.477 -10.16) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 96 "/Glue and control logic/A18")) (pad 34 smd rect (at 6.477 -8.89) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 95 "/Glue and control logic/A17")) (pad 33 smd rect (at 6.477 -7.62) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 94 "/Glue and control logic/A16")) (pad 32 smd rect (at 6.477 -6.35) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 90 "/Glue and control logic/A15")) (pad 31 smd rect (at 6.477 -5.08) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 93 "/DUART and line drivers/~MRD")) (pad 30 smd rect (at 6.477 -3.81) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 135 "/DUART and line drivers/D7")) (pad 29 smd rect (at 6.477 -2.54) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 134 "/DUART and line drivers/D6")) (pad 28 smd rect (at 6.477 -1.27) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 4 GND)) (pad 27 smd rect (at 6.477 0) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 1 VCC)) (pad 26 smd rect (at 6.477 1.27) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 133 "/DUART and line drivers/D5")) (pad 25 smd rect (at 6.477 2.54) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 132 "/DUART and line drivers/D4")) (pad 24 smd rect (at 6.477 3.81) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 85 "/Glue and control logic/A14")) (pad 23 smd rect (at 6.477 5.08) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 89 "/Glue and control logic/A13")) (pad 22 smd rect (at 6.477 6.35) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 84 "/Glue and control logic/A12")) (pad 21 smd rect (at 6.477 7.62) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 88 "/Glue and control logic/A11")) (pad 20 smd rect (at 6.477 8.89) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 83 "/Glue and control logic/A10")) (pad 19 smd rect (at 6.477 10.16) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask)) (pad 18 smd rect (at -5.969 10.16) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 87 "/Glue and control logic/A9")) (pad 17 smd rect (at -5.969 8.89) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 82 "/Glue and control logic/A8")) (pad 16 smd rect (at -5.969 7.62) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 86 "/MPU, ROM and RAM/A7")) (pad 15 smd rect (at -5.969 6.35) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 81 "/MPU, ROM and RAM/A6")) (pad 14 smd rect (at -5.969 5.08) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 79 "/MPU, ROM and RAM/A5")) (pad 13 smd rect (at -5.969 3.81) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 92 "/DUART and line drivers/~MWR")) (pad 12 smd rect (at -5.969 2.54) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 130 "/DUART and line drivers/D3")) (pad 11 smd rect (at -5.969 1.27) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 128 "/DUART and line drivers/D2")) (pad 10 smd rect (at -5.969 0) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 4 GND)) (pad 9 smd rect (at -5.969 -1.27) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 1 VCC)) (pad 8 smd rect (at -5.969 -2.54) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 126 "/DUART and line drivers/D1")) (pad 7 smd rect (at -5.969 -3.81) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 124 "/DUART and line drivers/D0")) (pad 6 smd rect (at -5.969 -5.08) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 91 "/Glue and control logic/~RAM0")) (pad 5 smd rect (at -5.969 -6.223) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 80 "/MPU, ROM and RAM/A4")) (pad 4 smd rect (at -5.969 -7.62) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 131 "/DUART and line drivers/A3")) (pad 3 smd rect (at -5.969 -8.89) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 129 "/DUART and line drivers/A2")) (pad 2 smd rect (at -5.969 -10.16) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 127 "/DUART and line drivers/A1")) (pad 1 smd rect (at -5.969 -11.43) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 125 "/DUART and line drivers/A0")) (model ${KISYS3DMOD}/Housings_SOIC.3dshapes/SOIC-28W_7.5x18.7mm_Pitch1.27mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Housings_DIP:DIP-24_W7.62mm_Socket (layer F.Cu) (tedit 59C78D6B) (tstamp 5CFD44CE) (at 76.2 78.74 270) (descr "24-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket") (tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket") (path /5952FC81/5A14E417) (fp_text reference U3 (at 3.81 -2.33 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value MAX238 (at 3.81 30.27 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 3.81 13.97 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 9.15 -1.6) (end -1.55 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 9.15 29.55) (end 9.15 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.55 29.55) (end 9.15 29.55) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.55 -1.6) (end -1.55 29.55) (layer F.CrtYd) (width 0.05)) (fp_line (start 8.95 -1.39) (end -1.33 -1.39) (layer F.SilkS) (width 0.12)) (fp_line (start 8.95 29.33) (end 8.95 -1.39) (layer F.SilkS) (width 0.12)) (fp_line (start -1.33 29.33) (end 8.95 29.33) (layer F.SilkS) (width 0.12)) (fp_line (start -1.33 -1.39) (end -1.33 29.33) (layer F.SilkS) (width 0.12)) (fp_line (start 6.46 -1.33) (end 4.81 -1.33) (layer F.SilkS) (width 0.12)) (fp_line (start 6.46 29.27) (end 6.46 -1.33) (layer F.SilkS) (width 0.12)) (fp_line (start 1.16 29.27) (end 6.46 29.27) (layer F.SilkS) (width 0.12)) (fp_line (start 1.16 -1.33) (end 1.16 29.27) (layer F.SilkS) (width 0.12)) (fp_line (start 2.81 -1.33) (end 1.16 -1.33) (layer F.SilkS) (width 0.12)) (fp_line (start 8.89 -1.33) (end -1.27 -1.33) (layer F.Fab) (width 0.1)) (fp_line (start 8.89 29.27) (end 8.89 -1.33) (layer F.Fab) (width 0.1)) (fp_line (start -1.27 29.27) (end 8.89 29.27) (layer F.Fab) (width 0.1)) (fp_line (start -1.27 -1.33) (end -1.27 29.27) (layer F.Fab) (width 0.1)) (fp_line (start 0.635 -0.27) (end 1.635 -1.27) (layer F.Fab) (width 0.1)) (fp_line (start 0.635 29.21) (end 0.635 -0.27) (layer F.Fab) (width 0.1)) (fp_line (start 6.985 29.21) (end 0.635 29.21) (layer F.Fab) (width 0.1)) (fp_line (start 6.985 -1.27) (end 6.985 29.21) (layer F.Fab) (width 0.1)) (fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1)) (fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12)) (pad 24 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 19 "/DUART and line drivers/RS232RTSa")) (pad 12 thru_hole oval (at 0 27.94 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 5 "Net-(C4-Pad2)")) (pad 23 thru_hole oval (at 7.62 2.54 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 18 "/DUART and line drivers/RS232CTSa")) (pad 11 thru_hole oval (at 0 25.4 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 2 "Net-(C1-Pad1)")) (pad 22 thru_hole oval (at 7.62 5.08 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 97 "/DUART and line drivers/CTSa")) (pad 10 thru_hole oval (at 0 22.86 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 6 "Net-(C4-Pad1)")) (pad 21 thru_hole oval (at 7.62 7.62 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 98 "/DUART and line drivers/RTSb")) (pad 9 thru_hole oval (at 0 20.32 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 20 thru_hole oval (at 7.62 10.16 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 24 "/DUART and line drivers/RS232RTSb")) (pad 8 thru_hole oval (at 0 17.78 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 19 thru_hole oval (at 7.62 12.7 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 99 "/DUART and line drivers/RTSa")) (pad 7 thru_hole oval (at 0 15.24 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 21 "/DUART and line drivers/RS232RxDa")) (pad 18 thru_hole oval (at 7.62 15.24 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 100 "Net-(U3-Pad18)")) (pad 6 thru_hole oval (at 0 12.7 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 101 "Net-(U3-Pad6)")) (pad 17 thru_hole oval (at 7.62 17.78 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 102 "/DUART and line drivers/CTSb")) (pad 5 thru_hole oval (at 0 10.16 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 103 "Net-(U3-Pad5)")) (pad 16 thru_hole oval (at 7.62 20.32 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 25 "/DUART and line drivers/RS232CTSb")) (pad 4 thru_hole oval (at 0 7.62 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 104 "Net-(U3-Pad4)")) (pad 15 thru_hole oval (at 7.62 22.86 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 3 "Net-(C2-Pad2)")) (pad 3 thru_hole oval (at 0 5.08 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 22 "/DUART and line drivers/RS232RxDb")) (pad 14 thru_hole oval (at 7.62 25.4 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 8 "Net-(C5-Pad2)")) (pad 2 thru_hole oval (at 0 2.54 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 20 "/DUART and line drivers/RS232TxDa")) (pad 13 thru_hole oval (at 7.62 27.94 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 7 "Net-(C5-Pad1)")) (pad 1 thru_hole rect (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 23 "/DUART and line drivers/RS232TxDb")) (model ${KISYS3DMOD}/Housings_DIP.3dshapes/DIP-24_W7.62mm_Socket.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module saturn:PLCC-44_THT-Socket (layer F.Cu) (tedit 5A9EFF1A) (tstamp 5CFD4514) (at 91.948 91.948) (descr "PLCC, 44 pins, through hole") (tags "plcc leaded") (path /5952FC81/5A14F76D) (fp_text reference U4 (at -1.27 -6.4) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value SC28L92PLCC44 (at -1.27 19.1) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -12.02 -5.4) (end -13.02 -4.4) (layer F.Fab) (width 0.1)) (fp_line (start -13.02 -4.4) (end -13.02 18.1) (layer F.Fab) (width 0.1)) (fp_line (start -13.02 18.1) (end 10.48 18.1) (layer F.Fab) (width 0.1)) (fp_line (start 10.48 18.1) (end 10.48 -5.4) (layer F.Fab) (width 0.1)) (fp_line (start 10.48 -5.4) (end -12.02 -5.4) (layer F.Fab) (width 0.1)) (fp_line (start -13.52 -5.9) (end -13.52 18.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -13.52 18.6) (end 10.98 18.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 10.98 18.6) (end 10.98 -5.9) (layer F.CrtYd) (width 0.05)) (fp_line (start 10.98 -5.9) (end -13.52 -5.9) (layer F.CrtYd) (width 0.05)) (fp_line (start -10.48 -2.86) (end -10.48 15.56) (layer F.Fab) (width 0.1)) (fp_line (start -10.48 15.56) (end 7.94 15.56) (layer F.Fab) (width 0.1)) (fp_line (start 7.94 15.56) (end 7.94 -2.86) (layer F.Fab) (width 0.1)) (fp_line (start 7.94 -2.86) (end -10.48 -2.86) (layer F.Fab) (width 0.1)) (fp_line (start -1.77 -5.4) (end -1.27 -4.4) (layer F.Fab) (width 0.1)) (fp_line (start -1.27 -4.4) (end -0.77 -5.4) (layer F.Fab) (width 0.1)) (fp_line (start -2.27 -5.5) (end -12.12 -5.5) (layer F.SilkS) (width 0.12)) (fp_line (start -12.12 -5.5) (end -13.12 -4.5) (layer F.SilkS) (width 0.12)) (fp_line (start -13.12 -4.5) (end -13.12 18.2) (layer F.SilkS) (width 0.12)) (fp_line (start -13.12 18.2) (end 10.58 18.2) (layer F.SilkS) (width 0.12)) (fp_line (start 10.58 18.2) (end 10.58 -5.5) (layer F.SilkS) (width 0.12)) (fp_line (start 10.58 -5.5) (end -0.27 -5.5) (layer F.SilkS) (width 0.12)) (fp_text user %R (at -1.27 6.35) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole rect (at 0 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 3 thru_hole circle (at -2.54 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 5 thru_hole circle (at -5.08 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 102 "/DUART and line drivers/CTSb")) (pad 43 thru_hole circle (at 2.54 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 41 thru_hole circle (at 5.08 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 39 thru_hole circle (at 7.62 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 105 "/DUART and line drivers/~DUARTSEL")) (pad 2 thru_hole circle (at -2.54 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 125 "/DUART and line drivers/A0")) (pad 4 thru_hole circle (at -5.08 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 127 "/DUART and line drivers/A1")) (pad 6 thru_hole circle (at -7.62 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 129 "/DUART and line drivers/A2")) (pad 44 thru_hole circle (at 0 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 1 VCC)) (pad 42 thru_hole circle (at 2.54 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 40 thru_hole circle (at 5.08 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 8 thru_hole circle (at -7.62 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 97 "/DUART and line drivers/CTSa")) (pad 10 thru_hole circle (at -7.62 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 93 "/DUART and line drivers/~MRD")) (pad 12 thru_hole circle (at -7.62 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 1 VCC)) (pad 14 thru_hole circle (at -7.62 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 98 "/DUART and line drivers/RTSb")) (pad 16 thru_hole circle (at -7.62 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 7 thru_hole circle (at -10.16 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 131 "/DUART and line drivers/A3")) (pad 9 thru_hole circle (at -10.16 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 92 "/DUART and line drivers/~MWR")) (pad 11 thru_hole circle (at -10.16 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 104 "Net-(U3-Pad4)")) (pad 13 thru_hole circle (at -10.16 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 100 "Net-(U3-Pad18)")) (pad 15 thru_hole circle (at -10.16 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 17 thru_hole circle (at -10.16 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 19 thru_hole circle (at -7.62 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 130 "/DUART and line drivers/D3")) (pad 21 thru_hole circle (at -5.08 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 135 "/DUART and line drivers/D7")) (pad 23 thru_hole circle (at -2.54 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 25 thru_hole circle (at 0 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 134 "/DUART and line drivers/D6")) (pad 27 thru_hole circle (at 2.54 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 128 "/DUART and line drivers/D2")) (pad 30 thru_hole circle (at 5.08 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 18 thru_hole circle (at -7.62 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 126 "/DUART and line drivers/D1")) (pad 20 thru_hole circle (at -5.08 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 133 "/DUART and line drivers/D5")) (pad 22 thru_hole circle (at -2.54 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 4 GND)) (pad 24 thru_hole circle (at 0 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 123 "/DUART and line drivers/~IRQ")) (pad 26 thru_hole circle (at 2.54 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 132 "/DUART and line drivers/D4")) (pad 28 thru_hole circle (at 5.08 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 124 "/DUART and line drivers/D0")) (pad 32 thru_hole circle (at 5.08 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 99 "/DUART and line drivers/RTSa")) (pad 34 thru_hole circle (at 5.08 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 36 thru_hole circle (at 5.08 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 71 "Net-(R5-Pad2)")) (pad 38 thru_hole circle (at 5.08 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 70 "/DUART and line drivers/RES")) (pad 29 thru_hole circle (at 7.62 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 31 thru_hole circle (at 7.62 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 33 thru_hole circle (at 7.62 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 103 "Net-(U3-Pad5)")) (pad 35 thru_hole circle (at 7.62 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 101 "Net-(U3-Pad6)")) (pad 37 thru_hole circle (at 7.62 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (model ${KISYS3DMOD}/Housings_LCC.3dshapes/PLCC-44_THT-Socket.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Housings_DIP:DIP-28_W15.24mm_Socket (layer F.Cu) (tedit 59C78D6C) (tstamp 5CFD454C) (at 92.964 164.084 180) (descr "28-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket") (tags "THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket") (path /5952FC78/5A155022) (fp_text reference U5 (at 7.62 -2.33) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value AS6C62256A (at 7.62 35.35) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_arc (start 7.62 -1.33) (end 6.62 -1.33) (angle -180) (layer F.SilkS) (width 0.12)) (fp_line (start 1.255 -1.27) (end 14.985 -1.27) (layer F.Fab) (width 0.1)) (fp_line (start 14.985 -1.27) (end 14.985 34.29) (layer F.Fab) (width 0.1)) (fp_line (start 14.985 34.29) (end 0.255 34.29) (layer F.Fab) (width 0.1)) (fp_line (start 0.255 34.29) (end 0.255 -0.27) (layer F.Fab) (width 0.1)) (fp_line (start 0.255 -0.27) (end 1.255 -1.27) (layer F.Fab) (width 0.1)) (fp_line (start -1.27 -1.33) (end -1.27 34.35) (layer F.Fab) (width 0.1)) (fp_line (start -1.27 34.35) (end 16.51 34.35) (layer F.Fab) (width 0.1)) (fp_line (start 16.51 34.35) (end 16.51 -1.33) (layer F.Fab) (width 0.1)) (fp_line (start 16.51 -1.33) (end -1.27 -1.33) (layer F.Fab) (width 0.1)) (fp_line (start 6.62 -1.33) (end 1.16 -1.33) (layer F.SilkS) (width 0.12)) (fp_line (start 1.16 -1.33) (end 1.16 34.35) (layer F.SilkS) (width 0.12)) (fp_line (start 1.16 34.35) (end 14.08 34.35) (layer F.SilkS) (width 0.12)) (fp_line (start 14.08 34.35) (end 14.08 -1.33) (layer F.SilkS) (width 0.12)) (fp_line (start 14.08 -1.33) (end 8.62 -1.33) (layer F.SilkS) (width 0.12)) (fp_line (start -1.33 -1.39) (end -1.33 34.41) (layer F.SilkS) (width 0.12)) (fp_line (start -1.33 34.41) (end 16.57 34.41) (layer F.SilkS) (width 0.12)) (fp_line (start 16.57 34.41) (end 16.57 -1.39) (layer F.SilkS) (width 0.12)) (fp_line (start 16.57 -1.39) (end -1.33 -1.39) (layer F.SilkS) (width 0.12)) (fp_line (start -1.55 -1.6) (end -1.55 34.65) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.55 34.65) (end 16.8 34.65) (layer F.CrtYd) (width 0.05)) (fp_line (start 16.8 34.65) (end 16.8 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 16.8 -1.6) (end -1.55 -1.6) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 7.62 16.51) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole rect (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 85 "/Glue and control logic/A14")) (pad 15 thru_hole oval (at 15.24 33.02 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 130 "/DUART and line drivers/D3")) (pad 2 thru_hole oval (at 0 2.54 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 84 "/Glue and control logic/A12")) (pad 16 thru_hole oval (at 15.24 30.48 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 132 "/DUART and line drivers/D4")) (pad 3 thru_hole oval (at 0 5.08 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 86 "/MPU, ROM and RAM/A7")) (pad 17 thru_hole oval (at 15.24 27.94 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 133 "/DUART and line drivers/D5")) (pad 4 thru_hole oval (at 0 7.62 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 81 "/MPU, ROM and RAM/A6")) (pad 18 thru_hole oval (at 15.24 25.4 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 134 "/DUART and line drivers/D6")) (pad 5 thru_hole oval (at 0 10.16 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 79 "/MPU, ROM and RAM/A5")) (pad 19 thru_hole oval (at 15.24 22.86 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 135 "/DUART and line drivers/D7")) (pad 6 thru_hole oval (at 0 12.7 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 80 "/MPU, ROM and RAM/A4")) (pad 20 thru_hole oval (at 15.24 20.32 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 106 "/Glue and control logic/~ROM")) (pad 7 thru_hole oval (at 0 15.24 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 131 "/DUART and line drivers/A3")) (pad 21 thru_hole oval (at 15.24 17.78 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 83 "/Glue and control logic/A10")) (pad 8 thru_hole oval (at 0 17.78 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 129 "/DUART and line drivers/A2")) (pad 22 thru_hole oval (at 15.24 15.24 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 93 "/DUART and line drivers/~MRD")) (pad 9 thru_hole oval (at 0 20.32 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 127 "/DUART and line drivers/A1")) (pad 23 thru_hole oval (at 15.24 12.7 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 88 "/Glue and control logic/A11")) (pad 10 thru_hole oval (at 0 22.86 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 125 "/DUART and line drivers/A0")) (pad 24 thru_hole oval (at 15.24 10.16 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 87 "/Glue and control logic/A9")) (pad 11 thru_hole oval (at 0 25.4 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 124 "/DUART and line drivers/D0")) (pad 25 thru_hole oval (at 15.24 7.62 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 82 "/Glue and control logic/A8")) (pad 12 thru_hole oval (at 0 27.94 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 126 "/DUART and line drivers/D1")) (pad 26 thru_hole oval (at 15.24 5.08 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 89 "/Glue and control logic/A13")) (pad 13 thru_hole oval (at 0 30.48 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 128 "/DUART and line drivers/D2")) (pad 27 thru_hole oval (at 15.24 2.54 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 14 thru_hole oval (at 0 33.02 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 28 thru_hole oval (at 15.24 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (model ${KISYS3DMOD}/Housings_DIP.3dshapes/DIP-28_W15.24mm_Socket.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module saturn:SOJ-36 (layer F.Cu) (tedit 5C97B9FF) (tstamp 5CFD4585) (at 180.069 35.252001) (descr "28-Lead Plastic Small Outline (SO) - Wide, 7.50 mm X 18.7 mm Body [SOIC] (https://www.akm.com/akm/en/file/datasheet/AK5394AVS.pdf)") (tags "SOIC 1.27") (path /5952FC78/5A3C052C) (attr smd) (fp_text reference U6 (at -0.127 -14.605) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value AS7C34096A (at 0.127 12.446) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 0.127 0.127) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -2.496 -12.525) (end 4.004 -12.525) (layer F.Fab) (width 0.15)) (fp_line (start 4.004 -12.525) (end 3.937 10.922) (layer F.Fab) (width 0.15)) (fp_line (start 3.944 10.922) (end -3.556 10.922) (layer F.Fab) (width 0.15)) (fp_line (start -3.556 10.922) (end -3.496 -11.525) (layer F.Fab) (width 0.15)) (fp_line (start -3.496 -11.525) (end -2.496 -12.525) (layer F.Fab) (width 0.15)) (fp_line (start -5.696 -12.875) (end -5.715 11.684) (layer F.CrtYd) (width 0.05)) (fp_line (start 6.204 -12.875) (end 6.223 11.684) (layer F.CrtYd) (width 0.05)) (fp_line (start -5.696 -12.875) (end 6.204 -12.875) (layer F.CrtYd) (width 0.05)) (fp_line (start -5.715 11.684) (end 6.223 11.684) (layer F.CrtYd) (width 0.05)) (fp_line (start -3.559 -12.7) (end -3.559 -12.05) (layer F.SilkS) (width 0.15)) (fp_line (start 4.191 -12.7) (end 4.191 -11.955) (layer F.SilkS) (width 0.15)) (fp_line (start 4.064 11.286) (end 4.064 10.541) (layer F.SilkS) (width 0.15)) (fp_line (start -3.683 11.286) (end -3.683 10.541) (layer F.SilkS) (width 0.15)) (fp_line (start -3.559 -12.7) (end 4.191 -12.7) (layer F.SilkS) (width 0.15)) (fp_line (start -3.683 11.303) (end 4.067 11.303) (layer F.SilkS) (width 0.15)) (fp_line (start -3.559 -12.05) (end -5.384 -12.05) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -5.969 -11.43) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 125 "/DUART and line drivers/A0")) (pad 2 smd rect (at -5.969 -10.16) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 127 "/DUART and line drivers/A1")) (pad 3 smd rect (at -5.969 -8.89) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 129 "/DUART and line drivers/A2")) (pad 4 smd rect (at -5.969 -7.62) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 131 "/DUART and line drivers/A3")) (pad 5 smd rect (at -5.969 -6.223) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 80 "/MPU, ROM and RAM/A4")) (pad 6 smd rect (at -5.969 -5.08) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 107 "/Glue and control logic/~RAM1")) (pad 7 smd rect (at -5.969 -3.81) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 124 "/DUART and line drivers/D0")) (pad 8 smd rect (at -5.969 -2.54) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 126 "/DUART and line drivers/D1")) (pad 9 smd rect (at -5.969 -1.27) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 1 VCC)) (pad 10 smd rect (at -5.969 0) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 4 GND)) (pad 11 smd rect (at -5.969 1.27) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 128 "/DUART and line drivers/D2")) (pad 12 smd rect (at -5.969 2.54) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 130 "/DUART and line drivers/D3")) (pad 13 smd rect (at -5.969 3.81) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 92 "/DUART and line drivers/~MWR")) (pad 14 smd rect (at -5.969 5.08) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 79 "/MPU, ROM and RAM/A5")) (pad 15 smd rect (at -5.969 6.35) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 81 "/MPU, ROM and RAM/A6")) (pad 16 smd rect (at -5.969 7.62) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 86 "/MPU, ROM and RAM/A7")) (pad 17 smd rect (at -5.969 8.89) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 82 "/Glue and control logic/A8")) (pad 18 smd rect (at -5.969 10.16) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 87 "/Glue and control logic/A9")) (pad 19 smd rect (at 6.477 10.16) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask)) (pad 20 smd rect (at 6.477 8.89) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 83 "/Glue and control logic/A10")) (pad 21 smd rect (at 6.477 7.62) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 88 "/Glue and control logic/A11")) (pad 22 smd rect (at 6.477 6.35) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 84 "/Glue and control logic/A12")) (pad 23 smd rect (at 6.477 5.08) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 89 "/Glue and control logic/A13")) (pad 24 smd rect (at 6.477 3.81) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 85 "/Glue and control logic/A14")) (pad 25 smd rect (at 6.477 2.54) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 132 "/DUART and line drivers/D4")) (pad 26 smd rect (at 6.477 1.27) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 133 "/DUART and line drivers/D5")) (pad 27 smd rect (at 6.477 0) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 1 VCC)) (pad 28 smd rect (at 6.477 -1.27) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 4 GND)) (pad 29 smd rect (at 6.477 -2.54) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 134 "/DUART and line drivers/D6")) (pad 30 smd rect (at 6.477 -3.81) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 135 "/DUART and line drivers/D7")) (pad 31 smd rect (at 6.477 -5.08) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 93 "/DUART and line drivers/~MRD")) (pad 32 smd rect (at 6.477 -6.35) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 90 "/Glue and control logic/A15")) (pad 33 smd rect (at 6.477 -7.62) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 94 "/Glue and control logic/A16")) (pad 34 smd rect (at 6.477 -8.89) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 95 "/Glue and control logic/A17")) (pad 35 smd rect (at 6.477 -10.16) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask) (net 96 "/Glue and control logic/A18")) (pad 36 smd rect (at 6.477 -11.43) (size 5.08 0.6) (layers F.Cu F.Paste F.Mask)) (model ${KISYS3DMOD}/Housings_SOIC.3dshapes/SOIC-28W_7.5x18.7mm_Pitch1.27mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module saturn:PLCC-44_THT-Socket (layer F.Cu) (tedit 5A9EFF1A) (tstamp 5CFD45CB) (at 62.484 134.62) (descr "PLCC, 44 pins, through hole") (tags "plcc leaded") (path /5A3B21BC/5A3B3298) (fp_text reference U7 (at -1.27 -6.4) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value WD65C22PLCC44 (at -1.27 19.1) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -12.02 -5.4) (end -13.02 -4.4) (layer F.Fab) (width 0.1)) (fp_line (start -13.02 -4.4) (end -13.02 18.1) (layer F.Fab) (width 0.1)) (fp_line (start -13.02 18.1) (end 10.48 18.1) (layer F.Fab) (width 0.1)) (fp_line (start 10.48 18.1) (end 10.48 -5.4) (layer F.Fab) (width 0.1)) (fp_line (start 10.48 -5.4) (end -12.02 -5.4) (layer F.Fab) (width 0.1)) (fp_line (start -13.52 -5.9) (end -13.52 18.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -13.52 18.6) (end 10.98 18.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 10.98 18.6) (end 10.98 -5.9) (layer F.CrtYd) (width 0.05)) (fp_line (start 10.98 -5.9) (end -13.52 -5.9) (layer F.CrtYd) (width 0.05)) (fp_line (start -10.48 -2.86) (end -10.48 15.56) (layer F.Fab) (width 0.1)) (fp_line (start -10.48 15.56) (end 7.94 15.56) (layer F.Fab) (width 0.1)) (fp_line (start 7.94 15.56) (end 7.94 -2.86) (layer F.Fab) (width 0.1)) (fp_line (start 7.94 -2.86) (end -10.48 -2.86) (layer F.Fab) (width 0.1)) (fp_line (start -1.77 -5.4) (end -1.27 -4.4) (layer F.Fab) (width 0.1)) (fp_line (start -1.27 -4.4) (end -0.77 -5.4) (layer F.Fab) (width 0.1)) (fp_line (start -2.27 -5.5) (end -12.12 -5.5) (layer F.SilkS) (width 0.12)) (fp_line (start -12.12 -5.5) (end -13.12 -4.5) (layer F.SilkS) (width 0.12)) (fp_line (start -13.12 -4.5) (end -13.12 18.2) (layer F.SilkS) (width 0.12)) (fp_line (start -13.12 18.2) (end 10.58 18.2) (layer F.SilkS) (width 0.12)) (fp_line (start 10.58 18.2) (end 10.58 -5.5) (layer F.SilkS) (width 0.12)) (fp_line (start 10.58 -5.5) (end -0.27 -5.5) (layer F.SilkS) (width 0.12)) (fp_text user %R (at -1.27 6.35) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole rect (at 0 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 4 GND)) (pad 3 thru_hole circle (at -2.54 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 47 "/VIA and IDE/IDE-D1")) (pad 5 thru_hole circle (at -5.08 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 51 "/VIA and IDE/IDE-D3")) (pad 43 thru_hole circle (at 2.54 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 41 thru_hole circle (at 5.08 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 127 "/DUART and line drivers/A1")) (pad 39 thru_hole circle (at 7.62 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 131 "/DUART and line drivers/A3")) (pad 2 thru_hole circle (at -2.54 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 45 "/VIA and IDE/IDE-D0")) (pad 4 thru_hole circle (at -5.08 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 49 "/VIA and IDE/IDE-D2")) (pad 6 thru_hole circle (at -7.62 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 53 "/VIA and IDE/IDE-D4")) (pad 44 thru_hole circle (at 0 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 42 thru_hole circle (at 2.54 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 125 "/DUART and line drivers/A0")) (pad 40 thru_hole circle (at 5.08 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 129 "/DUART and line drivers/A2")) (pad 8 thru_hole circle (at -7.62 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 57 "/VIA and IDE/IDE-D6")) (pad 10 thru_hole circle (at -7.62 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 58 "/VIA and IDE/IDE-D8")) (pad 12 thru_hole circle (at -7.62 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 56 "/VIA and IDE/IDE-D9")) (pad 14 thru_hole circle (at -7.62 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 52 "/VIA and IDE/IDE-D11")) (pad 16 thru_hole circle (at -7.62 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 48 "/VIA and IDE/IDE-D13")) (pad 7 thru_hole circle (at -10.16 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 55 "/VIA and IDE/IDE-D5")) (pad 9 thru_hole circle (at -10.16 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 59 "/VIA and IDE/IDE-D7")) (pad 11 thru_hole circle (at -10.16 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 13 thru_hole circle (at -10.16 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 54 "/VIA and IDE/IDE-D10")) (pad 15 thru_hole circle (at -10.16 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 50 "/VIA and IDE/IDE-D12")) (pad 17 thru_hole circle (at -10.16 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 46 "/VIA and IDE/IDE-D14")) (pad 19 thru_hole circle (at -7.62 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 21 thru_hole circle (at -5.08 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 1 VCC)) (pad 23 thru_hole circle (at -2.54 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 122 "/VIA and IDE/~IRQVIA1")) (pad 25 thru_hole circle (at 0 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 108 "/Glue and control logic/~VIA1SEL")) (pad 27 thru_hole circle (at 2.54 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 136 "/Glue and control logic/CLK")) (pad 30 thru_hole circle (at 5.08 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 109 "/VIA and IDE/D5")) (pad 18 thru_hole circle (at -7.62 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 44 "/VIA and IDE/IDE-D15")) (pad 20 thru_hole circle (at -5.08 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 22 thru_hole circle (at -2.54 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 24 thru_hole circle (at 0 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 137 "/Glue and control logic/R/~W")) (pad 26 thru_hole circle (at 2.54 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 1 VCC)) (pad 28 thru_hole circle (at 5.08 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 110 "/VIA and IDE/D7")) (pad 32 thru_hole circle (at 5.08 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 111 "/Glue and control logic/D3")) (pad 34 thru_hole circle (at 5.08 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 112 "/Glue and control logic/D2")) (pad 36 thru_hole circle (at 5.08 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 113 "/Glue and control logic/D0")) (pad 38 thru_hole circle (at 5.08 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 29 thru_hole circle (at 7.62 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 114 "/VIA and IDE/D6")) (pad 31 thru_hole circle (at 7.62 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 115 "/VIA and IDE/D4")) (pad 33 thru_hole circle (at 7.62 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 35 thru_hole circle (at 7.62 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 116 "/Glue and control logic/D1")) (pad 37 thru_hole circle (at 7.62 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 76 "/Glue and control logic/~RES")) (model ${KISYS3DMOD}/Housings_LCC.3dshapes/PLCC-44_THT-Socket.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module saturn:PLCC-44_THT-Socket (layer F.Cu) (tedit 5A9EFF1A) (tstamp 5CFD4611) (at 62.484 103.124) (descr "PLCC, 44 pins, through hole") (tags "plcc leaded") (path /5A3B21BC/5A3B4A4E) (fp_text reference U8 (at -1.27 -6.4) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value WD65C22PLCC44 (at -1.27 19.1) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at -1.27 6.35) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 10.58 -5.5) (end -0.27 -5.5) (layer F.SilkS) (width 0.12)) (fp_line (start 10.58 18.2) (end 10.58 -5.5) (layer F.SilkS) (width 0.12)) (fp_line (start -13.12 18.2) (end 10.58 18.2) (layer F.SilkS) (width 0.12)) (fp_line (start -13.12 -4.5) (end -13.12 18.2) (layer F.SilkS) (width 0.12)) (fp_line (start -12.12 -5.5) (end -13.12 -4.5) (layer F.SilkS) (width 0.12)) (fp_line (start -2.27 -5.5) (end -12.12 -5.5) (layer F.SilkS) (width 0.12)) (fp_line (start -1.27 -4.4) (end -0.77 -5.4) (layer F.Fab) (width 0.1)) (fp_line (start -1.77 -5.4) (end -1.27 -4.4) (layer F.Fab) (width 0.1)) (fp_line (start 7.94 -2.86) (end -10.48 -2.86) (layer F.Fab) (width 0.1)) (fp_line (start 7.94 15.56) (end 7.94 -2.86) (layer F.Fab) (width 0.1)) (fp_line (start -10.48 15.56) (end 7.94 15.56) (layer F.Fab) (width 0.1)) (fp_line (start -10.48 -2.86) (end -10.48 15.56) (layer F.Fab) (width 0.1)) (fp_line (start 10.98 -5.9) (end -13.52 -5.9) (layer F.CrtYd) (width 0.05)) (fp_line (start 10.98 18.6) (end 10.98 -5.9) (layer F.CrtYd) (width 0.05)) (fp_line (start -13.52 18.6) (end 10.98 18.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -13.52 -5.9) (end -13.52 18.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 10.48 -5.4) (end -12.02 -5.4) (layer F.Fab) (width 0.1)) (fp_line (start 10.48 18.1) (end 10.48 -5.4) (layer F.Fab) (width 0.1)) (fp_line (start -13.02 18.1) (end 10.48 18.1) (layer F.Fab) (width 0.1)) (fp_line (start -13.02 -4.4) (end -13.02 18.1) (layer F.Fab) (width 0.1)) (fp_line (start -12.02 -5.4) (end -13.02 -4.4) (layer F.Fab) (width 0.1)) (pad 37 thru_hole circle (at 7.62 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 76 "/Glue and control logic/~RES")) (pad 35 thru_hole circle (at 7.62 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 116 "/Glue and control logic/D1")) (pad 33 thru_hole circle (at 7.62 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 31 thru_hole circle (at 7.62 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 115 "/VIA and IDE/D4")) (pad 29 thru_hole circle (at 7.62 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 114 "/VIA and IDE/D6")) (pad 38 thru_hole circle (at 5.08 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 36 thru_hole circle (at 5.08 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 113 "/Glue and control logic/D0")) (pad 34 thru_hole circle (at 5.08 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 112 "/Glue and control logic/D2")) (pad 32 thru_hole circle (at 5.08 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 111 "/Glue and control logic/D3")) (pad 28 thru_hole circle (at 5.08 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 110 "/VIA and IDE/D7")) (pad 26 thru_hole circle (at 2.54 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 1 VCC)) (pad 24 thru_hole circle (at 0 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 137 "/Glue and control logic/R/~W")) (pad 22 thru_hole circle (at -2.54 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 20 thru_hole circle (at -5.08 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 26 "Net-(J3-Pad12)")) (pad 18 thru_hole circle (at -7.62 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 28 "Net-(J3-Pad10)")) (pad 30 thru_hole circle (at 5.08 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 109 "/VIA and IDE/D5")) (pad 27 thru_hole circle (at 2.54 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 136 "/Glue and control logic/CLK")) (pad 25 thru_hole circle (at 0 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 117 "/Glue and control logic/~VIA2SEL")) (pad 23 thru_hole circle (at -2.54 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 14 "Net-(D3-Pad1)")) (pad 21 thru_hole circle (at -5.08 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 1 VCC)) (pad 19 thru_hole circle (at -7.62 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 27 "Net-(J3-Pad11)")) (pad 17 thru_hole circle (at -10.16 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 29 "Net-(J3-Pad9)")) (pad 15 thru_hole circle (at -10.16 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 31 "Net-(J3-Pad7)")) (pad 13 thru_hole circle (at -10.16 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 33 "Net-(J3-Pad5)")) (pad 11 thru_hole circle (at -10.16 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 9 thru_hole circle (at -10.16 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 60 "/VIA and IDE/~IDE:RES")) (pad 7 thru_hole circle (at -10.16 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 43 "/VIA and IDE/~DIOW")) (pad 16 thru_hole circle (at -7.62 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 30 "Net-(J3-Pad8)")) (pad 14 thru_hole circle (at -7.62 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 32 "Net-(J3-Pad6)")) (pad 12 thru_hole circle (at -7.62 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 34 "Net-(J3-Pad4)")) (pad 10 thru_hole circle (at -7.62 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 35 "Net-(J3-Pad3)")) (pad 8 thru_hole circle (at -7.62 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 42 "/VIA and IDE/~DIOR")) (pad 40 thru_hole circle (at 5.08 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 129 "/DUART and line drivers/A2")) (pad 42 thru_hole circle (at 2.54 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 125 "/DUART and line drivers/A0")) (pad 44 thru_hole circle (at 0 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 6 thru_hole circle (at -7.62 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 36 "/VIA and IDE/~IDE:CS1")) (pad 4 thru_hole circle (at -5.08 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 38 "/VIA and IDE/IDE-A2")) (pad 2 thru_hole circle (at -2.54 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 39 "/VIA and IDE/IDE-A0")) (pad 39 thru_hole circle (at 7.62 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 131 "/DUART and line drivers/A3")) (pad 41 thru_hole circle (at 5.08 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 127 "/DUART and line drivers/A1")) (pad 43 thru_hole circle (at 2.54 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 5 thru_hole circle (at -5.08 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 37 "/VIA and IDE/~IDE:CS0")) (pad 3 thru_hole circle (at -2.54 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 40 "/VIA and IDE/IDE-A1")) (pad 1 thru_hole rect (at 0 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Housings_LCC.3dshapes/PLCC-44_THT-Socket.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Housings_DIP:DIP-14_W7.62mm_Socket (layer F.Cu) (tedit 59C78D6B) (tstamp 5CFD463B) (at 93.472 115.824 270) (descr "14-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket") (tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket") (path /5A3B356D/5A3B42E3) (fp_text reference U9 (at 3.81 -2.33 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 74HC74 (at 3.81 17.57 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 3.81 7.62 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 9.15 -1.6) (end -1.55 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 9.15 16.85) (end 9.15 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.55 16.85) (end 9.15 16.85) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.55 -1.6) (end -1.55 16.85) (layer F.CrtYd) (width 0.05)) (fp_line (start 8.95 -1.39) (end -1.33 -1.39) (layer F.SilkS) (width 0.12)) (fp_line (start 8.95 16.63) (end 8.95 -1.39) (layer F.SilkS) (width 0.12)) (fp_line (start -1.33 16.63) (end 8.95 16.63) (layer F.SilkS) (width 0.12)) (fp_line (start -1.33 -1.39) (end -1.33 16.63) (layer F.SilkS) (width 0.12)) (fp_line (start 6.46 -1.33) (end 4.81 -1.33) (layer F.SilkS) (width 0.12)) (fp_line (start 6.46 16.57) (end 6.46 -1.33) (layer F.SilkS) (width 0.12)) (fp_line (start 1.16 16.57) (end 6.46 16.57) (layer F.SilkS) (width 0.12)) (fp_line (start 1.16 -1.33) (end 1.16 16.57) (layer F.SilkS) (width 0.12)) (fp_line (start 2.81 -1.33) (end 1.16 -1.33) (layer F.SilkS) (width 0.12)) (fp_line (start 8.89 -1.33) (end -1.27 -1.33) (layer F.Fab) (width 0.1)) (fp_line (start 8.89 16.57) (end 8.89 -1.33) (layer F.Fab) (width 0.1)) (fp_line (start -1.27 16.57) (end 8.89 16.57) (layer F.Fab) (width 0.1)) (fp_line (start -1.27 -1.33) (end -1.27 16.57) (layer F.Fab) (width 0.1)) (fp_line (start 0.635 -0.27) (end 1.635 -1.27) (layer F.Fab) (width 0.1)) (fp_line (start 0.635 16.51) (end 0.635 -0.27) (layer F.Fab) (width 0.1)) (fp_line (start 6.985 16.51) (end 0.635 16.51) (layer F.Fab) (width 0.1)) (fp_line (start 6.985 -1.27) (end 6.985 16.51) (layer F.Fab) (width 0.1)) (fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1)) (fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12)) (pad 14 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 7 thru_hole oval (at 0 15.24 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 13 thru_hole oval (at 7.62 2.54 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 6 thru_hole oval (at 0 12.7 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 118 "Net-(U9-Pad2)")) (pad 12 thru_hole oval (at 7.62 5.08 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 5 thru_hole oval (at 0 10.16 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 136 "/Glue and control logic/CLK")) (pad 11 thru_hole oval (at 7.62 7.62 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 4 thru_hole oval (at 0 7.62 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 10 thru_hole oval (at 7.62 10.16 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 3 thru_hole oval (at 0 5.08 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 119 "Net-(U9-Pad3)")) (pad 9 thru_hole oval (at 7.62 12.7 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)) (pad 2 thru_hole oval (at 0 2.54 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 118 "Net-(U9-Pad2)")) (pad 8 thru_hole oval (at 7.62 15.24 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)) (pad 1 thru_hole rect (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (model ${KISYS3DMOD}/Housings_DIP.3dshapes/DIP-14_W7.62mm_Socket.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Housings_DIP:DIP-8_W7.62mm_Socket (layer F.Cu) (tedit 59C78D6B) (tstamp 5CFD465F) (at 101.6 61.468 270) (descr "8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket") (tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket") (path /5A3B356D/5A3B41A8) (fp_text reference U10 (at 0 10.16 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value TL7705B (at 3.81 9.95 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 3.81 3.81 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 9.15 -1.6) (end -1.55 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 9.15 9.2) (end 9.15 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.55 9.2) (end 9.15 9.2) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.55 -1.6) (end -1.55 9.2) (layer F.CrtYd) (width 0.05)) (fp_line (start 8.95 -1.39) (end -1.33 -1.39) (layer F.SilkS) (width 0.12)) (fp_line (start 8.95 9.01) (end 8.95 -1.39) (layer F.SilkS) (width 0.12)) (fp_line (start -1.33 9.01) (end 8.95 9.01) (layer F.SilkS) (width 0.12)) (fp_line (start -1.33 -1.39) (end -1.33 9.01) (layer F.SilkS) (width 0.12)) (fp_line (start 6.46 -1.33) (end 4.81 -1.33) (layer F.SilkS) (width 0.12)) (fp_line (start 6.46 8.95) (end 6.46 -1.33) (layer F.SilkS) (width 0.12)) (fp_line (start 1.16 8.95) (end 6.46 8.95) (layer F.SilkS) (width 0.12)) (fp_line (start 1.16 -1.33) (end 1.16 8.95) (layer F.SilkS) (width 0.12)) (fp_line (start 2.81 -1.33) (end 1.16 -1.33) (layer F.SilkS) (width 0.12)) (fp_line (start 8.89 -1.33) (end -1.27 -1.33) (layer F.Fab) (width 0.1)) (fp_line (start 8.89 8.95) (end 8.89 -1.33) (layer F.Fab) (width 0.1)) (fp_line (start -1.27 8.95) (end 8.89 8.95) (layer F.Fab) (width 0.1)) (fp_line (start -1.27 -1.33) (end -1.27 8.95) (layer F.Fab) (width 0.1)) (fp_line (start 0.635 -0.27) (end 1.635 -1.27) (layer F.Fab) (width 0.1)) (fp_line (start 0.635 8.89) (end 0.635 -0.27) (layer F.Fab) (width 0.1)) (fp_line (start 6.985 8.89) (end 0.635 8.89) (layer F.Fab) (width 0.1)) (fp_line (start 6.985 -1.27) (end 6.985 8.89) (layer F.Fab) (width 0.1)) (fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1)) (fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12)) (pad 8 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 4 thru_hole oval (at 0 7.62 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 7 thru_hole oval (at 7.62 2.54 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 3 thru_hole oval (at 0 5.08 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 69 "Net-(R2-Pad1)")) (pad 6 thru_hole oval (at 7.62 5.08 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 70 "/DUART and line drivers/RES")) (pad 2 thru_hole oval (at 0 2.54 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 68 "Net-(R1-Pad2)")) (pad 5 thru_hole oval (at 7.62 7.62 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 76 "/Glue and control logic/~RES")) (pad 1 thru_hole rect (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 10 "Net-(C15-Pad1)")) (model ${KISYS3DMOD}/Housings_DIP.3dshapes/DIP-8_W7.62mm_Socket.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module saturn:PLCC-44_THT-Socket (layer F.Cu) (tedit 5A9EFF1A) (tstamp 5CFD46A5) (at 182.885001 98.057001) (descr "PLCC, 44 pins, through hole") (tags "plcc leaded") (path /5A3B356D/5A3F3D11) (fp_text reference U11 (at -1.27 -6.4) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value ispMACH4A (at -1.27 19.1) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at -1.27 6.35) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 10.58 -5.5) (end -0.27 -5.5) (layer F.SilkS) (width 0.12)) (fp_line (start 10.58 18.2) (end 10.58 -5.5) (layer F.SilkS) (width 0.12)) (fp_line (start -13.12 18.2) (end 10.58 18.2) (layer F.SilkS) (width 0.12)) (fp_line (start -13.12 -4.5) (end -13.12 18.2) (layer F.SilkS) (width 0.12)) (fp_line (start -12.12 -5.5) (end -13.12 -4.5) (layer F.SilkS) (width 0.12)) (fp_line (start -2.27 -5.5) (end -12.12 -5.5) (layer F.SilkS) (width 0.12)) (fp_line (start -1.27 -4.4) (end -0.77 -5.4) (layer F.Fab) (width 0.1)) (fp_line (start -1.77 -5.4) (end -1.27 -4.4) (layer F.Fab) (width 0.1)) (fp_line (start 7.94 -2.86) (end -10.48 -2.86) (layer F.Fab) (width 0.1)) (fp_line (start 7.94 15.56) (end 7.94 -2.86) (layer F.Fab) (width 0.1)) (fp_line (start -10.48 15.56) (end 7.94 15.56) (layer F.Fab) (width 0.1)) (fp_line (start -10.48 -2.86) (end -10.48 15.56) (layer F.Fab) (width 0.1)) (fp_line (start 10.98 -5.9) (end -13.52 -5.9) (layer F.CrtYd) (width 0.05)) (fp_line (start 10.98 18.6) (end 10.98 -5.9) (layer F.CrtYd) (width 0.05)) (fp_line (start -13.52 18.6) (end 10.98 18.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -13.52 -5.9) (end -13.52 18.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 10.48 -5.4) (end -12.02 -5.4) (layer F.Fab) (width 0.1)) (fp_line (start 10.48 18.1) (end 10.48 -5.4) (layer F.Fab) (width 0.1)) (fp_line (start -13.02 18.1) (end 10.48 18.1) (layer F.Fab) (width 0.1)) (fp_line (start -13.02 -4.4) (end -13.02 18.1) (layer F.Fab) (width 0.1)) (fp_line (start -12.02 -5.4) (end -13.02 -4.4) (layer F.Fab) (width 0.1)) (pad 37 thru_hole circle (at 7.62 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 120 "/Glue and control logic/~RTCSEL")) (pad 35 thru_hole circle (at 7.62 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 61 "/Glue and control logic/TDO")) (pad 33 thru_hole circle (at 7.62 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 78 "/Glue and control logic/VPA")) (pad 31 thru_hole circle (at 7.62 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 90 "/Glue and control logic/A15")) (pad 29 thru_hole circle (at 7.62 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 85 "/Glue and control logic/A14")) (pad 38 thru_hole circle (at 5.08 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 138 "/Glue and control logic/~IOSEL3")) (pad 36 thru_hole circle (at 5.08 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 76 "/Glue and control logic/~RES")) (pad 34 thru_hole circle (at 5.08 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 4 GND)) (pad 32 thru_hole circle (at 5.08 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 63 "/Glue and control logic/TMS")) (pad 28 thru_hole circle (at 5.08 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 117 "/Glue and control logic/~VIA2SEL")) (pad 26 thru_hole circle (at 2.54 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 111 "/Glue and control logic/D3")) (pad 24 thru_hole circle (at 0 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 92 "/DUART and line drivers/~MWR")) (pad 22 thru_hole circle (at -2.54 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 1 VCC)) (pad 20 thru_hole circle (at -5.08 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 84 "/Glue and control logic/A12")) (pad 18 thru_hole circle (at -7.62 15.24) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 88 "/Glue and control logic/A11")) (pad 30 thru_hole circle (at 5.08 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 27 thru_hole circle (at 2.54 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 89 "/Glue and control logic/A13")) (pad 25 thru_hole circle (at 0 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 107 "/Glue and control logic/~RAM1")) (pad 23 thru_hole circle (at -2.54 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 4 GND)) (pad 21 thru_hole circle (at -5.08 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask)) (pad 19 thru_hole circle (at -7.62 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 93 "/DUART and line drivers/~MRD")) (pad 17 thru_hole circle (at -10.16 12.7) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 94 "/Glue and control logic/A16")) (pad 15 thru_hole circle (at -10.16 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 108 "/Glue and control logic/~VIA1SEL")) (pad 13 thru_hole circle (at -10.16 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 64 "/Glue and control logic/TCK")) (pad 11 thru_hole circle (at -10.16 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 136 "/Glue and control logic/CLK")) (pad 9 thru_hole circle (at -10.16 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 82 "/Glue and control logic/A8")) (pad 7 thru_hole circle (at -10.16 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 137 "/Glue and control logic/R/~W")) (pad 16 thru_hole circle (at -7.62 10.16) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 83 "/Glue and control logic/A10")) (pad 14 thru_hole circle (at -7.62 7.62) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 87 "/Glue and control logic/A9")) (pad 12 thru_hole circle (at -7.62 5.08) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 4 GND)) (pad 10 thru_hole circle (at -7.62 2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 62 "/Glue and control logic/TDI")) (pad 8 thru_hole circle (at -7.62 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 105 "/DUART and line drivers/~DUARTSEL")) (pad 40 thru_hole circle (at 5.08 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 121 "/Glue and control logic/~IOSEL2")) (pad 42 thru_hole circle (at 2.54 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 66 "/Glue and control logic/STP")) (pad 44 thru_hole circle (at 0 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 1 VCC)) (pad 6 thru_hole circle (at -7.62 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 96 "/Glue and control logic/A18")) (pad 4 thru_hole circle (at -5.08 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 112 "/Glue and control logic/D2")) (pad 2 thru_hole circle (at -2.54 -2.54) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 91 "/Glue and control logic/~RAM0")) (pad 39 thru_hole circle (at 7.62 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 106 "/Glue and control logic/~ROM")) (pad 41 thru_hole circle (at 5.08 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 113 "/Glue and control logic/D0")) (pad 43 thru_hole circle (at 2.54 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 116 "/Glue and control logic/D1")) (pad 5 thru_hole circle (at -5.08 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 77 "/Glue and control logic/VDA")) (pad 3 thru_hole circle (at -2.54 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 95 "/Glue and control logic/A17")) (pad 1 thru_hole rect (at 0 0) (size 1.75 1.75) (drill 0.95) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Housings_LCC.3dshapes/PLCC-44_THT-Socket.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Housings_DIP:DIP-28_W15.24mm_Socket (layer F.Cu) (tedit 59C78D6C) (tstamp 5CFD46DD) (at 177.8 148.336) (descr "28-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket") (tags "THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket") (path /5A3D7428/5A3D8313) (fp_text reference U12 (at 7.62 -2.33) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value DS1511Y+ (at 7.62 35.35) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 7.62 16.51) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 16.8 -1.6) (end -1.55 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 16.8 34.65) (end 16.8 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.55 34.65) (end 16.8 34.65) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.55 -1.6) (end -1.55 34.65) (layer F.CrtYd) (width 0.05)) (fp_line (start 16.57 -1.39) (end -1.33 -1.39) (layer F.SilkS) (width 0.12)) (fp_line (start 16.57 34.41) (end 16.57 -1.39) (layer F.SilkS) (width 0.12)) (fp_line (start -1.33 34.41) (end 16.57 34.41) (layer F.SilkS) (width 0.12)) (fp_line (start -1.33 -1.39) (end -1.33 34.41) (layer F.SilkS) (width 0.12)) (fp_line (start 14.08 -1.33) (end 8.62 -1.33) (layer F.SilkS) (width 0.12)) (fp_line (start 14.08 34.35) (end 14.08 -1.33) (layer F.SilkS) (width 0.12)) (fp_line (start 1.16 34.35) (end 14.08 34.35) (layer F.SilkS) (width 0.12)) (fp_line (start 1.16 -1.33) (end 1.16 34.35) (layer F.SilkS) (width 0.12)) (fp_line (start 6.62 -1.33) (end 1.16 -1.33) (layer F.SilkS) (width 0.12)) (fp_line (start 16.51 -1.33) (end -1.27 -1.33) (layer F.Fab) (width 0.1)) (fp_line (start 16.51 34.35) (end 16.51 -1.33) (layer F.Fab) (width 0.1)) (fp_line (start -1.27 34.35) (end 16.51 34.35) (layer F.Fab) (width 0.1)) (fp_line (start -1.27 -1.33) (end -1.27 34.35) (layer F.Fab) (width 0.1)) (fp_line (start 0.255 -0.27) (end 1.255 -1.27) (layer F.Fab) (width 0.1)) (fp_line (start 0.255 34.29) (end 0.255 -0.27) (layer F.Fab) (width 0.1)) (fp_line (start 14.985 34.29) (end 0.255 34.29) (layer F.Fab) (width 0.1)) (fp_line (start 14.985 -1.27) (end 14.985 34.29) (layer F.Fab) (width 0.1)) (fp_line (start 1.255 -1.27) (end 14.985 -1.27) (layer F.Fab) (width 0.1)) (fp_arc (start 7.62 -1.33) (end 6.62 -1.33) (angle -180) (layer F.SilkS) (width 0.12)) (pad 28 thru_hole oval (at 15.24 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 14 thru_hole oval (at 0 33.02) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 27 thru_hole oval (at 15.24 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 92 "/DUART and line drivers/~MWR")) (pad 13 thru_hole oval (at 0 30.48) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 128 "/DUART and line drivers/D2")) (pad 26 thru_hole oval (at 15.24 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 12 thru_hole oval (at 0 27.94) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 126 "/DUART and line drivers/D1")) (pad 25 thru_hole oval (at 15.24 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)) (pad 11 thru_hole oval (at 0 25.4) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 124 "/DUART and line drivers/D0")) (pad 24 thru_hole oval (at 15.24 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 72 "/Glue and control logic/~KS")) (pad 10 thru_hole oval (at 0 22.86) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 125 "/DUART and line drivers/A0")) (pad 23 thru_hole oval (at 15.24 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)) (pad 9 thru_hole oval (at 0 20.32) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 127 "/DUART and line drivers/A1")) (pad 22 thru_hole oval (at 15.24 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 93 "/DUART and line drivers/~MRD")) (pad 8 thru_hole oval (at 0 17.78) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 129 "/DUART and line drivers/A2")) (pad 21 thru_hole oval (at 15.24 17.78) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 7 thru_hole oval (at 0 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 131 "/DUART and line drivers/A3")) (pad 20 thru_hole oval (at 15.24 20.32) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 120 "/Glue and control logic/~RTCSEL")) (pad 6 thru_hole oval (at 0 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 80 "/MPU, ROM and RAM/A4")) (pad 19 thru_hole oval (at 15.24 22.86) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 135 "/DUART and line drivers/D7")) (pad 5 thru_hole oval (at 0 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 123 "/DUART and line drivers/~IRQ")) (pad 18 thru_hole oval (at 15.24 25.4) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 134 "/DUART and line drivers/D6")) (pad 4 thru_hole oval (at 0 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 76 "/Glue and control logic/~RES")) (pad 17 thru_hole oval (at 15.24 27.94) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 133 "/DUART and line drivers/D5")) (pad 3 thru_hole oval (at 0 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)) (pad 16 thru_hole oval (at 15.24 30.48) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 132 "/DUART and line drivers/D4")) (pad 2 thru_hole oval (at 0 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)) (pad 15 thru_hole oval (at 15.24 33.02) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 130 "/DUART and line drivers/D3")) (pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 75 "/Glue and control logic/~PWR")) (model ${KISYS3DMOD}/Housings_DIP.3dshapes/DIP-28_W15.24mm_Socket.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) (module Oscillators:Oscillator_DIP-8 (layer F.Cu) (tedit 58CD3344) (tstamp 5CFD46FF) (at 89.916 81.788 90) (descr "Oscillator, DIP8,http://cdn-reichelt.de/documents/datenblatt/B400/OSZI.pdf") (tags oscillator) (path /5952FC81/5A156C53) (fp_text reference X1 (at 8.636 -11.684 180) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value "3.6864 MHz" (at 3.81 3.74 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 3.81 -3.81 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 10.41 2.79) (end 10.41 -10.41) (layer F.CrtYd) (width 0.05)) (fp_line (start 10.41 -10.41) (end -2.79 -10.41) (layer F.CrtYd) (width 0.05)) (fp_line (start -2.79 -10.41) (end -2.79 2.79) (layer F.CrtYd) (width 0.05)) (fp_line (start -2.79 2.79) (end 10.41 2.79) (layer F.CrtYd) (width 0.05)) (fp_line (start 9.16 1.19) (end 9.16 -8.81) (layer F.Fab) (width 0.1)) (fp_line (start -1.19 -9.16) (end 8.81 -9.16) (layer F.Fab) (width 0.1)) (fp_line (start -1.54 1.54) (end -1.54 -8.81) (layer F.Fab) (width 0.1)) (fp_line (start -1.54 1.54) (end 8.81 1.54) (layer F.Fab) (width 0.1)) (fp_line (start -2.64 -9.51) (end -2.64 2.64) (layer F.SilkS) (width 0.12)) (fp_line (start 9.51 -10.26) (end -1.89 -10.26) (layer F.SilkS) (width 0.12)) (fp_line (start 10.26 1.89) (end 10.26 -9.51) (layer F.SilkS) (width 0.12)) (fp_line (start -2.64 2.64) (end 9.51 2.64) (layer F.SilkS) (width 0.12)) (fp_line (start -2.54 2.54) (end 9.51 2.54) (layer F.Fab) (width 0.1)) (fp_line (start 10.16 -9.51) (end 10.16 1.89) (layer F.Fab) (width 0.1)) (fp_line (start -1.89 -10.16) (end 9.51 -10.16) (layer F.Fab) (width 0.1)) (fp_line (start -2.54 2.54) (end -2.54 -9.51) (layer F.Fab) (width 0.1)) (fp_arc (start 8.81 1.19) (end 9.16 1.19) (angle 90) (layer F.Fab) (width 0.1)) (fp_arc (start 8.81 -8.81) (end 8.81 -9.16) (angle 90) (layer F.Fab) (width 0.1)) (fp_arc (start -1.19 -8.81) (end -1.54 -8.81) (angle 90) (layer F.Fab) (width 0.1)) (fp_arc (start 9.51 1.89) (end 10.26 1.89) (angle 90) (layer F.SilkS) (width 0.12)) (fp_arc (start 9.51 -9.51) (end 9.51 -10.26) (angle 90) (layer F.SilkS) (width 0.12)) (fp_arc (start -1.89 -9.51) (end -2.64 -9.51) (angle 90) (layer F.SilkS) (width 0.12)) (fp_arc (start 9.51 1.89) (end 10.16 1.89) (angle 90) (layer F.Fab) (width 0.1)) (fp_arc (start 9.51 -9.51) (end 9.51 -10.16) (angle 90) (layer F.Fab) (width 0.1)) (fp_arc (start -1.89 -9.51) (end -2.54 -9.51) (angle 90) (layer F.Fab) (width 0.1)) (pad 1 thru_hole rect (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)) (pad 8 thru_hole circle (at 0 -7.62 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 5 thru_hole circle (at 7.62 -7.62 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 71 "Net-(R5-Pad2)")) (pad 4 thru_hole circle (at 7.62 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (model ${KISYS3DMOD}/Oscillators.3dshapes/Oscillator_DIP-8.wrl (at (xyz 0 0 0)) (scale (xyz 0.3937 0.3937 0.3937)) (rotate (xyz 0 0 0)) ) ) (module Oscillators:Oscillator_DIP-8 (layer F.Cu) (tedit 58CD3344) (tstamp 5CFD4721) (at 109.728 124.968 90) (descr "Oscillator, DIP8,http://cdn-reichelt.de/documents/datenblatt/B400/OSZI.pdf") (tags oscillator) (path /5A3B356D/5A3B45C3) (fp_text reference X2 (at 3.81 -11.26 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 16MHz (at 3.81 3.74 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_arc (start -1.89 -9.51) (end -2.54 -9.51) (angle 90) (layer F.Fab) (width 0.1)) (fp_arc (start 9.51 -9.51) (end 9.51 -10.16) (angle 90) (layer F.Fab) (width 0.1)) (fp_arc (start 9.51 1.89) (end 10.16 1.89) (angle 90) (layer F.Fab) (width 0.1)) (fp_arc (start -1.89 -9.51) (end -2.64 -9.51) (angle 90) (layer F.SilkS) (width 0.12)) (fp_arc (start 9.51 -9.51) (end 9.51 -10.26) (angle 90) (layer F.SilkS) (width 0.12)) (fp_arc (start 9.51 1.89) (end 10.26 1.89) (angle 90) (layer F.SilkS) (width 0.12)) (fp_arc (start -1.19 -8.81) (end -1.54 -8.81) (angle 90) (layer F.Fab) (width 0.1)) (fp_arc (start 8.81 -8.81) (end 8.81 -9.16) (angle 90) (layer F.Fab) (width 0.1)) (fp_arc (start 8.81 1.19) (end 9.16 1.19) (angle 90) (layer F.Fab) (width 0.1)) (fp_line (start -2.54 2.54) (end -2.54 -9.51) (layer F.Fab) (width 0.1)) (fp_line (start -1.89 -10.16) (end 9.51 -10.16) (layer F.Fab) (width 0.1)) (fp_line (start 10.16 -9.51) (end 10.16 1.89) (layer F.Fab) (width 0.1)) (fp_line (start -2.54 2.54) (end 9.51 2.54) (layer F.Fab) (width 0.1)) (fp_line (start -2.64 2.64) (end 9.51 2.64) (layer F.SilkS) (width 0.12)) (fp_line (start 10.26 1.89) (end 10.26 -9.51) (layer F.SilkS) (width 0.12)) (fp_line (start 9.51 -10.26) (end -1.89 -10.26) (layer F.SilkS) (width 0.12)) (fp_line (start -2.64 -9.51) (end -2.64 2.64) (layer F.SilkS) (width 0.12)) (fp_line (start -1.54 1.54) (end 8.81 1.54) (layer F.Fab) (width 0.1)) (fp_line (start -1.54 1.54) (end -1.54 -8.81) (layer F.Fab) (width 0.1)) (fp_line (start -1.19 -9.16) (end 8.81 -9.16) (layer F.Fab) (width 0.1)) (fp_line (start 9.16 1.19) (end 9.16 -8.81) (layer F.Fab) (width 0.1)) (fp_line (start -2.79 2.79) (end 10.41 2.79) (layer F.CrtYd) (width 0.05)) (fp_line (start -2.79 -10.41) (end -2.79 2.79) (layer F.CrtYd) (width 0.05)) (fp_line (start 10.41 -10.41) (end -2.79 -10.41) (layer F.CrtYd) (width 0.05)) (fp_line (start 10.41 2.79) (end 10.41 -10.41) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 3.81 -3.81 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 4 thru_hole circle (at 7.62 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 4 GND)) (pad 5 thru_hole circle (at 7.62 -7.62 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 119 "Net-(U9-Pad3)")) (pad 8 thru_hole circle (at 0 -7.62 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (net 1 VCC)) (pad 1 thru_hole rect (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)) (model ${KISYS3DMOD}/Oscillators.3dshapes/Oscillator_DIP-8.wrl (at (xyz 0 0 0)) (scale (xyz 0.3937 0.3937 0.3937)) (rotate (xyz 0 0 0)) ) ) )