(kicad_pcb (version 20211014) (generator pcbnew)

  (general
    (thickness 1.6)
  )

  (paper "A4")
  (layers
    (0 "F.Cu" signal)
    (1 "In1.Cu" signal)
    (2 "In2.Cu" signal)
    (31 "B.Cu" signal)
    (32 "B.Adhes" user "B.Adhesive")
    (33 "F.Adhes" user "F.Adhesive")
    (34 "B.Paste" user)
    (35 "F.Paste" user)
    (36 "B.SilkS" user "B.Silkscreen")
    (37 "F.SilkS" user "F.Silkscreen")
    (38 "B.Mask" user)
    (39 "F.Mask" user)
    (40 "Dwgs.User" user "User.Drawings")
    (41 "Cmts.User" user "User.Comments")
    (42 "Eco1.User" user "User.Eco1")
    (43 "Eco2.User" user "User.Eco2")
    (44 "Edge.Cuts" user)
    (45 "Margin" user)
    (46 "B.CrtYd" user "B.Courtyard")
    (47 "F.CrtYd" user "F.Courtyard")
    (48 "B.Fab" user)
    (49 "F.Fab" user)
    (50 "User.1" user)
    (51 "User.2" user)
    (52 "User.3" user)
    (53 "User.4" user)
    (54 "User.5" user)
    (55 "User.6" user)
    (56 "User.7" user)
    (57 "User.8" user)
    (58 "User.9" user)
  )

  (setup
    (pad_to_mask_clearance 0)
    (pcbplotparams
      (layerselection 0x00010fc_ffffffff)
      (disableapertmacros false)
      (usegerberextensions false)
      (usegerberattributes true)
      (usegerberadvancedattributes true)
      (creategerberjobfile true)
      (svguseinch false)
      (svgprecision 6)
      (excludeedgelayer true)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (dxfpolygonmode true)
      (dxfimperialunits true)
      (dxfusepcbnewfont true)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (sketchpadsonfab false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory "")
    )
  )

  (net 0 "")
  (net 1 "N$10")
  (net 2 "N$14")
  (net 3 "START_OF_LOOP")
  (net 4 "N$45")
  (net 5 "END_OF_LOOP_BACK")
  (net 6 "N$7")
  (net 7 "N$4")
  (net 8 "N$28")
  (net 9 "BUFFCLK_BACK")
  (net 10 "CLOCK_BACK")
  (net 11 "PULSE1")
  (net 12 "PULSE2")
  (net 13 "PULSE4")
  (net 14 "PULSE3")
  (net 15 "PULSE5")
  (net 16 "PULSE6")
  (net 17 "PULSE7")
  (net 18 "PULSE8")
  (net 19 "BUFFCLK2_BACK")
  (net 20 "GATE1")
  (net 21 "GATE2")
  (net 22 "GATE3")
  (net 23 "GATE4")
  (net 24 "GATE5")
  (net 25 "GATE6")
  (net 26 "GATE7")
  (net 27 "GATE8")
  (net 28 "+9V_1")
  (net 29 "+9V_2")
  (net 30 "+12V_INLET")
  (net 31 "-12V_INLET")
  (net 32 "N$42")
  (net 33 "N$44")
  (net 34 "+12V_BACK")
  (net 35 "-12V_BACK")
  (net 36 "GND_BACK")
  (net 37 "STEP_16_BACK")
  (net 38 "STEP_12_BACK")
  (net 39 "B1_BACK")
  (net 40 "B2_BACK")
  (net 41 "B3_BACK")
  (net 42 "B4_BACK")
  (net 43 "B5_BACK")
  (net 44 "B6_BACK")
  (net 45 "B7_BACK")
  (net 46 "B8_BACK")
  (net 47 "LOOP_CTRL_BACK")
  (net 48 "N$1")
  (net 49 "N$17")
  (net 50 "NOISE_BACK")
  (net 51 "PULSE_OUT_BACK")
  (net 52 "N$2")

  (footprint "TuringBack:C050H075X075" (layer "F.Cu")
    (tedit 0) (tstamp 0aa3f04c-d90a-42fa-8d55-b9e8b8e565ef)
    (at 101.3511 113.8786)
    (descr "<b>CAPACITOR</b><p>\nHorizontal, grid 5 mm, outline 7.5 x 7.5 mm")
    (fp_text reference "+FUSE0" (at -3.302 -4.191) (layer "F.SilkS") hide
      (effects (font (size 1.143 1.143) (thickness 0.127)) (justify left bottom))
      (tstamp a474a7e5-c0b4-4e8b-ac8a-f051269a7380)
    )
    (fp_text value "+FUSE" (at -1.905 0) (layer "F.Fab")
      (effects (font (size 0.7747 0.7747) (thickness 0.1143)) (justify left))
      (tstamp 97b89786-e0b9-4a44-91b9-be56f6203975)
    )
    (fp_line (start 3.175 -1.27) (end -3.175 -1.27) (layer "F.SilkS") (width 0.1524) (tstamp 608e55ec-9eef-48c3-99b4-ce989cfa839b))
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    (fp_line (start -3.683 0.762) (end -3.302 0.762) (layer "F.SilkS") (width 0.1524) (tstamp 753f63cc-0ccd-4111-a32b-0b5751f8c5b8))
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    (fp_arc (start -3.683 -0.762) (mid -3.53421 -1.12121) (end -3.175 -1.27) (layer "F.SilkS") (width 0.1524) (tstamp 7f02424c-6114-4dae-8d6e-67df78dd2424))
    (fp_arc (start 3.175 -1.27) (mid 3.53421 -1.12121) (end 3.683 -0.762) (layer "F.SilkS") (width 0.1524) (tstamp e7621d36-5f74-4ca4-bcf6-ce865c5bcac8))
    (fp_line (start -3.302 -0.508) (end -1.778 -0.508) (layer "F.Fab") (width 0.1524) (tstamp 4310a792-0127-473b-b614-972fe271bb66))
    (fp_line (start -2.54 0) (end -2.54 -0.254) (layer "F.Fab") (width 0.508) (tstamp 5f9c44f9-8343-4bb5-8916-cb41b9c883c4))
    (fp_line (start 1.778 -0.508) (end 3.302 -0.508) (layer "F.Fab") (width 0.1524) (tstamp 6f650bcd-4044-45f0-b4ac-67abd95e3af7))
    (fp_line (start 2.54 0) (end 2.54 -0.254) (layer "F.Fab") (width 0.508) (tstamp b6ef542f-866e-4970-9d82-d2471197a52a))
    (fp_poly (pts
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        (xy -2.286 -0.127)
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        (xy -2.794 -0.508)
      ) (layer "F.Fab") (width 0) (fill solid) (tstamp 090d3faa-2343-485e-9e4c-3465b1868b10))
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        (xy 2.286 -0.508)
      ) (layer "F.Fab") (width 0) (fill solid) (tstamp 8c73c91d-4354-445f-ac6a-9325d34a9c68))
    (pad "1" thru_hole roundrect (at -2.54 0) (size 1.2192 1.2192) (drill 0.8128) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (chamfer_ratio 0.25) (chamfer top_left top_right bottom_left bottom_right)
      (net 30 "+12V_INLET") (solder_mask_margin 0.0508) (tstamp 34c1be05-6500-4069-a0aa-b4b588b6b92e))
    (pad "2" thru_hole roundrect (at 2.54 0) (size 1.2192 1.2192) (drill 0.8128) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (chamfer_ratio 0.25) (chamfer top_left top_right bottom_left bottom_right)
      (net 32 "N$42") (solder_mask_margin 0.0508) (tstamp 9546e74e-b243-448f-bc86-2db948205b82))
  )

  (footprint "TuringBack:MA03-2" (layer "F.Cu")
    (tedit 0) (tstamp 1211e591-c007-4039-a265-48099ab28e85)
    (at 128.0211 104.9886 90)
    (descr "<b>PIN HEADER</b>")
    (fp_text reference "LINK2" (at -3.81 -2.921 90) (layer "F.SilkS")
      (effects (font (size 1.143 1.143) (thickness 0.127)) (justify left bottom))
      (tstamp 9ff3b957-b0f1-4c1c-acec-cbec375ed206)
    )
    (fp_text value "" (at -1.27 4.191 90) (layer "F.Fab")
      (effects (font (size 1.143 1.143) (thickness 0.127)) (justify left bottom))
      (tstamp abbff7d0-68ba-4286-91a8-ae6e10d75203)
    )
    (fp_text user "1" (at -3.175 4.191 90) (layer "F.SilkS")
      (effects (font (size 1.143 1.143) (thickness 0.127)) (justify left bottom))
      (tstamp 4aea0f3d-229f-4f1e-bf9d-f677c15b0d0a)
    )
    (fp_text user "6" (at 4.064 -0.635 90) (layer "F.SilkS")
      (effects (font (size 1.143 1.143) (thickness 0.127)) (justify left bottom))
      (tstamp 9e2f1bd2-7632-4a96-a93f-c0fe2b3e5684)
    )
    (fp_line (start -1.905 2.54) (end -3.175 2.54) (layer "F.SilkS") (width 0.1524) (tstamp 14224151-78ba-4fe0-8942-40cf64605d37))
    (fp_line (start 3.175 -2.54) (end 3.81 -1.905) (layer "F.SilkS") (width 0.1524) (tstamp 17c64f30-fb23-49b7-b13e-7cef57e9defc))
    (fp_line (start -0.635 -2.54) (end 0.635 -2.54) (layer "F.SilkS") (width 0.1524) (tstamp 28e62ff1-b446-4e12-9f0f-b441ea9b3aaa))
    (fp_line (start -3.81 1.905) (end -3.175 2.54) (layer "F.SilkS") (width 0.1524) (tstamp 2b49e1c7-c690-4128-b856-a82ecae1cca5))
    (fp_line (start 3.81 1.905) (end 3.175 2.54) (layer "F.SilkS") (width 0.1524) (tstamp 35f7f481-cdeb-487f-b35d-b12bebda46e3))
    (fp_line (start -3.81 -1.905) (end -3.81 1.905) (layer "F.SilkS") (width 0.1524) (tstamp 41f499a6-2db8-46e7-81e3-a49948ee97aa))
    (fp_line (start 3.175 2.54) (end 1.905 2.54) (layer "F.SilkS") (width 0.1524) (tstamp 4aaa133e-74ed-4e6b-8a27-a65769566d06))
    (fp_line (start 3.81 -1.905) (end 3.81 1.905) (layer "F.SilkS") (width 0.1524) (tstamp 50327eef-51d2-4441-a6f6-7e35d8128e7c))
    (fp_line (start -0.635 2.54) (end -1.27 1.905) (layer "F.SilkS") (width 0.1524) (tstamp 57f24aa8-f51a-481b-a155-89b6d8403c53))
    (fp_line (start -1.905 -2.54) (end -1.27 -1.905) (layer "F.SilkS") (width 0.1524) (tstamp 5fbbd6a5-e840-4910-809b-3ec4934d680f))
    (fp_line (start 0.635 2.54) (end -0.635 2.54) (layer "F.SilkS") (width 0.1524) (tstamp 7ed16001-b404-4419-ad1e-b34459ae14c7))
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    (fp_line (start 1.27 1.905) (end 0.635 2.54) (layer "F.SilkS") (width 0.1524) (tstamp 8fbc947c-ad27-4e58-81c3-e06473ac10fc))
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    (fp_poly (pts
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        (xy 0.254 1.524)
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        (xy -0.254 1.016)
      ) (layer "F.Fab") (width 0) (fill solid) (tstamp 69073d23-5555-4331-8bee-67a649dd0fda))
    (fp_poly (pts
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      ) (layer "F.Fab") (width 0) (fill solid) (tstamp fb2b680d-6186-449b-aaac-67fe6a3f6c8c))
    (pad "1" thru_hole circle (at -2.54 1.27 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)
      (net 35 "-12V_BACK") (solder_mask_margin 0.0508) (tstamp 7bacff90-d4b2-4a3c-b3a9-d173cdea7447))
    (pad "2" thru_hole roundrect (at -2.54 -1.27 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (chamfer_ratio 0.25) (chamfer top_left top_right bottom_left bottom_right)
      (net 35 "-12V_BACK") (solder_mask_margin 0.0508) (tstamp 468ad5d2-75ed-4b0e-aeae-9856a0f2d2f1))
    (pad "3" thru_hole roundrect (at 0 1.27 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (chamfer_ratio 0.25) (chamfer top_left top_right bottom_left bottom_right)
      (net 36 "GND_BACK") (solder_mask_margin 0.0508) (tstamp e6d60b66-1bea-490f-876c-88cf63042e19))
    (pad "4" thru_hole roundrect (at 0 -1.27 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (chamfer_ratio 0.25) (chamfer top_left top_right bottom_left bottom_right)
      (net 36 "GND_BACK") (solder_mask_margin 0.0508) (tstamp ba9c75cd-7b72-48e8-862c-1757e703d926))
    (pad "5" thru_hole roundrect (at 2.54 1.27 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (chamfer_ratio 0.25) (chamfer top_left top_right bottom_left bottom_right)
      (net 34 "+12V_BACK") (solder_mask_margin 0.0508) (tstamp 633e476d-c2c4-4cb8-a60d-be19913b87dc))
    (pad "6" thru_hole roundrect (at 2.54 -1.27 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (chamfer_ratio 0.25) (chamfer top_left top_right bottom_left bottom_right)
      (net 34 "+12V_BACK") (solder_mask_margin 0.0508) (tstamp b935a21f-dca9-4064-b1aa-90bd5e24f1c2))
  )

  (footprint "TuringBack:C050-024X044" (layer "F.Cu")
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    (descr "<b>CAPACITOR</b><p>\ngrid 5 mm, outline 2.4 x 4.4 mm")
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      (chamfer_ratio 0.25) (chamfer top_left top_right bottom_left bottom_right)
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  )

  (footprint "TuringBack:0207_7" (layer "F.Cu")
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