time: file format elf64-x86-64 Disassembly of section .init: 0000000000400418 <_init>: 400418: 48 83 ec 08 sub $0x8,%rsp 40041c: 48 c7 c0 00 00 00 00 mov $0x0,%rax 400423: 48 85 c0 test %rax,%rax 400426: 74 02 je 40042a <_init+0x12> 400428: ff d0 callq *%rax 40042a: 48 83 c4 08 add $0x8,%rsp 40042e: c3 retq Disassembly of section .plt: 0000000000400430 <.plt>: 400430: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d9018 <_GLOBAL_OFFSET_TABLE_+0x18> 400436: 66 90 xchg %ax,%ax 400438: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d9020 <_GLOBAL_OFFSET_TABLE_+0x20> 40043e: 66 90 xchg %ax,%ax 400440: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d9028 <_GLOBAL_OFFSET_TABLE_+0x28> 400446: 66 90 xchg %ax,%ax 400448: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d9030 <_GLOBAL_OFFSET_TABLE_+0x30> 40044e: 66 90 xchg %ax,%ax 400450: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d9038 <_GLOBAL_OFFSET_TABLE_+0x38> 400456: 66 90 xchg %ax,%ax 400458: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d9040 <_GLOBAL_OFFSET_TABLE_+0x40> 40045e: 66 90 xchg %ax,%ax 400460: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d9048 <_GLOBAL_OFFSET_TABLE_+0x48> 400466: 66 90 xchg %ax,%ax 400468: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d9050 <_GLOBAL_OFFSET_TABLE_+0x50> 40046e: 66 90 xchg %ax,%ax 400470: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d9058 <_GLOBAL_OFFSET_TABLE_+0x58> 400476: 66 90 xchg %ax,%ax 400478: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d9060 <_GLOBAL_OFFSET_TABLE_+0x60> 40047e: 66 90 xchg %ax,%ax 400480: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d9068 <_GLOBAL_OFFSET_TABLE_+0x68> 400486: 66 90 xchg %ax,%ax 400488: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d9070 <_GLOBAL_OFFSET_TABLE_+0x70> 40048e: 66 90 xchg %ax,%ax 400490: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d9078 <_GLOBAL_OFFSET_TABLE_+0x78> 400496: 66 90 xchg %ax,%ax 400498: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d9080 <_GLOBAL_OFFSET_TABLE_+0x80> 40049e: 66 90 xchg %ax,%ax 4004a0: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d9088 <_GLOBAL_OFFSET_TABLE_+0x88> 4004a6: 66 90 xchg %ax,%ax 4004a8: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d9090 <_GLOBAL_OFFSET_TABLE_+0x90> 4004ae: 66 90 xchg %ax,%ax 4004b0: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d9098 <_GLOBAL_OFFSET_TABLE_+0x98> 4004b6: 66 90 xchg %ax,%ax 4004b8: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d90a0 <_GLOBAL_OFFSET_TABLE_+0xa0> 4004be: 66 90 xchg %ax,%ax 4004c0: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d90a8 <_GLOBAL_OFFSET_TABLE_+0xa8> 4004c6: 66 90 xchg %ax,%ax 4004c8: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d90b0 <_GLOBAL_OFFSET_TABLE_+0xb0> 4004ce: 66 90 xchg %ax,%ax 4004d0: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d90b8 <_GLOBAL_OFFSET_TABLE_+0xb8> 4004d6: 66 90 xchg %ax,%ax 4004d8: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d90c0 <_GLOBAL_OFFSET_TABLE_+0xc0> 4004de: 66 90 xchg %ax,%ax 4004e0: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d90c8 <_GLOBAL_OFFSET_TABLE_+0xc8> 4004e6: 66 90 xchg %ax,%ax 4004e8: ff 25 e2 8b 2d 00 jmpq *0x2d8be2(%rip) # 6d90d0 <_GLOBAL_OFFSET_TABLE_+0xd0> 4004ee: 66 90 xchg %ax,%ax Disassembly of section .text: 00000000004004f0 : 4004f0: c3 retq 00000000004004f1 <__malloc_assert.constprop.13>: 4004f1: 48 83 ec 10 sub $0x10,%rsp 4004f5: 48 8b 05 7c 9c 2d 00 mov 0x2d9c7c(%rip),%rax # 6da178 <__progname> 4004fc: 4c 8d 05 9a 08 0b 00 lea 0xb089a(%rip),%r8 # 4b0d9d <__PRETTY_FUNCTION__.10913+0x5d> 400503: 48 8d 0d 0b 3a 0c 00 lea 0xc3a0b(%rip),%rcx # 4c3f15 40050a: 41 89 f1 mov %esi,%r9d 40050d: 48 8d 35 ac 16 0b 00 lea 0xb16ac(%rip),%rsi # 4b1bc0 <__PRETTY_FUNCTION__.12394+0x375> 400514: 80 38 00 cmpb $0x0,(%rax) 400517: 57 push %rdi 400518: 41 50 push %r8 40051a: 52 push %rdx 40051b: 48 89 c2 mov %rax,%rdx 40051e: 49 0f 45 c8 cmovne %r8,%rcx 400522: 4c 8d 05 42 10 0b 00 lea 0xb1042(%rip),%r8 # 4b156b <__PRETTY_FUNCTION__.10520+0x6b> 400529: 31 ff xor %edi,%edi 40052b: 31 c0 xor %eax,%eax 40052d: e8 be f4 00 00 callq 40f9f0 <__fxprintf> 400532: 48 8b 3d 5f 92 2d 00 mov 0x2d925f(%rip),%rdi # 6d9798 <_IO_stderr> 400539: 48 83 c4 20 add $0x20,%rsp 40053d: e8 4e fa 00 00 callq 40ff90 <_IO_fflush> 400542: e8 19 d7 00 00 callq 40dc60 0000000000400547 <__gconv_release_step.part.1>: 400547: 48 8d 0d d2 48 0b 00 lea 0xb48d2(%rip),%rcx # 4b4e20 <__PRETTY_FUNCTION__.9091> 40054e: 48 8d 35 9b 48 0b 00 lea 0xb489b(%rip),%rsi # 4b4df0 <__PRETTY_FUNCTION__.8922+0x8> 400555: 48 8d 3d 9f 48 0b 00 lea 0xb489f(%rip),%rdi # 4b4dfb <__PRETTY_FUNCTION__.8922+0x13> 40055c: 48 83 ec 08 sub $0x8,%rsp 400560: ba e2 00 00 00 mov $0xe2,%edx 400565: e8 d6 15 00 00 callq 401b40 <__assert_fail> 000000000040056a : 40056a: 48 8d 35 d7 34 0c 00 lea 0xc34d7(%rip),%rsi # 4c3a48 <__PRETTY_FUNCTION__.9717+0xe8> 400571: bf 02 00 00 00 mov $0x2,%edi 400576: 48 83 ec 08 sub $0x8,%rsp 40057a: 31 c0 xor %eax,%eax 40057c: e8 ef 29 08 00 callq 482f70 <_dl_dprintf> 400581: bf 7f 00 00 00 mov $0x7f,%edi 400586: e8 05 b8 04 00 callq 44bd90 <_exit> 40058b: 0f 1f 44 00 00 nopl 0x0(%rax,%rax,1) 0000000000400590 : 400590: 48 8b 05 21 bc 2d 00 mov 0x2dbc21(%rip),%rax # 6dc1b8 400597: 48 85 c0 test %rax,%rax 40059a: 74 13 je 4005af 40059c: 48 8d 3d 69 8f 0c 00 lea 0xc8f69(%rip),%rdi # 4c950c <__sys_nerr_internal+0x4> 4005a3: b9 0e 00 00 00 mov $0xe,%ecx 4005a8: 48 89 c6 mov %rax,%rsi 4005ab: f3 a6 repz cmpsb %es:(%rdi),%ds:(%rsi) 4005ad: 75 02 jne 4005b1 4005af: f3 c3 repz retq 4005b1: 48 89 c7 mov %rax,%rdi 4005b4: e9 e7 f6 01 00 jmpq 41fca0 <__free> 4005b9: 0f 1f 80 00 00 00 00 nopl 0x0(%rax) 00000000004005c0 : 4005c0: 41 57 push %r15 4005c2: 41 56 push %r14 4005c4: 41 55 push %r13 4005c6: 41 54 push %r12 4005c8: 55 push %rbp 4005c9: 53 push %rbx 4005ca: 48 83 ec 08 sub $0x8,%rsp 4005ce: 8b 05 2c b9 2d 00 mov 0x2db92c(%rip),%eax # 6dbf00 <_dl_x86_cpu_features> 4005d4: 83 f8 01 cmp $0x1,%eax 4005d7: 0f 84 db 00 00 00 je 4006b8 4005dd: 83 f8 02 cmp $0x2,%eax 4005e0: 0f 84 10 02 00 00 je 4007f6 4005e6: 48 8b 05 63 b9 2d 00 mov 0x2db963(%rip),%rax # 6dbf50 <_dl_x86_cpu_features+0x50> 4005ed: 48 85 c0 test %rax,%rax 4005f0: 0f 84 b2 00 00 00 je 4006a8 4005f6: 31 f6 xor %esi,%esi 4005f8: 48 83 cd ff or $0xffffffffffffffff,%rbp 4005fc: 49 89 c4 mov %rax,%r12 4005ff: 4d 85 e4 test %r12,%r12 400602: 7e 2b jle 40062f 400604: 4c 89 e0 mov %r12,%rax 400607: 4c 89 25 32 9b 2d 00 mov %r12,0x2d9b32(%rip) # 6da140 <__x86_raw_data_cache_size> 40060e: 45 30 e4 xor %r12b,%r12b 400611: 48 d1 f8 sar %rax 400614: 4c 89 25 35 9b 2d 00 mov %r12,0x2d9b35(%rip) # 6da150 <__x86_data_cache_size> 40061b: 48 89 05 26 9b 2d 00 mov %rax,0x2d9b26(%rip) # 6da148 <__x86_raw_data_cache_size_half> 400622: 4c 89 e0 mov %r12,%rax 400625: 48 d1 f8 sar %rax 400628: 48 89 05 29 9b 2d 00 mov %rax,0x2d9b29(%rip) # 6da158 <__x86_data_cache_size_half> 40062f: 48 8b 05 22 b9 2d 00 mov 0x2db922(%rip),%rax # 6dbf58 <_dl_x86_cpu_features+0x58> 400636: 48 85 c0 test %rax,%rax 400639: 74 03 je 40063e 40063b: 48 89 c5 mov %rax,%rbp 40063e: 48 85 ed test %rbp,%rbp 400641: 7e 2b jle 40066e 400643: 48 89 e8 mov %rbp,%rax 400646: 48 89 2d d3 9a 2d 00 mov %rbp,0x2d9ad3(%rip) # 6da120 <__x86_raw_shared_cache_size> 40064d: 40 30 ed xor %bpl,%bpl 400650: 48 d1 f8 sar %rax 400653: 48 89 2d d6 9a 2d 00 mov %rbp,0x2d9ad6(%rip) # 6da130 <__x86_shared_cache_size> 40065a: 48 89 05 c7 9a 2d 00 mov %rax,0x2d9ac7(%rip) # 6da128 <__x86_raw_shared_cache_size_half> 400661: 48 89 e8 mov %rbp,%rax 400664: 48 d1 f8 sar %rax 400667: 48 89 05 ca 9a 2d 00 mov %rax,0x2d9aca(%rip) # 6da138 <__x86_shared_cache_size_half> 40066e: 48 8b 05 eb b8 2d 00 mov 0x2db8eb(%rip),%rax # 6dbf60 <_dl_x86_cpu_features+0x60> 400675: 48 85 c0 test %rax,%rax 400678: 75 18 jne 400692 40067a: 89 f0 mov %esi,%eax 40067c: b9 04 00 00 00 mov $0x4,%ecx 400681: 48 0f af 05 a7 9a 2d imul 0x2d9aa7(%rip),%rax # 6da130 <__x86_shared_cache_size> 400688: 00 400689: 48 8d 04 40 lea (%rax,%rax,2),%rax 40068d: 48 99 cqto 40068f: 48 f7 f9 idiv %rcx 400692: 48 89 05 a7 c2 2d 00 mov %rax,0x2dc2a7(%rip) # 6dc940 <__x86_shared_non_temporal_threshold> 400699: 48 83 c4 08 add $0x8,%rsp 40069d: 5b pop %rbx 40069e: 5d pop %rbp 40069f: 41 5c pop %r12 4006a1: 41 5d pop %r13 4006a3: 41 5e pop %r14 4006a5: 41 5f pop %r15 4006a7: c3 retq 4006a8: 48 8b 05 a9 b8 2d 00 mov 0x2db8a9(%rip),%rax # 6dbf58 <_dl_x86_cpu_features+0x58> 4006af: 31 f6 xor %esi,%esi 4006b1: 48 85 c0 test %rax,%rax 4006b4: 75 85 jne 40063b 4006b6: eb b6 jmp 40066e 4006b8: bf bc 00 00 00 mov $0xbc,%edi 4006bd: 44 8b 35 40 b8 2d 00 mov 0x2db840(%rip),%r14d # 6dbf04 <_dl_x86_cpu_features+0x4> 4006c4: e8 57 7a 04 00 callq 448120 4006c9: bf bf 00 00 00 mov $0xbf,%edi 4006ce: 49 89 c4 mov %rax,%r12 4006d1: e8 4a 7a 04 00 callq 448120 4006d6: bf c2 00 00 00 mov $0xc2,%edi 4006db: 49 89 c5 mov %rax,%r13 4006de: e8 3d 7a 04 00 callq 448120 4006e3: 48 85 c0 test %rax,%rax 4006e6: 48 89 c5 mov %rax,%rbp 4006e9: 0f 8e a1 00 00 00 jle 400790 4006ef: 45 31 c9 xor %r9d,%r9d 4006f2: 41 bf 03 00 00 00 mov $0x3,%r15d 4006f8: 8b 35 16 b8 2d 00 mov 0x2db816(%rip),%esi # 6dbf14 <_dl_x86_cpu_features+0x14> 4006fe: 81 e6 00 00 00 10 and $0x10000000,%esi 400704: 0f 84 d7 00 00 00 je 4007e1 40070a: 41 83 fe 03 cmp $0x3,%r14d 40070e: 0f 8e 8e 00 00 00 jle 4007a2 400714: 45 85 c9 test %r9d,%r9d 400717: be 03 00 00 00 mov $0x3,%esi 40071c: 0f 85 90 01 00 00 jne 4008b2 400722: 31 c9 xor %ecx,%ecx 400724: 31 ff xor %edi,%edi 400726: 41 bb 01 00 00 00 mov $0x1,%r11d 40072c: 41 ba 04 00 00 00 mov $0x4,%r10d 400732: eb 2d jmp 400761 400734: 83 f9 03 cmp $0x3,%ecx 400737: 75 1d jne 400756 400739: 40 f6 c6 02 test $0x2,%sil 40073d: 74 1f je 40075e 40073f: c1 e8 0e shr $0xe,%eax 400742: d1 ea shr %edx 400744: 83 e6 fd and $0xfffffffd,%esi 400747: 25 ff 03 00 00 and $0x3ff,%eax 40074c: 41 89 d3 mov %edx,%r11d 40074f: 41 89 c1 mov %eax,%r9d 400752: 41 83 e3 01 and $0x1,%r11d 400756: 85 f6 test %esi,%esi 400758: 0f 84 62 01 00 00 je 4008c0 40075e: 44 89 c1 mov %r8d,%ecx 400761: 44 8d 41 01 lea 0x1(%rcx),%r8d 400765: 44 89 d0 mov %r10d,%eax 400768: 0f a2 cpuid 40076a: a8 1f test $0x1f,%al 40076c: 74 3c je 4007aa 40076e: 89 c1 mov %eax,%ecx 400770: c1 e9 05 shr $0x5,%ecx 400773: 83 e1 07 and $0x7,%ecx 400776: 83 f9 02 cmp $0x2,%ecx 400779: 75 b9 jne 400734 40077b: 40 f6 c6 01 test $0x1,%sil 40077f: 74 dd je 40075e 400781: c1 e8 0e shr $0xe,%eax 400784: 83 e6 fe and $0xfffffffe,%esi 400787: 25 ff 03 00 00 and $0x3ff,%eax 40078c: 89 c7 mov %eax,%edi 40078e: eb c6 jmp 400756 400790: 4c 89 ed mov %r13,%rbp 400793: 41 83 c9 ff or $0xffffffff,%r9d 400797: 41 bf 02 00 00 00 mov $0x2,%r15d 40079d: e9 56 ff ff ff jmpq 4006f8 4007a2: 31 ff xor %edi,%edi 4007a4: 41 bb 01 00 00 00 mov $0x1,%r11d 4007aa: 0f b6 35 5d b7 2d 00 movzbl 0x2db75d(%rip),%esi # 6dbf0e <_dl_x86_cpu_features+0xe> 4007b1: 48 85 ed test %rbp,%rbp 4007b4: 7e 11 jle 4007c7 4007b6: 85 f6 test %esi,%esi 4007b8: 74 0d je 4007c7 4007ba: 48 89 e8 mov %rbp,%rax 4007bd: 89 f1 mov %esi,%ecx 4007bf: 48 99 cqto 4007c1: 48 f7 f9 idiv %rcx 4007c4: 48 89 c5 mov %rax,%rbp 4007c7: 45 84 db test %r11b,%r11b 4007ca: 75 15 jne 4007e1 4007cc: 85 ff test %edi,%edi 4007ce: 74 0e je 4007de 4007d0: 4c 89 e8 mov %r13,%rax 4007d3: 48 63 ff movslq %edi,%rdi 4007d6: 48 99 cqto 4007d8: 48 f7 ff idiv %rdi 4007db: 49 89 c5 mov %rax,%r13 4007de: 4c 01 ed add %r13,%rbp 4007e1: 48 8b 05 68 b7 2d 00 mov 0x2db768(%rip),%rax # 6dbf50 <_dl_x86_cpu_features+0x50> 4007e8: 48 85 c0 test %rax,%rax 4007eb: 0f 84 0e fe ff ff je 4005ff 4007f1: e9 06 fe ff ff jmpq 4005fc 4007f6: bf bc 00 00 00 mov $0xbc,%edi 4007fb: e8 60 74 04 00 callq 447c60 400800: bf bf 00 00 00 mov $0xbf,%edi 400805: 49 89 c4 mov %rax,%r12 400808: e8 53 74 04 00 callq 447c60 40080d: bf c2 00 00 00 mov $0xc2,%edi 400812: 48 89 c5 mov %rax,%rbp 400815: e8 46 74 04 00 callq 447c60 40081a: 49 89 c0 mov %rax,%r8 40081d: b8 00 00 00 80 mov $0x80000000,%eax 400822: 0f a2 cpuid 400824: 4d 85 c0 test %r8,%r8 400827: 89 c7 mov %eax,%edi 400829: 7e 56 jle 400881 40082b: 3d 07 00 00 80 cmp $0x80000007,%eax 400830: 76 53 jbe 400885 400832: b8 08 00 00 80 mov $0x80000008,%eax 400837: 0f a2 cpuid 400839: c1 e9 0c shr $0xc,%ecx 40083c: 89 c7 mov %eax,%edi 40083e: b8 01 00 00 00 mov $0x1,%eax 400843: 83 e1 0f and $0xf,%ecx 400846: d3 e0 shl %cl,%eax 400848: 89 c6 mov %eax,%esi 40084a: 4c 89 c0 mov %r8,%rax 40084d: 89 f1 mov %esi,%ecx 40084f: 48 99 cqto 400851: 48 f7 f9 idiv %rcx 400854: 49 89 c0 mov %rax,%r8 400857: 4c 01 c5 add %r8,%rbp 40085a: 81 ff 00 00 00 80 cmp $0x80000000,%edi 400860: 0f 86 7b ff ff ff jbe 4007e1 400866: b8 01 00 00 80 mov $0x80000001,%eax 40086b: 0f a2 cpuid 40086d: 80 e5 01 and $0x1,%ch 400870: 74 36 je 4008a8 400872: c7 05 cc c0 2d 00 ff movl $0xffffffff,0x2dc0cc(%rip) # 6dc948 <__x86_prefetchw> 400879: ff ff ff 40087c: e9 60 ff ff ff jmpq 4007e1 400881: 31 f6 xor %esi,%esi 400883: eb d5 jmp 40085a 400885: b8 01 00 00 00 mov $0x1,%eax 40088a: 0f a2 cpuid 40088c: 81 e2 00 00 00 10 and $0x10000000,%edx 400892: 89 c7 mov %eax,%edi 400894: 89 d6 mov %edx,%esi 400896: 74 bf je 400857 400898: 89 d8 mov %ebx,%eax 40089a: c1 e8 10 shr $0x10,%eax 40089d: 25 ff 00 00 00 and $0xff,%eax 4008a2: 89 c6 mov %eax,%esi 4008a4: 74 b1 je 400857 4008a6: eb a2 jmp 40084a 4008a8: 85 d2 test %edx,%edx 4008aa: 0f 89 31 ff ff ff jns 4007e1 4008b0: eb c0 jmp 400872 4008b2: be 01 00 00 00 mov $0x1,%esi 4008b7: 41 83 c9 ff or $0xffffffff,%r9d 4008bb: e9 62 fe ff ff jmpq 400722 4008c0: 41 83 fe 0a cmp $0xa,%r14d 4008c4: 0f 8e 90 00 00 00 jle 40095a 4008ca: 85 ff test %edi,%edi 4008cc: b8 01 00 00 00 mov $0x1,%eax 4008d1: 0f 9f c1 setg %cl 4008d4: 45 31 c0 xor %r8d,%r8d 4008d7: 41 83 ff 03 cmp $0x3,%r15d 4008db: 41 0f 94 c0 sete %r8b 4008df: 44 89 c2 mov %r8d,%edx 4008e2: 21 ca and %ecx,%edx 4008e4: 45 85 c9 test %r9d,%r9d 4008e7: 7f 0b jg 4008f4 4008e9: 31 c0 xor %eax,%eax 4008eb: 41 83 ff 02 cmp $0x2,%r15d 4008ef: 0f 94 c0 sete %al 4008f2: 21 c8 and %ecx,%eax 4008f4: 44 8d 04 00 lea (%rax,%rax,1),%r8d 4008f8: 41 be 0b 00 00 00 mov $0xb,%r14d 4008fe: 41 09 d0 or %edx,%r8d 400901: eb 0f jmp 400912 400903: 81 f9 00 02 00 00 cmp $0x200,%ecx 400909: 0f 84 c6 00 00 00 je 4009d5 40090f: 44 89 d6 mov %r10d,%esi 400912: 45 85 c0 test %r8d,%r8d 400915: 74 43 je 40095a 400917: 44 89 f0 mov %r14d,%eax 40091a: 89 f1 mov %esi,%ecx 40091c: 44 8d 56 01 lea 0x1(%rsi),%r10d 400920: 0f a2 cpuid 400922: 81 e1 00 ff 00 00 and $0xff00,%ecx 400928: 81 e3 ff 00 00 00 and $0xff,%ebx 40092e: 74 2a je 40095a 400930: 85 c9 test %ecx,%ecx 400932: 74 26 je 40095a 400934: 81 f9 00 01 00 00 cmp $0x100,%ecx 40093a: 75 c7 jne 400903 40093c: 41 f6 c0 01 test $0x1,%r8b 400940: 74 cd je 40090f 400942: 0f bd cf bsr %edi,%ecx 400945: 83 cf ff or $0xffffffff,%edi 400948: 83 c1 01 add $0x1,%ecx 40094b: 8d 43 ff lea -0x1(%rbx),%eax 40094e: d3 e7 shl %cl,%edi 400950: 41 83 e0 fe and $0xfffffffe,%r8d 400954: f7 d7 not %edi 400956: 21 c7 and %eax,%edi 400958: eb b5 jmp 40090f 40095a: 85 ff test %edi,%edi 40095c: 74 03 je 400961 40095e: 83 c7 01 add $0x1,%edi 400961: 45 85 c9 test %r9d,%r9d 400964: 0f 8e 9b 00 00 00 jle 400a05 40096a: 41 83 ff 02 cmp $0x2,%r15d 40096e: 41 8d 41 01 lea 0x1(%r9),%eax 400972: 74 07 je 40097b 400974: 89 c6 mov %eax,%esi 400976: e9 36 fe ff ff jmpq 4007b1 40097b: 85 ff test %edi,%edi 40097d: 8b 15 b5 b5 2d 00 mov 0x2db5b5(%rip),%edx # 6dbf38 <_dl_x86_cpu_features+0x38> 400983: 8b 05 b3 b5 2d 00 mov 0x2db5b3(%rip),%eax # 6dbf3c <_dl_x86_cpu_features+0x3c> 400989: 0f 84 95 00 00 00 je 400a24 40098f: 83 ff 02 cmp $0x2,%edi 400992: 89 fe mov %edi,%esi 400994: 0f 86 17 fe ff ff jbe 4007b1 40099a: 83 fa 06 cmp $0x6,%edx 40099d: 0f 85 0e fe ff ff jne 4007b1 4009a3: 83 e8 37 sub $0x37,%eax 4009a6: 83 f8 26 cmp $0x26,%eax 4009a9: 0f 87 02 fe ff ff ja 4007b1 4009af: 89 c1 mov %eax,%ecx 4009b1: ba 01 00 00 00 mov $0x1,%edx 4009b6: 48 b8 01 00 48 00 48 movabs $0x4800480001,%rax 4009bd: 00 00 00 4009c0: 48 d3 e2 shl %cl,%rdx 4009c3: 48 85 c2 test %rax,%rdx 4009c6: b8 02 00 00 00 mov $0x2,%eax 4009cb: 0f 44 c7 cmove %edi,%eax 4009ce: 89 c6 mov %eax,%esi 4009d0: e9 dc fd ff ff jmpq 4007b1 4009d5: 41 f6 c0 02 test $0x2,%r8b 4009d9: 0f 84 30 ff ff ff je 40090f 4009df: 83 eb 01 sub $0x1,%ebx 4009e2: 41 83 ff 02 cmp $0x2,%r15d 4009e6: 74 4c je 400a34 4009e8: 41 0f bd c9 bsr %r9d,%ecx 4009ec: 41 83 c9 ff or $0xffffffff,%r9d 4009f0: 83 c1 01 add $0x1,%ecx 4009f3: 41 d3 e1 shl %cl,%r9d 4009f6: 41 f7 d1 not %r9d 4009f9: 41 21 d9 and %ebx,%r9d 4009fc: 41 83 e0 fd and $0xfffffffd,%r8d 400a00: e9 0a ff ff ff jmpq 40090f 400a05: 41 83 ff 02 cmp $0x2,%r15d 400a09: 0f 84 6c ff ff ff je 40097b 400a0f: 31 f6 xor %esi,%esi 400a11: 45 85 c9 test %r9d,%r9d 400a14: 0f 84 ad fd ff ff je 4007c7 400a1a: 83 c8 ff or $0xffffffff,%eax 400a1d: 89 c6 mov %eax,%esi 400a1f: e9 8d fd ff ff jmpq 4007b1 400a24: 31 f6 xor %esi,%esi 400a26: 45 84 db test %r11b,%r11b 400a29: 0f 84 af fd ff ff je 4007de 400a2f: e9 ad fd ff ff jmpq 4007e1 400a34: 0f bd cf bsr %edi,%ecx 400a37: 83 cf ff or $0xffffffff,%edi 400a3a: 83 c1 01 add $0x1,%ecx 400a3d: d3 e7 shl %cl,%edi 400a3f: f7 d7 not %edi 400a41: 21 df and %ebx,%edi 400a43: eb b7 jmp 4009fc 400a45: 66 2e 0f 1f 84 00 00 nopw %cs:0x0(%rax,%rax,1) 400a4c: 00 00 00 400a4f: 90 nop 0000000000400a50 <_start>: 400a50: 31 ed xor %ebp,%ebp 400a52: 49 89 d1 mov %rdx,%r9 400a55: 5e pop %rsi 400a56: 48 89 e2 mov %rsp,%rdx 400a59: 48 83 e4 f0 and $0xfffffffffffffff0,%rsp 400a5d: 50 push %rax 400a5e: 54 push %rsp 400a5f: 49 c7 c0 90 19 40 00 mov $0x401990,%r8 400a66: 48 c7 c1 f0 18 40 00 mov $0x4018f0,%rcx 400a6d: 48 c7 c7 6d 0b 40 00 mov $0x400b6d,%rdi 400a74: 67 e8 16 04 00 00 addr32 callq 400e90 <__libc_start_main> 400a7a: f4 hlt 400a7b: 0f 1f 44 00 00 nopl 0x0(%rax,%rax,1) 0000000000400a80 <_dl_relocate_static_pie>: 400a80: f3 c3 repz retq 400a82: 66 2e 0f 1f 84 00 00 nopw %cs:0x0(%rax,%rax,1) 400a89: 00 00 00 400a8c: 0f 1f 40 00 nopl 0x0(%rax) 0000000000400a90 : 400a90: 55 push %rbp 400a91: b8 f0 ab 6d 00 mov $0x6dabf0,%eax 400a96: 48 3d f0 ab 6d 00 cmp $0x6dabf0,%rax 400a9c: 48 89 e5 mov %rsp,%rbp 400a9f: 74 17 je 400ab8 400aa1: b8 00 00 00 00 mov $0x0,%eax 400aa6: 48 85 c0 test %rax,%rax 400aa9: 74 0d je 400ab8 400aab: 5d pop %rbp 400aac: bf f0 ab 6d 00 mov $0x6dabf0,%edi 400ab1: ff e0 jmpq *%rax 400ab3: 0f 1f 44 00 00 nopl 0x0(%rax,%rax,1) 400ab8: 5d pop %rbp 400ab9: c3 retq 400aba: 66 0f 1f 44 00 00 nopw 0x0(%rax,%rax,1) 0000000000400ac0 : 400ac0: be f0 ab 6d 00 mov $0x6dabf0,%esi 400ac5: 55 push %rbp 400ac6: 48 81 ee f0 ab 6d 00 sub $0x6dabf0,%rsi 400acd: 48 89 e5 mov %rsp,%rbp 400ad0: 48 c1 fe 03 sar $0x3,%rsi 400ad4: 48 89 f0 mov %rsi,%rax 400ad7: 48 c1 e8 3f shr $0x3f,%rax 400adb: 48 01 c6 add %rax,%rsi 400ade: 48 d1 fe sar %rsi 400ae1: 74 15 je 400af8 400ae3: b8 00 00 00 00 mov $0x0,%eax 400ae8: 48 85 c0 test %rax,%rax 400aeb: 74 0b je 400af8 400aed: 5d pop %rbp 400aee: bf f0 ab 6d 00 mov $0x6dabf0,%edi 400af3: ff e0 jmpq *%rax 400af5: 0f 1f 00 nopl (%rax) 400af8: 5d pop %rbp 400af9: c3 retq 400afa: 66 0f 1f 44 00 00 nopw 0x0(%rax,%rax,1) 0000000000400b00 <__do_global_dtors_aux>: 400b00: 80 3d f9 a7 2d 00 00 cmpb $0x0,0x2da7f9(%rip) # 6db300 400b07: 75 27 jne 400b30 <__do_global_dtors_aux+0x30> 400b09: 55 push %rbp 400b0a: 48 89 e5 mov %rsp,%rbp 400b0d: e8 7e ff ff ff callq 400a90 400b12: b8 90 de 4a 00 mov $0x4ade90,%eax 400b17: 48 85 c0 test %rax,%rax 400b1a: 74 0a je 400b26 <__do_global_dtors_aux+0x26> 400b1c: bf b8 ac 4c 00 mov $0x4cacb8,%edi 400b21: e8 6a d3 0a 00 callq 4ade90 <__deregister_frame_info> 400b26: c6 05 d3 a7 2d 00 01 movb $0x1,0x2da7d3(%rip) # 6db300 400b2d: 5d pop %rbp 400b2e: c3 retq 400b2f: 90 nop 400b30: f3 c3 repz retq 400b32: 0f 1f 40 00 nopl 0x0(%rax) 400b36: 66 2e 0f 1f 84 00 00 nopw %cs:0x0(%rax,%rax,1) 400b3d: 00 00 00 0000000000400b40 : 400b40: b8 50 dc 4a 00 mov $0x4adc50,%eax 400b45: 48 85 c0 test %rax,%rax 400b48: 74 1e je 400b68 400b4a: 55 push %rbp 400b4b: be 20 b3 6d 00 mov $0x6db320,%esi 400b50: bf b8 ac 4c 00 mov $0x4cacb8,%edi 400b55: 48 89 e5 mov %rsp,%rbp 400b58: e8 f3 d0 0a 00 callq 4adc50 <__register_frame_info> 400b5d: 5d pop %rbp 400b5e: e9 5d ff ff ff jmpq 400ac0 400b63: 0f 1f 44 00 00 nopl 0x0(%rax,%rax,1) 400b68: e9 53 ff ff ff jmpq 400ac0 0000000000400b6d
: 400b6d: 55 push %rbp 400b6e: 48 89 e5 mov %rsp,%rbp 400b71: 48 83 ec 20 sub $0x20,%rsp 400b75: 64 48 8b 04 25 28 00 mov %fs:0x28,%rax 400b7c: 00 00 400b7e: 48 89 45 f8 mov %rax,-0x8(%rbp) 400b82: 31 c0 xor %eax,%eax 400b84: bf 00 00 00 00 mov $0x0,%edi 400b89: e8 62 80 04 00 callq 448bf0