(kicad_pcb (version 20170920) (host pcbnew no-vcs-found-df472e6~60~ubuntu16.04.1)

  (general
    (thickness 0.8)
    (drawings 20)
    (tracks 142)
    (zones 0)
    (modules 14)
    (nets 21)
  )

  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )

  (setup
    (last_trace_width 0.25)
    (user_trace_width 0.25)
    (user_trace_width 0.5)
    (user_trace_width 1)
    (user_trace_width 2)
    (trace_clearance 0.12)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.1524)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 0.33 2.29)
    (pad_drill 0)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 0 0)
    (visible_elements 7FFFFF7F)
    (pcbplotparams
      (layerselection 0x010f0_80000001)
      (usegerberextensions true)
      (usegerberattributes true)
      (usegerberadvancedattributes true)
      (creategerberjobfile true)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue false)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory gerbers/))
  )

  (net 0 "")
  (net 1 /supply/VIN)
  (net 2 GND)
  (net 3 "Net-(C2-Pad2)")
  (net 4 /supply/VOUT)
  (net 5 "Net-(D1-Pad2)")
  (net 6 "Net-(L1-Pad1)")
  (net 7 "Net-(P1-PadA2)")
  (net 8 "Net-(P1-PadA3)")
  (net 9 "Net-(P1-PadA5)")
  (net 10 "Net-(P1-PadA6)")
  (net 11 "Net-(P1-PadA8)")
  (net 12 "Net-(P1-PadA10)")
  (net 13 "Net-(P1-PadA11)")
  (net 14 "Net-(P1-PadB2)")
  (net 15 "Net-(P1-PadB3)")
  (net 16 "Net-(P1-PadB5)")
  (net 17 "Net-(P1-PadB8)")
  (net 18 "Net-(P1-PadB10)")
  (net 19 "Net-(P1-PadB11)")
  (net 20 "Net-(C1-Pad1)")

  (net_class Default "This is the default net class."
    (clearance 0.12)
    (trace_width 0.25)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net /supply/VIN)
    (add_net GND)
    (add_net "Net-(C1-Pad1)")
    (add_net "Net-(C2-Pad2)")
    (add_net "Net-(D1-Pad2)")
    (add_net "Net-(L1-Pad1)")
    (add_net "Net-(P1-PadA10)")
    (add_net "Net-(P1-PadA11)")
    (add_net "Net-(P1-PadA2)")
    (add_net "Net-(P1-PadA3)")
    (add_net "Net-(P1-PadA5)")
    (add_net "Net-(P1-PadA6)")
    (add_net "Net-(P1-PadA8)")
    (add_net "Net-(P1-PadB10)")
    (add_net "Net-(P1-PadB11)")
    (add_net "Net-(P1-PadB2)")
    (add_net "Net-(P1-PadB3)")
    (add_net "Net-(P1-PadB5)")
    (add_net "Net-(P1-PadB8)")
  )

  (net_class power ""
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net /supply/VOUT)
  )

  (module Capacitors_SMD:C_0805 (layer F.Cu) (tedit 59D30A3D) (tstamp 59B1A1C2)
    (at 151.4 101.6)
    (descr "Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0805")
    (path /59AF0EB0/59B1980A)
    (attr smd)
    (fp_text reference C1 (at 0 1.6) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value 10uF (at 0.1 1.4) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text user %R (at 0 0) (layer F.Fab)
      (effects (font (size 0.5 0.5) (thickness 0.075)))
    )
    (fp_line (start -1 0.62) (end -1 -0.62) (layer F.Fab) (width 0.1))
    (fp_line (start 1 0.62) (end -1 0.62) (layer F.Fab) (width 0.1))
    (fp_line (start 1 -0.62) (end 1 0.62) (layer F.Fab) (width 0.1))
    (fp_line (start -1 -0.62) (end 1 -0.62) (layer F.Fab) (width 0.1))
    (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.12))
    (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.75 -0.88) (end 1.75 -0.88) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.75 -0.88) (end -1.75 0.87) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.75 0.87) (end 1.75 -0.88) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.75 0.87) (end -1.75 0.87) (layer F.CrtYd) (width 0.05))
    (pad 1 smd rect (at -1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)
      (net 20 "Net-(C1-Pad1)"))
    (pad 2 smd rect (at 1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (model Capacitors_SMD.3dshapes/C_0805.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 59D30A13) (tstamp 59B1A1D3)
    (at 149.6 108.4)
    (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0603")
    (path /59AF0EB0/59B1998D)
    (attr smd)
    (fp_text reference C2 (at 0 -1.5) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value 1nF (at 0 -1.1) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start 1.4 0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.4 0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.4 -0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.4 -0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05))
    (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12))
    (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12))
    (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
    (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
    (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
    (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
    (fp_text user %R (at 0 0) (layer F.Fab)
      (effects (font (size 0.3 0.3) (thickness 0.075)))
    )
    (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(C2-Pad2)"))
    (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 4 /supply/VOUT))
    (model Capacitors_SMD.3dshapes/C_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module Capacitors_SMD:C_0805 (layer F.Cu) (tedit 59D30A4A) (tstamp 59B1A1E4)
    (at 155.4 101.6 180)
    (descr "Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0805")
    (path /59AF0EB0/59B199F3)
    (attr smd)
    (fp_text reference C3 (at 0 -1.6 180) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value 10uF (at 0 1.75 180) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text user %R (at 0 0 180) (layer F.Fab)
      (effects (font (size 0.5 0.5) (thickness 0.075)))
    )
    (fp_line (start -1 0.62) (end -1 -0.62) (layer F.Fab) (width 0.1))
    (fp_line (start 1 0.62) (end -1 0.62) (layer F.Fab) (width 0.1))
    (fp_line (start 1 -0.62) (end 1 0.62) (layer F.Fab) (width 0.1))
    (fp_line (start -1 -0.62) (end 1 -0.62) (layer F.Fab) (width 0.1))
    (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.12))
    (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.75 -0.88) (end 1.75 -0.88) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.75 -0.88) (end -1.75 0.87) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.75 0.87) (end 1.75 -0.88) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.75 0.87) (end -1.75 0.87) (layer F.CrtYd) (width 0.05))
    (pad 1 smd rect (at -1 0 180) (size 1 1.25) (layers F.Cu F.Paste F.Mask)
      (net 4 /supply/VOUT))
    (pad 2 smd rect (at 1 0 180) (size 1 1.25) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (model Capacitors_SMD.3dshapes/C_0805.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module LEDs:LED_Cree-XB (layer F.Cu) (tedit 59D30A0C) (tstamp 59B1A1FA)
    (at 166 110.9 90)
    (descr http://www.cree.com/~/media/Files/Cree/LED-Components-and-Modules/XLamp/Data-and-Binning/XLampXBD.pdf)
    (tags "LED Cree XB")
    (path /59AEF847)
    (attr smd)
    (fp_text reference D1 (at 0 -2.25 90) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value LED_ALT (at 0 2.25 90) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start 1.4 1.4) (end -1.4 1.4) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.4 -1.4) (end 1.4 1.4) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.4 -1.4) (end 1.4 -1.4) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.4 1.4) (end -1.4 -1.4) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.35 1.35) (end -1.35 0.6) (layer F.SilkS) (width 0.12))
    (fp_line (start 0.5 1.35) (end -1.35 1.35) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.35 -1.35) (end -1.35 -0.6) (layer F.SilkS) (width 0.12))
    (fp_line (start 0.5 -1.35) (end -1.35 -1.35) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.15 1.15) (end -1.15 -1.15) (layer F.Fab) (width 0.1))
    (fp_line (start 1.15 1.15) (end -1.15 1.15) (layer F.Fab) (width 0.1))
    (fp_line (start 1.15 -1.15) (end 1.15 1.15) (layer F.Fab) (width 0.1))
    (fp_line (start -1.15 -1.15) (end 1.15 -1.15) (layer F.Fab) (width 0.1))
    (fp_text user %R (at 0 0 90) (layer F.Fab)
      (effects (font (size 0.5 0.5) (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.98 0 90) (size 0.33 2.29) (layers F.Cu F.Paste F.Mask)
      (net 5 "Net-(D1-Pad2)"))
    (pad 1 smd rect (at -0.98 0 90) (size 0.33 2.29) (layers F.Cu F.Paste F.Mask)
      (net 2 GND) (zone_connect 2))
    (pad 3 smd rect (at 0 0 90) (size 0.92 2.29) (layers F.Cu F.Mask))
    (pad 3 smd rect (at 0 -0.55 90) (size 0.85 0.85) (layers F.Paste))
    (pad 3 smd rect (at 0 0.55 90) (size 0.85 0.85) (layers F.Paste))
    (model ${KISYS3DMOD}/LEDs.3dshapes/LED_Cree-XB.wrl
      (at (xyz 0 0 0))
      (scale (xyz 0.39 0.39 0.39))
      (rotate (xyz 0 0 0))
    )
  )

  (module Inductors_SMD:L_1812 (layer F.Cu) (tedit 59D309FC) (tstamp 59B1A20B)
    (at 159.3 103.9 90)
    (descr "Resistor SMD 1812, flow soldering, Panasonic (see ERJ12)")
    (tags "resistor 1812")
    (path /59AF0EB0/59B1986B)
    (attr smd)
    (fp_text reference L1 (at 0 2.8 90) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value 10uH (at 0 3.17 90) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text user %R (at 0 0 90) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start -2.25 1.6) (end -2.25 -1.6) (layer F.Fab) (width 0.1))
    (fp_line (start 2.25 1.6) (end -2.25 1.6) (layer F.Fab) (width 0.1))
    (fp_line (start 2.25 -1.6) (end 2.25 1.6) (layer F.Fab) (width 0.1))
    (fp_line (start -2.25 -1.6) (end 2.25 -1.6) (layer F.Fab) (width 0.1))
    (fp_line (start -3.51 -2.24) (end 3.51 -2.24) (layer F.CrtYd) (width 0.05))
    (fp_line (start 3.51 -2.24) (end 3.51 2.24) (layer F.CrtYd) (width 0.05))
    (fp_line (start 3.51 2.24) (end -3.51 2.24) (layer F.CrtYd) (width 0.05))
    (fp_line (start -3.51 2.24) (end -3.51 -2.24) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.73 1.88) (end 1.73 1.88) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.73 -1.88) (end 1.73 -1.88) (layer F.SilkS) (width 0.12))
    (pad 1 smd rect (at -2.44 0 90) (size 1.6 3.5) (layers F.Cu F.Paste F.Mask)
      (net 6 "Net-(L1-Pad1)"))
    (pad 2 smd rect (at 2.44 0 90) (size 1.6 3.5) (layers F.Cu F.Paste F.Mask)
      (net 4 /supply/VOUT))
    (model ${KISYS3DMOD}/Inductors_SMD.3dshapes/L_1812.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module Resistors_SMD:R_1210 (layer F.Cu) (tedit 59D30A01) (tstamp 59B1A247)
    (at 166 104 270)
    (descr "Resistor SMD 1210, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 1210")
    (path /59AF08DA)
    (attr smd)
    (fp_text reference R1 (at 0 -2.25 270) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value 1R (at 0 2.4 270) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text user %R (at 0 0 270) (layer F.Fab)
      (effects (font (size 0.7 0.7) (thickness 0.105)))
    )
    (fp_line (start -1.6 1.25) (end -1.6 -1.25) (layer F.Fab) (width 0.1))
    (fp_line (start 1.6 1.25) (end -1.6 1.25) (layer F.Fab) (width 0.1))
    (fp_line (start 1.6 -1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1))
    (fp_line (start -1.6 -1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1))
    (fp_line (start 1 1.48) (end -1 1.48) (layer F.SilkS) (width 0.12))
    (fp_line (start -1 -1.48) (end 1 -1.48) (layer F.SilkS) (width 0.12))
    (fp_line (start -2.15 -1.5) (end 2.15 -1.5) (layer F.CrtYd) (width 0.05))
    (fp_line (start -2.15 -1.5) (end -2.15 1.5) (layer F.CrtYd) (width 0.05))
    (fp_line (start 2.15 1.5) (end 2.15 -1.5) (layer F.CrtYd) (width 0.05))
    (fp_line (start 2.15 1.5) (end -2.15 1.5) (layer F.CrtYd) (width 0.05))
    (pad 1 smd rect (at -1.45 0 270) (size 0.9 2.5) (layers F.Cu F.Paste F.Mask)
      (net 4 /supply/VOUT))
    (pad 2 smd rect (at 1.45 0 270) (size 0.9 2.5) (layers F.Cu F.Paste F.Mask)
      (net 5 "Net-(D1-Pad2)"))
    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_1210.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module Resistors_SMD:R_0603 (layer F.Cu) (tedit 59D30A17) (tstamp 59B1A258)
    (at 149.6 110.1)
    (descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 0603")
    (path /59AF0EB0/59B198DA)
    (attr smd)
    (fp_text reference R2 (at 0.1 1.6) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value 432k (at -0.4 1.2) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text user %R (at 0 0) (layer F.Fab)
      (effects (font (size 0.4 0.4) (thickness 0.075)))
    )
    (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
    (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
    (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
    (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
    (fp_line (start 0.5 0.68) (end -0.5 0.68) (layer F.SilkS) (width 0.12))
    (fp_line (start -0.5 -0.68) (end 0.5 -0.68) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.25 -0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.25 -0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.25 0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.25 0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05))
    (pad 1 smd rect (at -0.75 0) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
      (net 4 /supply/VOUT))
    (pad 2 smd rect (at 0.75 0) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(C2-Pad2)"))
    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module Resistors_SMD:R_0603 (layer F.Cu) (tedit 59D30A1A) (tstamp 59B1A269)
    (at 153 110)
    (descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 0603")
    (path /59AF0EB0/59B1995B)
    (attr smd)
    (fp_text reference R3 (at 0 1.7) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value 100k (at 0.3 1.3) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text user %R (at 0 0) (layer F.Fab)
      (effects (font (size 0.4 0.4) (thickness 0.075)))
    )
    (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
    (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
    (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
    (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
    (fp_line (start 0.5 0.68) (end -0.5 0.68) (layer F.SilkS) (width 0.12))
    (fp_line (start -0.5 -0.68) (end 0.5 -0.68) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.25 -0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.25 -0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.25 0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.25 0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05))
    (pad 1 smd rect (at -0.75 0) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(C2-Pad2)"))
    (pad 2 smd rect (at 0.75 0) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module TO_SOT_Packages_SMD:SOT-23-5 (layer F.Cu) (tedit 59D309DB) (tstamp 59B1A27E)
    (at 153.3 105.8 180)
    (descr "5-pin SOT23 package")
    (tags SOT-23-5)
    (path /59AF0EB0/59B19714)
    (attr smd)
    (fp_text reference U1 (at 0 -2.4 180) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value NCP1529 (at 0 2.9 180) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text user %R (at 0 0 270) (layer F.Fab)
      (effects (font (size 0.5 0.5) (thickness 0.075)))
    )
    (fp_line (start -0.9 1.61) (end 0.9 1.61) (layer F.SilkS) (width 0.12))
    (fp_line (start 0.9 -1.61) (end -1.55 -1.61) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.9 -1.8) (end 1.9 -1.8) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.9 -1.8) (end 1.9 1.8) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.9 1.8) (end -1.9 1.8) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.9 1.8) (end -1.9 -1.8) (layer F.CrtYd) (width 0.05))
    (fp_line (start -0.9 -0.9) (end -0.25 -1.55) (layer F.Fab) (width 0.1))
    (fp_line (start 0.9 -1.55) (end -0.25 -1.55) (layer F.Fab) (width 0.1))
    (fp_line (start -0.9 -0.9) (end -0.9 1.55) (layer F.Fab) (width 0.1))
    (fp_line (start 0.9 1.55) (end -0.9 1.55) (layer F.Fab) (width 0.1))
    (fp_line (start 0.9 -1.55) (end 0.9 1.55) (layer F.Fab) (width 0.1))
    (pad 1 smd rect (at -1.1 -0.95 180) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
      (net 20 "Net-(C1-Pad1)"))
    (pad 2 smd rect (at -1.1 0 180) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 3 smd rect (at -1.1 0.95 180) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
      (net 6 "Net-(L1-Pad1)"))
    (pad 4 smd rect (at 1.1 0.95 180) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
      (net 20 "Net-(C1-Pad1)"))
    (pad 5 smd rect (at 1.1 -0.95 180) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(C2-Pad2)"))
    (model ${KISYS3DMOD}/TO_SOT_Packages_SMD.3dshapes/SOT-23-5.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module Connectors_USB:USB_C_Plug_Molex_105444 (layer F.Cu) (tedit 59D30A61) (tstamp 59B8281F)
    (at 143.96 102.95 90)
    (descr "Universal Serial Bus (USB) Shielded I/O Plug, Type C, Right Angle, Surface Mount, http://www.molex.com/pdm_docs/sd/1054440001_sd.pdf")
    (tags "USB Type-C Plug Edge Mount")
    (path /59B19F80)
    (attr smd)
    (fp_text reference P1 (at 0 2.04 90) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value USB_C_Plug (at 0 -1.96 90) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text user %R (at 0 0.04 90) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.1)))
    )
    (fp_line (start -4.3 1.96) (end -4.3 -1.46) (layer F.CrtYd) (width 0.05))
    (fp_text user "PCB Edge" (at 0 -0.96 90) (layer Dwgs.User)
      (effects (font (size 0.5 0.5) (thickness 0.08)))
    )
    (fp_line (start 3.35 0) (end 4.3 0) (layer F.Fab) (width 0.1))
    (fp_line (start 3.05 -0.66) (end 3.05 -0.3) (layer F.Fab) (width 0.1))
    (fp_arc (start 2.75 -0.66) (end 2.75 -0.96) (angle 90) (layer F.Fab) (width 0.1))
    (fp_line (start -2.75 -0.96) (end 2.75 -0.96) (layer F.Fab) (width 0.1))
    (fp_arc (start -2.75 -0.66) (end -3.05 -0.66) (angle 90) (layer F.Fab) (width 0.1))
    (fp_arc (start 3.35 -0.3) (end 3.35 0) (angle 90) (layer F.Fab) (width 0.1))
    (fp_line (start -3.05 -0.66) (end -3.05 -0.3) (layer F.Fab) (width 0.1))
    (fp_arc (start -3.35 -0.3) (end -3.05 -0.3) (angle 90) (layer F.Fab) (width 0.1))
    (fp_line (start -3.35 0) (end -4.3 0) (layer F.Fab) (width 0.1))
    (fp_line (start 4.3 1.96) (end 4.3 -1.46) (layer F.CrtYd) (width 0.05))
    (fp_line (start 4.3 -1.46) (end -4.3 -1.46) (layer F.CrtYd) (width 0.05))
    (fp_line (start 4.3 1.96) (end -4.3 1.96) (layer F.CrtYd) (width 0.05))
    (pad A1 smd rect (at -2.75 0.04 90) (size 0.38 1) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad A2 smd rect (at -2.25 0.04 90) (size 0.38 1) (layers F.Cu F.Paste F.Mask)
      (net 7 "Net-(P1-PadA2)"))
    (pad A3 smd rect (at -1.75 0.04 90) (size 0.38 1) (layers F.Cu F.Paste F.Mask)
      (net 8 "Net-(P1-PadA3)"))
    (pad A4 smd rect (at -1.25 0.04 90) (size 0.38 1) (layers F.Cu F.Paste F.Mask)
      (net 1 /supply/VIN))
    (pad A5 smd rect (at -0.75 0.04 90) (size 0.38 1) (layers F.Cu F.Paste F.Mask)
      (net 9 "Net-(P1-PadA5)"))
    (pad A6 smd rect (at -0.25 0.04 90) (size 0.38 1) (layers F.Cu F.Paste F.Mask)
      (net 10 "Net-(P1-PadA6)"))
    (pad A7 smd rect (at 0.25 0.04 90) (size 0.38 1) (layers F.Cu F.Paste F.Mask)
      (net 10 "Net-(P1-PadA6)"))
    (pad A8 smd rect (at 0.75 0.04 90) (size 0.38 1) (layers F.Cu F.Paste F.Mask)
      (net 11 "Net-(P1-PadA8)"))
    (pad A9 smd rect (at 1.25 0.04 90) (size 0.38 1) (layers F.Cu F.Paste F.Mask)
      (net 1 /supply/VIN))
    (pad A10 smd rect (at 1.75 0.04 90) (size 0.38 1) (layers F.Cu F.Paste F.Mask)
      (net 12 "Net-(P1-PadA10)"))
    (pad A11 smd rect (at 2.25 0.04 90) (size 0.38 1) (layers F.Cu F.Paste F.Mask)
      (net 13 "Net-(P1-PadA11)"))
    (pad A12 smd rect (at 2.75 0.04 90) (size 0.38 1) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad S1 smd rect (at -3.42 0.88 90) (size 0.7 1.15) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad S1 smd rect (at 3.42 0.88 90) (size 0.7 1.15) (layers B.Cu B.Paste B.Mask)
      (net 2 GND))
    (pad B1 smd rect (at 2.75 0.04 90) (size 0.38 1) (layers B.Cu B.Paste B.Mask)
      (net 2 GND))
    (pad B2 smd rect (at 2.25 0.04 90) (size 0.38 1) (layers B.Cu B.Paste B.Mask)
      (net 14 "Net-(P1-PadB2)"))
    (pad B3 smd rect (at 1.75 0.04 90) (size 0.38 1) (layers B.Cu B.Paste B.Mask)
      (net 15 "Net-(P1-PadB3)"))
    (pad B4 smd rect (at 1.25 0.04 90) (size 0.38 1) (layers B.Cu B.Paste B.Mask)
      (net 1 /supply/VIN))
    (pad B5 smd rect (at 0.75 0.04 90) (size 0.38 1) (layers B.Cu B.Paste B.Mask)
      (net 16 "Net-(P1-PadB5)"))
    (pad B8 smd rect (at -0.75 0.04 90) (size 0.38 1) (layers B.Cu B.Paste B.Mask)
      (net 17 "Net-(P1-PadB8)"))
    (pad B9 smd rect (at -1.25 0.04 90) (size 0.38 1) (layers B.Cu B.Paste B.Mask)
      (net 1 /supply/VIN))
    (pad B10 smd rect (at -1.75 0.04 90) (size 0.38 1) (layers B.Cu B.Paste B.Mask)
      (net 18 "Net-(P1-PadB10)"))
    (pad B11 smd rect (at -2.25 0.04 90) (size 0.38 1) (layers B.Cu B.Paste B.Mask)
      (net 19 "Net-(P1-PadB11)"))
    (pad B12 smd rect (at -2.75 0.04 90) (size 0.38 1) (layers B.Cu B.Paste B.Mask)
      (net 2 GND))
    (model ${KISYS3DMOD}/Connectors_USB.3dshapes/USB_C_Plug_Molex_105444.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module Resistors_SMD:R_0805 (layer F.Cu) (tedit 59D30A2F) (tstamp 59BA7CC6)
    (at 148 101.6 180)
    (descr "Resistor SMD 0805, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 0805")
    (path /59AF0EB0/59BA7D61)
    (attr smd)
    (fp_text reference F1 (at 0 -1.65 180) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value "FUSE 1A" (at 0 1.75 180) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text user %R (at 0 0 180) (layer F.Fab)
      (effects (font (size 0.5 0.5) (thickness 0.075)))
    )
    (fp_line (start -1 0.62) (end -1 -0.62) (layer F.Fab) (width 0.1))
    (fp_line (start 1 0.62) (end -1 0.62) (layer F.Fab) (width 0.1))
    (fp_line (start 1 -0.62) (end 1 0.62) (layer F.Fab) (width 0.1))
    (fp_line (start -1 -0.62) (end 1 -0.62) (layer F.Fab) (width 0.1))
    (fp_line (start 0.6 0.88) (end -0.6 0.88) (layer F.SilkS) (width 0.12))
    (fp_line (start -0.6 -0.88) (end 0.6 -0.88) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.55 -0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.55 -0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.55 0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.55 0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
    (pad 1 smd rect (at -0.95 0 180) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
      (net 20 "Net-(C1-Pad1)"))
    (pad 2 smd rect (at 0.95 0 180) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
      (net 1 /supply/VIN))
    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module curso:logo_UTN (layer B.Cu) (tedit 0) (tstamp 59BA80B5)
    (at 157.2 104.6 70)
    (fp_text reference G*** (at 0 0 70) (layer B.SilkS) hide
      (effects (font (thickness 0.3)) (justify mirror))
    )
    (fp_text value LOGO (at 0.75 0 70) (layer B.SilkS) hide
      (effects (font (thickness 0.3)) (justify mirror))
    )
    (fp_poly (pts (xy -2.929136 5.592234) (xy -2.924521 5.495071) (xy -2.912221 5.37546) (xy -2.893717 5.243555)
      (xy -2.870489 5.10951) (xy -2.844014 4.983482) (xy -2.834989 4.946064) (xy -2.762919 4.710161)
      (xy -2.665651 4.47124) (xy -2.547948 4.238954) (xy -2.41457 4.02296) (xy -2.309227 3.880097)
      (xy -2.161672 3.712226) (xy -1.992175 3.547789) (xy -1.808531 3.393167) (xy -1.618538 3.254742)
      (xy -1.42999 3.138895) (xy -1.35639 3.100142) (xy -1.280525 3.063723) (xy -1.200518 3.027711)
      (xy -1.1235 2.995049) (xy -1.056601 2.968674) (xy -1.00695 2.951526) (xy -0.983479 2.9464)
      (xy -0.979839 2.9585) (xy -0.976637 2.995465) (xy -0.97386 3.058288) (xy -0.971495 3.147967)
      (xy -0.969527 3.265496) (xy -0.967945 3.41187) (xy -0.966735 3.588086) (xy -0.965882 3.795138)
      (xy -0.965375 4.034023) (xy -0.9652 4.305735) (xy -0.9652 5.6896) (xy 0.948267 5.6896)
      (xy 0.948267 2.959662) (xy 0.994833 2.970401) (xy 1.042062 2.986506) (xy 1.111889 3.017)
      (xy 1.198045 3.058563) (xy 1.294262 3.107874) (xy 1.394269 3.161612) (xy 1.491798 3.216456)
      (xy 1.580581 3.269087) (xy 1.654347 3.316183) (xy 1.6764 3.331413) (xy 1.791315 3.420387)
      (xy 1.915916 3.529442) (xy 2.043151 3.651423) (xy 2.165967 3.779172) (xy 2.277314 3.905534)
      (xy 2.370139 4.02335) (xy 2.400089 4.065868) (xy 2.562422 4.332298) (xy 2.692818 4.60496)
      (xy 2.793136 4.88791) (xy 2.818433 4.9784) (xy 2.840107 5.071888) (xy 2.861296 5.182618)
      (xy 2.880561 5.300871) (xy 2.896464 5.416927) (xy 2.907566 5.521069) (xy 2.91243 5.603577)
      (xy 2.912533 5.614267) (xy 2.912533 5.6896) (xy 4.7752 5.6896) (xy 4.7752 5.59213)
      (xy 4.773193 5.536801) (xy 4.767729 5.458352) (xy 4.759645 5.367256) (xy 4.749851 5.27463)
      (xy 4.685554 4.850986) (xy 4.592329 4.443975) (xy 4.47043 4.054085) (xy 4.320112 3.681803)
      (xy 4.141631 3.327618) (xy 3.935242 2.992017) (xy 3.7012 2.675488) (xy 3.43976 2.378518)
      (xy 3.151177 2.101595) (xy 3.039533 2.005941) (xy 2.779495 1.808263) (xy 2.493568 1.624679)
      (xy 2.187864 1.458193) (xy 1.868494 1.311811) (xy 1.541569 1.188537) (xy 1.213201 1.091375)
      (xy 1.145697 1.074821) (xy 0.948267 1.028171) (xy 0.948267 0.9144) (xy 4.7752 0.9144)
      (xy 4.7752 -0.931333) (xy 0.948267 -0.931333) (xy 0.948267 -0.990277) (xy 0.952397 -1.031768)
      (xy 0.970191 -1.051963) (xy 0.994833 -1.059849) (xy 1.382622 -1.160944) (xy 1.744814 -1.281961)
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      (xy -2.929467 5.6896) (xy -2.929136 5.592234)) (layer B.SilkS) (width 0.01))
  )

  (module curso:logo_PALTATECH (layer B.Cu) (tedit 0) (tstamp 59BA8290)
    (at 149 101.4 70)
    (fp_text reference G*** (at 0 0 70) (layer B.SilkS) hide
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  )

  (module Symbols:KiCad-Logo_6mm_SilkScreen (layer F.Cu) (tedit 0) (tstamp 59BA8331)
    (at 153.1 97)
    (descr "KiCad Logo")
    (tags "Logo KiCad")
    (attr virtual)
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