# # ARM CMSIS-DAP compliant adapter # # http://www.keil.com/support/man/docs/dapdebug/ # interface cmsis-dap # Optionally specify the serial number of CMSIS-DAP usb device. #cmsis_dap_serial 02200201E6661E601B98E3B9 telnet_port 4444 gdb_port 0 tcl_port 0 set WORKAREASIZE 0x2000 #source [find target/cortex_m.cfg] # script for cortex_m family # # stm32 devices support SWD transports only. # #source [find target/swj-dp.tcl] # ARM Debug Interface V5 (ADI_V5) utility # ... Mostly for SWJ-DP (not SW-DP or JTAG-DP, since # SW-DP and JTAG-DP targets don't need to switch based # on which transport is active. # # declare a JTAG or SWD Debug Access Point (DAP) # based on the transport in use with this session. # You can't access JTAG ops when SWD is active, etc. # params are currently what "jtag newtap" uses # because OpenOCD internals are still strongly biased # to JTAG .... but for SWD, "irlen" etc are ignored, # and the internals work differently # for now, ignore non-JTAG and non-SWD transports # (e.g. initial flash programming via SPI or UART) # split out "chip" and "tag" so we can someday handle # them more uniformly irlen too...) if [catch {transport select}] { echo "Info : session transport was not selected, defaulting to JTAG" transport select jtag } proc swj_newdap {chip tag args} { if [using_hla] { eval hla newtap $chip $tag $args } elseif [using_jtag] { eval jtag newtap $chip $tag $args } elseif [using_swd] { eval swd newdap $chip $tag $args } elseif [string equal [transport select] "cmsis-dap"] { eval cmsis-dap newdap $chip $tag $args } } if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { set _CHIPNAME cortex_m } if { [info exists ENDIAN] } { set _ENDIAN $ENDIAN } else { set _ENDIAN little } # Work-area is a space in RAM used for flash programming # By default use 4kB if { [info exists WORKAREASIZE] } { set _WORKAREASIZE $WORKAREASIZE } else { set _WORKAREASIZE 0x1000 } #jtag scan chain if { [info exists CPUTAPID] } { set _CPUTAPID $CPUTAPID } else { set _CPUTAPID 0x0bb11477 } swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 #flash size will be probed set _FLASHNAME $_CHIPNAME.flash flash bank $_FLASHNAME msp432p4 0x00 0 0 0 $_TARGETNAME # adapter speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz adapter_khz 1000 adapter_nsrst_delay 100 cortex_m reset_config sysresetreq # use hardware reset, connect under reset #reset_config srst_only srst_nogate