FTDI BLK REG GRN RH028.1 Feb 2016 Wifi TFT 1.44 Richard Hawthorn richardhawthorn.com >NAME >VALUE >NAME >VALUE Surface Mount USB Mini-B Connector >NAME >VALUE <h3>SparkFun Electronics' preferred foot prints</h3> In this library you'll find non-functional items- supply symbols, logos, notations, frame blocks, etc.<br><br> We've spent an enormous amount of time creating and checking these footprints and parts, but it is the end user's responsibility to ensure correctness and suitablity for a given componet or application. If you enjoy using this library, please buy one of our products at www.sparkfun.com. <br><br> <b>Licensing:</b> CC v3.0 Share-Alike You are welcome to use this library for commercial purposes. For attribution, we ask that when you begin to sell your device using our footprint, you email us with a link to the product being sold. We want bragging rights that we helped (in a very small part) to create your 8th world wonder. We would like the opportunity to feature your device on our homepage. <b>Pin Header Connectors</b><p> <author>Created by librarian@cadsoft.de</author> <b>PIN HEADER</b> >NAME >VALUE <b>Burr-Brown Components</b><p> <author>Created by librarian@cadsoft.de</author> <b>Smal Outline Transistor</b> >NAME >VALUE <b>Diptronics THMD & SMD tact switches</b> <p><ul> <li>DTS-3: 3.5x6mm THMD tact switch <li>DTS-6, DTS-64: 6x6mm THMD tact switch <li>DTSM-3: 3.5x6mm SMD tact switch <li>DTSM-6, DTSM-64: 6x6mm SMD tact switch </ul></p> <p><b>Doublecheck before using!</b></p> >VALUE >NAME <b>ESP8266-12E with additional I/O and GPIO04/05 corrected</b><p> The author cannot warrant that this library is free from error or will meet your specific requirements.<p> <author>Created by PuceBaboon.com. Komagane, Nagano, JAPAN</author> >NAME ESP-12E <b>Pin Headers</b><p> Naming:<p> MA = male<p> # contacts - # rows<p> W = angled<p> <author>Created by librarian@cadsoft.de</author> <b>PIN HEADER</b> >NAME >VALUE <b>CAPACITOR</b><p> chip >NAME >VALUE <b>Small Shrink Outline Package</b> >NAME >VALUE <b>CAPACITOR</b><p> chip >NAME >VALUE >NAME >VALUE <b>EAGLE Design Rules</b> <p> Die Standard-Design-Rules sind so gewählt, dass sie für die meisten Anwendungen passen. Sollte ihre Platine besondere Anforderungen haben, treffen Sie die erforderlichen Einstellungen hier und speichern die Design Rules unter einem neuen Namen ab. <b>EAGLE Design Rules</b> <p> The default Design Rules have been set to cover a wide range of applications. Your particular design may have different requirements, so please make the necessary adjustments and save your customized design rules under a new name. <b>Seeed Studio EAGLE Design Rules</b> Since Version 6.2.2 text objects can contain more than one line, which will not be processed correctly with this version.