微處理器 - Altera 10M02SCM (STEP-MAX10 V1) - 如何讓openFPGALoader支援STEP-MAX10開發板燒錄

參考資訊：
https://github.com/trabucayre/openFPGALoader

diff --git a/doc/FPGAs.yml b/doc/FPGAs.yml
index 5dde97c..8582f8a 100644
--- a/doc/FPGAs.yml
+++ b/doc/FPGAs.yml
@@ -136,7 +136,7 @@ Intel:
     Flash: OK
 
   - Description: Max 10
-    Model: 10M08
+    Model: 10M02, 10M08
     URL: https://www.intel.fr/content/www/fr/fr/products/details/fpga/max/10.html
     Memory: SVF
     Flash: POF
diff --git a/doc/boards.yml b/doc/boards.yml
index 1da46b6..00ff2ec 100644
--- a/doc/boards.yml
+++ b/doc/boards.yml
@@ -995,3 +995,10 @@
   FPGA: Titanium Ti180J484 (and others)
   Memory: OK
   Flash: NA
+
+- ID: step-max10_v1
+  Description: STEP MAX10 V1
+  URL: https://wiki.stepfpga.com/step-max10
+  FPGA: Altera 10M02SCM153C8G
+  Memory: OK
+  Flash: NA
diff --git a/src/board.hpp b/src/board.hpp
index 04763f5..1f3cb52 100644
--- a/src/board.hpp
+++ b/src/board.hpp
@@ -253,7 +253,8 @@ static std::map <std::string, target_board_t> board_list = {
        JTAG_BOARD("zybo_z7_10",      "xc7z010clg400",  "digilent", 0, 0, CABLE_DEFAULT),
        JTAG_BOARD("zybo_z7_20",      "xc7z020clg400",  "digilent", 0, 0, CABLE_DEFAULT),
        JTAG_BOARD("mini_itx",        "xc7z100ffg900", "jtag-smt2-nc", 0, 0, CABLE_DEFAULT),
-       JTAG_BOARD("vmm3",            "xc7s50csga324", "ft2232", 0, 0, CABLE_DEFAULT)
+       JTAG_BOARD("vmm3",            "xc7s50csga324", "ft2232", 0, 0, CABLE_DEFAULT),
+       JTAG_BOARD("step-max10_v1",   "10m02scm153c8g", "usb-blaster",0, 0, CABLE_DEFAULT)
 };
 
 #endif