(kicad_pcb (version 4) (host pcbnew "(2015-07-01 BZR 5850)-product")

  (general
    (links 16)
    (no_connects 0)
    (area 24.099499 13.775 64.708334 36.550001)
    (thickness 1.6)
    (drawings 14)
    (tracks 66)
    (zones 0)
    (modules 2)
    (nets 17)
  )

  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )

  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (segment_width 0.05)
    (edge_width 0.05)
    (via_size 0.6)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.15)
    (pcb_text_size 1 1)
    (mod_edge_width 0.05)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.5 1.5)
    (pad_drill 0.6)
    (pad_to_mask_clearance 0)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x00130_80000001)
      (usegerberextensions false)
      (excludeedgelayer false)
      (linewidth 0.101600)
      (plotframeref true)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 4)
      (mirror false)
      (drillshape 2)
      (scaleselection 1)
      (outputdirectory soic2dip_pdf/))
  )

  (net 0 "")
  (net 1 /GND)
  (net 2 /SDI)
  (net 3 /CLK)
  (net 4 /LE-DM1)
  (net 5 /OUT0)
  (net 6 /OUT1)
  (net 7 /OUT2)
  (net 8 /OUT3)
  (net 9 /OUT4)
  (net 10 /OUT5)
  (net 11 /OUT6)
  (net 12 /OUT7)
  (net 13 /OE-DM2)
  (net 14 /SD0)
  (net 15 /R_EXT)
  (net 16 /VCC)

  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
  )

  (net_class 0.50 ""
    (clearance 0.2)
    (trace_width 0.5)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net /CLK)
    (add_net /GND)
    (add_net /LE-DM1)
    (add_net /OE-DM2)
    (add_net /OUT0)
    (add_net /OUT1)
    (add_net /OUT2)
    (add_net /OUT3)
    (add_net /OUT4)
    (add_net /OUT5)
    (add_net /OUT6)
    (add_net /OUT7)
    (add_net /R_EXT)
    (add_net /SD0)
    (add_net /SDI)
    (add_net /VCC)
  )

  (module soic2dip_libs:SOIC-16_3.9x9.9mm_Pitch1.27mm (layer F.Cu) (tedit 55B8C955) (tstamp 55B9B489)
    (at 39 27 90)
    (descr "16-Lead Plastic Small Outline (SL) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SOIC 1.27")
    (path /55B8BE11)
    (attr smd)
    (fp_text reference U1 (at 0 -6.25 180) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value STP8DP05 (at -1 -1.25 180) (layer F.SilkS) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start -3.7 -5.25) (end -3.7 5.25) (layer F.CrtYd) (width 0.05))
    (fp_line (start 3.7 -5.25) (end 3.7 5.25) (layer F.CrtYd) (width 0.05))
    (fp_line (start -3.7 -5.25) (end 3.7 -5.25) (layer F.CrtYd) (width 0.05))
    (fp_line (start -3.7 5.25) (end 3.7 5.25) (layer F.CrtYd) (width 0.05))
    (fp_line (start -2.075 -5.075) (end -2.075 -4.97) (layer F.SilkS) (width 0.15))
    (fp_line (start 2.075 -5.075) (end 2.075 -4.97) (layer F.SilkS) (width 0.15))
    (fp_line (start 2.075 5.075) (end 2.075 4.97) (layer F.SilkS) (width 0.15))
    (fp_line (start -2.075 5.075) (end -2.075 4.97) (layer F.SilkS) (width 0.15))
    (fp_line (start -2.075 -5.075) (end 2.075 -5.075) (layer F.SilkS) (width 0.15))
    (fp_line (start -2.075 5.075) (end 2.075 5.075) (layer F.SilkS) (width 0.15))
    (fp_line (start -2.075 -4.97) (end -3.45 -4.97) (layer F.SilkS) (width 0.15))
    (pad 1 smd rect (at -2.7 -4.445 90) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 1 /GND))
    (pad 2 smd rect (at -2.7 -3.175 90) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 2 /SDI))
    (pad 3 smd rect (at -2.7 -1.905 90) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 /CLK))
    (pad 4 smd rect (at -2.7 -0.635 90) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 4 /LE-DM1))
    (pad 5 smd rect (at -2.7 0.635 90) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 5 /OUT0))
    (pad 6 smd rect (at -2.7 1.905 90) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 /OUT1))
    (pad 7 smd rect (at -2.7 3.175 90) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 7 /OUT2))
    (pad 8 smd rect (at -2.7 4.445 90) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 8 /OUT3))
    (pad 9 smd rect (at 2.7 4.445 90) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 9 /OUT4))
    (pad 10 smd rect (at 2.7 3.175 90) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 10 /OUT5))
    (pad 11 smd rect (at 2.7 1.905 90) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 11 /OUT6))
    (pad 12 smd rect (at 2.7 0.635 90) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 12 /OUT7))
    (pad 13 smd rect (at 2.7 -0.635 90) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 13 /OE-DM2))
    (pad 14 smd rect (at 2.7 -1.905 90) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 14 /SD0))
    (pad 15 smd rect (at 2.7 -3.175 90) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 15 /R_EXT))
    (pad 16 smd rect (at 2.7 -4.445 90) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 16 /VCC))
    (model Housings_SOIC/SOIC-16_3.9x9.9mm_Pitch1.27mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module soic2dip_libs:DIP-24_600_ELL (layer F.Cu) (tedit 55B8CB93) (tstamp 55B9B4AC)
    (at 41 27)
    (descr "24 pins DIL package, elliptical pads")
    (tags DIL)
    (path /55B8BE56)
    (attr smd)
    (fp_text reference U2 (at -14 0 180) (layer F.SilkS)
      (effects (font (size 1.016 1.016) (thickness 0.1524)))
    )
    (fp_text value STP16DP05 (at -11.75 5) (layer F.SilkS) hide
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    (fp_line (start 16.51 5.969) (end 16.51 -5.969) (layer F.SilkS) (width 0.381))
    (fp_line (start -16.51 -5.969) (end -16.51 5.969) (layer F.SilkS) (width 0.381))
    (fp_line (start -16.51 -1.27) (end -15.24 -1.27) (layer F.SilkS) (width 0.381))
    (fp_line (start -15.24 -1.27) (end -15.24 1.27) (layer F.SilkS) (width 0.381))
    (fp_line (start -15.24 1.27) (end -16.51 1.27) (layer F.SilkS) (width 0.381))
    (fp_line (start -16.51 -5.969) (end 16.51 -5.969) (layer F.SilkS) (width 0.381))
    (fp_line (start 16.51 5.969) (end -16.51 5.969) (layer F.SilkS) (width 0.381))
    (pad 1 thru_hole rect (at -13.97 7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS)
      (net 1 /GND))
    (pad 2 thru_hole oval (at -11.43 7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS)
      (net 2 /SDI))
    (pad 3 thru_hole oval (at -8.89 7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS)
      (net 3 /CLK))
    (pad 4 thru_hole oval (at -6.35 7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS)
      (net 4 /LE-DM1))
    (pad 5 thru_hole oval (at -3.81 7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS)
      (net 5 /OUT0))
    (pad 6 thru_hole oval (at -1.27 7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS)
      (net 6 /OUT1))
    (pad 7 thru_hole oval (at 1.27 7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS)
      (net 7 /OUT2))
    (pad 8 thru_hole oval (at 3.81 7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS)
      (net 8 /OUT3))
    (pad 9 thru_hole oval (at 6.35 7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS)
      (net 9 /OUT4))
    (pad 10 thru_hole oval (at 8.89 7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS)
      (net 10 /OUT5))
    (pad 11 thru_hole oval (at 11.43 7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS)
      (net 11 /OUT6))
    (pad 12 thru_hole oval (at 13.97 7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS)
      (net 12 /OUT7))
    (pad 13 thru_hole oval (at 13.97 -7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS))
    (pad 14 thru_hole oval (at 11.43 -7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS))
    (pad 15 thru_hole oval (at 8.89 -7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS))
    (pad 16 thru_hole oval (at 6.35 -7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS))
    (pad 17 thru_hole oval (at 3.81 -7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS))
    (pad 18 thru_hole oval (at 1.27 -7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS))
    (pad 19 thru_hole oval (at -1.27 -7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS))
    (pad 20 thru_hole oval (at -3.81 -7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS))
    (pad 21 thru_hole oval (at -6.35 -7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS)
      (net 13 /OE-DM2))
    (pad 22 thru_hole oval (at -8.89 -7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS)
      (net 14 /SD0))
    (pad 23 thru_hole oval (at -11.43 -7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS)
      (net 15 /R_EXT))
    (pad 24 thru_hole oval (at -13.97 -7.62) (size 1.4 2.1) (drill 1.02) (layers *.Cu *.Mask F.SilkS)
      (net 16 /VCC))
    (model C3Jr_v2_libs//C3Jr_v2_3D_Modules//dil_24-600_socket.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

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  (gr_text SOIC16<>DIP24 (at 50.75 27) (layer F.SilkS)
    (effects (font (size 1 1) (thickness 0.15)))
  )
  (gr_text soic2dip (at 50.75 24.5) (layer F.SilkS)
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  )
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