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pca20020.h
1 /*
2  Copyright (c) 2010 - 2017, Nordic Semiconductor ASA
3  All rights reserved.
4 
5  Redistribution and use in source and binary forms, with or without modification,
6  are permitted provided that the following conditions are met:
7 
8  1. Redistributions of source code must retain the above copyright notice, this
9  list of conditions and the following disclaimer.
10 
11  2. Redistributions in binary form, except as embedded into a Nordic
12  Semiconductor ASA integrated circuit in a product or a software update for
13  such product, must reproduce the above copyright notice, this list of
14  conditions and the following disclaimer in the documentation and/or other
15  materials provided with the distribution.
16 
17  3. Neither the name of Nordic Semiconductor ASA nor the names of its
18  contributors may be used to endorse or promote products derived from this
19  software without specific prior written permission.
20 
21  4. This software, with or without modification, must only be used with a
22  Nordic Semiconductor ASA integrated circuit.
23 
24  5. Any software provided in binary form under this license must not be reverse
25  engineered, decompiled, modified and/or disassembled.
26 
27  THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
28  OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
29  OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
30  DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
31  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
33  GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
36  OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #ifndef PCA20020_H
40 #define PCA20020_H
41 
42 #include <stdint.h>
43 #include "sdk_config.h"
44 #include "drv_ext_light.h"
45 #include "drv_ext_gpio.h"
46 #include "nrf_gpio.h"
47 
48 #define MPU9250_ADDR 0x68
49 #define LPS22HB_ADDR 0x5C
50 #define BH1745_ADDR 0x38
51 #define SX1509_ADDR 0x3E
52 #define CCS811_ADDR 0x5A
53 #define HTS221_ADDR 0x5F
54 
55 #if defined(THINGY_HW_v0_8_0)
56  #define LIS2DH12_ADDR 0x18
57 #elif defined(THINGY_HW_v0_9_0)
58  #define LIS2DH12_ADDR 0x18
59 #else
60  #define LIS2DH12_ADDR 0x19
61 #endif
62 
63 #define TWI_SENSOR_INSTANCE 0
64 
65 typedef enum
66 {
67  PIN_CLEAR,
68  PIN_SET,
69  PIN_NO_OUTPUT
70 }pin_output_state_t;
71 
72 
73 // Pin configurations used when powering down
74 // Standard output cleared
75 #define NRF_PIN_OUTPUT_CLEAR {NRF_GPIO_PIN_DIR_OUTPUT, \
76  NRF_GPIO_PIN_INPUT_DISCONNECT, \
77  NRF_GPIO_PIN_NOPULL, \
78  NRF_GPIO_PIN_S0S1, \
79  NRF_GPIO_PIN_NOSENSE, \
80  PIN_CLEAR}
81 // Standard output set
82 #define NRF_PIN_OUTPUT_SET {NRF_GPIO_PIN_DIR_OUTPUT, \
83  NRF_GPIO_PIN_INPUT_DISCONNECT, \
84  NRF_GPIO_PIN_NOPULL, \
85  NRF_GPIO_PIN_S0S1, \
86  NRF_GPIO_PIN_NOSENSE, \
87  PIN_SET}
88 // Standard input pullup
89 #define NRF_PIN_INPUT_PULLUP {NRF_GPIO_PIN_DIR_INPUT, \
90  NRF_GPIO_PIN_INPUT_CONNECT, \
91  NRF_GPIO_PIN_PULLUP, \
92  NRF_GPIO_PIN_S0S1, \
93  NRF_GPIO_PIN_NOSENSE, \
94  PIN_NO_OUTPUT}
95 // Standard input nopull
96 #define NRF_PIN_INPUT_NOPULL {NRF_GPIO_PIN_DIR_INPUT, \
97  NRF_GPIO_PIN_INPUT_CONNECT, \
98  NRF_GPIO_PIN_NOPULL, \
99  NRF_GPIO_PIN_S0S1, \
100  NRF_GPIO_PIN_NOSENSE, \
101  PIN_NO_OUTPUT}
102 // Standard input pulldown
103 #define NRF_PIN_INPUT_PULLDOWN {NRF_GPIO_PIN_DIR_INPUT, \
104  NRF_GPIO_PIN_INPUT_CONNECT, \
105  NRF_GPIO_PIN_PULLDOWN, \
106  NRF_GPIO_PIN_S0S1, \
107  NRF_GPIO_PIN_NOSENSE, \
108  PIN_NO_OUTPUT}
109 
110 #define SX_PIN_OUTPUT_CLEAR {DRV_EXT_GPIO_PIN_DIR_OUTPUT, \
111  DRV_EXT_GPIO_PIN_INPUT_BUF_ENABLED, \
112  DRV_EXT_GPIO_PIN_NOPULL, \
113  DRV_EXT_GPIO_PIN_DRIVE_PUSHPULL, \
114  DRV_EXT_GPIO_PIN_INCREASED_SLEWRATE_DISABLED, \
115  PIN_CLEAR}
116 
117 #define SX_PIN_OUTPUT_SET {DRV_EXT_GPIO_PIN_DIR_OUTPUT, \
118  DRV_EXT_GPIO_PIN_INPUT_BUF_ENABLED, \
119  DRV_EXT_GPIO_PIN_NOPULL, \
120  DRV_EXT_GPIO_PIN_DRIVE_PUSHPULL, \
121  DRV_EXT_GPIO_PIN_INCREASED_SLEWRATE_DISABLED, \
122  PIN_SET}
123 
124 #define SX_PIN_INPUT_NOPULL {DRV_EXT_GPIO_PIN_DIR_INPUT, \
125  DRV_EXT_GPIO_PIN_INPUT_BUF_ENABLED, \
126  DRV_EXT_GPIO_PIN_NOPULL, \
127  DRV_EXT_GPIO_PIN_DRIVE_PUSHPULL, \
128  DRV_EXT_GPIO_PIN_INCREASED_SLEWRATE_DISABLED, \
129  PIN_NO_OUTPUT}
130 
131 
132 typedef struct
133 {
134  nrf_gpio_pin_dir_t dir;
135  nrf_gpio_pin_input_t input;
136  nrf_gpio_pin_pull_t pull;
137  nrf_gpio_pin_drive_t drive;
138  nrf_gpio_pin_sense_t sense;
139  pin_output_state_t state;
140 }nrf_gpio_cfg_t;
141 
142 typedef struct
143 {
144  drv_ext_gpio_pin_dir_t dir;
145  drv_ext_gpio_pin_input_buf_t input_buf;
146  drv_ext_gpio_pin_pull_t pull_config;
147  drv_ext_gpio_pin_drive_type_t drive_type;
148  drv_ext_gpio_pin_slew_rate_t slew_rate;
149  pin_output_state_t state;
150 }sx_gpio_cfg_t;
151 
152 typedef enum
153 {
154  VDD_ON = true,
155  VDD_OFF = false
156 }vdd_state_t;
157 
158 // IO extender pin configuration for system off
159 #define SX_IOEXT_NUM_PINS 16
160 
161 #define SX_IOEXT_0 0
162 #define IOEXT_PIN00_SYSTEM_OFF_CFG SX_PIN_OUTPUT_CLEAR
163 
164 #define SX_IOEXT_1 1
165 #define IOEXT_PIN01_SYSTEM_OFF_CFG SX_PIN_OUTPUT_CLEAR
166 
167 #define SX_IOEXT_2 2
168 #define IOEXT_PIN02_SYSTEM_OFF_CFG SX_PIN_OUTPUT_CLEAR
169 
170 #if defined(THINGY_HW_v0_7_0)
171  #define SX_BAT_CHG_EN 3
172  #define IOEXT_PIN03_SYSTEM_OFF_CFG SX_PIN_INPUT_NOPULL
173 #elif defined(THINGY_HW_v0_8_0)
174  #define SX_BAT_CHG_EN 3
175  #define IOEXT_PIN03_SYSTEM_OFF_CFG SX_PIN_INPUT_NOPULL
176 #else
177  #define SX_IOEXT_3 3
178  #define IOEXT_PIN03_SYSTEM_OFF_CFG SX_PIN_OUTPUT_CLEAR
179 #endif
180 
181 #if defined(THINGY_HW_v0_7_0)
182  #define SX_SPK_PWR_CTRL 4
183  #define IOEXT_PIN04_SYSTEM_OFF_CFG SX_PIN_OUTPUT_CLEAR
184 #elif defined(THINGY_HW_v0_8_0)
185  #define SX_SPK_PWR_CTRL 4
186  #define IOEXT_PIN04_SYSTEM_OFF_CFG SX_PIN_OUTPUT_CLEAR
187 #else
188  #define SX_BAT_MON_EN 4
189  #define IOEXT_PIN04_SYSTEM_OFF_CFG SX_PIN_OUTPUT_CLEAR
190 #endif
191 
192 #define SX_LIGHTWELL_G 5
193 #define IOEXT_PIN05_SYSTEM_OFF_CFG SX_PIN_OUTPUT_SET
194 
195 #define SX_LIGHTWELL_B 6
196 #define IOEXT_PIN06_SYSTEM_OFF_CFG SX_PIN_OUTPUT_SET
197 
198 #define SX_LIGHTWELL_R 7
199 #define IOEXT_PIN07_SYSTEM_OFF_CFG SX_PIN_OUTPUT_SET
200 
201 #if defined(THINGY_HW_v0_7_0)
202  #define SX_MPU_PWR_CTRL 8
203  #define IOEXT_PIN08_SYSTEM_OFF_CFG SX_PIN_OUTPUT_SET
204 #elif defined(THINGY_HW_v0_8_0)
205  #define SX_MPU_PWR_CTRL 8
206  #define IOEXT_PIN08_SYSTEM_OFF_CFG SX_PIN_OUTPUT_SET
207 #elif defined(THINGY_HW_v0_9_0)
208  #define SX_MPU_PWR_CTRL 8
209  #define IOEXT_PIN08_SYSTEM_OFF_CFG SX_PIN_OUTPUT_SET
210 #else
211  #define SX_MPU_PWR_CTRL 8
212  #define IOEXT_PIN08_SYSTEM_OFF_CFG SX_PIN_OUTPUT_CLEAR
213 #endif
214 
215 #if defined(THINGY_HW_v0_7_0)
216  #define SX_MIC_PWR_CTRL 9
217  #define IOEXT_PIN09_SYSTEM_OFF_CFG SX_PIN_OUTPUT_SET
218 #elif defined(THINGY_HW_v0_8_0)
219  #define SX_MIC_PWR_CTRL 9
220  #define IOEXT_PIN09_SYSTEM_OFF_CFG SX_PIN_OUTPUT_SET
221 #elif defined(THINGY_HW_v0_9_0)
222  #define SX_MIC_PWR_CTRL 9
223  #define IOEXT_PIN09_SYSTEM_OFF_CFG SX_PIN_OUTPUT_SET
224 #else
225  #define SX_MIC_PWR_CTRL 9
226  #define IOEXT_PIN09_SYSTEM_OFF_CFG SX_PIN_OUTPUT_CLEAR
227 #endif
228 
229 #if defined(THINGY_HW_v0_7_0)
230  #define SX_CCS_PWR_CTRL 10
231  #define IOEXT_PIN10_SYSTEM_OFF_CFG SX_PIN_OUTPUT_SET
232 #elif defined(THINGY_HW_v0_8_0)
233  #define SX_CCS_PWR_CTRL 10
234  #define IOEXT_PIN10_SYSTEM_OFF_CFG SX_PIN_OUTPUT_SET
235 #elif defined(THINGY_HW_v0_9_0)
236  #define SX_CCS_PWR_CTRL 10
237  #define IOEXT_PIN10_SYSTEM_OFF_CFG SX_PIN_OUTPUT_SET
238 #else
239  #define SX_CCS_PWR_CTRL 10
240  #define IOEXT_PIN10_SYSTEM_OFF_CFG SX_PIN_OUTPUT_CLEAR
241 #endif
242 
243 #define SX_CCS_RESET 11
244 #define IOEXT_PIN11_SYSTEM_OFF_CFG SX_PIN_OUTPUT_CLEAR
245 
246 #define SX_CCS_WAKE 12
247 #define IOEXT_PIN12_SYSTEM_OFF_CFG SX_PIN_OUTPUT_CLEAR
248 
249 #define SX_SENSE_LED_R 13
250 #define IOEXT_PIN13_SYSTEM_OFF_CFG SX_PIN_OUTPUT_SET
251 
252 #define SX_SENSE_LED_G 14
253 #define IOEXT_PIN14_SYSTEM_OFF_CFG SX_PIN_OUTPUT_SET
254 
255 #define SX_SENSE_LED_B 15
256 #define IOEXT_PIN15_SYSTEM_OFF_CFG SX_PIN_OUTPUT_SET
257 
258 //const nrf_gpio_cfg_t SX_GPIO_STD_CFG[SX_IOEXT_NUM_PINS]=
259 #define IOEXT_SYSTEM_OFF_PIN_CFG \
260 { \
261  IOEXT_PIN00_SYSTEM_OFF_CFG, \
262  IOEXT_PIN01_SYSTEM_OFF_CFG, \
263  IOEXT_PIN02_SYSTEM_OFF_CFG, \
264  IOEXT_PIN03_SYSTEM_OFF_CFG, \
265  IOEXT_PIN04_SYSTEM_OFF_CFG, \
266  IOEXT_PIN05_SYSTEM_OFF_CFG, \
267  IOEXT_PIN06_SYSTEM_OFF_CFG, \
268  IOEXT_PIN07_SYSTEM_OFF_CFG, \
269  IOEXT_PIN08_SYSTEM_OFF_CFG, \
270  IOEXT_PIN09_SYSTEM_OFF_CFG, \
271  IOEXT_PIN10_SYSTEM_OFF_CFG, \
272  IOEXT_PIN11_SYSTEM_OFF_CFG, \
273  IOEXT_PIN12_SYSTEM_OFF_CFG, \
274  IOEXT_PIN13_SYSTEM_OFF_CFG, \
275  IOEXT_PIN14_SYSTEM_OFF_CFG, \
276  IOEXT_PIN15_SYSTEM_OFF_CFG \
277 };
278 
279 
280 //nRF pin configuration for system off
281 #define NRF_NUM_GPIO_PINS 32
282 
283 #define OSC_XL1 0
284 #define PIN00_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
285 
286 #define OSC_XL2 1
287 #define PIN01_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
288 
289 #define ANA_DIG0 2
290 #define PIN02_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
291 
292 #define ANA_DIG1 3
293 #define PIN03_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
294 
295 #define ANA_DIG2 4
296 #define PIN04_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
297 
298 #if defined(THINGY_HW_v0_7_0)
299  #define ANA_DIG3 5
300  #define PIN05_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
301 #elif defined(THINGY_HW_v0_8_0)
302  #define ANA_DIG3 5
303  #define PIN05_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
304 #elif defined(THINGY_HW_v0_9_0)
305  #define ANA_DIG3 5
306  #define PIN05_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
307 #else
308  #define IOEXT_OSCIO 5
309  #define PIN05_SYSTEM_OFF_CFG NRF_PIN_INPUT_PULLDOWN
310 #endif
311 
312 #define MPU_INT 6
313 #define PIN06_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
314 
315 #define TWI_SDA 7
316 #define PIN07_SYSTEM_OFF_CFG NRF_PIN_INPUT_NOPULL
317 
318 #define TWI_SCL 8
319 #define PIN08_SYSTEM_OFF_CFG NRF_PIN_INPUT_NOPULL
320 
321 #define NFC1 9
322 #define PIN09_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
323 
324 #define NFC2 10
325 #define PIN10_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
326 
327 #define BUTTON 11
328 #define PIN11_SYSTEM_OFF_CFG NRF_PIN_INPUT_PULLUP
329 
330 #define LIS_INT1 12
331 #define PIN12_SYSTEM_OFF_CFG NRF_PIN_INPUT_NOPULL
332 
333 #define USB_DETECT 13
334 #define PIN13_SYSTEM_OFF_CFG NRF_PIN_INPUT_NOPULL
335 
336 #define TWI_SDA_EXT 14
337 #define PIN14_SYSTEM_OFF_CFG NRF_PIN_INPUT_NOPULL
338 
339 #define TWI_SCL_EXT 15
340 #define PIN15_SYSTEM_OFF_CFG NRF_PIN_INPUT_NOPULL
341 
342 #define DIG0 16
343 #define PIN16_SYSTEM_OFF_CFG NRF_PIN_INPUT_NOPULL
344 
345 #define BAT_CHG_STAT 17
346 #define PIN17_SYSTEM_OFF_CFG NRF_PIN_INPUT_NOPULL
347 
348 #define MOS_1 18
349 #define PIN18_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
350 
351 #define MOS_2 19
352 #define PIN19_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
353 
354 #define MOS_3 20
355 #define PIN20_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
356 
357 #define MOS_4 21
358 #define PIN21_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
359 
360 #define CCS_INT 22
361 #define PIN22_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
362 
363 #define LPS_INT 23
364 #define PIN23_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
365 
366 #define HTS_INT 24
367 #define PIN24_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
368 
369 #define MIC_DOUT 25
370 #define PIN25_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
371 
372 #define MIC_CLK 26
373 #define PIN26_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
374 
375 #define SPEAKER 27
376 #define PIN27_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
377 
378 #define BATTERY 28
379 #define PIN28_SYSTEM_OFF_CFG NRF_PIN_INPUT_NOPULL
380 
381 #if defined(THINGY_HW_v0_7_0)
382  #define VOLUME 29
383  #define PIN29_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
384 #elif defined(THINGY_HW_v0_8_0)
385  #define VOLUME 29
386  #define PIN29_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
387 #elif defined(THINGY_HW_v0_9_0)
388  #define SPK_PWR_CTRL 29
389  #define PIN29_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
390 #else
391  #define SPK_PWR_CTRL 29
392  #define PIN29_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
393 #endif
394 
398 #define VDD_PWR_CTRL 30
399 #if defined(THINGY_HW_v0_7_0)
400  #define PIN30_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_SET
401 #elif defined(THINGY_HW_v0_8_0)
402  #define PIN30_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_SET
403 #elif defined(THINGY_HW_v0_9_0)
404  #define PIN30_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_SET
405 #else
406  #define PIN30_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
407 #endif
408 
409 #define BH_INT 31
410 #define PIN31_SYSTEM_OFF_CFG NRF_PIN_OUTPUT_CLEAR
411 
412 
413 #define NRF_SYSTEM_OFF_PIN_CFG \
414 { \
415  PIN00_SYSTEM_OFF_CFG, \
416  PIN01_SYSTEM_OFF_CFG, \
417  PIN02_SYSTEM_OFF_CFG, \
418  PIN03_SYSTEM_OFF_CFG, \
419  PIN04_SYSTEM_OFF_CFG, \
420  PIN05_SYSTEM_OFF_CFG, \
421  PIN06_SYSTEM_OFF_CFG, \
422  PIN07_SYSTEM_OFF_CFG, \
423  PIN08_SYSTEM_OFF_CFG, \
424  PIN09_SYSTEM_OFF_CFG, \
425  PIN10_SYSTEM_OFF_CFG, \
426  PIN11_SYSTEM_OFF_CFG, \
427  PIN12_SYSTEM_OFF_CFG, \
428  PIN13_SYSTEM_OFF_CFG, \
429  PIN14_SYSTEM_OFF_CFG, \
430  PIN15_SYSTEM_OFF_CFG, \
431  PIN16_SYSTEM_OFF_CFG, \
432  PIN17_SYSTEM_OFF_CFG, \
433  PIN18_SYSTEM_OFF_CFG, \
434  PIN19_SYSTEM_OFF_CFG, \
435  PIN20_SYSTEM_OFF_CFG, \
436  PIN21_SYSTEM_OFF_CFG, \
437  PIN22_SYSTEM_OFF_CFG, \
438  PIN23_SYSTEM_OFF_CFG, \
439  PIN24_SYSTEM_OFF_CFG, \
440  PIN25_SYSTEM_OFF_CFG, \
441  PIN26_SYSTEM_OFF_CFG, \
442  PIN27_SYSTEM_OFF_CFG, \
443  PIN28_SYSTEM_OFF_CFG, \
444  PIN29_SYSTEM_OFF_CFG, \
445  PIN30_SYSTEM_OFF_CFG, \
446  PIN31_SYSTEM_OFF_CFG \
447 };
448 
449 #define DRV_EXT_RGB_LED_SENSE 0
450 #define DRV_EXT_RGB_LED_LIGHTWELL 1
451 #define DRV_EXT_LIGHT_NUM 2
452 
453 #define BATT_VOLTAGE_DIVIDER_R1 1500000
454 #define BATT_VOLTAGE_DIVIDER_R2 180000
455 
456 #ifdef __GNUC__
457  #pragma GCC diagnostic push
458  #pragma GCC diagnostic ignored "-Wunused-variable"
459 #endif
460 
461 DRV_EXT_LIGHT_DEF(my_led_0);
462 DRV_EXT_LIGHT_DEF(my_led_1);
463 
464 #define DRV_EXT_LIGHT_CFG \
465 { \
466  { \
467  .type = DRV_EXT_LIGHT_TYPE_RGB, \
468  .pin.rgb = { \
469  .r = SX_SENSE_LED_R, \
470  .g = SX_SENSE_LED_G, \
471  .b = SX_SENSE_LED_B }, \
472  .p_data = &my_led_0 \
473  }, \
474  { \
475  .type = DRV_EXT_LIGHT_TYPE_RGB, \
476  .pin.rgb = { \
477  .r = SX_LIGHTWELL_R, \
478  .g = SX_LIGHTWELL_G, \
479  .b = SX_LIGHTWELL_B }, \
480  .p_data = &my_led_1 \
481  }, \
482 };
483 
484 #define BATT_MEAS_INTERVAL_MS 5000
485 #define BATT_MEAS_LOW_BATT_LIMIT_MV 3100
486 #define BATT_MEAS_FULL_BATT_LIMIT_MV 4150
487 #define BATT_MEAS_INVALID_PIN 255
488 
489 #if defined(THINGY_HW_v0_8_0)
490  #define BAT_MON_EN_PIN_USED false
491  #define BAT_MON_EN_PIN_NO BATT_MEAS_INVALID_PIN
492 #else
493  #define BAT_MON_EN_PIN_USED true
494  #define BAT_MON_EN_PIN_NO SX_BAT_MON_EN
495 #endif
496 
497 // Battery monitoring setup.
498 #define BATT_MEAS_PARAM_CFG \
499 { \
500  .batt_meas_param = { \
501  .app_timer_prescaler = APP_TIMER_PRESCALER, \
502  .adc_pin_no = BATTERY, \
503  .usb_detect_pin_no = USB_DETECT, \
504  .batt_chg_stat_pin_no = BAT_CHG_STAT, \
505  .batt_mon_en_pin_used = BAT_MON_EN_PIN_USED, \
506  .batt_mon_en_pin_no = BAT_MON_EN_PIN_NO, \
507  .batt_voltage_limit_low = BATT_MEAS_LOW_BATT_LIMIT_MV, \
508  .batt_voltage_limit_full = BATT_MEAS_FULL_BATT_LIMIT_MV, \
509  .voltage_divider = { \
510  .r_1_ohm = BATT_VOLTAGE_DIVIDER_R1, \
511  .r_2_ohm = BATT_VOLTAGE_DIVIDER_R2 }, \
512  }, \
513 };
514 
515 // Low frequency clock source to be used by the SoftDevice
516 #define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \
517  .rc_ctiv = 0, \
518  .rc_temp_ctiv = 0, \
519  .xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM}
520 
521 #endif /*PCA20020_H*/