(kicad_pcb (version 20240108) (generator "ChatGPT RevA layout skeleton") (generator_version "0.1") (general (thickness 1.0) ) (paper "A4") (layers (0 "F.Cu" signal) (1 "In1.GND" power) (2 "In2.Cu" signal) (3 "In3.PWR" power) (4 "In4.Cu" signal) (5 "B.Cu" signal) (32 "B.Adhes" user "B.Adhesive") (33 "F.Adhes" user "F.Adhesive") (34 "B.Paste" user) (35 "F.Paste" user) (36 "B.SilkS" user "B.Silkscreen") (37 "F.SilkS" user "F.Silkscreen") (38 "B.Mask" user) (39 "F.Mask" user) (44 "Edge.Cuts" user) (45 "Margin" user) (46 "B.CrtYd" user "B.Courtyard") (47 "F.CrtYd" user "F.Courtyard") (48 "B.Fab" user) (49 "F.Fab" user) (50 "User.1" user) (51 "User.2" user) (52 "User.3" user) (53 "User.4" user) (54 "User.5" user) (55 "User.6" user) (56 "User.7" user) (57 "User.8" user) (58 "User.9" user) ) (net 0 "") (net 1 "GND") (net 2 "PCIE_TX0_P_TBD") (net 3 "PCIE_TX0_N_TBD") (net 4 "PCIE_RX0_P_TBD") (net 5 "PCIE_RX0_N_TBD") (net 6 "PCIE_TX1_P_TBD") (net 7 "PCIE_TX1_N_TBD") (net 8 "PCIE_RX1_P_TBD") (net 9 "PCIE_RX1_N_TBD") (net 10 "PCIE_TX2_P_TBD") (net 11 "PCIE_TX2_N_TBD") (net 12 "PCIE_RX2_P_TBD") (net 13 "PCIE_RX2_N_TBD") (net 14 "PCIE_TX3_P_TBD") (net 15 "PCIE_TX3_N_TBD") (net 16 "PCIE_RX3_P_TBD") (net 17 "PCIE_RX3_N_TBD") (net 18 "REFCLK_P_TBD") (net 19 "REFCLK_N_TBD") (net 20 "PERST_N_TBD") (net 21 "CLKREQ_N_TBD") (net 22 "WAKE_N_TBD") (net 23 "SMB_CLK_TBD") (net 24 "SMB_DATA_TBD") (net 25 "PRSNT_DETECT_TBD") (net_class "PCIe_85R_DIFF_PLACEHOLDER" "PCIe Gen3 differential placeholder rules - verify with fabricator stackup" (clearance 0.13) (trace_width 0.12) (via_dia 0.45) (via_drill 0.2) (diff_pair_width 0.12) (diff_pair_gap 0.18) (add_net "PCIE_TX0_P_TBD") (add_net "PCIE_TX0_N_TBD") (add_net "PCIE_RX0_P_TBD") (add_net "PCIE_RX0_N_TBD") (add_net "PCIE_TX1_P_TBD") (add_net "PCIE_TX1_N_TBD") (add_net "PCIE_RX1_P_TBD") (add_net "PCIE_RX1_N_TBD") (add_net "PCIE_TX2_P_TBD") (add_net "PCIE_TX2_N_TBD") (add_net "PCIE_RX2_P_TBD") (add_net "PCIE_RX2_N_TBD") (add_net "PCIE_TX3_P_TBD") (add_net "PCIE_TX3_N_TBD") (add_net "PCIE_RX3_P_TBD") (add_net "PCIE_RX3_N_TBD") (add_net "REFCLK_P_TBD") (add_net "REFCLK_N_TBD") ) (gr_rect (start 0 0) (end 94 32) (stroke (width 0.15) (type solid)) (fill none) (layer "Edge.Cuts") (uuid "00000000-0000-4000-8000-000000009001")) (gr_line (start 84 0) (end 94 6) (stroke (width 0.15) (type dash)) (layer "Dwgs.User") (uuid "00000000-0000-4000-8000-000000009002")) (gr_text "REV A MECHANICAL/ELECTRICAL SKELETON ONLY - DO NOT FAB" (at 45 16 0) (layer "F.SilkS") (uuid "00000000-0000-4000-8000-000000009003") (effects (font (size 1.2 1.2) (thickness 0.18)))) (gr_text "MXM pinout / OCuLink footprint / HP straps TBD" (at 45 18.2 0) (layer "F.SilkS") (uuid "00000000-0000-4000-8000-000000009004") (effects (font (size 0.9 0.9) (thickness 0.14)))) (gr_text "Keepout: high-speed corridor" (at 54 9 0) (layer "Dwgs.User") (uuid "00000000-0000-4000-8000-000000009005") (effects (font (size 0.9 0.9) (thickness 0.12)))) (gr_rect (start 20 7) (end 86 23) (stroke (width 0.10) (type dash)) (fill none) (layer "Dwgs.User") (uuid "00000000-0000-4000-8000-000000009006")) (footprint "mxm_adapter:MXM3_TYPE_B_EDGE_PLACEHOLDER_DO_NOT_FAB" (layer "F.Cu") (uuid "00000000-0000-4000-8000-000000000001") (at 0 25) (property "Reference" "J1" (at 40 -2 0) (layer "F.SilkS") (uuid "00000000-0000-4000-8000-000000000002") (effects (font (size 1 1) (thickness 0.15)))) (property "Value" "MXM3_TYPE_B_EDGE_PLACEHOLDER" (at 40 5 0) (layer "F.Fab") (uuid "00000000-0000-4000-8000-000000000003") (effects (font (size 1 1) (thickness 0.15)))) (fp_text user "MXM EDGE PLACEHOLDER - PINOUT TBD - DO NOT FAB" (at 40 -4 0) (layer "F.SilkS") (uuid "00000000-0000-4000-8000-000000000004") (effects (font (size 1 1) (thickness 0.15)))) (fp_line (start 0 0) (end 84 0) (stroke (width 0.15) (type solid)) (layer "F.SilkS") (uuid "00000000-0000-4000-8000-000000000005")) (fp_line (start 0 4.5) (end 84 4.5) (stroke (width 0.15) (type solid)) (layer "F.SilkS") (uuid "00000000-0000-4000-8000-000000000006")) (pad "A20" smd roundrect (at 15.000 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 2 "PCIE_TX0_P_TBD") (uuid "00000000-0000-4000-8000-000000001020")) (pad "A21" smd roundrect (at 15.500 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 3 "PCIE_TX0_N_TBD") (uuid "00000000-0000-4000-8000-000000001021")) (pad "A22" smd roundrect (at 16.000 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 4 "PCIE_RX0_P_TBD") (uuid "00000000-0000-4000-8000-000000001022")) (pad "A23" smd roundrect (at 16.500 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 5 "PCIE_RX0_N_TBD") (uuid "00000000-0000-4000-8000-000000001023")) (pad "A24" smd roundrect (at 17.000 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 6 "PCIE_TX1_P_TBD") (uuid "00000000-0000-4000-8000-000000001024")) (pad "A25" smd roundrect (at 17.500 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 7 "PCIE_TX1_N_TBD") (uuid "00000000-0000-4000-8000-000000001025")) (pad "A26" smd roundrect (at 18.000 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 8 "PCIE_RX1_P_TBD") (uuid "00000000-0000-4000-8000-000000001026")) (pad "A27" smd roundrect (at 18.500 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 9 "PCIE_RX1_N_TBD") (uuid "00000000-0000-4000-8000-000000001027")) (pad "A28" smd roundrect (at 19.000 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 10 "PCIE_TX2_P_TBD") (uuid "00000000-0000-4000-8000-000000001028")) (pad "A29" smd roundrect (at 19.500 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 11 "PCIE_TX2_N_TBD") (uuid "00000000-0000-4000-8000-000000001029")) (pad "A30" smd roundrect (at 20.000 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 12 "PCIE_RX2_P_TBD") (uuid "00000000-0000-4000-8000-000000001030")) (pad "A31" smd roundrect (at 20.500 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 13 "PCIE_RX2_N_TBD") (uuid "00000000-0000-4000-8000-000000001031")) (pad "A32" smd roundrect (at 21.000 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 14 "PCIE_TX3_P_TBD") (uuid "00000000-0000-4000-8000-000000001032")) (pad "A33" smd roundrect (at 21.500 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 15 "PCIE_TX3_N_TBD") (uuid "00000000-0000-4000-8000-000000001033")) (pad "A34" smd roundrect (at 22.000 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 16 "PCIE_RX3_P_TBD") (uuid "00000000-0000-4000-8000-000000001034")) (pad "A35" smd roundrect (at 22.500 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 17 "PCIE_RX3_N_TBD") (uuid "00000000-0000-4000-8000-000000001035")) (pad "A36" smd roundrect (at 23.000 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 18 "REFCLK_P_TBD") (uuid "00000000-0000-4000-8000-000000001036")) (pad "A37" smd roundrect (at 23.500 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 19 "REFCLK_N_TBD") (uuid "00000000-0000-4000-8000-000000001037")) (pad "A40" smd roundrect (at 25.000 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 20 "PERST_N_TBD") (uuid "00000000-0000-4000-8000-000000001040")) (pad "A41" smd roundrect (at 25.500 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 21 "CLKREQ_N_TBD") (uuid "00000000-0000-4000-8000-000000001041")) (pad "A42" smd roundrect (at 26.000 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 22 "WAKE_N_TBD") (uuid "00000000-0000-4000-8000-000000001042")) (pad "A43" smd roundrect (at 26.500 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 23 "SMB_CLK_TBD") (uuid "00000000-0000-4000-8000-000000001043")) (pad "A44" smd roundrect (at 27.000 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 24 "SMB_DATA_TBD") (uuid "00000000-0000-4000-8000-000000001044")) (pad "A45" smd roundrect (at 27.500 2.0) (size 0.28 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 25 "PRSNT_DETECT_TBD") (uuid "00000000-0000-4000-8000-000000001045")) ) (footprint "mxm_adapter:OCULINK_4I_PLACEHOLDER_DO_NOT_FAB" (layer "F.Cu") (uuid "00000000-0000-4000-8000-000000000010") (at 88 15) (property "Reference" "J2" (at 0 -8 0) (layer "F.SilkS") (uuid "00000000-0000-4000-8000-000000000011") (effects (font (size 1 1) (thickness 0.15)))) (property "Value" "OCuLink_4i_PLACEHOLDER" (at 0 8 0) (layer "F.Fab") (uuid "00000000-0000-4000-8000-000000000012") (effects (font (size 1 1) (thickness 0.15)))) (fp_text user "OCuLink PLACEHOLDER - use vendor footprint" (at -10 0 90) (layer "F.SilkS") (uuid "00000000-0000-4000-8000-000000000013") (effects (font (size 0.8 0.8) (thickness 0.12)))) (fp_rect (start -3.5 -7) (end 3.5 7) (stroke (width 0.15) (type solid)) (fill none) (layer "F.SilkS") (uuid "00000000-0000-4000-8000-000000000014")) (pad "TX0P" smd roundrect (at 0 -5.750) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 2 "PCIE_TX0_P_TBD") (uuid "00000000-0000-4000-8000-000000003000")) (pad "TX0N" smd roundrect (at 0 -5.250) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 3 "PCIE_TX0_N_TBD") (uuid "00000000-0000-4000-8000-000000003001")) (pad "RX0P" smd roundrect (at 0 -4.750) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 4 "PCIE_RX0_P_TBD") (uuid "00000000-0000-4000-8000-000000003002")) (pad "RX0N" smd roundrect (at 0 -4.250) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 5 "PCIE_RX0_N_TBD") (uuid "00000000-0000-4000-8000-000000003003")) (pad "TX1P" smd roundrect (at 0 -3.750) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 6 "PCIE_TX1_P_TBD") (uuid "00000000-0000-4000-8000-000000003004")) (pad "TX1N" smd roundrect (at 0 -3.250) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 7 "PCIE_TX1_N_TBD") (uuid "00000000-0000-4000-8000-000000003005")) (pad "RX1P" smd roundrect (at 0 -2.750) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 8 "PCIE_RX1_P_TBD") (uuid "00000000-0000-4000-8000-000000003006")) (pad "RX1N" smd roundrect (at 0 -2.250) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 9 "PCIE_RX1_N_TBD") (uuid "00000000-0000-4000-8000-000000003007")) (pad "TX2P" smd roundrect (at 0 -1.750) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 10 "PCIE_TX2_P_TBD") (uuid "00000000-0000-4000-8000-000000003008")) (pad "TX2N" smd roundrect (at 0 -1.250) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 11 "PCIE_TX2_N_TBD") (uuid "00000000-0000-4000-8000-000000003009")) (pad "RX2P" smd roundrect (at 0 -0.750) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 12 "PCIE_RX2_P_TBD") (uuid "00000000-0000-4000-8000-000000003010")) (pad "RX2N" smd roundrect (at 0 -0.250) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 13 "PCIE_RX2_N_TBD") (uuid "00000000-0000-4000-8000-000000003011")) (pad "TX3P" smd roundrect (at 0 0.250) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 14 "PCIE_TX3_P_TBD") (uuid "00000000-0000-4000-8000-000000003012")) (pad "TX3N" smd roundrect (at 0 0.750) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 15 "PCIE_TX3_N_TBD") (uuid "00000000-0000-4000-8000-000000003013")) (pad "RX3P" smd roundrect (at 0 1.250) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 16 "PCIE_RX3_P_TBD") (uuid "00000000-0000-4000-8000-000000003014")) (pad "RX3N" smd roundrect (at 0 1.750) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 17 "PCIE_RX3_N_TBD") (uuid "00000000-0000-4000-8000-000000003015")) (pad "REFP" smd roundrect (at 0 2.250) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 18 "REFCLK_P_TBD") (uuid "00000000-0000-4000-8000-000000003016")) (pad "REFN" smd roundrect (at 0 2.750) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 19 "REFCLK_N_TBD") (uuid "00000000-0000-4000-8000-000000003017")) (pad "PERST" smd roundrect (at 0 3.250) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 20 "PERST_N_TBD") (uuid "00000000-0000-4000-8000-000000003018")) (pad "CLKREQ" smd roundrect (at 0 3.750) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 21 "CLKREQ_N_TBD") (uuid "00000000-0000-4000-8000-000000003019")) (pad "WAKE" smd roundrect (at 0 4.250) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 22 "WAKE_N_TBD") (uuid "00000000-0000-4000-8000-000000003020")) (pad "SCL" smd roundrect (at 0 4.750) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 23 "SMB_CLK_TBD") (uuid "00000000-0000-4000-8000-000000003021")) (pad "SDA" smd roundrect (at 0 5.250) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 24 "SMB_DATA_TBD") (uuid "00000000-0000-4000-8000-000000003022")) (pad "PRSNT" smd roundrect (at 0 5.750) (size 1.6 0.28) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.08) (net 25 "PRSNT_DETECT_TBD") (uuid "00000000-0000-4000-8000-000000003023")) ) (footprint "mxm_adapter:SIDEBAND_STRAP_MATRIX_0603_PLACEHOLDER" (layer "F.Cu") (uuid "00000000-0000-4000-8000-000000000020") (at 10 8) (property "Reference" "JP1" (at 1.2 -2 0) (layer "F.SilkS") (uuid "00000000-0000-4000-8000-000000000021") (effects (font (size 1 1) (thickness 0.15)))) (property "Value" "DNI_STRAPS" (at 1.2 16 0) (layer "F.Fab") (uuid "00000000-0000-4000-8000-000000000022") (effects (font (size 1 1) (thickness 0.15)))) (fp_text user "DNI sideband straps" (at 6 6 90) (layer "F.SilkS") (uuid "00000000-0000-4000-8000-000000000023") (effects (font (size 0.8 0.8) (thickness 0.12)))) (pad "PERST_N_TBD_A" smd rect (at 0 0.00) (size 1.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 20 "PERST_N_TBD") (uuid "00000000-0000-4000-8000-000000004000")) (pad "PERST_N_TBD_B" smd rect (at 2.54 0.00) (size 1.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (uuid "00000000-0000-4000-8000-000000004001")) (pad "CLKREQ_N_TBD_A" smd rect (at 0 2.54) (size 1.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 21 "CLKREQ_N_TBD") (uuid "00000000-0000-4000-8000-000000004002")) (pad "CLKREQ_N_TBD_B" smd rect (at 2.54 2.54) (size 1.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (uuid "00000000-0000-4000-8000-000000004003")) (pad "WAKE_N_TBD_A" smd rect (at 0 5.08) (size 1.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 22 "WAKE_N_TBD") (uuid "00000000-0000-4000-8000-000000004004")) (pad "WAKE_N_TBD_B" smd rect (at 2.54 5.08) (size 1.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (uuid "00000000-0000-4000-8000-000000004005")) (pad "SMB_CLK_TBD_A" smd rect (at 0 7.62) (size 1.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 23 "SMB_CLK_TBD") (uuid "00000000-0000-4000-8000-000000004006")) (pad "SMB_CLK_TBD_B" smd rect (at 2.54 7.62) (size 1.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (uuid "00000000-0000-4000-8000-000000004007")) (pad "SMB_DATA_TBD_A" smd rect (at 0 10.16) (size 1.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 24 "SMB_DATA_TBD") (uuid "00000000-0000-4000-8000-000000004008")) (pad "SMB_DATA_TBD_B" smd rect (at 2.54 10.16) (size 1.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (uuid "00000000-0000-4000-8000-000000004009")) (pad "PRSNT_DETECT_TBD_A" smd rect (at 0 12.70) (size 1.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (net 25 "PRSNT_DETECT_TBD") (uuid "00000000-0000-4000-8000-000000004010")) (pad "PRSNT_DETECT_TBD_B" smd rect (at 2.54 12.70) (size 1.3 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (uuid "00000000-0000-4000-8000-000000004011")) ) )