{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1594707503719 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 64-Bit " "Running Quartus II 64-Bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 15.0.0 Build 145 04/22/2015 SJ Full Version " "Version 15.0.0 Build 145 04/22/2015 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1594707503729 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue Jul 14 14:18:23 2020 " "Processing started: Tue Jul 14 14:18:23 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1594707503729 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1594707503729 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off SINE -c SINE " "Command: quartus_map --read_settings_files=on --write_settings_files=off SINE -c SINE" {  } {  } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1594707503729 ""}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "4 4 " "Parallel compilation is enabled and will use 4 of the 4 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Quartus II" 0 -1 1594707504149 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "cnt8.vhd 2 1 " "Found 2 design units, including 1 entities, in source file cnt8.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 CNT8-one " "Found design unit 1: CNT8-one" {  } { { "CNT8.vhd" "" { Text "E:/altera/15.0/Project/sine/CNT8.vhd" 12 -1 0 } }  } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1594707514024 ""} { "Info" "ISGN_ENTITY_NAME" "1 CNT8 " "Found entity 1: CNT8" {  } { { "CNT8.vhd" "" { Text "E:/altera/15.0/Project/sine/CNT8.vhd" 5 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1594707514024 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1594707514024 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "pll.vhd 2 1 " "Found 2 design units, including 1 entities, in source file pll.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 pll-SYN " "Found design unit 1: pll-SYN" {  } { { "PLL.vhd" "" { Text "E:/altera/15.0/Project/sine/PLL.vhd" 54 -1 0 } }  } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1594707514024 ""} { "Info" "ISGN_ENTITY_NAME" "1 PLL " "Found entity 1: PLL" {  } { { "PLL.vhd" "" { Text "E:/altera/15.0/Project/sine/PLL.vhd" 43 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1594707514024 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1594707514024 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "rom.vhd 2 1 " "Found 2 design units, including 1 entities, in source file rom.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 rom-SYN " "Found design unit 1: rom-SYN" {  } { { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 53 -1 0 } }  } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1594707514024 ""} { "Info" "ISGN_ENTITY_NAME" "1 ROM " "Found entity 1: ROM" {  } { { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 43 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1594707514024 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1594707514024 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "sine.bdf 1 1 " "Found 1 design units, including 1 entities, in source file sine.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 SINE " "Found entity 1: SINE" {  } { { "SINE.bdf" "" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { } } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1594707514024 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1594707514024 ""}
{ "Info" "ISGN_START_ELABORATION_TOP" "SINE " "Elaborating entity \"SINE\" for the top level hierarchy" {  } {  } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Quartus II" 0 -1 1594707514094 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "PLL PLL:inst2 " "Elaborating entity \"PLL\" for hierarchy \"PLL:inst2\"" {  } { { "SINE.bdf" "inst2" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 312 464 216 "inst2" "" } } } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514204 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altpll PLL:inst2\|altpll:altpll_component " "Elaborating entity \"altpll\" for hierarchy \"PLL:inst2\|altpll:altpll_component\"" {  } { { "PLL.vhd" "altpll_component" { Text "E:/altera/15.0/Project/sine/PLL.vhd" 141 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514254 ""}
{ "Info" "ISGN_ELABORATION_HEADER" "PLL:inst2\|altpll:altpll_component " "Elaborated megafunction instantiation \"PLL:inst2\|altpll:altpll_component\"" {  } { { "PLL.vhd" "" { Text "E:/altera/15.0/Project/sine/PLL.vhd" 141 0 0 } }  } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1594707514254 ""}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "PLL:inst2\|altpll:altpll_component " "Instantiated megafunction \"PLL:inst2\|altpll:altpll_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "bandwidth_type AUTO " "Parameter \"bandwidth_type\" = \"AUTO\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_divide_by 5 " "Parameter \"clk0_divide_by\" = \"5\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_duty_cycle 50 " "Parameter \"clk0_duty_cycle\" = \"50\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_multiply_by 4 " "Parameter \"clk0_multiply_by\" = \"4\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_phase_shift 0 " "Parameter \"clk0_phase_shift\" = \"0\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "compensate_clock CLK0 " "Parameter \"compensate_clock\" = \"CLK0\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "inclk0_input_frequency 40000 " "Parameter \"inclk0_input_frequency\" = \"40000\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family Cyclone IV E " "Parameter \"intended_device_family\" = \"Cyclone IV E\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_hint CBX_MODULE_PREFIX=PLL " "Parameter \"lpm_hint\" = \"CBX_MODULE_PREFIX=PLL\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altpll " "Parameter \"lpm_type\" = \"altpll\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "operation_mode NORMAL " "Parameter \"operation_mode\" = \"NORMAL\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "pll_type AUTO " "Parameter \"pll_type\" = \"AUTO\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_activeclock PORT_UNUSED " "Parameter \"port_activeclock\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_areset PORT_USED " "Parameter \"port_areset\" = \"PORT_USED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkbad0 PORT_UNUSED " "Parameter \"port_clkbad0\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkbad1 PORT_UNUSED " "Parameter \"port_clkbad1\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkloss PORT_UNUSED " "Parameter \"port_clkloss\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkswitch PORT_UNUSED " "Parameter \"port_clkswitch\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_configupdate PORT_UNUSED " "Parameter \"port_configupdate\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_fbin PORT_UNUSED " "Parameter \"port_fbin\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_inclk0 PORT_USED " "Parameter \"port_inclk0\" = \"PORT_USED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_inclk1 PORT_UNUSED " "Parameter \"port_inclk1\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_locked PORT_USED " "Parameter \"port_locked\" = \"PORT_USED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_pfdena PORT_UNUSED " "Parameter \"port_pfdena\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phasecounterselect PORT_UNUSED " "Parameter \"port_phasecounterselect\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phasedone PORT_UNUSED " "Parameter \"port_phasedone\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phasestep PORT_UNUSED " "Parameter \"port_phasestep\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phaseupdown PORT_UNUSED " "Parameter \"port_phaseupdown\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_pllena PORT_UNUSED " "Parameter \"port_pllena\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanaclr PORT_UNUSED " "Parameter \"port_scanaclr\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanclk PORT_UNUSED " "Parameter \"port_scanclk\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanclkena PORT_UNUSED " "Parameter \"port_scanclkena\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scandata PORT_UNUSED " "Parameter \"port_scandata\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scandataout PORT_UNUSED " "Parameter \"port_scandataout\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scandone PORT_UNUSED " "Parameter \"port_scandone\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanread PORT_UNUSED " "Parameter \"port_scanread\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanwrite PORT_UNUSED " "Parameter \"port_scanwrite\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk0 PORT_USED " "Parameter \"port_clk0\" = \"PORT_USED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk1 PORT_UNUSED " "Parameter \"port_clk1\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk2 PORT_UNUSED " "Parameter \"port_clk2\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk3 PORT_UNUSED " "Parameter \"port_clk3\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk4 PORT_UNUSED " "Parameter \"port_clk4\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk5 PORT_UNUSED " "Parameter \"port_clk5\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena0 PORT_UNUSED " "Parameter \"port_clkena0\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena1 PORT_UNUSED " "Parameter \"port_clkena1\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena2 PORT_UNUSED " "Parameter \"port_clkena2\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena3 PORT_UNUSED " "Parameter \"port_clkena3\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena4 PORT_UNUSED " "Parameter \"port_clkena4\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena5 PORT_UNUSED " "Parameter \"port_clkena5\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk0 PORT_UNUSED " "Parameter \"port_extclk0\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk1 PORT_UNUSED " "Parameter \"port_extclk1\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk2 PORT_UNUSED " "Parameter \"port_extclk2\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk3 PORT_UNUSED " "Parameter \"port_extclk3\" = \"PORT_UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "self_reset_on_loss_lock OFF " "Parameter \"self_reset_on_loss_lock\" = \"OFF\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_clock 5 " "Parameter \"width_clock\" = \"5\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514264 ""}  } { { "PLL.vhd" "" { Text "E:/altera/15.0/Project/sine/PLL.vhd" 141 0 0 } }  } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1594707514264 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/pll_altpll.v 1 1 " "Found 1 design units, including 1 entities, in source file db/pll_altpll.v" { { "Info" "ISGN_ENTITY_NAME" "1 PLL_altpll " "Found entity 1: PLL_altpll" {  } { { "db/pll_altpll.v" "" { Text "E:/altera/15.0/Project/sine/db/pll_altpll.v" 31 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1594707514324 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1594707514324 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "PLL_altpll PLL:inst2\|altpll:altpll_component\|PLL_altpll:auto_generated " "Elaborating entity \"PLL_altpll\" for hierarchy \"PLL:inst2\|altpll:altpll_component\|PLL_altpll:auto_generated\"" {  } { { "altpll.tdf" "auto_generated" { Text "e:/altera/15.0/quartus/libraries/megafunctions/altpll.tdf" 898 3 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514324 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ROM ROM:inst3 " "Elaborating entity \"ROM\" for hierarchy \"ROM:inst3\"" {  } { { "SINE.bdf" "inst3" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 776 952 216 "inst3" "" } } } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514334 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram ROM:inst3\|altsyncram:altsyncram_component " "Elaborating entity \"altsyncram\" for hierarchy \"ROM:inst3\|altsyncram:altsyncram_component\"" {  } { { "ROM.vhd" "altsyncram_component" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514384 ""}
{ "Info" "ISGN_ELABORATION_HEADER" "ROM:inst3\|altsyncram:altsyncram_component " "Elaborated megafunction instantiation \"ROM:inst3\|altsyncram:altsyncram_component\"" {  } { { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } }  } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1594707514414 ""}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "ROM:inst3\|altsyncram:altsyncram_component " "Instantiated megafunction \"ROM:inst3\|altsyncram:altsyncram_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_aclr_a NONE " "Parameter \"address_aclr_a\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_aclr_b NONE " "Parameter \"address_aclr_b\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_reg_b CLOCK1 " "Parameter \"address_reg_b\" = \"CLOCK1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "byte_size 8 " "Parameter \"byte_size\" = \"8\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "byteena_aclr_a UNUSED " "Parameter \"byteena_aclr_a\" = \"UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "byteena_aclr_b NONE " "Parameter \"byteena_aclr_b\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "byteena_reg_b CLOCK1 " "Parameter \"byteena_reg_b\" = \"CLOCK1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_core_a USE_INPUT_CLKEN " "Parameter \"clock_enable_core_a\" = \"USE_INPUT_CLKEN\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_core_b USE_INPUT_CLKEN " "Parameter \"clock_enable_core_b\" = \"USE_INPUT_CLKEN\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_input_a BYPASS " "Parameter \"clock_enable_input_a\" = \"BYPASS\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_input_b NORMAL " "Parameter \"clock_enable_input_b\" = \"NORMAL\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_output_a BYPASS " "Parameter \"clock_enable_output_a\" = \"BYPASS\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_output_b NORMAL " "Parameter \"clock_enable_output_b\" = \"NORMAL\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family Cyclone IV E " "Parameter \"intended_device_family\" = \"Cyclone IV E\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ecc_pipeline_stage_enabled FALSE " "Parameter \"ecc_pipeline_stage_enabled\" = \"FALSE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "enable_ecc FALSE " "Parameter \"enable_ecc\" = \"FALSE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "implement_in_les OFF " "Parameter \"implement_in_les\" = \"OFF\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_aclr_a UNUSED " "Parameter \"indata_aclr_a\" = \"UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_aclr_b NONE " "Parameter \"indata_aclr_b\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_reg_b CLOCK1 " "Parameter \"indata_reg_b\" = \"CLOCK1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "init_file sindat.hex " "Parameter \"init_file\" = \"sindat.hex\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "init_file_layout PORT_A " "Parameter \"init_file_layout\" = \"PORT_A\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "maximum_depth 0 " "Parameter \"maximum_depth\" = \"0\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "numwords_a 256 " "Parameter \"numwords_a\" = \"256\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "numwords_b 0 " "Parameter \"numwords_b\" = \"0\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "operation_mode ROM " "Parameter \"operation_mode\" = \"ROM\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr_a NONE " "Parameter \"outdata_aclr_a\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr_b NONE " "Parameter \"outdata_aclr_b\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg_a CLOCK0 " "Parameter \"outdata_reg_a\" = \"CLOCK0\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg_b UNREGISTERED " "Parameter \"outdata_reg_b\" = \"UNREGISTERED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "power_up_uninitialized FALSE " "Parameter \"power_up_uninitialized\" = \"FALSE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ram_block_type AUTO " "Parameter \"ram_block_type\" = \"AUTO\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdcontrol_aclr_b NONE " "Parameter \"rdcontrol_aclr_b\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdcontrol_reg_b CLOCK1 " "Parameter \"rdcontrol_reg_b\" = \"CLOCK1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "read_during_write_mode_mixed_ports DONT_CARE " "Parameter \"read_during_write_mode_mixed_ports\" = \"DONT_CARE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "read_during_write_mode_port_a NEW_DATA_NO_NBE_READ " "Parameter \"read_during_write_mode_port_a\" = \"NEW_DATA_NO_NBE_READ\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "read_during_write_mode_port_b NEW_DATA_NO_NBE_READ " "Parameter \"read_during_write_mode_port_b\" = \"NEW_DATA_NO_NBE_READ\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "stratixiv_m144k_allow_dual_clocks ON " "Parameter \"stratixiv_m144k_allow_dual_clocks\" = \"ON\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_a 8 " "Parameter \"width_a\" = \"8\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_b 1 " "Parameter \"width_b\" = \"1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_byteena_a 1 " "Parameter \"width_byteena_a\" = \"1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_byteena_b 1 " "Parameter \"width_byteena_b\" = \"1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_eccstatus 3 " "Parameter \"width_eccstatus\" = \"3\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad_a 8 " "Parameter \"widthad_a\" = \"8\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad_b 1 " "Parameter \"widthad_b\" = \"1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_aclr_a UNUSED " "Parameter \"wrcontrol_aclr_a\" = \"UNUSED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_aclr_b NONE " "Parameter \"wrcontrol_aclr_b\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_wraddress_reg_b CLOCK1 " "Parameter \"wrcontrol_wraddress_reg_b\" = \"CLOCK1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_hint ENABLE_RUNTIME_MOD=NO " "Parameter \"lpm_hint\" = \"ENABLE_RUNTIME_MOD=NO\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altsyncram " "Parameter \"lpm_type\" = \"altsyncram\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514424 ""}  } { { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } }  } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1594707514424 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_v6r3.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_v6r3.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_v6r3 " "Found entity 1: altsyncram_v6r3" {  } { { "db/altsyncram_v6r3.tdf" "" { Text "E:/altera/15.0/Project/sine/db/altsyncram_v6r3.tdf" 28 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1594707514474 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1594707514474 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_v6r3 ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated " "Elaborating entity \"altsyncram_v6r3\" for hierarchy \"ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "e:/altera/15.0/quartus/libraries/megafunctions/altsyncram.tdf" 792 4 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514474 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "CNT8 CNT8:inst " "Elaborating entity \"CNT8\" for hierarchy \"CNT8:inst\"" {  } { { "SINE.bdf" "inst" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 536 688 248 "inst" "" } } } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1594707514494 ""}
{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" {  } {  } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Quartus II" 0 -1 1594707515193 ""}
{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "1 0 1 0 0 " "Adding 1 node(s), including 0 DDIO, 1 PLL, 0 transceiver and 0 LCELL" {  } {  } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Quartus II" 0 -1 1594707515803 ""}  } {  } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Quartus II" 0 -1 1594707515803 ""}
{ "Warning" "WCUT_CUT_RAM_PORT_STUCK_AT_VCC_OR_GND" "ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a7 clk0 VCC " "WYSIWYG primitive \"ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a7\" has a port clk0 that is stuck at VCC" {  } { { "db/altsyncram_v6r3.tdf" "" { Text "E:/altera/15.0/Project/sine/db/altsyncram_v6r3.tdf" 32 2 0 } } { "altsyncram.tdf" "" { Text "e:/altera/15.0/quartus/libraries/megafunctions/altsyncram.tdf" 792 0 0 } } { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } } { "SINE.bdf" "" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 776 952 216 "inst3" "" } } } }  } 0 15400 "WYSIWYG primitive \"%1!s!\" has a port %2!s! that is stuck at %3!s!" 0 0 "Quartus II" 0 -1 1594707515863 "|SINE|ROM:inst3|altsyncram:altsyncram_component|altsyncram_v6r3:auto_generated|ram_block1a7"}
{ "Warning" "WCUT_CUT_RAM_PORT_STUCK_AT_VCC_OR_GND" "ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a6 clk0 VCC " "WYSIWYG primitive \"ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a6\" has a port clk0 that is stuck at VCC" {  } { { "db/altsyncram_v6r3.tdf" "" { Text "E:/altera/15.0/Project/sine/db/altsyncram_v6r3.tdf" 32 2 0 } } { "altsyncram.tdf" "" { Text "e:/altera/15.0/quartus/libraries/megafunctions/altsyncram.tdf" 792 0 0 } } { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } } { "SINE.bdf" "" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 776 952 216 "inst3" "" } } } }  } 0 15400 "WYSIWYG primitive \"%1!s!\" has a port %2!s! that is stuck at %3!s!" 0 0 "Quartus II" 0 -1 1594707515863 "|SINE|ROM:inst3|altsyncram:altsyncram_component|altsyncram_v6r3:auto_generated|ram_block1a6"}
{ "Warning" "WCUT_CUT_RAM_PORT_STUCK_AT_VCC_OR_GND" "ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a5 clk0 VCC " "WYSIWYG primitive \"ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a5\" has a port clk0 that is stuck at VCC" {  } { { "db/altsyncram_v6r3.tdf" "" { Text "E:/altera/15.0/Project/sine/db/altsyncram_v6r3.tdf" 32 2 0 } } { "altsyncram.tdf" "" { Text "e:/altera/15.0/quartus/libraries/megafunctions/altsyncram.tdf" 792 0 0 } } { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } } { "SINE.bdf" "" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 776 952 216 "inst3" "" } } } }  } 0 15400 "WYSIWYG primitive \"%1!s!\" has a port %2!s! that is stuck at %3!s!" 0 0 "Quartus II" 0 -1 1594707515863 "|SINE|ROM:inst3|altsyncram:altsyncram_component|altsyncram_v6r3:auto_generated|ram_block1a5"}
{ "Warning" "WCUT_CUT_RAM_PORT_STUCK_AT_VCC_OR_GND" "ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a4 clk0 VCC " "WYSIWYG primitive \"ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a4\" has a port clk0 that is stuck at VCC" {  } { { "db/altsyncram_v6r3.tdf" "" { Text "E:/altera/15.0/Project/sine/db/altsyncram_v6r3.tdf" 32 2 0 } } { "altsyncram.tdf" "" { Text "e:/altera/15.0/quartus/libraries/megafunctions/altsyncram.tdf" 792 0 0 } } { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } } { "SINE.bdf" "" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 776 952 216 "inst3" "" } } } }  } 0 15400 "WYSIWYG primitive \"%1!s!\" has a port %2!s! that is stuck at %3!s!" 0 0 "Quartus II" 0 -1 1594707515863 "|SINE|ROM:inst3|altsyncram:altsyncram_component|altsyncram_v6r3:auto_generated|ram_block1a4"}
{ "Warning" "WCUT_CUT_RAM_PORT_STUCK_AT_VCC_OR_GND" "ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a3 clk0 VCC " "WYSIWYG primitive \"ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a3\" has a port clk0 that is stuck at VCC" {  } { { "db/altsyncram_v6r3.tdf" "" { Text "E:/altera/15.0/Project/sine/db/altsyncram_v6r3.tdf" 32 2 0 } } { "altsyncram.tdf" "" { Text "e:/altera/15.0/quartus/libraries/megafunctions/altsyncram.tdf" 792 0 0 } } { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } } { "SINE.bdf" "" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 776 952 216 "inst3" "" } } } }  } 0 15400 "WYSIWYG primitive \"%1!s!\" has a port %2!s! that is stuck at %3!s!" 0 0 "Quartus II" 0 -1 1594707515863 "|SINE|ROM:inst3|altsyncram:altsyncram_component|altsyncram_v6r3:auto_generated|ram_block1a3"}
{ "Warning" "WCUT_CUT_RAM_PORT_STUCK_AT_VCC_OR_GND" "ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a2 clk0 VCC " "WYSIWYG primitive \"ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a2\" has a port clk0 that is stuck at VCC" {  } { { "db/altsyncram_v6r3.tdf" "" { Text "E:/altera/15.0/Project/sine/db/altsyncram_v6r3.tdf" 32 2 0 } } { "altsyncram.tdf" "" { Text "e:/altera/15.0/quartus/libraries/megafunctions/altsyncram.tdf" 792 0 0 } } { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } } { "SINE.bdf" "" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 776 952 216 "inst3" "" } } } }  } 0 15400 "WYSIWYG primitive \"%1!s!\" has a port %2!s! that is stuck at %3!s!" 0 0 "Quartus II" 0 -1 1594707515863 "|SINE|ROM:inst3|altsyncram:altsyncram_component|altsyncram_v6r3:auto_generated|ram_block1a2"}
{ "Warning" "WCUT_CUT_RAM_PORT_STUCK_AT_VCC_OR_GND" "ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a1 clk0 VCC " "WYSIWYG primitive \"ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a1\" has a port clk0 that is stuck at VCC" {  } { { "db/altsyncram_v6r3.tdf" "" { Text "E:/altera/15.0/Project/sine/db/altsyncram_v6r3.tdf" 32 2 0 } } { "altsyncram.tdf" "" { Text "e:/altera/15.0/quartus/libraries/megafunctions/altsyncram.tdf" 792 0 0 } } { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } } { "SINE.bdf" "" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 776 952 216 "inst3" "" } } } }  } 0 15400 "WYSIWYG primitive \"%1!s!\" has a port %2!s! that is stuck at %3!s!" 0 0 "Quartus II" 0 -1 1594707515863 "|SINE|ROM:inst3|altsyncram:altsyncram_component|altsyncram_v6r3:auto_generated|ram_block1a1"}
{ "Warning" "WCUT_CUT_RAM_PORT_STUCK_AT_VCC_OR_GND" "ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a0 clk0 VCC " "WYSIWYG primitive \"ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a0\" has a port clk0 that is stuck at VCC" {  } { { "db/altsyncram_v6r3.tdf" "" { Text "E:/altera/15.0/Project/sine/db/altsyncram_v6r3.tdf" 32 2 0 } } { "altsyncram.tdf" "" { Text "e:/altera/15.0/quartus/libraries/megafunctions/altsyncram.tdf" 792 0 0 } } { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } } { "SINE.bdf" "" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 776 952 216 "inst3" "" } } } }  } 0 15400 "WYSIWYG primitive \"%1!s!\" has a port %2!s! that is stuck at %3!s!" 0 0 "Quartus II" 0 -1 1594707515863 "|SINE|ROM:inst3|altsyncram:altsyncram_component|altsyncram_v6r3:auto_generated|ram_block1a0"}
{ "Info" "ICUT_CUT_TM_SUMMARY" "27 " "Implemented 27 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "1 " "Implemented 1 input pins" {  } {  } 0 21058 "Implemented %1!d! input pins" 0 0 "Quartus II" 0 -1 1594707515903 ""} { "Info" "ICUT_CUT_TM_OPINS" "9 " "Implemented 9 output pins" {  } {  } 0 21059 "Implemented %1!d! output pins" 0 0 "Quartus II" 0 -1 1594707515903 ""} { "Info" "ICUT_CUT_TM_LCELLS" "8 " "Implemented 8 logic cells" {  } {  } 0 21061 "Implemented %1!d! logic cells" 0 0 "Quartus II" 0 -1 1594707515903 ""} { "Info" "ICUT_CUT_TM_RAMS" "8 " "Implemented 8 RAM segments" {  } {  } 0 21064 "Implemented %1!d! RAM segments" 0 0 "Quartus II" 0 -1 1594707515903 ""} { "Info" "ICUT_CUT_TM_PLLS" "1 " "Implemented 1 PLLs" {  } {  } 0 21065 "Implemented %1!d! PLLs" 0 0 "Quartus II" 0 -1 1594707515903 ""}  } {  } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Quartus II" 0 -1 1594707515903 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 8 s Quartus II 64-Bit " "Quartus II 64-Bit Analysis & Synthesis was successful. 0 errors, 8 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4859 " "Peak virtual memory: 4859 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1594707516033 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue Jul 14 14:18:36 2020 " "Processing ended: Tue Jul 14 14:18:36 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1594707516033 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:13 " "Elapsed time: 00:00:13" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1594707516033 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:24 " "Total CPU time (on all processors): 00:00:24" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1594707516033 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1594707516033 ""}
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1594707518612 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II 64-Bit " "Running Quartus II 64-Bit Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 15.0.0 Build 145 04/22/2015 SJ Full Version " "Version 15.0.0 Build 145 04/22/2015 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1594707518621 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue Jul 14 14:18:38 2020 " "Processing started: Tue Jul 14 14:18:38 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1594707518621 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Fitter" 0 -1 1594707518621 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off SINE -c SINE " "Command: quartus_fit --read_settings_files=off --write_settings_files=off SINE -c SINE" {  } {  } 0 0 "Command: %1!s!" 0 0 "Fitter" 0 -1 1594707518621 ""}
{ "Info" "0" "" "qfit2_default_script.tcl version: #1" {  } {  } 0 0 "qfit2_default_script.tcl version: #1" 0 0 "Fitter" 0 0 1594707518761 ""}
{ "Info" "0" "" "Project  = SINE" {  } {  } 0 0 "Project  = SINE" 0 0 "Fitter" 0 0 1594707518761 ""}
{ "Info" "0" "" "Revision = SINE" {  } {  } 0 0 "Revision = SINE" 0 0 "Fitter" 0 0 1594707518761 ""}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "4 4 " "Parallel compilation is enabled and will use 4 of the 4 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Fitter" 0 -1 1594707518851 ""}
{ "Info" "IMPP_MPP_USER_DEVICE" "SINE EP4CE6E22C8 " "Selected device EP4CE6E22C8 for design \"SINE\"" {  } {  } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1594707518891 ""}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1594707518961 ""}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1594707518961 ""}
{ "Info" "ICUT_CUT_PLL_COMPUTATION_SUCCESS" "PLL:inst2\|altpll:altpll_component\|PLL_altpll:auto_generated\|pll1 Cyclone IV E PLL " "Implemented PLL \"PLL:inst2\|altpll:altpll_component\|PLL_altpll:auto_generated\|pll1\" as Cyclone IV E PLL type" { { "Info" "ICUT_CUT_YGR_PLL_PARAMETERS_FACTORS" "PLL:inst2\|altpll:altpll_component\|PLL_altpll:auto_generated\|wire_pll1_clk\[0\] 4 5 0 0 " "Implementing clock multiplication of 4, clock division of 5, and phase shift of 0 degrees (0 ps) for PLL:inst2\|altpll:altpll_component\|PLL_altpll:auto_generated\|wire_pll1_clk\[0\] port" {  } { { "db/pll_altpll.v" "" { Text "E:/altera/15.0/Project/sine/db/pll_altpll.v" 51 -1 0 } } { "" "" { Generic "E:/altera/15.0/Project/sine/" { { 0 { 0 ""} 0 49 9698 10655 0 0 ""}  }  } }  } 0 15099 "Implementing clock multiplication of %2!d!, clock division of %3!d!, and phase shift of %4!d! degrees (%5!d! ps) for %1!s! port" 0 0 "Quartus II" 0 -1 1594707519031 ""}  } { { "db/pll_altpll.v" "" { Text "E:/altera/15.0/Project/sine/db/pll_altpll.v" 51 -1 0 } } { "" "" { Generic "E:/altera/15.0/Project/sine/" { { 0 { 0 ""} 0 49 9698 10655 0 0 ""}  }  } }  } 0 15535 "Implemented %3!s! \"%1!s!\" as %2!s! PLL type" 0 0 "Fitter" 0 -1 1594707519031 ""}
{ "Warning" "WCUT_CUT_RAM_PORT_STUCK_AT_VCC_OR_GND" "ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a7 clk0 VCC " "WYSIWYG primitive \"ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a7\" has a port clk0 that is stuck at VCC" {  } { { "db/altsyncram_v6r3.tdf" "" { Text "E:/altera/15.0/Project/sine/db/altsyncram_v6r3.tdf" 32 2 0 } } { "altsyncram.tdf" "" { Text "e:/altera/15.0/quartus/libraries/megafunctions/altsyncram.tdf" 792 0 0 } } { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } } { "SINE.bdf" "" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 776 952 216 "inst3" "" } } } }  } 0 15400 "WYSIWYG primitive \"%1!s!\" has a port %2!s! that is stuck at %3!s!" 0 0 "Fitter" 0 -1 1594707519131 "|SINE|ROM:inst3|altsyncram:altsyncram_component|altsyncram_v6r3:auto_generated|ram_block1a7"}
{ "Warning" "WCUT_CUT_RAM_PORT_STUCK_AT_VCC_OR_GND" "ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a6 clk0 VCC " "WYSIWYG primitive \"ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a6\" has a port clk0 that is stuck at VCC" {  } { { "db/altsyncram_v6r3.tdf" "" { Text "E:/altera/15.0/Project/sine/db/altsyncram_v6r3.tdf" 32 2 0 } } { "altsyncram.tdf" "" { Text "e:/altera/15.0/quartus/libraries/megafunctions/altsyncram.tdf" 792 0 0 } } { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } } { "SINE.bdf" "" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 776 952 216 "inst3" "" } } } }  } 0 15400 "WYSIWYG primitive \"%1!s!\" has a port %2!s! that is stuck at %3!s!" 0 0 "Fitter" 0 -1 1594707519131 "|SINE|ROM:inst3|altsyncram:altsyncram_component|altsyncram_v6r3:auto_generated|ram_block1a6"}
{ "Warning" "WCUT_CUT_RAM_PORT_STUCK_AT_VCC_OR_GND" "ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a5 clk0 VCC " "WYSIWYG primitive \"ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a5\" has a port clk0 that is stuck at VCC" {  } { { "db/altsyncram_v6r3.tdf" "" { Text "E:/altera/15.0/Project/sine/db/altsyncram_v6r3.tdf" 32 2 0 } } { "altsyncram.tdf" "" { Text "e:/altera/15.0/quartus/libraries/megafunctions/altsyncram.tdf" 792 0 0 } } { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } } { "SINE.bdf" "" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 776 952 216 "inst3" "" } } } }  } 0 15400 "WYSIWYG primitive \"%1!s!\" has a port %2!s! that is stuck at %3!s!" 0 0 "Fitter" 0 -1 1594707519131 "|SINE|ROM:inst3|altsyncram:altsyncram_component|altsyncram_v6r3:auto_generated|ram_block1a5"}
{ "Warning" "WCUT_CUT_RAM_PORT_STUCK_AT_VCC_OR_GND" "ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a4 clk0 VCC " "WYSIWYG primitive \"ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a4\" has a port clk0 that is stuck at VCC" {  } { { "db/altsyncram_v6r3.tdf" "" { Text "E:/altera/15.0/Project/sine/db/altsyncram_v6r3.tdf" 32 2 0 } } { "altsyncram.tdf" "" { Text "e:/altera/15.0/quartus/libraries/megafunctions/altsyncram.tdf" 792 0 0 } } { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } } { "SINE.bdf" "" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 776 952 216 "inst3" "" } } } }  } 0 15400 "WYSIWYG primitive \"%1!s!\" has a port %2!s! that is stuck at %3!s!" 0 0 "Fitter" 0 -1 1594707519131 "|SINE|ROM:inst3|altsyncram:altsyncram_component|altsyncram_v6r3:auto_generated|ram_block1a4"}
{ "Warning" "WCUT_CUT_RAM_PORT_STUCK_AT_VCC_OR_GND" "ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a3 clk0 VCC " "WYSIWYG primitive \"ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a3\" has a port clk0 that is stuck at VCC" {  } { { "db/altsyncram_v6r3.tdf" "" { Text "E:/altera/15.0/Project/sine/db/altsyncram_v6r3.tdf" 32 2 0 } } { "altsyncram.tdf" "" { Text "e:/altera/15.0/quartus/libraries/megafunctions/altsyncram.tdf" 792 0 0 } } { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } } { "SINE.bdf" "" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 776 952 216 "inst3" "" } } } }  } 0 15400 "WYSIWYG primitive \"%1!s!\" has a port %2!s! that is stuck at %3!s!" 0 0 "Fitter" 0 -1 1594707519131 "|SINE|ROM:inst3|altsyncram:altsyncram_component|altsyncram_v6r3:auto_generated|ram_block1a3"}
{ "Warning" "WCUT_CUT_RAM_PORT_STUCK_AT_VCC_OR_GND" "ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a2 clk0 VCC " "WYSIWYG primitive \"ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a2\" has a port clk0 that is stuck at VCC" {  } { { "db/altsyncram_v6r3.tdf" "" { Text "E:/altera/15.0/Project/sine/db/altsyncram_v6r3.tdf" 32 2 0 } } { "altsyncram.tdf" "" { Text "e:/altera/15.0/quartus/libraries/megafunctions/altsyncram.tdf" 792 0 0 } } { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } } { "SINE.bdf" "" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 776 952 216 "inst3" "" } } } }  } 0 15400 "WYSIWYG primitive \"%1!s!\" has a port %2!s! that is stuck at %3!s!" 0 0 "Fitter" 0 -1 1594707519131 "|SINE|ROM:inst3|altsyncram:altsyncram_component|altsyncram_v6r3:auto_generated|ram_block1a2"}
{ "Warning" "WCUT_CUT_RAM_PORT_STUCK_AT_VCC_OR_GND" "ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a1 clk0 VCC " "WYSIWYG primitive \"ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a1\" has a port clk0 that is stuck at VCC" {  } { { "db/altsyncram_v6r3.tdf" "" { Text "E:/altera/15.0/Project/sine/db/altsyncram_v6r3.tdf" 32 2 0 } } { "altsyncram.tdf" "" { Text "e:/altera/15.0/quartus/libraries/megafunctions/altsyncram.tdf" 792 0 0 } } { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } } { "SINE.bdf" "" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 776 952 216 "inst3" "" } } } }  } 0 15400 "WYSIWYG primitive \"%1!s!\" has a port %2!s! that is stuck at %3!s!" 0 0 "Fitter" 0 -1 1594707519131 "|SINE|ROM:inst3|altsyncram:altsyncram_component|altsyncram_v6r3:auto_generated|ram_block1a1"}
{ "Warning" "WCUT_CUT_RAM_PORT_STUCK_AT_VCC_OR_GND" "ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a0 clk0 VCC " "WYSIWYG primitive \"ROM:inst3\|altsyncram:altsyncram_component\|altsyncram_v6r3:auto_generated\|ram_block1a0\" has a port clk0 that is stuck at VCC" {  } { { "db/altsyncram_v6r3.tdf" "" { Text "E:/altera/15.0/Project/sine/db/altsyncram_v6r3.tdf" 32 2 0 } } { "altsyncram.tdf" "" { Text "e:/altera/15.0/quartus/libraries/megafunctions/altsyncram.tdf" 792 0 0 } } { "ROM.vhd" "" { Text "E:/altera/15.0/Project/sine/ROM.vhd" 60 0 0 } } { "SINE.bdf" "" { Schematic "E:/altera/15.0/Project/sine/SINE.bdf" { { 136 776 952 216 "inst3" "" } } } }  } 0 15400 "WYSIWYG primitive \"%1!s!\" has a port %2!s! that is stuck at %3!s!" 0 0 "Fitter" 0 -1 1594707519131 "|SINE|ROM:inst3|altsyncram:altsyncram_component|altsyncram_v6r3:auto_generated|ram_block1a0"}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1594707519131 ""}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP4CE10E22C8 " "Device EP4CE10E22C8 is compatible" {  } {  } 2 176445 "Device %1!s! is compatible" 0 0 "Quartus II" 0 -1 1594707519221 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP4CE15E22C8 " "Device EP4CE15E22C8 is compatible" {  } {  } 2 176445 "Device %1!s! is compatible" 0 0 "Quartus II" 0 -1 1594707519221 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP4CE22E22C8 " "Device EP4CE22E22C8 is compatible" {  } {  } 2 176445 "Device %1!s! is compatible" 0 0 "Quartus II" 0 -1 1594707519221 ""}  } {  } 2 176444 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "Fitter" 0 -1 1594707519221 ""}
{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "5 " "Fitter converted 5 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_ASDO_DATA1~ 6 " "Pin ~ALTERA_ASDO_DATA1~ is reserved at location 6" {  } { { "e:/altera/15.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "e:/altera/15.0/quartus/bin64/pin_planner.ppl" { ~ALTERA_ASDO_DATA1~ } } } { "temporary_test_loc" "" { Generic "E:/altera/15.0/Project/sine/" { { 0 { 0 ""} 0 189 9698 10655 0 0 ""}  }  } }  } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Quartus II" 0 -1 1594707519231 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_FLASH_nCE_nCSO~ 8 " "Pin ~ALTERA_FLASH_nCE_nCSO~ is reserved at location 8" {  } { { "e:/altera/15.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "e:/altera/15.0/quartus/bin64/pin_planner.ppl" { ~ALTERA_FLASH_nCE_nCSO~ } } } { "temporary_test_loc" "" { Generic "E:/altera/15.0/Project/sine/" { { 0 { 0 ""} 0 191 9698 10655 0 0 ""}  }  } }  } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Quartus II" 0 -1 1594707519231 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_DCLK~ 12 " "Pin ~ALTERA_DCLK~ is reserved at location 12" {  } { { "e:/altera/15.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "e:/altera/15.0/quartus/bin64/pin_planner.ppl" { ~ALTERA_DCLK~ } } } { "temporary_test_loc" "" { Generic "E:/altera/15.0/Project/sine/" { { 0 { 0 ""} 0 193 9698 10655 0 0 ""}  }  } }  } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Quartus II" 0 -1 1594707519231 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_DATA0~ 13 " "Pin ~ALTERA_DATA0~ is reserved at location 13" {  } { { "e:/altera/15.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "e:/altera/15.0/quartus/bin64/pin_planner.ppl" { ~ALTERA_DATA0~ } } } { "temporary_test_loc" "" { Generic "E:/altera/15.0/Project/sine/" { { 0 { 0 ""} 0 195 9698 10655 0 0 ""}  }  } }  } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Quartus II" 0 -1 1594707519231 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_nCEO~ 101 " "Pin ~ALTERA_nCEO~ is reserved at location 101" {  } { { "e:/altera/15.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "e:/altera/15.0/quartus/bin64/pin_planner.ppl" { ~ALTERA_nCEO~ } } } { "temporary_test_loc" "" { Generic "E:/altera/15.0/Project/sine/" { { 0 { 0 ""} 0 197 9698 10655 0 0 ""}  }  } }  } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Quartus II" 0 -1 1594707519231 ""}  } {  } 0 169124 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0 "Fitter" 0 -1 1594707519231 ""}
{ "Warning" "WCUT_CUT_ATOM_PINS_WITH_INCOMPLETE_IO_ASSIGNMENTS" "" "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" {  } {  } 0 15714 "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" 0 0 "Fitter" 0 -1 1594707519231 ""}
{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." {  } {  } 0 176045 "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0 "Fitter" 0 -1 1594707519231 ""}
{ "Critical Warning" "WFIOMGR_PINS_MISSING_LOCATION_INFO" "10 10 " "No exact pin location assignment(s) for 10 pins of 10 total pins. For the list of pins please refer to the I/O Assignment Warnings table in the fitter report." {  } {  } 1 169085 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins. For the list of pins please refer to the I/O Assignment Warnings table in the fitter report." 0 0 "Fitter" 0 -1 1594707519511 ""}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "PLL:inst2\|altpll:altpll_component\|PLL_altpll:auto_generated\|wire_pll1_clk\[0\] (placed in counter C0 of PLL_1) " "Automatically promoted node PLL:inst2\|altpll:altpll_component\|PLL_altpll:auto_generated\|wire_pll1_clk\[0\] (placed in counter C0 of PLL_1)" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G3 " "Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G3" {  } {  } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Quartus II" 0 -1 1594707519521 ""} { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations External Clock Output CLKCTRL_PLL1E0 " "Automatically promoted destinations to use location or clock signal External Clock Output CLKCTRL_PLL1E0" {  } {  } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Quartus II" 0 -1 1594707519521 ""}  } { { "db/pll_altpll.v" "" { Text "E:/altera/15.0/Project/sine/db/pll_altpll.v" 93 -1 0 } } { "temporary_test_loc" "" { Generic "E:/altera/15.0/Project/sine/" { { 0 { 0 ""} 0 49 9698 10655 0 0 ""}  }  } }  } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1594707519521 ""}
{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "SINE.sdc " "Synopsys Design Constraints File file not found: 'SINE.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Fitter" 0 -1 1594707519631 ""}
{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "generated clocks " "No user constrained generated clocks found in the design" {  } {  } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1594707519641 ""}
{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "base clocks " "No user constrained base clocks found in the design" {  } {  } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1594707519641 ""}
{ "Info" "ISTA_DERIVE_CLOCKS_FOUND_NO_CLOCKS" "" "The command derive_clocks did not find any clocks to derive.  No clocks were created or changed." {  } {  } 0 332096 "The command derive_clocks did not find any clocks to derive.  No clocks were created or changed." 0 0 "Fitter" 0 -1 1594707519641 ""}
{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" {  } {  } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Fitter" 0 -1 1594707519641 ""}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "Fitter" 0 -1 1594707519641 ""}
{ "Info" "ISTA_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." {  } {  } 0 332130 "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." 0 0 "Fitter" 0 -1 1594707519641 ""}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Starting register packing" {  } {  } 0 176233 "Starting register packing" 0 0 "Fitter" 0 -1 1594707519641 ""}
{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Performing register packing on registers with non-logic cell location assignments" {  } {  } 1 176273 "Performing register packing on registers with non-logic cell location assignments" 1 0 "Fitter" 0 -1 1594707519641 ""}
{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Completed register packing on registers with non-logic cell location assignments" {  } {  } 1 176274 "Completed register packing on registers with non-logic cell location assignments" 1 0 "Fitter" 0 -1 1594707519641 ""}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Started Fast Input/Output/OE register processing" {  } {  } 1 176236 "Started Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1594707519641 ""}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Finished Fast Input/Output/OE register processing" {  } {  } 1 176237 "Finished Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1594707519641 ""}
{ "Extra Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Start inferring scan chains for DSP blocks" {  } {  } 1 176238 "Start inferring scan chains for DSP blocks" 1 0 "Fitter" 0 -1 1594707519641 ""}
{ "Extra Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Inferring scan chains for DSP blocks is complete" {  } {  } 1 176239 "Inferring scan chains for DSP blocks is complete" 1 0 "Fitter" 0 -1 1594707519641 ""}
{ "Extra Info" "IFSAC_FSAC_START_IO_MULT_RAM_PACKING" "" "Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" {  } {  } 1 176248 "Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" 1 0 "Fitter" 0 -1 1594707519651 ""}
{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MULT_RAM_PACKING" "" "Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" {  } {  } 1 176249 "Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" 1 0 "Fitter" 0 -1 1594707519651 ""}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "No registers were packed into other blocks" {  } {  } 1 176219 "No registers were packed into other blocks" 0 0 "Quartus II" 0 -1 1594707519651 ""}  } {  } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1594707519651 ""}
{ "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement " "Statistics of I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement" { { "Info" "IFSAC_FSAC_SINGLE_IOC_GROUP_STATISTICS" "8 unused 2.5V 0 8 0 " "Number of I/O pins in group: 8 (unused VREF, 2.5V VCCIO, 0 input, 8 output, 0 bidirectional)" { { "Info" "IFSAC_FSAC_IO_STDS_IN_IOC_GROUP" "2.5 V. " "I/O standards used: 2.5 V." {  } {  } 0 176212 "I/O standards used: %1!s!" 0 0 "Quartus II" 0 -1 1594707519651 ""}  } {  } 0 176211 "Number of I/O pins in group: %1!d! (%2!s! VREF, %3!s! VCCIO, %4!d! input, %5!d! output, %6!d! bidirectional)" 0 0 "Quartus II" 0 -1 1594707519651 ""}  } {  } 0 176214 "Statistics of %1!s!" 0 0 "Fitter" 0 -1 1594707519651 ""}
{ "Info" "IFSAC_FSAC_IO_STATS_BEFORE_AFTER_PLACEMENT" "before " "I/O bank details before I/O pin placement" { { "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O banks " "Statistics of I/O banks" { { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "1 does not use undetermined 5 6 " "I/O bank number 1 does not use VREF pins and has undetermined VCCIO pins. 5 total pin(s) used --  6 pins available" {  } {  } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "Quartus II" 0 -1 1594707519651 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "2 does not use undetermined 0 8 " "I/O bank number 2 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used --  8 pins available" {  } {  } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "Quartus II" 0 -1 1594707519651 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "3 does not use 2.5V 1 10 " "I/O bank number 3 does not use VREF pins and has 2.5V VCCIO pins. 1 total pin(s) used --  10 pins available" {  } {  } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "Quartus II" 0 -1 1594707519651 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "4 does not use undetermined 0 14 " "I/O bank number 4 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used --  14 pins available" {  } {  } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "Quartus II" 0 -1 1594707519651 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "5 does not use undetermined 0 13 " "I/O bank number 5 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used --  13 pins available" {  } {  } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "Quartus II" 0 -1 1594707519651 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "6 does not use undetermined 1 9 " "I/O bank number 6 does not use VREF pins and has undetermined VCCIO pins. 1 total pin(s) used --  9 pins available" {  } {  } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "Quartus II" 0 -1 1594707519651 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "7 does not use undetermined 0 13 " "I/O bank number 7 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used --  13 pins available" {  } {  } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "Quartus II" 0 -1 1594707519651 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "8 does not use undetermined 0 12 " "I/O bank number 8 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used --  12 pins available" {  } {  } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "Quartus II" 0 -1 1594707519651 ""}  } {  } 0 176214 "Statistics of %1!s!" 0 0 "Quartus II" 0 -1 1594707519651 ""}  } {  } 0 176215 "I/O bank details %1!s! I/O pin placement" 0 0 "Fitter" 0 -1 1594707519651 ""}
{ "Info" "IFITCC_FITTER_PREPARATION_END" "00:00:00 " "Fitter preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 171121 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1594707519741 ""}
{ "Info" "IVPR20K_VPR_FAMILY_APL_ERROR" "" "Fitter has disabled Advanced Physical Optimization because it is not supported for the current family." {  } {  } 0 14896 "Fitter has disabled Advanced Physical Optimization because it is not supported for the current family." 0 0 "Fitter" 0 -1 1594707519761 ""}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" {  } {  } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1594707520331 ""}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1594707520361 ""}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" {  } {  } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1594707520371 ""}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" {  } {  } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1594707520510 ""}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1594707520510 ""}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" {  } {  } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1594707520750 ""}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "0 " "Router estimated average interconnect usage is 0% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "0 X23_Y0 X34_Y11 " "Router estimated peak interconnect usage is 0% of the available device resources in the region that extends from location X23_Y0 to location X34_Y11" {  } { { "loc" "" { Generic "E:/altera/15.0/Project/sine/" { { 1 { 0 "Router estimated peak interconnect usage is 0% of the available device resources in the region that extends from location X23_Y0 to location X34_Y11"} { { 12 { 0 ""} 23 0 12 12 }  }  }  }  } }  } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Quartus II" 0 -1 1594707521160 ""}  } {  } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1594707521160 ""}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1594707521200 ""}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" {  } {  } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Quartus II" 0 -1 1594707521200 ""} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Optimizations that may affect the design's timing were skipped" {  } {  } 0 170200 "Optimizations that may affect the design's timing were skipped" 0 0 "Quartus II" 0 -1 1594707521200 ""}  } {  } 0 170199 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1594707521200 ""}
{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "the Fitter 0.05 " "Total time spent on timing analysis during the Fitter is 0.05 seconds." {  } {  } 0 11888 "Total time spent on timing analysis during %1!s! is %2!s! seconds." 0 0 "Fitter" 0 -1 1594707521210 ""}
{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1594707521280 ""}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1594707521420 ""}
{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1594707521500 ""}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1594707521660 ""}
{ "Info" "IFITCC_FITTER_POST_OPERATION_END" "00:00:00 " "Fitter post-fit operations ending: elapsed time is 00:00:00" {  } {  } 0 11218 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1594707521990 ""}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "E:/altera/15.0/Project/sine/output_files/SINE.fit.smsg " "Generated suppressed messages file E:/altera/15.0/Project/sine/output_files/SINE.fit.smsg" {  } {  } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Fitter" 0 -1 1594707522270 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 11 s Quartus II 64-Bit " "Quartus II 64-Bit Fitter was successful. 0 errors, 11 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "5618 " "Peak virtual memory: 5618 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1594707522819 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue Jul 14 14:18:42 2020 " "Processing ended: Tue Jul 14 14:18:42 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1594707522819 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Elapsed time: 00:00:04" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1594707522819 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:05 " "Total CPU time (on all processors): 00:00:05" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1594707522819 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1594707522819 ""}
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Fitter" 0 -1 1594707525158 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II 64-Bit " "Running Quartus II 64-Bit Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 15.0.0 Build 145 04/22/2015 SJ Full Version " "Version 15.0.0 Build 145 04/22/2015 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1594707525168 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue Jul 14 14:18:45 2020 " "Processing started: Tue Jul 14 14:18:45 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1594707525168 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1594707525168 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off SINE -c SINE " "Command: quartus_asm --read_settings_files=off --write_settings_files=off SINE -c SINE" {  } {  } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1594707525168 ""}
{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Writing out detailed assembly data for power analysis" {  } {  } 0 115031 "Writing out detailed assembly data for power analysis" 0 0 "Assembler" 0 -1 1594707525778 ""}
{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" {  } {  } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1594707525808 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II 64-Bit " "Quartus II 64-Bit Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4740 " "Peak virtual memory: 4740 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1594707526117 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue Jul 14 14:18:46 2020 " "Processing ended: Tue Jul 14 14:18:46 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1594707526117 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1594707526117 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1594707526117 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1594707526117 ""}
{ "Info" "IFLOW_DISABLED_MODULE" "PowerPlay Power Analyzer FLOW_ENABLE_POWER_ANALYZER " "Skipped module PowerPlay Power Analyzer due to the assignment FLOW_ENABLE_POWER_ANALYZER" {  } {  } 0 293026 "Skipped module %1!s! due to the assignment %2!s!" 0 0 "Assembler" 0 -1 1594707526777 ""}
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Assembler" 0 -1 1594707528726 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus II 64-Bit " "Running Quartus II 64-Bit TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 15.0.0 Build 145 04/22/2015 SJ Full Version " "Version 15.0.0 Build 145 04/22/2015 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1594707528736 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue Jul 14 14:18:48 2020 " "Processing started: Tue Jul 14 14:18:48 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1594707528736 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1594707528736 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta SINE -c SINE " "Command: quartus_sta SINE -c SINE" {  } {  } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1594707528736 ""}
{ "Info" "0" "" "qsta_default_script.tcl version: #11" {  } {  } 0 0 "qsta_default_script.tcl version: #11" 0 0 "Quartus II" 0 0 1594707528896 ""}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "4 4 " "Parallel compilation is enabled and will use 4 of the 4 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Quartus II" 0 -1 1594707529066 ""}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Quartus II" 0 -1 1594707529126 ""}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Quartus II" 0 -1 1594707529126 ""}
{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "SINE.sdc " "Synopsys Design Constraints File file not found: 'SINE.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Quartus II" 0 -1 1594707529386 ""}
{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "generated clocks \"derive_pll_clocks -create_base_clocks\" " "No user constrained generated clocks found in the design. Calling \"derive_pll_clocks -create_base_clocks\"" {  } {  } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Quartus II" 0 -1 1594707529386 ""}
{ "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "Deriving PLL clocks " "Deriving PLL clocks" { { "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "create_clock -period 40.000 -waveform \{0.000 20.000\} -name CLK0 CLK0 " "create_clock -period 40.000 -waveform \{0.000 20.000\} -name CLK0 CLK0" {  } {  } 0 332110 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529386 ""} { "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "create_generated_clock -source \{inst2\|altpll_component\|auto_generated\|pll1\|inclk\[0\]\} -divide_by 5 -multiply_by 4 -duty_cycle 50.00 -name \{inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\]\} \{inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\]\} " "create_generated_clock -source \{inst2\|altpll_component\|auto_generated\|pll1\|inclk\[0\]\} -divide_by 5 -multiply_by 4 -duty_cycle 50.00 -name \{inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\]\} \{inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\]\}" {  } {  } 0 332110 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529386 ""}  } {  } 0 332110 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529386 ""}
{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" {  } {  } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Quartus II" 0 -1 1594707529386 ""}
{ "Info" "ISTA_DERIVE_CLOCKS_FOUND_NO_CLOCKS" "" "The command derive_clocks did not find any clocks to derive.  No clocks were created or changed." {  } {  } 0 332096 "The command derive_clocks did not find any clocks to derive.  No clocks were created or changed." 0 0 "Quartus II" 0 -1 1594707529386 ""}
{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" {  } {  } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Quartus II" 0 -1 1594707529446 ""}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529446 ""}
{ "Info" "0" "" "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" {  } {  } 0 0 "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "Quartus II" 0 0 1594707529446 ""}
{ "Info" "0" "" "Analyzing Slow 1200mV 85C Model" {  } {  } 0 0 "Analyzing Slow 1200mV 85C Model" 0 0 "Quartus II" 0 0 1594707529476 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup 47.529 " "Worst-case setup slack is 47.529" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529516 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529516 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   47.529               0.000 inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\]  " "   47.529               0.000 inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529516 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1594707529516 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.465 " "Worst-case hold slack is 0.465" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529526 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529526 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.465               0.000 inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\]  " "    0.465               0.000 inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529526 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1594707529526 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1594707529536 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1594707529546 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 19.934 " "Worst-case minimum pulse width slack is 19.934" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529556 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529556 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   19.934               0.000 CLK0  " "   19.934               0.000 CLK0 " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529556 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   24.723               0.000 inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\]  " "   24.723               0.000 inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529556 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1594707529556 ""}
{ "Info" "0" "" "Analyzing Slow 1200mV 0C Model" {  } {  } 0 0 "Analyzing Slow 1200mV 0C Model" 0 0 "Quartus II" 0 0 1594707529636 ""}
{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "Quartus II" 0 -1 1594707529656 ""}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "Quartus II" 0 -1 1594707529865 ""}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529945 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup 47.732 " "Worst-case setup slack is 47.732" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529965 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529965 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   47.732               0.000 inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\]  " "   47.732               0.000 inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529965 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1594707529965 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.417 " "Worst-case hold slack is 0.417" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529985 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529985 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.417               0.000 inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\]  " "    0.417               0.000 inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707529985 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1594707529985 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1594707529995 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1594707530005 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 19.943 " "Worst-case minimum pulse width slack is 19.943" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707530015 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707530015 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   19.943               0.000 CLK0  " "   19.943               0.000 CLK0 " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707530015 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   24.720               0.000 inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\]  " "   24.720               0.000 inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707530015 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1594707530015 ""}
{ "Info" "0" "" "Analyzing Fast 1200mV 0C Model" {  } {  } 0 0 "Analyzing Fast 1200mV 0C Model" 0 0 "Quartus II" 0 0 1594707530105 ""}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "Quartus II" 0 -1 1594707530305 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup 48.939 " "Worst-case setup slack is 48.939" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707530315 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707530315 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   48.939               0.000 inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\]  " "   48.939               0.000 inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707530315 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1594707530315 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.194 " "Worst-case hold slack is 0.194" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707530325 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707530325 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.194               0.000 inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\]  " "    0.194               0.000 inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707530325 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1594707530325 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1594707530335 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1594707530345 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 19.594 " "Worst-case minimum pulse width slack is 19.594" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707530355 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707530355 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   19.594               0.000 CLK0  " "   19.594               0.000 CLK0 " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707530355 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   24.798               0.000 inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\]  " "   24.798               0.000 inst2\|altpll_component\|auto_generated\|pll1\|clk\[0\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1594707530355 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1594707530355 ""}
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Quartus II" 0 -1 1594707530835 ""}
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Quartus II" 0 -1 1594707530835 ""}
{ "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 1  Quartus II 64-Bit " "Quartus II 64-Bit TimeQuest Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4855 " "Peak virtual memory: 4855 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1594707530985 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue Jul 14 14:18:50 2020 " "Processing ended: Tue Jul 14 14:18:50 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1594707530985 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1594707530985 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Total CPU time (on all processors): 00:00:02" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1594707530985 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1594707530985 ""}
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1594707533214 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus II 64-Bit " "Running Quartus II 64-Bit EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 15.0.0 Build 145 04/22/2015 SJ Full Version " "Version 15.0.0 Build 145 04/22/2015 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1594707533224 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue Jul 14 14:18:53 2020 " "Processing started: Tue Jul 14 14:18:53 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1594707533224 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1594707533224 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=off --write_settings_files=off SINE -c SINE " "Command: quartus_eda --read_settings_files=off --write_settings_files=off SINE -c SINE" {  } {  } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1594707533224 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "SINE_8_1200mv_85c_slow.vho E:/altera/15.0/Project/sine/simulation/modelsim/ simulation " "Generated file SINE_8_1200mv_85c_slow.vho in folder \"E:/altera/15.0/Project/sine/simulation/modelsim/\" for EDA simulation tool" {  } {  } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1594707533784 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "SINE_8_1200mv_0c_slow.vho E:/altera/15.0/Project/sine/simulation/modelsim/ simulation " "Generated file SINE_8_1200mv_0c_slow.vho in folder \"E:/altera/15.0/Project/sine/simulation/modelsim/\" for EDA simulation tool" {  } {  } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1594707533814 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "SINE_min_1200mv_0c_fast.vho E:/altera/15.0/Project/sine/simulation/modelsim/ simulation " "Generated file SINE_min_1200mv_0c_fast.vho in folder \"E:/altera/15.0/Project/sine/simulation/modelsim/\" for EDA simulation tool" {  } {  } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1594707533844 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "SINE.vho E:/altera/15.0/Project/sine/simulation/modelsim/ simulation " "Generated file SINE.vho in folder \"E:/altera/15.0/Project/sine/simulation/modelsim/\" for EDA simulation tool" {  } {  } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1594707533884 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "SINE_8_1200mv_85c_vhd_slow.sdo E:/altera/15.0/Project/sine/simulation/modelsim/ simulation " "Generated file SINE_8_1200mv_85c_vhd_slow.sdo in folder \"E:/altera/15.0/Project/sine/simulation/modelsim/\" for EDA simulation tool" {  } {  } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1594707533904 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "SINE_8_1200mv_0c_vhd_slow.sdo E:/altera/15.0/Project/sine/simulation/modelsim/ simulation " "Generated file SINE_8_1200mv_0c_vhd_slow.sdo in folder \"E:/altera/15.0/Project/sine/simulation/modelsim/\" for EDA simulation tool" {  } {  } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1594707533934 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "SINE_min_1200mv_0c_vhd_fast.sdo E:/altera/15.0/Project/sine/simulation/modelsim/ simulation " "Generated file SINE_min_1200mv_0c_vhd_fast.sdo in folder \"E:/altera/15.0/Project/sine/simulation/modelsim/\" for EDA simulation tool" {  } {  } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1594707533964 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "SINE_vhd.sdo E:/altera/15.0/Project/sine/simulation/modelsim/ simulation " "Generated file SINE_vhd.sdo in folder \"E:/altera/15.0/Project/sine/simulation/modelsim/\" for EDA simulation tool" {  } {  } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1594707533994 ""}
{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 0 s Quartus II 64-Bit " "Quartus II 64-Bit EDA Netlist Writer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4713 " "Peak virtual memory: 4713 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1594707534094 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue Jul 14 14:18:54 2020 " "Processing ended: Tue Jul 14 14:18:54 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1594707534094 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1594707534094 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1594707534094 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1594707534094 ""}
{ "Info" "IFLOW_ERROR_COUNT" "Full Compilation 0 s 20 s " "Quartus II Full Compilation was successful. 0 errors, 20 warnings" {  } {  } 0 293000 "Quartus II %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1594707534773 ""}