Conclusion

Addressing modes with postincrement/predecrement
may simplify stack operations.

An option to push a register on stack, after incrementing
PC to the next instruction, and before loading the register
with a new value, could also give a nice rts instruction.

Although, a dedicated SP (StackPointer) register inside
the CPU instead would be a better thing.

Two index registers (like X,Y) would be nice.
Also an addressing mode like (IND),Y as with the 6502 to
simplify things like building a screen editor.

With more registers and addressing modes, the instruction set
encoding will have to change.
But then, the old concept would require more than 16 Bits.

Another idea would be using two levels of encoding.
Means, some sort of "PALs/GALs", that decode a more CISC_like
16 Bit Opcode into, lets say, a MT15_like format...
just with more Bits.

Some of the things mentioned in here may be useful for you,
when designing your own instruction set, and some may not.

Dissecting machine code, generated from compilers out of C_sourcecode,
may also be a help to make up your decision.
Be warned, that your relationship to some popular microcontrollers
may become "strained" from any attempts of doing so.

But, of course, you're still on your own when inventing an instruction
set for your hobby CPU.

That's all for now.


[2012: Edit: why did nobody tell me,                   ]
[ that I was about to re_invent the Data General Nova ?]

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