CMSIS-DSP  Verison 1.1.0
CMSIS DSP Software Library
Vector Dot Product

Functions

void arm_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t blockSize, float32_t *result)
 Dot product of floating-point vectors.
void arm_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t blockSize, q63_t *result)
 Dot product of Q15 vectors.
void arm_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t blockSize, q63_t *result)
 Dot product of Q31 vectors.
void arm_dot_prod_q7 (q7_t *pSrcA, q7_t *pSrcB, uint32_t blockSize, q31_t *result)
 Dot product of Q7 vectors.

Description

Computes the dot product of two vectors. The vectors are multiplied element-by-element and then summed. There are separate functions for floating-point, Q7, Q15, and Q31 data types.


Function Documentation

void arm_dot_prod_f32 ( float32_t pSrcA,
float32_t pSrcB,
uint32_t  blockSize,
float32_t result 
)
Parameters:
[in]*pSrcApoints to the first input vector
[in]*pSrcBpoints to the second input vector
[in]blockSizenumber of samples in each vector
[out]*resultoutput result returned here
Returns:
none.
Examples:
arm_variance_example_f32.c.

References blockSize.

Referenced by main().

void arm_dot_prod_q15 ( q15_t pSrcA,
q15_t pSrcB,
uint32_t  blockSize,
q63_t result 
)
Parameters:
[in]*pSrcApoints to the first input vector
[in]*pSrcBpoints to the second input vector
[in]blockSizenumber of samples in each vector
[out]*resultoutput result returned here
Returns:
none.

Scaling and Overflow Behavior:

The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these results are added to a 64-bit accumulator in 34.30 format. Nonsaturating additions are used and given that there are 33 guard bits in the accumulator there is no risk of overflow. The return result is in 34.30 format.

References __SIMD32, and blockSize.

void arm_dot_prod_q31 ( q31_t pSrcA,
q31_t pSrcB,
uint32_t  blockSize,
q63_t result 
)
Parameters:
[in]*pSrcApoints to the first input vector
[in]*pSrcBpoints to the second input vector
[in]blockSizenumber of samples in each vector
[out]*resultoutput result returned here
Returns:
none.

Scaling and Overflow Behavior:

The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these are truncated to 2.48 format by discarding the lower 14 bits. The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. There are 15 guard bits in the accumulator and there is no risk of overflow as long as the length of the vectors is less than 2^16 elements. The return result is in 16.48 format.

References blockSize.

void arm_dot_prod_q7 ( q7_t pSrcA,
q7_t pSrcB,
uint32_t  blockSize,
q31_t result 
)
Parameters:
[in]*pSrcApoints to the first input vector
[in]*pSrcBpoints to the second input vector
[in]blockSizenumber of samples in each vector
[out]*resultoutput result returned here
Returns:
none.

Scaling and Overflow Behavior:

The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these results are added to an accumulator in 18.14 format. Nonsaturating additions are used and there is no danger of wrap around as long as the vectors are less than 2^18 elements long. The return result is in 18.14 format.

References __SIMD32, and blockSize.