Power

Functions
void	arm_power_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
	Sum of the squares of the elements of a floating-point vector.
void	arm_power_q15 (q15_t *pSrc, uint32_t blockSize, q63_t *pResult)
	Sum of the squares of the elements of a Q15 vector.
void	arm_power_q31 (q31_t *pSrc, uint32_t blockSize, q63_t *pResult)
	Sum of the squares of the elements of a Q31 vector.
void	arm_power_q7 (q7_t *pSrc, uint32_t blockSize, q31_t *pResult)
	Sum of the squares of the elements of a Q7 vector.

---

Description

Calculates the sum of the squares of the elements in the input vector. The underlying algorithm is used:

    
 	Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];    
 

There are separate functions for floating point, Q31, Q15, and Q7 data types.

---

Function Documentation

void arm_power_f32	(	float32_t *	pSrc,
		uint32_t	blockSize,
		float32_t *	pResult
	)

Parameters:

[in]	*pSrc	points to the input vector
[in]	blockSize	length of the input vector
[out]	*pResult	sum of the squares value returned here

Returns:

none.

References blockSize.

void arm_power_q15	(	q15_t *	pSrc,
		uint32_t	blockSize,
		q63_t *	pResult
	)

Parameters:

[in]	*pSrc	points to the input vector
[in]	blockSize	length of the input vector
[out]	*pResult	sum of the squares value returned here

Returns:

none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 34.30 format.

References __SIMD32, and blockSize.

void arm_power_q31	(	q31_t *	pSrc,
		uint32_t	blockSize,
		q63_t *	pResult
	)

Parameters:

[in]	*pSrc	points to the input vector
[in]	blockSize	length of the input vector
[out]	*pResult	sum of the squares value returned here

Returns:

none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. The input is represented in 1.31 format. Intermediate multiplication yields a 2.62 format, and this result is truncated to 2.48 format by discarding the lower 14 bits. The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. With 15 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 16.48 format.

References blockSize.

void arm_power_q7	(	q7_t *	pSrc,
		uint32_t	blockSize,
		q31_t *	pResult
	)

Parameters:

[in]	*pSrc	points to the input vector
[in]	blockSize	length of the input vector
[out]	*pResult	sum of the squares value returned here

Returns:

none.

Scaling and Overflow Behavior:

The function is implemented using a 32-bit internal accumulator. The input is represented in 1.7 format. Intermediate multiplication yields a 2.14 format, and this result is added without saturation to an accumulator in 18.14 format. With 17 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 18.14 format.

References __SIMD32, and blockSize.