Research
Full-stack co-design for efficient computing systems
Hardware, software, and firmware are designed together to make intelligent computing systems more efficient and practical.
Direction 01
HW/SW/FW Co-Design
Cross-layer methods for efficient AI accelerators and MCU-integrated computing systems.
Direction 02
Efficient Hardware
Arm-compatible CNN accelerators, ADC error compensation, and custom accelerator controllers.
Direction 03
SoC Verification
Emulator-simulator frameworks for embedded-software-driven partial RTL verification.