v PLA5: Flag control

PLA5: Flag control


PLA5 contains the flag_multiplexer, for testing the
TRUE condition.

it also generates the clock signals for loading the flags
during data calculation (step 3).
(Clock gating)

Note:
+ means, no transistor.
O means, transistor (BC847 or BC857) at this location.

     S0-++++++++OO++++++
     S1-++++++++OO++++++
 !CMD13-O+O+O+O+++++++++
  CMD13-+O+O+O+O++++++++
 !CMD14-OO++OO++++++++++
  CMD14-++OO++OO++++++++
 !CMD15-OOOO++++++++++++
  CMD15-++++OOOO++++++++
!N_FLAG-++O+++++++++++++
 N_FLAG-+++O++++++++++++
!Z_FLAG-++++O+++++++++++
 Z_FLAG-+++++O++++++++++
!C_FLAG-++++++O+++++++++
 C_FLAG-+++++++O++++++++
    INT-+O++++++++++++++
  PHI21-++++++++OO++++++
   CMD3-++++++++O+++++++
   CMD6-++++++++OO++++++
        ||||||||||||||||
        OOOOOOOO++++++++-TRUE
        ++++++++O+++++++-LC
        +++++++++O++++++-LNZ
        ++++++++++++++++-
        ++++++++++++++++-
        ++++++++++++++++-
        ++++++++++++++++-
        ++++++++++++++++-
        ++++++++++++++++-
        ++++++++++++++++-

Flag_multiplexer for testing TRUE condition
(if TRUE=1, execute instruction. if TRUE=0, skip instruction.)

     CMD15..13

     000 TRUE =        1
     001 TRUE = INT_FLAG
     010 TRUE =  !N_FLAG
     011 TRUE =   N_FLAG
     100 TRUE =  !Z_FLAG
     101 TRUE =   Z_FLAG
     110 TRUE =  !C_FLAG
     111 TRUE =   C_FLAG

Looks like some sort of 74151, doesn't it ?


Loading the flags:

     LC  = PHI21 & S1 & S0 & CMD6 &CMD3 //Load Flag C
     LNZ = PHI21 & S1 & S0 & CMD6       //Load Flag N,Z

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(c) Dieter Mueller 2005